Ville Linde ec1f9b948c UML: Added TZCNT instruction (Trailing Zero Count) [Ville Linde]		2016-05-20 01:28:48 +03:00
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bus	one step closer to core i2c eeprom implementation. nw.	2016-05-18 07:03:48 +02:00
cpu	UML: Added TZCNT instruction (Trailing Zero Count) [Ville Linde]	2016-05-20 01:28:48 +03:00
imagedev	Workaround for MT 06194 (potential segfault during floppy load)	2016-05-01 10:26:28 -04:00
machine	(nw) Fixed address map range for BAR config	2016-05-18 07:40:28 -06:00
sound	INC -> HXX makes editors and code analyzers see it as C++ (nw)	2016-05-01 20:27:50 +02:00
video	(nw) Fixed up PCI VGA legacy register mapping	2016-05-18 17:39:55 -06:00