mirror of
https://github.com/holub/mame
synced 2025-06-05 20:33:45 +03:00
97b6717027
This effectively revertsb380514764andc24473ddff, restoring the state at598cd52272. Before pushing, please check that what you're about to push is sane. Check your local commit log and ensure there isn't anything out-of-place before pushing to mainline. When things like this happen, it wastes everyone's time. I really don't need this in a week when real work™ is busting my balls and I'm behind where I want to be with preparing for MAME release.
542 lines
16 KiB
C
542 lines
16 KiB
C
// license:BSD-3-Clause
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// copyright-holders:Vas Crabb
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/***************************************************************************
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eigccx86.h
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x86 (32 and 64-bit) inline implementations for GCC compilers. This
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code is automatically included if appropriate by eminline.h.
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***************************************************************************/
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#ifndef MAME_OSD_EIGCCX86_H
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#define MAME_OSD_EIGCCX86_H
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// Include MMX/SSE intrinsics headers
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#ifdef __SSE2__
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#include <stdlib.h>
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#include <mmintrin.h> // MMX
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#include <xmmintrin.h> // SSE
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#include <emmintrin.h> // SSE2
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#endif
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/***************************************************************************
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INLINE MATH FUNCTIONS
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***************************************************************************/
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/*-------------------------------------------------
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mul_32x32 - perform a signed 32 bit x 32 bit
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multiply and return the full 64 bit result
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define mul_32x32 _mul_32x32
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inline int64_t ATTR_CONST ATTR_FORCE_INLINE
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_mul_32x32(int32_t a, int32_t b)
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{
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int64_t result;
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__asm__ (
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" imull %[b] ;"
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: [result] "=A" (result) // result in edx:eax
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: [a] "%a" (a) // 'a' should also be in eax on entry
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, [b] "rm" (b) // 'b' can be memory or register
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: "cc" // Clobbers condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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mulu_32x32 - perform an unsigned 32 bit x
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32 bit multiply and return the full 64 bit
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result
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define mulu_32x32 _mulu_32x32
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inline uint64_t ATTR_CONST ATTR_FORCE_INLINE
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_mulu_32x32(uint32_t a, uint32_t b)
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{
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uint64_t result;
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__asm__ (
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" mull %[b] ;"
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: [result] "=A" (result) // result in edx:eax
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: [a] "%a" (a) // 'a' should also be in eax on entry
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, [b] "rm" (b) // 'b' can be memory or register
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: "cc" // Clobbers condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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mul_32x32_hi - perform a signed 32 bit x 32 bit
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multiply and return the upper 32 bits of the
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result
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-------------------------------------------------*/
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#define mul_32x32_hi _mul_32x32_hi
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inline int32_t ATTR_CONST ATTR_FORCE_INLINE
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_mul_32x32_hi(int32_t a, int32_t b)
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{
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int32_t result, temp;
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__asm__ (
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" imull %[b] ;"
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: [result] "=d" (result) // result in edx
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, [temp] "=a" (temp) // This is effectively a clobber
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: [a] "a" (a) // 'a' should be in eax on entry
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, [b] "rm" (b) // 'b' can be memory or register
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: "cc" // Clobbers condition codes
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);
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return result;
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}
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/*-------------------------------------------------
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mulu_32x32_hi - perform an unsigned 32 bit x
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32 bit multiply and return the upper 32 bits
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of the result
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-------------------------------------------------*/
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#define mulu_32x32_hi _mulu_32x32_hi
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inline uint32_t ATTR_CONST ATTR_FORCE_INLINE
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_mulu_32x32_hi(uint32_t a, uint32_t b)
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{
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uint32_t result, temp;
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__asm__ (
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" mull %[b] ;"
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: [result] "=d" (result) // result in edx
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, [temp] "=a" (temp) // This is effectively a clobber
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: [a] "a" (a) // 'a' should be in eax on entry
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, [b] "rm" (b) // 'b' can be memory or register
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: "cc" // Clobbers condition codes
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);
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return result;
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}
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/*-------------------------------------------------
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mul_32x32_shift - perform a signed 32 bit x
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32 bit multiply and shift the result by the
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given number of bits before truncating the
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result to 32 bits
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define mul_32x32_shift _mul_32x32_shift
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inline int32_t ATTR_CONST ATTR_FORCE_INLINE
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_mul_32x32_shift(int32_t a, int32_t b, uint8_t shift)
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{
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int32_t result;
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// Valid for (0 <= shift <= 31)
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__asm__ (
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" imull %[b] ;"
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" shrdl %[shift], %%edx, %[result] ;"
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: [result] "=a" (result) // result ends up in eax
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: [a] "%0" (a) // 'a' should also be in eax on entry
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, [b] "rm" (b) // 'b' can be memory or register
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, [shift] "Ic" (shift) // 'shift' must be constant in 0-31 range or in cl
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: "%edx", "cc" // clobbers edx and condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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mulu_32x32_shift - perform an unsigned 32 bit x
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32 bit multiply and shift the result by the
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given number of bits before truncating the
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result to 32 bits
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define mulu_32x32_shift _mulu_32x32_shift
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inline uint32_t ATTR_CONST ATTR_FORCE_INLINE
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_mulu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift)
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{
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uint32_t result;
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// Valid for (0 <= shift <= 31)
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__asm__ (
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" mull %[b] ;"
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" shrdl %[shift], %%edx, %[result] ;"
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: [result] "=a" (result) // result ends up in eax
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: [a] "%0" (a) // 'a' should also be in eax on entry
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, [b] "rm" (b) // 'b' can be memory or register
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, [shift] "Ic" (shift) // 'shift' must be constant in 0-31 range or in cl
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: "%edx", "cc" // clobbers edx and condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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div_64x32 - perform a signed 64 bit x 32 bit
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divide and return the 32 bit quotient
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define div_64x32 _div_64x32
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inline int32_t ATTR_CONST ATTR_FORCE_INLINE
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_div_64x32(int64_t a, int32_t b)
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{
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int32_t result, temp;
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// Throws arithmetic exception if result doesn't fit in 32 bits
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__asm__ (
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" idivl %[b] ;"
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: [result] "=a" (result) // result ends up in eax
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, [temp] "=d" (temp) // this is effectively a clobber
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: [a] "A" (a) // 'a' in edx:eax
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, [b] "rm" (b) // 'b' in register or memory
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: "cc" // clobbers condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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divu_64x32 - perform an unsigned 64 bit x 32 bit
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divide and return the 32 bit quotient
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define divu_64x32 _divu_64x32
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inline uint32_t ATTR_CONST ATTR_FORCE_INLINE
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_divu_64x32(uint64_t a, uint32_t b)
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{
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uint32_t result, temp;
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// Throws arithmetic exception if result doesn't fit in 32 bits
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__asm__ (
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" divl %[b] ;"
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: [result] "=a" (result) // result ends up in eax
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, [temp] "=d" (temp) // this is effectively a clobber
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: [a] "A" (a) // 'a' in edx:eax
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, [b] "rm" (b) // 'b' in register or memory
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: "cc" // clobbers condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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div_64x32_rem - perform a signed 64 bit x 32
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bit divide and return the 32 bit quotient and
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32 bit remainder
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-------------------------------------------------*/
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#define div_64x32_rem _div_64x32_rem
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inline int32_t ATTR_FORCE_INLINE
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_div_64x32_rem(int64_t dividend, int32_t divisor, int32_t *remainder)
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{
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int32_t quotient;
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#ifndef __x86_64__
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// Throws arithmetic exception if result doesn't fit in 32 bits
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__asm__ (
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" idivl %[divisor] ;"
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: [result] "=a" (quotient) // quotient ends up in eax
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, [remainder] "=d" (*remainder) // remainder ends up in edx
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: [dividend] "A" (dividend) // 'dividend' in edx:eax
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, [divisor] "rm" (divisor) // 'divisor' in register or memory
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: "cc" // clobbers condition codes
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);
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#else
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int32_t const divh{ int32_t(uint32_t(uint64_t(dividend) >> 32)) };
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int32_t const divl{ int32_t(uint32_t(uint64_t(dividend))) };
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// Throws arithmetic exception if result doesn't fit in 32 bits
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__asm__ (
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" idivl %[divisor] ;"
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: [result] "=a" (quotient) // quotient ends up in eax
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, [remainder] "=d" (*remainder) // remainder ends up in edx
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: [divl] "a" (divl) // 'dividend' in edx:eax
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, [divh] "d" (divh)
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, [divisor] "rm" (divisor) // 'divisor' in register or memory
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: "cc" // clobbers condition codes
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);
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#endif
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return quotient;
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}
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/*-------------------------------------------------
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divu_64x32_rem - perform an unsigned 64 bit x
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32 bit divide and return the 32 bit quotient
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and 32 bit remainder
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-------------------------------------------------*/
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#define divu_64x32_rem _divu_64x32_rem
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inline uint32_t ATTR_FORCE_INLINE
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_divu_64x32_rem(uint64_t dividend, uint32_t divisor, uint32_t *remainder)
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{
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uint32_t quotient;
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#ifndef __x86_64__
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// Throws arithmetic exception if result doesn't fit in 32 bits
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__asm__ (
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" divl %[divisor] ;"
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: [result] "=a" (quotient) // quotient ends up in eax
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, [remainder] "=d" (*remainder) // remainder ends up in edx
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: [dividend] "A" (dividend) // 'dividend' in edx:eax
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, [divisor] "rm" (divisor) // 'divisor' in register or memory
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: "cc" // clobbers condition codes
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);
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#else
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uint32_t const divh{ uint32_t(dividend >> 32) };
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uint32_t const divl{ uint32_t(dividend) };
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// Throws arithmetic exception if result doesn't fit in 32 bits
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__asm__ (
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" divl %[divisor] ;"
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: [result] "=a" (quotient) // quotient ends up in eax
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, [remainder] "=d" (*remainder) // remainder ends up in edx
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: [divl] "a" (divl) // 'dividend' in edx:eax
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, [divh] "d" (divh)
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, [divisor] "rm" (divisor) // 'divisor' in register or memory
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: "cc" // clobbers condition codes
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);
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#endif
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return quotient;
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}
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/*-------------------------------------------------
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div_32x32_shift - perform a signed divide of
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two 32 bit values, shifting the first before
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division, and returning the 32 bit quotient
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define div_32x32_shift _div_32x32_shift
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inline int32_t ATTR_CONST ATTR_FORCE_INLINE
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_div_32x32_shift(int32_t a, int32_t b, uint8_t shift)
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{
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int32_t result;
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// Valid for (0 <= shift <= 31)
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// Throws arithmetic exception if result doesn't fit in 32 bits
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__asm__ (
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" cdq ;"
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" shldl %[shift], %[a], %%edx ;"
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" shll %[shift], %[a] ;"
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" idivl %[b] ;"
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: [result] "=&a" (result) // result ends up in eax
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: [a] "0" (a) // 'a' should also be in eax on entry
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, [b] "rm" (b) // 'b' can be memory or register
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, [shift] "Ic" (shift) // 'shift' must be constant in 0-31 range or in cl
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: "%edx", "cc" // clobbers edx and condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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divu_32x32_shift - perform an unsigned divide of
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two 32 bit values, shifting the first before
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division, and returning the 32 bit quotient
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define divu_32x32_shift _divu_32x32_shift
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inline uint32_t ATTR_CONST ATTR_FORCE_INLINE
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_divu_32x32_shift(uint32_t a, uint32_t b, uint8_t shift)
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{
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int32_t result;
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// Valid for (0 <= shift <= 31)
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// Throws arithmetic exception if result doesn't fit in 32 bits
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__asm__ (
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" clr %%edx ;"
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" shldl %[shift], %[a], %%edx ;"
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" shll %[shift], %[a] ;"
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" divl %[b] ;"
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: [result] "=&a" (result) // result ends up in eax
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: [a] "0" (a) // 'a' should also be in eax on entry
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, [b] "rm" (b) // 'b' can be memory or register
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, [shift] "Ic" (shift) // 'shift' must be constant in 0-31 range or in cl
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: "%edx", "cc" // clobbers edx and condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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mod_64x32 - perform a signed 64 bit x 32 bit
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divide and return the 32 bit remainder
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define mod_64x32 _mod_64x32
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inline int32_t ATTR_CONST ATTR_FORCE_INLINE
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_mod_64x32(int64_t a, int32_t b)
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{
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int32_t result, temp;
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// Throws arithmetic exception if quotient doesn't fit in 32 bits
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__asm__ (
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" idivl %[b] ;"
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: [result] "=d" (result) // Result ends up in edx
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, [temp] "=a" (temp) // This is effectively a clobber
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: [a] "A" (a) // 'a' in edx:eax
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, [b] "rm" (b) // 'b' in register or memory
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: "cc" // Clobbers condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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modu_64x32 - perform an unsigned 64 bit x 32 bit
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divide and return the 32 bit remainder
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-------------------------------------------------*/
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#ifndef __x86_64__
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#define modu_64x32 _modu_64x32
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inline uint32_t ATTR_CONST ATTR_FORCE_INLINE
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_modu_64x32(uint64_t a, uint32_t b)
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{
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uint32_t result, temp;
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// Throws arithmetic exception if quotient doesn't fit in 32 bits
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__asm__ (
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" divl %[b] ;"
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: [result] "=d" (result) // Result ends up in edx
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, [temp] "=a" (temp) // This is effectively a clobber
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: [a] "A" (a) // 'a' in edx:eax
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, [b] "rm" (b) // 'b' in register or memory
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: "cc" // Clobbers condition codes
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);
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return result;
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}
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#endif
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/*-------------------------------------------------
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recip_approx - compute an approximate floating
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point reciprocal
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-------------------------------------------------*/
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#ifdef __SSE2__
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#define recip_approx _recip_approx
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inline float ATTR_CONST
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_recip_approx(float value)
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{
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__m128 const value_xmm = _mm_set_ss(value);
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__m128 const result_xmm = _mm_rcp_ss(value_xmm);
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float result;
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_mm_store_ss(&result, result_xmm);
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return result;
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}
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#endif
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/*-------------------------------------------------
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mul_64x64 - perform a signed 64 bit x 64 bit
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multiply and return the full 128 bit result
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-------------------------------------------------*/
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#ifdef __x86_64__
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#define mul_64x64 _mul_64x64
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inline int64_t ATTR_FORCE_INLINE
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_mul_64x64(int64_t a, int64_t b, int64_t *hi)
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{
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__int128 const r(__int128(a) * b);
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*hi = int64_t(uint64_t((unsigned __int128)r >> 64));
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return int64_t(uint64_t((unsigned __int128)r));
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}
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#endif
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/*-------------------------------------------------
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mulu_64x64 - perform an unsigned 64 bit x 64
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bit multiply and return the full 128 bit result
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-------------------------------------------------*/
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#ifdef __x86_64__
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#define mulu_64x64 _mulu_64x64
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inline uint64_t ATTR_FORCE_INLINE
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_mulu_64x64(uint64_t a, uint64_t b, uint64_t *hi)
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{
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unsigned __int128 const r((unsigned __int128)a * b);
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*hi = uint64_t(r >> 64);
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return uint64_t(r);
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}
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#endif
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/***************************************************************************
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INLINE BIT MANIPULATION FUNCTIONS
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***************************************************************************/
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/*-------------------------------------------------
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count_leading_zeros - return the number of
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leading zero bits in a 32-bit value
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-------------------------------------------------*/
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#define count_leading_zeros _count_leading_zeros
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inline uint8_t ATTR_CONST ATTR_FORCE_INLINE
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_count_leading_zeros(uint32_t value)
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|
{
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|
uint32_t result;
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|
__asm__ (
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|
" bsrl %[value], %[result] ;"
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|
" cmovzl %[bias], %[result] ;"
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|
: [result] "=&r" (result) // result can be in any register
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|
: [value] "rm" (value) // 'value' can be register or memory
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|
, [bias] "rm" (~uint32_t(0)) // 'bias' can be register or memory
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|
: "cc" // clobbers condition codes
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|
);
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|
return 31U - result;
|
|
}
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|
|
|
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/*-------------------------------------------------
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|
count_leading_ones - return the number of
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|
leading one bits in a 32-bit value
|
|
-------------------------------------------------*/
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|
|
|
#define count_leading_ones _count_leading_ones
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|
inline uint8_t ATTR_CONST ATTR_FORCE_INLINE
|
|
_count_leading_ones(uint32_t value)
|
|
{
|
|
uint32_t result;
|
|
__asm__ (
|
|
" bsrl %[value], %[result] ;"
|
|
" cmovzl %[bias], %[result] ;"
|
|
: [result] "=&r" (result) // result can be in any register
|
|
: [value] "rm" (~value) // 'value' can be register or memory
|
|
, [bias] "rm" (~uint32_t(0)) // 'bias' can be register or memory
|
|
: "cc" // clobbers condition codes
|
|
);
|
|
return 31U - result;
|
|
}
|
|
|
|
#endif // MAME_OSD_EIGCCX86_H
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