mirror of
https://github.com/holub/mame
synced 2025-10-04 16:34:53 +03:00
647 lines
19 KiB
C++
647 lines
19 KiB
C++
// license:BSD-3-Clause
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// copyright-holders:Nathan Woods
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/*** m6809: Portable 6809 emulator ******************************************
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Copyright John Butler
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References:
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6809 Simulator V09, By L.C. Benschop, Eindhoven The Netherlands.
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m6809: Portable 6809 emulator, DS (6809 code in MAME, derived from
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the 6809 Simulator V09)
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6809 Microcomputer Programming & Interfacing with Experiments"
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by Andrew C. Staugaard, Jr.; Howard W. Sams & Co., Inc.
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System dependencies: uint16_t must be 16 bit unsigned int
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uint8_t must be 8 bit unsigned int
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uint32_t must be more than 16 bits
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arrays up to 65536 bytes must be supported
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machine must be twos complement
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History:
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July 2016 ErikGav:
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Unify with 6309 pairs and quads (A+B=D, E+F=W, D+W=Q)
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March 2013 NPW:
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Rewrite of 6809/6309/Konami CPU; attempted to make cycle exact.
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991026 HJB:
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Fixed missing calls to cpu_changepc() for the TFR and EXG ocpodes.
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Replaced m6809_slapstic checks by a macro (CHANGE_PC). ESB still
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needs the tweaks.
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991024 HJB:
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Tried to improve speed: Using bit7 of cycles1/2 as flag for multi
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byte opcodes is gone, those opcodes now call fetch_effective_address().
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Got rid of the slow/fast flags for stack (S and U) memory accesses.
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Minor changes to use 32 bit values as arguments to memory functions
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and added defines for that purpose (e.g. X = 16bit XD = 32bit).
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990312 HJB:
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Added bugfixes according to Aaron's findings.
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Reset only sets CC_II and CC_IF, DP to zero and PC from reset vector.
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990311 HJB:
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Added _info functions. Now uses static m6808_Regs struct instead
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of single statics. Changed the 16 bit registers to use the generic
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PAIR union. Registers defined using macros. Split the core into
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four execution loops for M6802, M6803, M6808 and HD63701.
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TST, TSTA and TSTB opcodes reset carry flag.
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Modified the read/write stack handlers to push LSB first then MSB
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and pull MSB first then LSB.
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990228 HJB:
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Changed the interrupt handling again. Now interrupts are taken
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either right at the moment the lines are asserted or whenever
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an interrupt is enabled and the corresponding line is still
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asserted. That way the pending_interrupts checks are not
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needed anymore. However, the CWAI and SYNC flags still need
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some flags, so I changed the name to 'int_state'.
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This core also has the code for the old interrupt system removed.
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990225 HJB:
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Cleaned up the code here and there, added some comments.
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Slightly changed the SAR opcodes (similiar to other CPU cores).
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Added symbolic names for the flag bits.
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Changed the way CWAI/Interrupt() handle CPU state saving.
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A new flag M6809_STATE in pending_interrupts is used to determine
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if a state save is needed on interrupt entry or already done by CWAI.
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Added M6809_IRQ_LINE and M6809_FIRQ_LINE defines to m6809.h
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Moved the internal interrupt_pending flags from m6809.h to m6809.c
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Changed CWAI cycles2[0x3c] to be 2 (plus all or at least 19 if
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CWAI actually pushes the entire state).
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Implemented undocumented TFR/EXG for undefined source and mixed 8/16
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bit transfers (they should transfer/exchange the constant $ff).
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Removed unused jmp/jsr _slap functions from 6809ops.c,
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m6809_slapstick check moved into the opcode functions.
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******************************************************************************
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M6809 cycle timings are relative to a four-phase clock cycle defined by
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the Q and E signals on pins 35 and 34. The Q clock must lead the E clock
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by approximately half a cycle. On the MC6809E, Q and E are inputs, and
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one 74LS74 wired as a two-stage Johnson counter is almost sufficient to
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generate both (though E requires voltage levels above TTL). On the
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MC6809, however, Q and E are output from an internal clock generator
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which can be driven by a crystal oscillator connected to pins 38 and 39.
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(The MC6809E reuses the same numbered pins for the unrelated TSC and LIC
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functions.) The frequencies of Q and E on the MC6809 are that of the XTAL
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divided by 4. MAME's emulation formerly assigned this internal clock
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divider to the MC6809E and not to the MC6809; the confusion resulting
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from this error is in the process of being straightened out.
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Maximum clock ratings:
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Q & E EXTAL
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MC6809(E) 1.0 MHz 4.0 MHz
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MC68A09(E) 1.5 MHz 6.0 MHz
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MC68B09(E) 2.0 MHz 8.0 MHz
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HD63B09(E) 2.0 MHz 8.0 MHz
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HD63C09(E) 3.0 MHz 12.0 MHz
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*****************************************************************************/
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#include "emu.h"
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#include "debugger.h"
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#include "m6809.h"
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#include "m6809inl.h"
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#include "6x09dasm.h"
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//**************************************************************************
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// PARAMETERS
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//**************************************************************************
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#define LOG_INTERRUPTS 0
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// turn off 'unreferenced label' errors
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#if defined(__GNUC__)
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#pragma GCC diagnostic ignored "-Wunused-label"
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#endif
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#ifdef _MSC_VER
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#pragma warning( disable : 4102 )
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#endif
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//**************************************************************************
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// DEVICE INTERFACE
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//**************************************************************************
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DEFINE_DEVICE_TYPE(MC6809, mc6809_device, "mc6809", "MC6809")
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DEFINE_DEVICE_TYPE(MC6809E, mc6809e_device, "mc6809e", "MC6809E")
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DEFINE_DEVICE_TYPE(M6809, m6809_device, "m6809", "MC6809 (legacy)")
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DEFINE_DEVICE_TYPE(M6809E, m6809e_device, "m6809e", "MC6809E (legacy)")
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//-------------------------------------------------
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// m6809_base_device - constructor
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//-------------------------------------------------
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m6809_base_device::m6809_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, int divider)
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: cpu_device(mconfig, type, tag, owner, clock),
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m_lic_func(*this),
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m_program_config("program", ENDIANNESS_BIG, 8, 16),
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m_sprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 8, 16),
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m_clock_divider(divider)
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{
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m_mintf = nullptr;
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void m6809_base_device::device_start()
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{
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if (!m_mintf)
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m_mintf = new mi_default;
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m_mintf->m_program = &space(AS_PROGRAM);
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m_mintf->m_sprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_mintf->m_program;
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m_mintf->m_direct = m_mintf->m_program->direct<0>();
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m_mintf->m_sdirect = m_mintf->m_sprogram->direct<0>();
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m_lic_func.resolve_safe();
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// register our state for the debugger
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state_add(STATE_GENPCBASE, "CURPC", m_ppc.w).callimport().noshow();
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state_add(STATE_GENFLAGS, "CURFLAGS", m_cc).formatstr("%8s").noshow();
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state_add(M6809_PC, "PC", m_pc.w).callimport().mask(0xffff);
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state_add(M6809_S, "S", m_s.w).mask(0xffff);
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state_add(M6809_CC, "CC", m_cc).mask(0xff);
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state_add(M6809_DP, "DP", m_dp).mask(0xff);
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if (is_6809())
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{
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state_add(M6809_A, "A", m_q.r.a).mask(0xff);
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state_add(M6809_B, "B", m_q.r.b).mask(0xff);
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state_add(M6809_D, "D", m_q.r.d).mask(0xffff);
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state_add(M6809_X, "X", m_x.w).mask(0xffff);
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state_add(M6809_Y, "Y", m_y.w).mask(0xffff);
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state_add(M6809_U, "U", m_u.w).mask(0xffff);
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}
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// initialize variables
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m_cc = 0;
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m_pc.w = 0;
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m_s.w = 0;
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m_u.w = 0;
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m_q.q = 0;
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m_x.w = 0;
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m_y.w = 0;
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m_dp = 0;
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m_reg = 0;
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m_reg8 = nullptr;
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m_reg16 = nullptr;
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// setup regtable
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save_item(NAME(m_pc.w));
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save_item(NAME(m_ppc.w));
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save_item(NAME(m_q.q));
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save_item(NAME(m_dp));
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save_item(NAME(m_u.w));
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save_item(NAME(m_s.w));
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save_item(NAME(m_x.w));
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save_item(NAME(m_y.w));
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save_item(NAME(m_cc));
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save_item(NAME(m_temp.w));
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save_item(NAME(m_opcode));
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save_item(NAME(m_nmi_asserted));
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save_item(NAME(m_nmi_line));
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save_item(NAME(m_firq_line));
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save_item(NAME(m_irq_line));
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save_item(NAME(m_lds_encountered));
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save_item(NAME(m_state));
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save_item(NAME(m_ea.w));
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save_item(NAME(m_addressing_mode));
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save_item(NAME(m_reg));
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save_item(NAME(m_cond));
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// set our instruction counter
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m_icountptr = &m_icount;
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m_icount = 0;
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void m6809_base_device::device_reset()
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{
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m_nmi_line = false;
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m_nmi_asserted = false;
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m_firq_line = false;
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m_irq_line = false;
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m_lds_encountered = false;
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m_dp = 0x00; // reset direct page register
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m_cc |= CC_I; // IRQ disabled
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m_cc |= CC_F; // FIRQ disabled
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m_pc.b.h = space(AS_PROGRAM).read_byte(VECTOR_RESET_FFFE + 0);
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m_pc.b.l = space(AS_PROGRAM).read_byte(VECTOR_RESET_FFFE + 1);
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// reset sub-instruction state
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reset_state();
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}
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//-------------------------------------------------
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// device_pre_save - device-specific pre-save
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//-------------------------------------------------
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void m6809_base_device::device_pre_save()
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{
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if (m_reg8 == &m_q.r.a)
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m_reg = M6809_A;
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else if (m_reg8 == &m_q.r.b)
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m_reg = M6809_B;
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else if (m_reg16 == &m_q.p.d)
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m_reg = M6809_D;
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else if (m_reg16 == &m_x)
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m_reg = M6809_X;
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else if (m_reg16 == &m_y)
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m_reg = M6809_Y;
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else if (m_reg16 == &m_u)
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m_reg = M6809_U;
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else if (m_reg16 == &m_s)
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m_reg = M6809_S;
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else
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m_reg = 0;
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}
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//-------------------------------------------------
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// device_post_load - device-specific post-load
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//-------------------------------------------------
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void m6809_base_device::device_post_load()
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{
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m_reg8 = nullptr;
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m_reg16 = nullptr;
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switch(m_reg)
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{
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case M6809_A:
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set_regop8(m_q.r.a);
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break;
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case M6809_B:
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set_regop8(m_q.r.b);
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break;
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case M6809_D:
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set_regop16(m_q.p.d);
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break;
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case M6809_X:
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set_regop16(m_x);
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break;
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case M6809_Y:
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set_regop16(m_y);
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break;
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case M6809_U:
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set_regop16(m_u);
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break;
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case M6809_S:
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set_regop16(m_s);
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break;
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}
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}
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//-------------------------------------------------
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// memory_space_config - return the configuration
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// of the specified address space, or nullptr if
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// the space doesn't exist
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//-------------------------------------------------
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device_memory_interface::space_config_vector m6809_base_device::memory_space_config() const
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{
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if(has_configured_map(AS_OPCODES))
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return space_config_vector {
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std::make_pair(AS_PROGRAM, &m_program_config),
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std::make_pair(AS_OPCODES, &m_sprogram_config)
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};
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else
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return space_config_vector {
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std::make_pair(AS_PROGRAM, &m_program_config)
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};
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}
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//-------------------------------------------------
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// state_import - import state into the device,
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// after it has been set
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//-------------------------------------------------
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void m6809_base_device::state_import(const device_state_entry &entry)
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{
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switch (entry.index())
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{
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case M6809_PC:
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m_ppc.w = m_pc.w;
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break;
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case STATE_GENPCBASE:
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m_pc.w = m_ppc.w;
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break;
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}
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}
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//-------------------------------------------------
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// state_string_export - export state as a string
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// for the debugger
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//-------------------------------------------------
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void m6809_base_device::state_string_export(const device_state_entry &entry, std::string &str) const
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{
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switch (entry.index())
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{
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case STATE_GENFLAGS:
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str = string_format("%c%c%c%c%c%c%c%c",
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(m_cc & 0x80) ? 'E' : '.',
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(m_cc & 0x40) ? 'F' : '.',
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(m_cc & 0x20) ? 'H' : '.',
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(m_cc & 0x10) ? 'I' : '.',
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(m_cc & 0x08) ? 'N' : '.',
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(m_cc & 0x04) ? 'Z' : '.',
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(m_cc & 0x02) ? 'V' : '.',
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(m_cc & 0x01) ? 'C' : '.');
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break;
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}
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}
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//-------------------------------------------------
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// disassemble - call the disassembly
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// helper function
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//-------------------------------------------------
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util::disasm_interface *m6809_base_device::create_disassembler()
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{
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return new m6809_disassembler;
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}
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//**************************************************************************
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// CORE EXECUTION LOOP
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//**************************************************************************
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//-------------------------------------------------
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// execute_clocks_to_cycles - convert the raw
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// clock into cycles per second
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//-------------------------------------------------
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uint64_t m6809_base_device::execute_clocks_to_cycles(uint64_t clocks) const
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{
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return (clocks + m_clock_divider - 1) / m_clock_divider;
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}
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//-------------------------------------------------
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// execute_cycles_to_clocks - convert a cycle
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// count back to raw clocks
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//-------------------------------------------------
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uint64_t m6809_base_device::execute_cycles_to_clocks(uint64_t cycles) const
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{
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return cycles * m_clock_divider;
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}
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//-------------------------------------------------
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// execute_min_cycles - return minimum number of
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// cycles it takes for one instruction to execute
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//-------------------------------------------------
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uint32_t m6809_base_device::execute_min_cycles() const
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{
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return 1;
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}
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//-------------------------------------------------
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// execute_max_cycles - return maximum number of
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// cycles it takes for one instruction to execute
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//-------------------------------------------------
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uint32_t m6809_base_device::execute_max_cycles() const
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{
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return 19;
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}
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//-------------------------------------------------
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// execute_input_lines - return the number of
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// input/interrupt lines
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//-------------------------------------------------
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uint32_t m6809_base_device::execute_input_lines() const
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{
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return 3;
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}
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//-------------------------------------------------
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// execute_set_input - act on a changed input/
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// interrupt line
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//-------------------------------------------------
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void m6809_base_device::execute_set_input(int inputnum, int state)
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{
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if (LOG_INTERRUPTS)
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logerror("%s: inputnum=%s state=%d totalcycles=%d\n", machine().describe_context(), inputnum_string(inputnum), state, (int) attotime_to_clocks(machine().time()));
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switch(inputnum)
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{
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case INPUT_LINE_NMI:
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// NMI is edge triggered
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m_nmi_asserted = m_nmi_asserted || ((state != CLEAR_LINE) && !m_nmi_line && m_lds_encountered);
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m_nmi_line = (state != CLEAR_LINE);
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break;
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case M6809_FIRQ_LINE:
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// FIRQ is line triggered
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m_firq_line = (state != CLEAR_LINE);
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break;
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case M6809_IRQ_LINE:
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// IRQ is line triggered
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m_irq_line = (state != CLEAR_LINE);
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break;
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}
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}
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//-------------------------------------------------
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// inputnum_string
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//-------------------------------------------------
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const char *m6809_base_device::inputnum_string(int inputnum)
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{
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switch(inputnum)
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{
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case INPUT_LINE_NMI: return "NMI";
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case M6809_FIRQ_LINE: return "FIRQ";
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case M6809_IRQ_LINE: return "IRQ";
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default: return "???";
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}
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}
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//-------------------------------------------------
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// read_exgtfr_register
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//-------------------------------------------------
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m6809_base_device::exgtfr_register m6809_base_device::read_exgtfr_register(uint8_t reg)
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{
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exgtfr_register result;
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result.byte_value = 0xFF;
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result.word_value = 0x00FF;
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switch(reg & 0x0F)
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{
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case 0: result.word_value = m_q.r.d; break; // D
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case 1: result.word_value = m_x.w; break; // X
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case 2: result.word_value = m_y.w; break; // Y
|
|
case 3: result.word_value = m_u.w; break; // U
|
|
case 4: result.word_value = m_s.w; break; // S
|
|
case 5: result.word_value = m_pc.w; break; // PC
|
|
case 8: result.byte_value = m_q.r.a; break; // A
|
|
case 9: result.byte_value = m_q.r.b; break; // B
|
|
case 10: result.byte_value = m_cc; break; // CC
|
|
case 11: result.byte_value = m_dp; break; // DP
|
|
}
|
|
return result;
|
|
}
|
|
|
|
|
|
//-------------------------------------------------
|
|
// write_exgtfr_register
|
|
//-------------------------------------------------
|
|
|
|
void m6809_base_device::write_exgtfr_register(uint8_t reg, m6809_base_device::exgtfr_register value)
|
|
{
|
|
switch(reg & 0x0F)
|
|
{
|
|
case 0: m_q.r.d = value.word_value; break; // D
|
|
case 1: m_x.w = value.word_value; break; // X
|
|
case 2: m_y.w = value.word_value; break; // Y
|
|
case 3: m_u.w = value.word_value; break; // U
|
|
case 4: m_s.w = value.word_value; break; // S
|
|
case 5: m_pc.w = value.word_value; break; // PC
|
|
case 8: m_q.r.a = value.byte_value; break; // A
|
|
case 9: m_q.r.b = value.byte_value; break; // B
|
|
case 10: m_cc = value.byte_value; break; // CC
|
|
case 11: m_dp = value.byte_value; break; // DP
|
|
}
|
|
}
|
|
|
|
|
|
//-------------------------------------------------
|
|
// log_illegal - used to log hits to illegal
|
|
// instructions (except for HD6309 which traps)
|
|
//-------------------------------------------------
|
|
|
|
void m6809_base_device::log_illegal()
|
|
{
|
|
logerror("%s: illegal opcode at %04x\n", machine().describe_context(), (unsigned) m_pc.w);
|
|
}
|
|
|
|
|
|
//-------------------------------------------------
|
|
// execute_one - try to execute a single instruction
|
|
//-------------------------------------------------
|
|
|
|
void m6809_base_device::execute_one()
|
|
{
|
|
switch(pop_state())
|
|
{
|
|
#include "cpu/m6809/m6809.hxx"
|
|
}
|
|
}
|
|
|
|
|
|
//-------------------------------------------------
|
|
// execute_run - execute a timeslice's worth of
|
|
// opcodes
|
|
//-------------------------------------------------
|
|
|
|
void m6809_base_device::execute_run()
|
|
{
|
|
do
|
|
{
|
|
execute_one();
|
|
} while(m_icount > 0);
|
|
}
|
|
|
|
|
|
uint8_t m6809_base_device::mi_default::read(uint16_t adr)
|
|
{
|
|
return m_program->read_byte(adr);
|
|
}
|
|
|
|
uint8_t m6809_base_device::mi_default::read_opcode(uint16_t adr)
|
|
{
|
|
return m_sdirect->read_byte(adr);
|
|
}
|
|
|
|
uint8_t m6809_base_device::mi_default::read_opcode_arg(uint16_t adr)
|
|
{
|
|
return m_direct->read_byte(adr);
|
|
}
|
|
|
|
|
|
void m6809_base_device::mi_default::write(uint16_t adr, uint8_t val)
|
|
{
|
|
m_program->write_byte(adr, val);
|
|
}
|
|
|
|
|
|
|
|
//-------------------------------------------------
|
|
// mc6809_device
|
|
//-------------------------------------------------
|
|
|
|
mc6809_device::mc6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
|
: m6809_base_device(mconfig, tag, owner, clock, MC6809, 4)
|
|
{
|
|
}
|
|
|
|
|
|
|
|
//-------------------------------------------------
|
|
// mc6809e_device
|
|
//-------------------------------------------------
|
|
|
|
mc6809e_device::mc6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
|
: m6809_base_device(mconfig, tag, owner, clock, MC6809E, 1)
|
|
{
|
|
}
|
|
|
|
|
|
|
|
//-------------------------------------------------
|
|
// m6809_device
|
|
//-------------------------------------------------
|
|
|
|
m6809_device::m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
|
: m6809_base_device(mconfig, tag, owner, clock, M6809, 1)
|
|
{
|
|
}
|
|
|
|
|
|
|
|
//-------------------------------------------------
|
|
// m6809e_device
|
|
//-------------------------------------------------
|
|
|
|
m6809e_device::m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
|
: m6809_base_device(mconfig, tag, owner, clock, M6809E, 4)
|
|
{
|
|
}
|