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6957c46998
- Update to Softloat 3 from 2 - FREM and FMOD now generate the quotient bits in FPSR, required by Apple's SANE to do sin/cos/tan properly. - FMOVE of a float to a Dx integer register generates the exception status bits, fixing square roots in SANE - Rewrote how FMOVEM instructions are decoded and executed, fixing issues including skipping too few or too many opcode bytes and causing serious weird behavior. - FPU instructions all now have more realistic cycle timings for a 68881. - All FPU instructions now generate exception bits in FPSR. 3rdparty/softfloat3: Updates [R. Belmont] - Softfloat3 was always being built for a big-endian host, causing incorrect math on LE x64 and AArch64 machines. - Fixed up Softfloat3 to build properly as part of MAME and up-ported the Bochs extensions. In latest Bochs, they were only partially up-ported and Softfloat3 had been hacked up to be more like 2; here they're fixed to work with stock Softfloat3.
69 lines
2.4 KiB
C
69 lines
2.4 KiB
C
/*============================================================================
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This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
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Package, Release 3e, by John R. Hauser.
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Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
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University of California. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions, and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions, and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the University nor the names of its contributors may
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be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
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DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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=============================================================================*/
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#ifndef softfloat_extra_h
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#define softfloat_extra_h 1
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#include "../source/include/internals.h"
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// ======= floatx80 ======= //
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inline bool extF80_isUnsupported(extFloat80_t a)
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{
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return ((a.signExp & 0x7FFF) && !(a.signif & uint64_t(0x8000000000000000)));
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}
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inline bool extF80_sign(extFloat80_t a)
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{
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return signExtF80UI64(a.signExp);
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}
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inline int16_t extF80_exp(extFloat80_t a)
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{
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return expExtF80UI64(a.signExp);
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}
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inline uint64_t extF80_fraction(extFloat80_t a)
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{
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return a.signif;
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}
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extFloat80_t &floatx80_chs(extFloat80_t ®);
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extFloat80_t packToExtF80(uint16_t signExp, uint64_t sig);
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extFloat80_t packToExtF80(bool sign, uint16_t exp, uint64_t sig);
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#endif
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