mirror of
https://github.com/holub/mame
synced 2025-05-28 08:33:05 +03:00
fecfc465df
meant adding a machine() accessor but it's worth it for consistency. This will allow future changes from reference to pointer to happen transparently for devices. [Aaron Giles] Simple S&R: m_machine( *[^ (!=;]) machine()\1
606 lines
14 KiB
C
606 lines
14 KiB
C
/***************************************************************************
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I2C Memory
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Generic ram/rom/eeprom/flash on an i2c bus. Supports specifying the slave address,
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the data size & the page size for writing.
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inputs:
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e0,e1,e2 lower 3 bits of the slave address
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sda serial data
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scl serial clock
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wc write protect
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outputs:
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sda serial data
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The memory address is only 8 bits, devices larger than this have multiple slave addresses.
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The top five address bits are set at manufacture time, two values are standard.
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Up to 4096 bytes can be addressed.
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***************************************************************************/
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#include "emu.h"
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#include "machine/i2cmem.h"
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#define STATE_IDLE ( 0 )
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#define STATE_DEVSEL ( 1 )
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#define STATE_BYTEADDR ( 2 )
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#define STATE_DATAIN ( 3 )
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#define STATE_DATAOUT ( 4 )
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#define DEVSEL_RW ( 1 )
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#define DEVSEL_ADDRESS ( 0xfe )
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//**************************************************************************
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// DEBUGGING
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//**************************************************************************
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#define VERBOSE_LEVEL ( 0 )
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INLINE void ATTR_PRINTF( 3, 4 ) verboselog( device_t *device, int n_level, const char *s_fmt, ... )
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{
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if( VERBOSE_LEVEL >= n_level )
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{
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va_list v;
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char buf[ 32768 ];
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va_start( v, s_fmt );
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vsprintf( buf, s_fmt, v );
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va_end( v );
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logerror( "%s: I2CMEM(%s) %s", device->machine().describe_context( ), device->tag(), buf );
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}
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}
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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const device_type I2CMEM = i2cmem_device_config::static_alloc_device_config;
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static ADDRESS_MAP_START( i2cmem_map8, AS_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x0fff) AM_RAM
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ADDRESS_MAP_END
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//**************************************************************************
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// DEVICE CONFIGURATION
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//**************************************************************************
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//-------------------------------------------------
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// i2cmem_device_config - constructor
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//-------------------------------------------------
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i2cmem_device_config::i2cmem_device_config( const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock )
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: device_config(mconfig, static_alloc_device_config, "I2CMEM", tag, owner, clock),
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device_config_memory_interface(mconfig, *this),
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device_config_nvram_interface(mconfig, *this)
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{
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m_address_bits = 0;
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int i = m_data_size - 1;
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while( i > 0 )
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{
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m_address_bits++;
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i >>= 1;
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}
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}
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//-------------------------------------------------
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// static_alloc_device_config - allocate a new
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// configuration object
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//-------------------------------------------------
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device_config *i2cmem_device_config::static_alloc_device_config( const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock )
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{
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return global_alloc( i2cmem_device_config( mconfig, tag, owner, clock ) );
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}
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//-------------------------------------------------
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// alloc_device - allocate a new device object
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//-------------------------------------------------
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device_t *i2cmem_device_config::alloc_device( running_machine &machine ) const
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{
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return auto_alloc( machine, i2cmem_device( machine, *this ) );
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}
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//-------------------------------------------------
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// static_set_interface - set the device
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// configuration
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//-------------------------------------------------
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void i2cmem_device_config::static_set_interface(device_config *device, const i2cmem_interface &interface)
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{
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i2cmem_device_config *i2cmem = downcast<i2cmem_device_config *>(device);
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*static_cast<i2cmem_interface *>(i2cmem) = interface;
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}
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//-------------------------------------------------
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// device_config_complete - perform any
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// operations now that the configuration is
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// complete
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//-------------------------------------------------
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void i2cmem_device_config::device_config_complete()
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{
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m_space_config = address_space_config( "i2cmem", ENDIANNESS_BIG, 8, m_address_bits, 0, *ADDRESS_MAP_NAME( i2cmem_map8 ) );
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}
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//-------------------------------------------------
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// device_validity_check - perform validity checks
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// on this device
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//-------------------------------------------------
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bool i2cmem_device_config::device_validity_check( emu_options &options, const game_driver &driver ) const
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{
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bool error = false;
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return error;
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}
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//-------------------------------------------------
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// memory_space_config - return a description of
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// any address spaces owned by this device
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//-------------------------------------------------
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const address_space_config *i2cmem_device_config::memory_space_config( address_spacenum spacenum ) const
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{
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return ( spacenum == 0 ) ? &m_space_config : NULL;
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}
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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//-------------------------------------------------
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// i2cmem_device - constructor
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//-------------------------------------------------
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i2cmem_device::i2cmem_device( running_machine &_machine, const i2cmem_device_config &config ) :
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device_t( _machine, config ),
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device_memory_interface( _machine, config, *this ),
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device_nvram_interface( _machine, config, *this ),
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m_config( config ),
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m_scl( 0 ),
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m_sdaw( 0 ),
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m_e0( 0 ),
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m_e1( 0 ),
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m_e2( 0 ),
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m_wc( 0 ),
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m_sdar( 1 ),
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m_state( STATE_IDLE )
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{
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if( m_config.m_page_size > 0 )
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{
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m_page = auto_alloc_array( machine(), UINT8, m_config.m_page_size );
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}
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void i2cmem_device::device_start()
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{
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save_item( NAME(m_scl) );
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save_item( NAME(m_sdaw) );
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save_item( NAME(m_e0) );
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save_item( NAME(m_e1) );
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save_item( NAME(m_e2) );
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save_item( NAME(m_wc) );
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save_item( NAME(m_sdar) );
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save_item( NAME(m_state) );
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save_item( NAME(m_bits) );
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save_item( NAME(m_shift) );
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save_item( NAME(m_devsel) );
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save_item( NAME(m_byteaddr) );
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save_pointer( NAME(m_page), m_config.m_page_size );
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void i2cmem_device::device_reset()
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{
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}
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//-------------------------------------------------
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// nvram_default - called to initialize NVRAM to
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// its default state
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//-------------------------------------------------
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void i2cmem_device::nvram_default()
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{
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int i2cmem_bytes = m_config.m_data_size;
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UINT16 default_value = 0xff;
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for( offs_t offs = 0; offs < i2cmem_bytes; offs++ )
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{
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m_addrspace[ 0 ]->write_byte( offs, default_value );
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}
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/* populate from a memory region if present */
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if( m_region != NULL )
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{
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if( m_region->bytes() != i2cmem_bytes )
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{
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fatalerror( "i2cmem region '%s' wrong size (expected size = 0x%X)", tag(), i2cmem_bytes );
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}
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if( m_region->width() != 1 )
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{
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fatalerror( "i2cmem region '%s' needs to be an 8-bit region", tag() );
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}
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for( offs_t offs = 0; offs < i2cmem_bytes; offs++ )
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{
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m_addrspace[ 0 ]->write_byte( offs, m_region->u8( offs ) );
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}
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}
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}
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//-------------------------------------------------
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// nvram_read - called to read NVRAM from the
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// .nv file
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//-------------------------------------------------
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void i2cmem_device::nvram_read( emu_file &file )
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{
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int i2cmem_bytes = m_config.m_data_size;
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UINT8 *buffer = auto_alloc_array( machine(), UINT8, i2cmem_bytes );
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file.read( buffer, i2cmem_bytes );
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for( offs_t offs = 0; offs < i2cmem_bytes; offs++ )
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{
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m_addrspace[ 0 ]->write_byte( offs, buffer[ offs ] );
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}
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auto_free( machine(), buffer );
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}
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//-------------------------------------------------
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// nvram_write - called to write NVRAM to the
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// .nv file
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//-------------------------------------------------
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void i2cmem_device::nvram_write( emu_file &file )
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{
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int i2cmem_bytes = m_config.m_data_size;
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UINT8 *buffer = auto_alloc_array( machine(), UINT8, i2cmem_bytes );
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for( offs_t offs = 0; offs < i2cmem_bytes; offs++ )
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{
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buffer[ offs ] = m_addrspace[ 0 ]->read_byte( offs );
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}
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file.write( buffer, i2cmem_bytes );
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auto_free( machine(), buffer );
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}
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//**************************************************************************
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// READ/WRITE HANDLERS
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//**************************************************************************
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WRITE_LINE_DEVICE_HANDLER( i2cmem_e0_write )
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{
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downcast<i2cmem_device *>( device )->set_e0_line( state );
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}
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void i2cmem_device::set_e0_line( int state )
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{
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state &= 1;
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if( m_e0 != state )
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{
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verboselog( this, 2, "set e0 %d\n", state );
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m_e0 = state;
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}
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_e1_write )
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{
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downcast<i2cmem_device *>( device )->set_e1_line( state );
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}
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void i2cmem_device::set_e1_line( int state )
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{
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state &= 1;
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if( m_e1 != state )
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{
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verboselog( this, 2, "set e1 %d\n", state );
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m_e1 = state;
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}
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_e2_write )
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{
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downcast<i2cmem_device *>( device )->set_e2_line( state );
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}
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void i2cmem_device::set_e2_line( int state )
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{
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state &= 1;
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if( m_e2 != state )
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{
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verboselog( this, 2, "set e2 %d\n", state );
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m_e2 = state;
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}
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_sda_write )
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{
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downcast<i2cmem_device *>( device )->set_sda_line( state );
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}
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void i2cmem_device::set_sda_line( int state )
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{
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state &= 1;
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if( m_sdaw != state )
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{
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verboselog( this, 2, "set sda %d\n", state );
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m_sdaw = state;
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if( m_scl )
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{
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if( m_sdaw )
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{
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verboselog( this, 1, "stop\n" );
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m_state = STATE_IDLE;
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}
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else
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{
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verboselog( this, 2, "start\n" );
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m_state = STATE_DEVSEL;
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m_bits = 0;
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}
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m_sdar = 1;
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}
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}
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_scl_write )
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{
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downcast<i2cmem_device *>( device )->set_scl_line( state );
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}
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void i2cmem_device::set_scl_line( int state )
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{
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if( m_scl != state )
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{
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m_scl = state;
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verboselog( this, 2, "set_scl_line %d\n", m_scl );
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switch( m_state )
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{
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case STATE_DEVSEL:
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case STATE_BYTEADDR:
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case STATE_DATAIN:
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if( m_bits < 8 )
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{
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if( m_scl )
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{
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m_shift = ( ( m_shift << 1 ) | m_sdaw ) & 0xff;
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m_bits++;
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}
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}
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else
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{
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if( m_scl )
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{
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switch( m_state )
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{
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case STATE_DEVSEL:
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m_devsel = m_shift;
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if( !select_device() )
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{
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verboselog( this, 1, "devsel %02x: not this device\n", m_devsel );
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m_state = STATE_IDLE;
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}
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else if( ( m_devsel & DEVSEL_RW ) == 0 )
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{
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verboselog( this, 1, "devsel %02x: write\n", m_devsel );
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m_state = STATE_BYTEADDR;
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}
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else
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{
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verboselog( this, 1, "devsel %02x: read\n", m_devsel );
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m_state = STATE_DATAOUT;
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}
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break;
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case STATE_BYTEADDR:
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m_byteaddr = m_shift;
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m_page_offset = 0;
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verboselog( this, 1, "byteaddr %02x\n", m_byteaddr );
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m_state = STATE_DATAIN;
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break;
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case STATE_DATAIN:
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if( m_wc )
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{
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verboselog( this, 0, "write not enabled\n" );
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m_state = STATE_IDLE;
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}
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else if( m_config.m_page_size > 0 )
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{
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m_page[ m_page_offset ] = m_shift;
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verboselog( this, 1, "page[ %04x ] <- %02x\n", m_page_offset, m_page[ m_page_offset ] );
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m_page_offset++;
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if( m_page_offset == m_config.m_page_size )
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{
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int offset = data_offset() & ~( m_config.m_page_size - 1 );
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verboselog( this, 1, "data[ %04x to %04x ] = page\n", offset, offset + m_config.m_page_size - 1 );
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for( int i = 0; i < m_config.m_page_size; i++ )
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{
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m_addrspace[ 0 ]->write_byte( offset + i, m_page[ i ] );
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}
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m_page_offset = 0;
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}
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}
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else
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{
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int offset = data_offset();
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verboselog( this, 1, "data[ %04x ] <- %02x\n", offset, m_shift );
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m_addrspace[ 0 ]->write_byte( offset, m_shift );
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m_byteaddr++;
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}
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break;
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}
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m_bits++;
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}
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else
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{
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if( m_bits == 8 )
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{
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m_sdar = 0;
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}
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else
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{
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m_bits = 0;
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m_sdar = 1;
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}
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}
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}
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break;
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case STATE_DATAOUT:
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if( m_bits < 8 )
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{
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if( m_scl )
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{
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if( m_bits == 0 )
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{
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int offset = data_offset();
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m_shift = m_addrspace[ 0 ]->read_byte( offset );
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verboselog( this, 1, "data[ %04x ] -> %02x\n", offset, m_shift );
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m_byteaddr++;
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}
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m_sdar = ( m_shift >> 7 ) & 1;
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m_shift = ( m_shift << 1 ) & 0xff;
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m_bits++;
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}
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}
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else
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{
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if( m_scl )
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{
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if( m_sdaw )
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{
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verboselog( this, 1, "sleep\n" );
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m_state = STATE_IDLE;
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m_sdar = 0;
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}
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m_bits++;
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}
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else
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{
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if( m_bits == 8 )
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{
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m_sdar = 1;
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}
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else
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{
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m_bits = 0;
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}
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}
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}
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break;
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}
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}
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}
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WRITE_LINE_DEVICE_HANDLER( i2cmem_wc_write )
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{
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downcast<i2cmem_device *>( device )->set_wc_line( state );
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}
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void i2cmem_device::set_wc_line( int state )
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{
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state &= 1;
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if( m_wc != state )
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{
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verboselog( this, 2, "set wc %d\n", state );
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m_wc = state;
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}
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}
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READ_LINE_DEVICE_HANDLER( i2cmem_sda_read )
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{
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return downcast<i2cmem_device *>( device )->read_sda_line();
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}
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int i2cmem_device::read_sda_line()
|
|
{
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|
int res = m_sdar & 1;
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|
|
|
verboselog( this, 2, "read sda %d\n", res );
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|
|
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return res;
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|
}
|
|
|
|
|
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//**************************************************************************
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|
// INTERNAL HELPERS
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|
//**************************************************************************
|
|
|
|
int i2cmem_device::address_mask()
|
|
{
|
|
return (m_config.m_data_size - 1);
|
|
}
|
|
|
|
int i2cmem_device::select_device()
|
|
{
|
|
int device = ( m_config.m_slave_address & 0xf0 ) | ( m_e2 << 3 ) | ( m_e1 << 2 ) | ( m_e0 << 1 );
|
|
int mask = DEVSEL_ADDRESS & ~( address_mask() >> 7 );
|
|
|
|
if( ( m_devsel & mask ) == ( device & mask ) )
|
|
{
|
|
return 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int i2cmem_device::data_offset()
|
|
{
|
|
return ( ( ( m_devsel << 7 ) & 0xff00 ) | ( m_byteaddr & 0xff ) ) & address_mask();
|
|
}
|