mirror of
https://github.com/Tolik-Trek/Estex-DSS.git
synced 2026-06-15 09:21:47 +03:00
337 lines
5.1 KiB
NASM
337 lines
5.1 KiB
NASM
;!TODO Procedures
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;----------------------------------------------------------------------;
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; ‡ ª®¤¨à®¢ âì ¢à¥¬ï/¤ âã
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; ¢å®¤: de - ¤¥ì/¬¥áïæ
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; hl - ç áë/¬¨ãâë
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; b - ᥪã¤ë
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; ix - £®¤
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; ¢ë室: de - ¢à¥¬ï
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; bc - ¬¥áïæ/¤¥ì
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; ix - £®¤
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;
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;INPUT: D - DAY; E - MONTH
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; H - HOUR; L - MINUTE
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; B - SECOND (0...59)
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; IX- YEAR (0...65535)
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;OUTPUT: DE - hhhhhmmmmmmsssss h - hour, m - min, s - sec/2
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; BC - yyyyyyymmmmddddd y - year, m - month, d - day
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; (1980-2108)
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MK_TIME:
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LD A,L
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RLCA
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RLCA
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SLA A
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RL H
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SLA A
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RL H
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SLA A
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RL H
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SRL B
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OR B
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LD L,A
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LD BC,#F844 ;(-1980)
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ADD IX,BC
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LD A,E
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RLCA
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RLCA
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RLCA
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RLCA
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AND #F0
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LD B,XL
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SLA A
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RL B
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OR D
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LD C,A
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EX DE,HL
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AND A
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RET
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;----------------------------------------------------------------------;
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;!TODO Procedures
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;----------------------------------------------------------------------;
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; <20> ᪮¤¨à®¢ âì ¢à¥¬ï/¤ âã
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; ¢å®¤: de - ¢à¥¬ï
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; bc - ¬¥áïæ/¤¥ì
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; ix - £®¤
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; ¢ë室: de - ¤¥ì/¬¥áïæ
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; hl - ç áë/¬¨ãâë
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; b - ᥪã¤ë
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; ix - £®¤
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;
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;INPUT: DE - hhhhhmmmmmmsssss h - hour, m - min, s - sec/2
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; BC - yyyyyyymmmmddddd y - year, m - month, d - day
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; (1980-2108)
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;OUTPUT: D - DAY; E - MONTH
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; H - HOUR; L - MINUTE
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; B - SECOND (0...59)
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; IX- YEAR (0...65535)
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RMKTIME:
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EX DE,HL
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LD A,C
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AND #1F
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LD D,A
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SRL B
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RR C
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LD A,C
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RRCA
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RRCA
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RRCA
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RRCA
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AND #0F
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LD E,A
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LD C,B
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LD B,0
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LD IX,1980
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ADD IX,BC
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LD A,L
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AND #1F
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ADD A,A
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LD B,A
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SRL H
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RR L
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SRL H
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RR L
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SRL H
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RR L
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SRL L
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SRL L
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AND A
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RET
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;----------------------------------------------------------------------;
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;----------------------------------------------------------------------;
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; a..z -> A..Z
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UPPER: CP 'a'
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RET C
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CP 'z' + 1
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JR NC,.MDUPPER
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SUB #20
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.NOUPPER:
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RET
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.MDUPPER:
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CP ' ' ; àãááª ï ¡ãª¢ , ª®¤ #A0
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JR C,.NOUPPER
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CP '¯' ; àãááª ï ¡ãª¢ ¯, ª®¤ #B0
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JR NC,.BGUPPER
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SUB #20
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RET
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.BGUPPER:
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CP 'à' ; àãááª ï ¡ãª¢ à, ª®¤ #E0
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JR C,.NOUPPER
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CP 'ð' ; àãááª ï ¡ãª¢ ð, ª®¤ #F0
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JR NC,.HGUPPER
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SUB #50
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RET
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.HGUPPER: CP 'ñ' ; àãááª ï ¡ãª¢ ñ, ª®¤ #F1
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RET NZ
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DEC A
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RET
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;----------------------------------------------------------------------;
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;!TODO hardware
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;----------------------------------------------------------------------;
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; —⥨¥ ॣ¨áâ஢ CMOS
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; ¢å®¤: d=®¬¥à ॣ¨áâà
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RCMOS: LD C,BIOS.CMOS_RD
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RST ToBIOS
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;JP BCD2HEX
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; INPUT : A - BCD
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; OUTPUT: A - HEX
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BCD2HEX:
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LD E,A
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RRCA
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RRCA
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RRCA
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RRCA
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AND #0F
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LD D,A
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ADD A,A
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ADD A,A
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ADD A,D
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ADD A,A
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LD D,A
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LD A,E
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AND #0F
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ADD A,D
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RET
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;----------------------------------------------------------------------;
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;!TODO hardware
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;----------------------------------------------------------------------;
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;!FIXIT ¯¥à¥¤¥« âì ¯® ¤®ª¥ „ «« á ¨ § ¨áì ¢ ï祩ª¨ ç ᮢ
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; ‡ ¯¨áì ॣ¨áâ஢ CMOS
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; ¢å®¤: d=®¬¥à ॣ¨áâà
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WCMOS: CALL HEX2BCD
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LD C,BIOS.CMOS_WR
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JP ToBIOS
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; INPUT : A - HEX
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; OUTPUT: A - BCD
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HEX2BCD:
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LD BC,#0AFF
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.loop: INC C
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SUB B
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JR NC,.loop
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ADD A,B
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LD B,A
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LD A,C
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RLCA
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RLCA
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RLCA
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RLCA
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AND #F0
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OR B
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RET
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;----------------------------------------------------------------------;
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;
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; HL:DE / C => DE:IX HL-OSTATOK (DE:BC.HL). ‹¥£ª® ¯¥à¥¤¥« âì ¯®¤ HL:DE / A => HL:DE.A
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;----------------------------------------------------------------------;
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DIV_for_SPC:
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LD A,C
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DEC A
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JR Z,.exit
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;
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AND E
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LD B,A ; ®áâ ⮪
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LD A,C
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RRCA
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;
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.loop: SRL H : RR L
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RR D : RR E
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RRCA
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JP NC,.loop
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LD A,B
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;
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.exit: LD XH,D
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LD XL,E
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EX DE,HL
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LD H,0
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LD L,A
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RET
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;----------------------------------------------------------------------;
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; DIV32: LD A,#FF
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; LD B,E
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; .loop: SRL C
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; JR C,.exitLoop
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; SRL H : RR L : RR D : RR E : SLA A
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; JP .loop
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; .exitLoop:
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; CPL
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; AND B
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; LD XH,D
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; LD XL,E
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; EX DE,HL
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; LD H,0
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; LD L,A
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; RET
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/*
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DEFINE NEW_DIV 1
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DIV32: LD XH,D
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LD XL,E
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IFN NEW_DIV
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EX DE,HL
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LD HL,0
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LD A,#20
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DIV001: ADD IX,IX
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EX DE,HL
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ADC HL,HL
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EX DE,HL
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ADC HL,HL
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SBC HL,BC
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JR NC,DIV002
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ADD HL,BC
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DEC A
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JR NZ,DIV001
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RET
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DIV002: INC IX
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DEC A
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JR NZ,DIV001
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RET
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ELSE
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div32_16:
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;HLIX/BC -> HLIX remainder DE
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;174+4*div32_16_sub8
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;min: 2186cc
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;max: 2794cc
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;avg: 2466cc
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;61 bytes
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ex de,hl ; 4
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; Negate BC to allow add instead of sbc
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xor a ; 4
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; Need to set HL to 0 anyways, so save 2cc and a byte
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ld h,a ; 4
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ld l,a ; 4
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sub c ; 4
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ld c,a ; 4
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sbc a,a ; 4
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sub b ; 4
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ld b,a ; 4
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ld a,d ; 4
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call div32_16_sub8 ; 17
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rla ; 4
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ld d,a ; 4
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ld a,e ; 4
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call div32_16_sub8 ; 17
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rla ; 4
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ld e,a ; 4
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ld a,ixh ; 8
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call div32_16_sub8 ; 17
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rla ; 4
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ld ixh,a ; 8
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ld a,ixl ; 8
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call div32_16_sub8 ; 17
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rla ; 4
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ld ixl,a ; 8
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;ex de,hl ; 4
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ret ; 10
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div32_16_sub8:
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;119+8*div32_16_sub
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;min: 503cc
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;max: 655cc
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;avg: 573cc
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call 1F
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1:
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;17+2(17+2(div32_16_sub)))
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call 1F
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1:
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;17+2(div32_16_sub)
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call div32_16_sub
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div32_16_sub:
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;48+{8,0+{0,19}}
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;min: 48cc
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;max: 67cc
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;avg: 56.75cc
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rla ; 4
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adc hl,hl ; 15
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jr c,1F ;12/7
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add hl,bc ; 11
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ret c ;11/5
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sbc hl,bc ; 15
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ret ; 10
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1:
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add hl,bc ; 11
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scf ; 4
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ret ; 10
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ENDIF
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*/
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; |