153 lines
3.7 KiB
C++
153 lines
3.7 KiB
C++
// license:BSD-3-Clause
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// copyright-holders:Quench
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/****************************************************************************
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* Twin Cobra *
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* Communications and memory functions between shared CPU memory spaces *
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****************************************************************************/
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#include "emu.h"
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#include "twincobr.h"
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#include "cpu/m68000/m68000.h"
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#define VERBOSE (0)
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#include "logmacro.h"
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void twincobr_state::twincobr_vblank_irq(int state)
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{
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if (state && m_intenable)
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m_maincpu->set_input_line(M68K_IRQ_4, ASSERT_LINE);
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}
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void twincobr_state::dsp_host_addr_cb(u16 data, u32 &seg, u32 &addr)
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{
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/* This sets the main CPU RAM address the DSP should */
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/* read/write, via the DSP IO port 0 */
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/* Top three bits of data need to be shifted left 3 places */
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/* to select which memory bank from main CPU address */
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/* space to use */
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/* Lower thirteen bits of this data is shifted left one position */
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/* to move it to an even address word boundary */
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seg = ((data & 0xe000) << 3);
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addr = ((data & 0x1fff) << 1);
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}
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u16 twincobr_state::dsp_host_read_cb(u32 seg, u32 addr)
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{
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u16 input_data = 0;
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switch (seg)
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{
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case 0x30000:
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case 0x40000:
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case 0x50000:
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{
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address_space &mainspace = m_maincpu->space(AS_PROGRAM);
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input_data = mainspace.read_word(seg + addr);
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break;
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}
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default:
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if (!machine().side_effects_disabled())
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logerror("%s: Warning !!! IO reading from %08x (port 1)\n", machine().describe_context(), seg + addr);
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break;
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}
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return input_data;
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}
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bool twincobr_state::dsp_host_write_cb(u32 seg, u32 addr, u16 data)
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{
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bool execute = false;
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switch (seg)
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{
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case 0x30000:
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if ((addr < 3) && (data == 0)) execute = true;
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[[fallthrough]];
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case 0x40000:
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case 0x50000:
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{
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address_space &mainspace = m_maincpu->space(AS_PROGRAM);
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mainspace.write_word(seg + addr, data);
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break;
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}
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default:
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logerror("%s: Warning !!! IO writing to %08x (port 1)\n", machine().describe_context(), seg + addr);
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break;
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}
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return execute;
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}
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u16 twincobr_state::fsharkbt_dsp_r()
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{
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/* IO Port 2 used by Flying Shark bootleg */
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/* DSP reads data from an extra MCU (8741) at IO port 2 */
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/* Port is read three times during startup. First and last data */
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/* read must equal, but second data read must be different */
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if (!machine().side_effects_disabled())
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{
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m_fsharkbt_8741 += 1;
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LOG("%s: IO read %04x from 8741 MCU (port 2)\n", machine().describe_context(), BIT(m_fsharkbt_8741, 3));
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}
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return BIT(m_fsharkbt_8741, 0);
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}
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void twincobr_state::fsharkbt_dsp_w(u16 data)
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{
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/* Flying Shark bootleg DSP writes data to an extra MCU (8741) at IO port 2 */
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#if 0
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logerror("%s: IO write from DSP RAM:%04x to 8741 MCU (port 2)\n", machine().describe_context(), m_fsharkbt_8741);
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#endif
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}
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void twincobr_state::int_enable_w(int state)
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{
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m_intenable = state;
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if (!state)
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m_maincpu->set_input_line(M68K_IRQ_4, CLEAR_LINE);
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}
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void twincobr_state::coin_counter_1_w(int state)
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{
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machine().bookkeeping().coin_counter_w(0, state);
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}
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void twincobr_state::coin_counter_2_w(int state)
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{
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machine().bookkeeping().coin_counter_w(1, state);
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}
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void twincobr_state::coin_lockout_1_w(int state)
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{
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machine().bookkeeping().coin_counter_w(0, !state);
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}
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void twincobr_state::coin_lockout_2_w(int state)
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{
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machine().bookkeeping().coin_counter_w(1, !state);
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}
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u8 twincobr_state::twincobr_sharedram_r(offs_t offset)
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{
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return m_sharedram[offset];
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}
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void twincobr_state::twincobr_sharedram_w(offs_t offset, u8 data)
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{
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m_sharedram[offset] = data;
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}
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void twincobr_state::machine_start()
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{
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save_item(NAME(m_intenable));
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save_item(NAME(m_fsharkbt_8741));
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}
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void twincobr_state::machine_reset()
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{
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m_fsharkbt_8741 = -1;
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}
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