Подправил порты ACEX

This commit is contained in:
Anatoliy Belyanskiy 2023-06-20 01:27:27 +10:00
parent 95f78e3250
commit 80b60f7294

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@ -1094,9 +1094,9 @@ ZX_VARS EQU #5C00
; ;
; ;
MODULE Conf_port MODULE ACEX
; ¢­ãâ७­¨¥ Altera (Sp97) ; ¢­ãâ७­¨¥ ¯®àâë Altera (ç áâ¨ç­® ­¥à §®¡à ­® ®â Sp97)
;00 - <EFBFBD>¥â ¯®àâ  ;00 <EFBFBD>¥â ¯®àâ 
;#01 reserved ;#01 reserved
;#02 reserved ;#02 reserved
;#03 reserved ;#03 reserved
@ -1128,10 +1128,10 @@ FDD144 EQU #17
;#19 reserved ;#19 reserved
;#1A reserved ;#1A reserved
;#1B - ISA_PORT ; #9FBD ISA_CTRL EQU #1B ; #9FBD
;#1C - CMOS_DRD ; #FFBD CMOS_DATA.READ EQU #1C ; #FFBD
;#1D - CMOS_AWR ; #DFBD CMOS_ADDR.WRITE EQU #1D ; #DFBD
;#1E - CMOS_DWR ; #BFBD CMOS_DATA.WRITE EQU #1E ; #BFBD
;#1F reserved ;#1F reserved
;#20 - HDD - ॣ¨áâà ¤ ­­ëå ; #0050 ;#20 - HDD - ॣ¨áâà ¤ ­­ëå ; #0050
;#21 - HDD - ॣ¨áâà á®áâ®ï­¨ï/®è¨¡®ª ; #0051 ;#21 - HDD - ॣ¨áâà á®áâ®ï­¨ï/®è¨¡®ª ; #0051
@ -1241,9 +1241,9 @@ CBL_OUT EQU #88 ; Write
CBL_SYS_PORT EQU #89 ; CBL_DIR CBL_SYS_PORT EQU #89 ; CBL_DIR
;#8A reserved ;#8A reserved
;#8B reserved ;#8B reserved
;#8C reserved ;#8C reserved 3000 -- AY_D READ
;#8D reserved ;#8D reserved 2000 -- AY_A WRITE
;#8E reserved ;#8E reserved 2000 -- AY_D WRITE
ROM_RG EQU #8F ; !FIXIT ¯®àâ ¯¥à¥ª«î祭¨ï áâà ­¨æ ROM ¨ FastRam, ¤ã¡«¨àã¥âáï ¢­¥è­¨¬ ¯®à⮬ #5C ROM_RG EQU #8F ; !FIXIT ¯®àâ ¯¥à¥ª«î祭¨ï áâà ­¨æ ROM ¨ FastRam, ¤ã¡«¨àã¥âáï ¢­¥è­¨¬ ¯®à⮬ #5C
AY_FFFD_WRITE EQU #90 ; AY-8910-port (FFFD) ;!!!!! § ¯¨áì  ¤à¥á ?????? AY_FFFD_WRITE EQU #90 ; AY-8910-port (FFFD) ;!!!!! § ¯¨áì  ¤à¥á ??????
AY_BFFD EQU #91 ; AY-8910-port (BFFD) AY_BFFD EQU #91 ; AY-8910-port (BFFD)