From ca86cde6b2ed5d2fd2279e239883545f87f97f71 Mon Sep 17 00:00:00 2001 From: Anatoliy Belyanskiy Date: Thu, 24 Aug 2023 01:09:17 +1000 Subject: [PATCH] ... --- constants/SP2000.inc | 39 +++++++++++++++++++-------------------- 1 file changed, 19 insertions(+), 20 deletions(-) diff --git a/constants/SP2000.inc b/constants/SP2000.inc index 1d14340..2112cf6 100644 --- a/constants/SP2000.inc +++ b/constants/SP2000.inc @@ -1629,28 +1629,27 @@ INIT_TBL_IDE3 HDD_INIT_TABLE = SYS_PAGE.IDE_3 ; !HARDC ; Бит 6 - Write Gate - бит выполнения записи, активен во время операции записи Write: -.DeviceControl EQU #4154 ; ; #3F6 Device Control register -.Command EQU #4153 ; HDW_COM P_CMD ; #1F7 Command register -;.DriveCtrl EQU #4152 ; HDW_DRV P_HD_CS ; #1F6 Device/Head register -.DeviceHead EQU #4152 ; HDW_DRV P_HD_CS ; #1F6 Device/Head register -.Data EQU #0150 ; HDW_DAT W170 ; #1F0 Data register -.Features EQU #0151 ; HDW_ERR W171 ; #1F1 Features register -.Counter EQU #0152 ; HDW_CNT P_S_CNT W172 ; #1F2 Counter register -.Sector EQU #0153 ; HDW_SEC P_S_NUM W173 ; #1F3 Sector register -.CylinderLow EQU #0154 ; HDW_CLL P_C_LOW W174 ; #1F4 Cylinder Low register -.CylinderHigh EQU #0155 ; HDW_CLH P_C_HIG W175 ; #1F5 Cylinder High register +.Data EQU #0150 ; cnf 20 ; HDW_DAT W170 ; #1F0 Data register +.Features EQU #0151 ; cnf 21 ; HDW_ERR W171 ; #1F1 Features register +.Counter EQU #0152 ; cnf 22 ; HDW_CNT P_S_CNT W172 ; #1F2 Counter register +.Sector EQU #0153 ; cnf 23 ; HDW_SEC P_S_NUM W173 ; #1F3 Sector register +.CylinderLow EQU #0154 ; cnf 24 ; HDW_CLL P_C_LOW W174 ; #1F4 Cylinder Low register +.CylinderHigh EQU #0155 ; cnf 25 ; HDW_CLH P_C_HIG W175 ; #1F5 Cylinder High register +.DeviceHead EQU #4152 ; cnf 26 ; HDW_DRV P_HD_CS ; #1F6 Device/Head register +.Command EQU #4153 ; cnf 27 ; HDW_COM P_CMD ; #1F7 Command register +.DeviceControl EQU #4154 ; cnf 28 ; ; #3F6 Device Control register Read: -.DrvAddress EQU #4055 ; ; #3F7 -.AltControl EQU #4054 ; ; #3F6 Alternate Status register -.Status EQU #4053 ; HDR_CTL P_HDST R177 ; #1F7 Status (Control) register -.Control EQU #4052 ; HDR_DRV R176 ; #1F6 Device/Head register -.Data EQU #0050 ; HDR_DAT P_DATS R170 ; #1F0 Data register -.Error EQU #0051 ; HDR_ERR P_ERR R171 ; #1F1 Error register -.Counter EQU #0052 ; HDR_CNT R172 ; #1F2 Counter register -.Sector EQU #0053 ; HDR_SEC R173 ; #1F3 Sector register -.CylinderLow EQU #0054 ; HDR_CLL R174 ; #1F4 Cylinder Low register -.CylinderHigh EQU #0055 ; HDR_CLH R175 ; #1F5 Cylinder High register +.Data EQU #0050 ; cnf 20 ; HDR_DAT P_DATS R170 ; #1F0 Data register +.Error EQU #0051 ; cnf 21 ; HDR_ERR P_ERR R171 ; #1F1 Error register +.Counter EQU #0052 ; cnf 22 ; HDR_CNT R172 ; #1F2 Counter register +.Sector EQU #0053 ; cnf 23 ; HDR_SEC R173 ; #1F3 Sector register +.CylinderLow EQU #0054 ; cnf 24 ; HDR_CLL R174 ; #1F4 Cylinder Low register +.CylinderHigh EQU #0055 ; cnf 25 ; HDR_CLH R175 ; #1F5 Cylinder High register +.Control EQU #4052 ; cnf 26 ; HDR_DRV R176 ; #1F6 Device/Head register +.Status EQU #4053 ; cnf 27 ; HDR_CTL P_HDST R177 ; #1F7 Status (Control) register +.AltControl EQU #4054 ; cnf 28 ; ; #3F6 Alternate Status register +.DrvAddress EQU #4055 ; cnf 29 ; ; #3F7 ControlBit: ; 0000 0000 ; Bits for HardDrive.Read.Status .Busy EQU 7;────────┘│││ ││││ ; BSY