916 lines
18 KiB
NASM
916 lines
18 KiB
NASM
;[BEGIN]
|
||
;//MODULE: AUTOIDE
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||
;//CREATE: 27-07-2001 AUTHOR: Denis Parinov
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;-----------------------------------------------------------------------
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;Rev Date Name Description
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;-----------------------------------------------------------------------
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;R02 17.08.2023 BAO New AUTODETECT ATA/ATAPI procedure
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;R01 01.08.2001 DNS FIX BUG INT "SELECT_IDE"
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;R00 24.07.2001 DNS ADD SECONDARY IDE
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; 24.07.2001 DNS INITIAL NEW VERSION 2.48
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;=======================================================================
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; MODULE AUTOIDE
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/*
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;Write
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HDW_3F7 EQU #4155 ;3F7H Command
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HDW_3F6 EQU #4154 ;3F6H Device Control
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;Read
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HDR_3F7 EQU #4055 ;3F7H Drive Address
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HDR_3F6 EQU #4054 ;3F6H Alt. Status
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;Write
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IDE.Write.Command EQU #4153 ; #1F7 Command
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HDW_DRV EQU #4152 ; #1F6 Drive Control
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HDW_CLH EQU #0155 ; #1F5 Cylinder High
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HDW_CLL EQU #0154 ; #1F4 Cylinder Low
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HDW_SEC EQU #0153 ; #1F3 Sector
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HDW_CNT EQU #0152 ; #1F2 Counter
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HDW_ERR EQU #0151 ; #1F1 Error
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HDW_DAT EQU #0150 ; #1F0 Data
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;Read
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HDR_CTL EQU #4053 ; #1F7 Status (Control)
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HDR_DRV EQU #4052 ; #1F6 Drive Control
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HDR_CLH EQU #0055 ; #1F5 Cylinder High
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HDR_CLL EQU #0054 ; #1F4 Cylinder Low
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HDR_SEC EQU #0053 ; #1F3 Sector
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HDR_CNT EQU #0052 ; #1F2 Counter
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HDR_ERR EQU #0051 ; #1F1 Error
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HDR_DAT EQU #0050 ; #1F0 Data
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;Bits for HDR_CTL
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;---[]
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BSY EQU 7
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RDY EQU 6
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DRQ EQU 3
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ERR EQU 0
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;---[]
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HDD EQU 1
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CDROM EQU 2
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;EQU FOR IY+
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;---[]
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DRVHD_H EQU 0
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SC_PT_H EQU 1
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IDE.HDD_INIT_TABLE.HeadsNumber EQU 2
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CYL_L_H EQU 3
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CYL_H_H EQU 4
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SPCLL_H EQU 5
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SPCLH_H EQU 6
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DTYPE_H EQU 7
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;---[]
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;-------[ ;!!!!! hardcoded table]-------
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IDE0 EQU #C1C0
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IDE1 EQU #C1C8
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IDE2 EQU #C1D0
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IDE3 EQU #C1D8
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;---------------------------------------
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*/
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;IDE0 DB #FF ;DRIVE/HEAD REGISTER ;00
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; DB #FF ;SECTORS PER TRACK ;01
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; DB #FF ;HEADS ;02
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; DB #FF ;CYLINDERS LOW ;03
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; DB #FF ;CYLINDERS HIGH ;04
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; DB #FF ;SECTOR PER CYLINDER LOW ;05
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; DB #FF ;SECTOR PER CYLINDER HIGH ;06
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; DB #FF ;DEVICE TYPE ;07
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;IDE1 DB #FF ;DRIVE/HEAD REGISTER ;00
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; DB #FF ;SECTORS PER TRACK ;01
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; DB #FF ;HEADS ;02
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; DB #FF ;CYLINDERS LOW ;03
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; DB #FF ;CYLINDERS HIGH ;04
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; DB #FF ;SECTOR PER CYLINDER LOW ;05
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; DB #FF ;SECTOR PER CYLINDER HIGH ;06
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; DB #FF ;DEVICE TYPE ;07
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MODULE CONFIGURE_IDE_DRIVES
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MODULE PAUSES
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HALT:
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.Time_2s EQU 100
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.SMALL EQU 200 ; 04 ᥪ
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.BIG EQU 1550 ; 31 ᥪ
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WAIT:
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.IDE EQU #0000
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.SMALL EQU #0200
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.ERROR EQU #0400
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ENDMODULE
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WAIT_IDE EQU #0000
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WAIT_SML EQU #1000
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WAIT_ERROR EQU #0400
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M_CYLL EQU #12
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M_CYLH EQU #13
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M_HEAD EQU #14
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M_SECT EQU #15
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S_CYLL EQU #16
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S_CYLH EQU #17
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S_HEAD EQU #18
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S_SECT EQU #19
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SM_CYLL EQU #37
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SM_CYLH EQU #38
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SM_HEAD EQU #39
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SM_SECT EQU #3A
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SS_CYLL EQU #3B
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SS_CYLH EQU #3C
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SS_HEAD EQU #3D
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SS_SECT EQU #3E
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MACRO PAUSE_DJNZ num
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IF num<255
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LD B,num
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.loop: DJNZ .loop
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ELSE
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ASSERT 0, "WRONG PAUSE NUMBER!!!"
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ENDIF
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ENDM
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/////////////////////////////////////////////////////////////////////[v]
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START: CALL SetUP_CHANELS
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;
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IN A,(SLOT3)
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EX AF,AF'
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LD A,SYS_PAGE
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OUT (SLOT3),A
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LD HL,IDE.INIT_TBL_IDE0
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LD BC,256*(IDE.HDD_INIT_TABLE * 4) + #FF ;R02
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;CLEAR HDD VARIABLE
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.FILLIDE:
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LD (HL),C
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INC HL
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DJNZ .FILLIDE
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EX AF,AF'
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OUT (SLOT3),A
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LD IY,IDE.INIT_TBL_IDE0
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XOR A
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CALL STEP1_GETCMOS
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LD IY,IDE.INIT_TBL_IDE1
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LD A,#01
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CALL STEP1_GETCMOS
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LD IY,IDE.INIT_TBL_IDE2
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LD A,#02
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CALL STEP1_GETCMOS
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LD IY,IDE.INIT_TBL_IDE3
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LD A,#03
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CALL STEP1_GETCMOS
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;[x] save hdd parameters to cmos for "setup" in settings
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CALL WRITING
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;
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CALL ScreenPOS.CRLF
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RET
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/////////////////////////////////////////////////////////////////////[^]
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/////////////////////////////////////////////////////////////////////[v]
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AUTODETECT:
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LD A,L ;DETECT MESSAGE
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CALL POSTMSG
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CALL ScreenPOS.SUBNAME
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LD A,(MasterSlave)
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;
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CALL AUTODETECTING
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.IDEJUMPBACK:
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CALL NC,MODEL
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LD A,(SKIP)
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INC A
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LD A,msgStrings.ideNone
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JR Z,.NOSKIPKEY
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LD A,msgStrings.ideSkiped
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.NOSKIPKEY:
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CALL C,POSTMSG
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CALL ScreenPOS.CRLF
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RET
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/////////////////////////////////////////////////////////////////////[^]
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/////////////////////////////////////////////////////////////////////[v]
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; !HARDCODE <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><> <20><>⪨ <20> <20>⮩ <20><><EFBFBD>楤<EFBFBD><E6A5A4><EFBFBD>
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STEP1_GETCMOS:
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LD (MasterSlave),A
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LD H,A ;SAVE DRIVE NUMBER
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CALL SELECT_IDE
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LD A,IDE.Device.NONE
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LD (IDEDEV),A
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LD (SKIP),A
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LD A,H
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;
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AND A
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LD BC,CMOS_CELL.DrivesSetup_1.Mask.PriIDEmaster ;#3011
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LD L,msgStrings.detectIdePrMA
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JR Z,.choose
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;
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DEC A
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LD BC,CMOS_CELL.DrivesSetup_1.Mask.PriIDEslave ;#C011
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LD L,msgStrings.detectIdePrSL
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JR Z,.choose
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;
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DEC A
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LD BC,CMOS_CELL.DrivesSetup_2.Mask.SecIDEmaster
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LD L,msgStrings.detectIdeSecMA
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JR Z,.choose
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;
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DEC A
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LD BC,CMOS_CELL.DrivesSetup_2.Mask.SecIDEslave
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LD L,msgStrings.detectIdeSecSL
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JR Z,.choose
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SCF
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RET
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;0 - AUTODETECT
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;1 - GETTING FROM SETUP
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;2 - CD-ROM (ATAPI device)
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;3 - DISABLED
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.choose:
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EI
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;
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CALL GET_CMOS_VALUE
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OR A
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JR Z,AUTODETECT ;AUTO DETECT
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;
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DEC A
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JR Z,SETUP_FROM_CMOS ;Get from CMOS (SETUP)
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;
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DEC A
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RET NZ ;DON'T CHECK THIS DEVICE
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;JR Z,IT_IS_ATAPI ;CD-ROM
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/////////////////////////////////////////////////////////////////////[^]
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/////////////////////////////////////////////////////////////////////[v]
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IT_IS_ATAPI:
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LD A,L ;DETECT MESSAGE
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CALL POSTMSG
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CALL ScreenPOS.SUBNAME
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LD HL,PAUSES.HALT.BIG
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CALL BITS_WAITS.Clear_BUSY
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JR C,AUTODETECTING.IDE_ABSENT
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CALL AUTODETECTING.Its_ATAPI
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JP AUTODETECT.IDEJUMPBACK
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/////////////////////////////////////////////////////////////////////[^]
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/////////////////////////////////////////////////////////////////////[v]
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AUTODETECTING: CALL DETECTORS.CheckChanel
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JR C,.IDE_ABSENT
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CALL Bug31SecCheck
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JR C,.next
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LD HL,PAUSES.HALT.BIG
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CALL BITS_WAITS.Clear_BUSY
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JR C,.IDE_ABSENT
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.next: CALL DETECTORS.Counter
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JR C,.IDE_ABSENT
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CALL DETECTORS.NOP_Check
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JR C,.IDE_ABSENT
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; CALL DISABLE_8bit ; DISABLE 8 bit data transfer
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CALL DETECTORS.IdentDevCheck
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JR C,.IDE_ABSENT
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JR Z,.Its_ATA
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; enter point for ATAPI in setup
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.Its_ATAPI: CALL DETECTORS.IdentPDevChk
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JR C,.IDE_ABSENT
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LD A,IDE.Device.CDROM
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LD (IDEDEV),A
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JR .get
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.Its_ATA: LD A,IDE.Device.HDD
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LD (IDEDEV),A
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.get: CALL GETPARAM
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JR C,.IDE_ABSENT
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;CALL DisableWriteCache
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;CALL DisableStandBy
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AND A
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RET
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;
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.IDE_ABSENT: LD A,IDE.Device.NONE
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LD (IDEDEV),A
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LD A,IDE.ATA.Nop
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LD BC,IDE.Write.Command
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OUT (C),A
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DEC B
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IN A,(C) ; IDE.Read.Status
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SCF
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RET
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/////////////////////////////////////////////////////////////////////[^]
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/////////////////////////////////////////////////////////////////////[v]
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SETUP_FROM_CMOS:
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LD A,H
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LD IX,PRIM_MASTER_CMOS_T
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OR A
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JR Z,.step1
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;
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LD IX,PRIM_SLAVE_CMOS_T
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CP 1
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JR Z,.step1
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;
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LD IX,SEC_MASTER_CMOS_T
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CP 2
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JR Z,.step1
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;
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LD IX,SEC_SLAVE_CMOS_T
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.step1: LD HL,TEMP
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LD DE,TEMP+1
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LD BC,511
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LD (HL),0
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LDIR
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;
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CALL Bug31SecCheck
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JR C,.step2
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;
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LD HL,PAUSES.HALT.BIG
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CALL BITS_WAITS.Clear_BUSY
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JR C,AUTODETECTING.IDE_ABSENT
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;
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.step2: LD A,(IX+2) ;M_HEAD
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CALL READCMS
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LD (TEMP+3*2),A ; !TODO ᤥ<><E1A4A5><EFBFBD><EFBFBD> <20><>१ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. HEADS PER TRACK
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;
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LD A,(IX+1) ;M_CYLH
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CALL READCMS
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PUSH AF
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;
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LD A,(IX+0) ;M_CYLL
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||
CALL READCMS
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POP HL
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LD L,A
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LD (TEMP+1*2),HL ; !TODO ᤥ<><E1A4A5><EFBFBD><EFBFBD> <20><>१ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. CYLINDERS
|
||
;
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LD A,(IX+3) ;M_SECT
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CALL READCMS
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LD (TEMP+6*2),A ; !TODO ᤥ<><E1A4A5><EFBFBD><EFBFBD> <20><>१ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. SECTOR PER TRACK
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;
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LD A,IDE.Device.HDD
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||
LD (IDEDEV),A
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||
CALL IDESPEC
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||
RET
|
||
/////////////////////////////////////////////////////////////////////[^]
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||
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||
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||
/////////////////////////////////////////////////////////////////////[v]
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IDESPEC:
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IN A,(SLOT3)
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EX AF,AF'
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LD A,SYS_PAGE
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OUT (SLOT3),A
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||
LD A,(IDEDEV)
|
||
LD (IY+IDE.HDD_INIT_TABLE.DriveType),A
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||
CP IDE.Device.CDROM
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JP Z,.FOR_CDR
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;
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||
LD BC,IDE.Read.Control
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IN A,(C)
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||
AND #F0
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LD B,A
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LD A,(TEMP+#06) ; !TODO ᤥ<><E1A4A5><EFBFBD><EFBFBD> <20><>१ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. HEADS PER TRACK
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LD (IY+IDE.HDD_INIT_TABLE.HeadsNumber),A
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DEC A
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AND #0F
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OR B
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LD B,A
|
||
LD A,(TEMP+#63) ; !TODO ᤥ<><E1A4A5><EFBFBD><EFBFBD> <20><>१ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. LBA/NON-LBA bit 1 (FROM ZERO!)
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BIT 1,A
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JR Z,.NONLBA
|
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;
|
||
SET 6,B
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.NONLBA: LD A,B
|
||
LD BC,IDE.Write.DeviceHead
|
||
OUT (C),A
|
||
AND #F0 ;!HARDCODE DRIVE/HEAD REGISTER PHISICAL DISK bitmask
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||
LD HL,ICHANEL
|
||
OR (HL)
|
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LD (IY+IDE.HDD_INIT_TABLE.DRV_Flags),A
|
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LD HL,(TEMP+#02) ; !TODO ᤥ<><E1A4A5><EFBFBD><EFBFBD> <20><>१ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. CYLINDERS
|
||
LD (IY+IDE.HDD_INIT_TABLE.CylinderNumberLow),L
|
||
LD (IY+IDE.HDD_INIT_TABLE.CylinderNumberHigh),H
|
||
LD A,(TEMP+#0C) ; !TODO ᤥ<><E1A4A5><EFBFBD><EFBFBD> <20><>१ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. SECTOR PER TRACK
|
||
LD (IY+IDE.HDD_INIT_TABLE.SectorsPerTrack),A
|
||
IF IDE_Optimization
|
||
LD B,high IDE.Write.Counter
|
||
ELSE
|
||
LD BC,IDE.Write.Counter
|
||
ENDIF
|
||
OUT (C),A
|
||
LD A,IDE.ATA.InitializeDeviceParameters
|
||
CALL IDE_CMD
|
||
LD C,(IY+IDE.HDD_INIT_TABLE.SectorsPerTrack) ; Sector per track
|
||
LD B,0
|
||
LD H,B
|
||
LD L,B
|
||
LD A,(IY+IDE.HDD_INIT_TABLE.HeadsNumber) ; Head per HDD
|
||
|
||
.loop: ADD HL,BC
|
||
DEC A
|
||
JR NZ,.loop
|
||
|
||
LD (IY+IDE.HDD_INIT_TABLE.SectorsPerCylinderLow),L
|
||
LD (IY+IDE.HDD_INIT_TABLE.SectorsPerCylinderHigh),H
|
||
.END: ; [x] save hdd parameters to cmos for "setup" in settings
|
||
LD A,(IY+IDE.HDD_INIT_TABLE.DRV_Flags) ; for save to cmos in GETPARM
|
||
;
|
||
EX AF,AF'
|
||
OUT (SLOT3),A
|
||
AND A
|
||
RET
|
||
;
|
||
.FOR_CDR: LD BC,IDE.Read.Control
|
||
IN A,(C)
|
||
AND #F0
|
||
LD HL,ICHANEL
|
||
OR (HL)
|
||
LD (IY+IDE.HDD_INIT_TABLE.DRV_Flags),A
|
||
JR IDESPEC.END
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
IDE_CMD:
|
||
PUSH AF
|
||
LD HL,PAUSES.WAIT.IDE
|
||
LD DE,256*IDE.ControlByte.Busy + 0
|
||
CALL BITS_WAITS.WAIT_PRT
|
||
POP HL
|
||
RET C
|
||
INC B ; LD BC,IDE.Write.Command
|
||
OUT (C),H
|
||
LD HL,PAUSES.WAIT.IDE
|
||
;LD DE,256*IDE.ControlByte.Busy + 0
|
||
JR BITS_WAITS.WAIT_PRT
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
MODEL: LD HL,TEMP+27*2 ; !TODO ᤥ<><E1A4A5><EFBFBD><EFBFBD> <20><>१ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
|
||
LD A,(HL)
|
||
OR A
|
||
JR Z,.unknown
|
||
LD B,20 ;!HARDCODE
|
||
CALL DWPRINT
|
||
AND A
|
||
RET
|
||
.unknown:
|
||
LD A,msgStrings.ideUnknown
|
||
CALL POSTMSG
|
||
AND A
|
||
RET
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
BITS_WAITS:
|
||
; IN:
|
||
; HL - Waiting delay
|
||
; DE - MASK : PATTERN
|
||
; OUT:
|
||
; NC: (PORT & D)-E = 0
|
||
; CF: waiting delay exceeded
|
||
.WAIT_PRT:
|
||
LD BC,IDE.Read.Status
|
||
;
|
||
.loop: IN A,(C)
|
||
AND D
|
||
CP E
|
||
RET Z
|
||
DEC HL
|
||
CALL SKIPKEY
|
||
RET C
|
||
LD A,L
|
||
OR H
|
||
JP NZ,.loop
|
||
;
|
||
SCF
|
||
RET
|
||
;
|
||
|
||
; Pause for clear BUSY and DATA REQUEST
|
||
.Clear_BUSY: LD BC,IDE.Read.Status
|
||
IN A,(C)
|
||
;!TEST for normal bus with pull-ups
|
||
;CP #FF
|
||
;SCF
|
||
;RET Z
|
||
;
|
||
AND IDE.ControlByte.Busy; + IDE.ControlByte.DataRequest
|
||
RET Z
|
||
;
|
||
HALT
|
||
DEC HL
|
||
LD A,H
|
||
OR L
|
||
SCF
|
||
RET Z
|
||
;
|
||
CALL SKIPKEY
|
||
RET C
|
||
;
|
||
JR .Clear_BUSY
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
SELECT_IDE:
|
||
AND A ;%0000'0011
|
||
LD B,IDE.Drive.Master
|
||
JR Z,.AUTO_0
|
||
;
|
||
DEC A
|
||
LD B,IDE.Drive.Slave
|
||
JR Z,.AUTO_0
|
||
;
|
||
DEC A
|
||
;R00
|
||
LD B,IDE.Drive.Master
|
||
JR Z,.AUTO_1
|
||
;
|
||
DEC A
|
||
LD B,IDE.Drive.Slave
|
||
.AUTO_1: LD A,IDE.Chanel.Secondary ;SELECT SECONDARY
|
||
OUT (IDE.Chanel.Set),A
|
||
JP .AUTO
|
||
;
|
||
.AUTO_0: LD A,IDE.Chanel.Primary ;SELECT PRIMARY
|
||
OUT (IDE.Chanel.Set),A
|
||
;
|
||
XOR A
|
||
.AUTO: LD (ICHANEL),A
|
||
;R01
|
||
LD A,B
|
||
LD BC,IDE.Write.DeviceHead
|
||
OUT (C),A
|
||
;
|
||
RET
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
SKIPKEY:
|
||
EXX
|
||
CALL SCANKEY
|
||
EXX
|
||
SCF
|
||
CCF
|
||
RET Z
|
||
EXX
|
||
LD HL,#3E00 ;!HARDCODE
|
||
AND A
|
||
SBC HL,DE
|
||
EXX
|
||
SCF
|
||
CCF
|
||
RET NZ
|
||
LD A,0
|
||
LD (SKIP),A
|
||
SCF
|
||
RET
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
; [x] save hdd parameters to cmos for "setup" in settings
|
||
; IN: A' = DRV_Flags
|
||
SaveToCMOS:
|
||
LD A,(IDEDEV)
|
||
CP IDE.Device.HDD
|
||
RET NZ
|
||
|
||
EX AF,AF'
|
||
;LD A,(IY+IDE.HDD_INIT_TABLE.DRV_Flags)
|
||
AND %0001'0001
|
||
LD IX,PRIM_MASTER_CMOS_T
|
||
JR Z,.save_to_cmos
|
||
;
|
||
DEC A
|
||
LD IX,SEC_MASTER_CMOS_T
|
||
JR Z,.save_to_cmos
|
||
;
|
||
CP %0001'0000
|
||
LD IX,SEC_SLAVE_CMOS_T
|
||
JR Z,.save_to_cmos
|
||
;
|
||
LD IX,PRIM_SLAVE_CMOS_T
|
||
.save_to_cmos:
|
||
LD HL,(TEMP+1*2)
|
||
LD B,L
|
||
LD A,(IX+0)
|
||
CALL WRITCMS ; Cylinder low
|
||
|
||
LD B,H
|
||
LD A,(IX+1)
|
||
CALL WRITCMS ; Cylinder high
|
||
|
||
LD A,(TEMP+3*2)
|
||
LD B,A
|
||
LD A,(IX+2)
|
||
CALL WRITCMS ; Heads
|
||
|
||
LD A,(TEMP+6*2)
|
||
LD B,A
|
||
LD A,(IX+3)
|
||
JP WRITCMS ; Heads
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
RESET_Slave_ATAPI:
|
||
LD A,IDE.Drive.Slave
|
||
LD BC,IDE.Write.DeviceHead
|
||
OUT (C),A
|
||
PAUSE_DJNZ 16
|
||
LD BC,IDE.Write.Command
|
||
LD A,IDE.ATAPI.Reset
|
||
OUT (C),A
|
||
PAUSE_DJNZ 16
|
||
LD A,IDE.Drive.Master
|
||
LD BC,IDE.Write.DeviceHead
|
||
OUT (C),A
|
||
RET
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
; Check bug with 31 sec freeze
|
||
Bug31SecCheck: LD A,(MasterSlave)
|
||
AND 1
|
||
RET NZ
|
||
;
|
||
LD HL,PAUSES.HALT.Time_2s
|
||
CALL BITS_WAITS.Clear_BUSY
|
||
CCF
|
||
RET C
|
||
;
|
||
JP RESET_Slave_ATAPI
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
GETPARAM:
|
||
LD HL,PAUSES.WAIT.IDE
|
||
LD DE,IDE.ControlByte.DataRequest * 256 + IDE.ControlByte.DataRequest
|
||
CALL BITS_WAITS.WAIT_PRT
|
||
RET C
|
||
LD BC,IDE.Read.Data
|
||
LD HL,TEMP
|
||
INIR
|
||
INIR
|
||
CALL IDESPEC
|
||
; [x] save hdd parameters to cmos for "setup" in settings
|
||
CALL SaveToCMOS
|
||
;
|
||
AND A
|
||
RET
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
DETECTORS:
|
||
;-------;
|
||
; CHECK BY COUNTER PORT.
|
||
; Exit: CF - No device
|
||
.test_counter EQU 5
|
||
.Counter: LD A,.test_counter
|
||
LD BC,IDE.Write.Counter
|
||
OUT (C),A
|
||
LD HL,PAUSES.WAIT.SMALL
|
||
LD DE,IDE.ControlByte.Busy*256 + 0
|
||
CALL BITS_WAITS.WAIT_PRT
|
||
RET C
|
||
;
|
||
LD BC,IDE.Read.Counter ; LD BC,IDE.Read.Counter
|
||
IN A,(C)
|
||
CP .test_counter
|
||
RET Z
|
||
SCF
|
||
RET
|
||
;-------;
|
||
|
||
;-------;
|
||
; CHECK BY EXECUTING NOP COMMAND AND WAIT.
|
||
; Exit: CF - No device
|
||
.NOP_Check: LD E,IDE.ATA.Nop
|
||
LD BC,IDE.Write.Command
|
||
OUT (C),E
|
||
|
||
PAUSE_DJNZ 0
|
||
|
||
LD HL,PAUSES.HALT.SMALL
|
||
LD BC,IDE.Read.Status
|
||
;DEC B
|
||
;
|
||
.loop: IN A,(C)
|
||
SCF
|
||
RET Z
|
||
;
|
||
AND IDE.ControlByte.Busy + IDE.ControlByte.DataRequest + IDE.ControlByte.Error
|
||
CP IDE.ControlByte.Error
|
||
RET Z
|
||
;
|
||
HALT
|
||
DEC HL
|
||
LD A,H
|
||
OR L
|
||
SCF
|
||
RET Z ; Absent
|
||
;
|
||
CALL SKIPKEY
|
||
RET C ; Skipped = Absent
|
||
;
|
||
JR .loop
|
||
;-------;
|
||
|
||
;-------;
|
||
; CHECK WITH Identify Device.
|
||
; Exit: CF - No device
|
||
; NC and ZF - ATA
|
||
; NC and NZ - ATAPI
|
||
.IdentDevCheck: LD E,IDE.ATA.IdentifyDevice
|
||
LD BC,IDE.Write.Command
|
||
OUT (C),E
|
||
;
|
||
LD DE,IDE.ControlByte.Busy * 256 + 0
|
||
LD HL,PAUSES.WAIT.IDE
|
||
CALL BITS_WAITS.WAIT_PRT
|
||
RET C ; Absent
|
||
;
|
||
LD BC,IDE.Read.Status
|
||
IN A,(C)
|
||
RRCA
|
||
JR C,.non_ATA
|
||
;
|
||
AND (IDE.ControlByte.DataRequest + IDE.ControlByte.Ready) / 2
|
||
SCF
|
||
RET Z
|
||
;
|
||
XOR A
|
||
RET ; ATA
|
||
;
|
||
.non_ATA: LD BC,IDE.Read.Error
|
||
IN A,(C)
|
||
AND IDE.ErrorByte.Abort
|
||
RET NZ ; ATAPI
|
||
;
|
||
SCF ; Absent
|
||
RET
|
||
;-------;
|
||
|
||
;-------;
|
||
; ATAPI or Absent
|
||
; Exit: CF - No device
|
||
; NC - ATAPI
|
||
.IdentPDevChk: LD E,IDE.ATAPI.IdentifyPackedDevice
|
||
LD BC,IDE.Write.Command
|
||
OUT (C),E
|
||
LD HL,PAUSES.WAIT.IDE
|
||
LD DE,IDE.ControlByte.Busy*256 + 0
|
||
CALL BITS_WAITS.WAIT_PRT
|
||
RET C
|
||
;
|
||
LD BC,IDE.Read.Status
|
||
IN A,(C)
|
||
RRCA
|
||
RET C
|
||
XOR A
|
||
RET
|
||
;-------;
|
||
|
||
;-------;
|
||
; <20> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>⮩, <20><> <20><>⠥<EFBFBD><E2A0A5><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD> <20><>, <20><><EFBFBD> <20>뫮 <20><><EFBFBD>⠢<EFBFBD><E2A0A2><EFBFBD><EFBFBD>
|
||
; <20><><EFBFBD><E1ABA5><EFBFBD><EFBFBD> <20><> 設<> c <20><>⭮<EFBFBD><E2ADAE> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD>ன
|
||
; <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
ALIGN 2 ; <20><><EFBFBD> <20>㦭<EFBFBD> <20><>ࠢ<EFBFBD><E0A0A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD>㬠<EFBFBD><E3ACA0><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ᠬ <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>⥭<EFBFBD><E2A5AD> <20><> <20><><EFBFBD>⮢
|
||
.CheckChanel: LD BC,IDE.Read.Status
|
||
IN A,(C) ;#ED78 A=#78
|
||
IN L,(C) ;#ED68 L=#68
|
||
LD D,A
|
||
IN A,(C) ;#ED60 A=#ED
|
||
LD E,L
|
||
; <20> <20><><EFBFBD>⮩: DE=#7868, A=#ED
|
||
;
|
||
LD HL,#7868 + #ED
|
||
AND A
|
||
SBC HL,DE
|
||
XOR L
|
||
RET NZ ; not absent
|
||
SCF
|
||
RET ; absent
|
||
;-------;
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
SetUP_CHANELS:
|
||
LD A,1
|
||
CALL .CMD
|
||
LD A,3
|
||
CALL .CMD
|
||
LD A,0
|
||
CALL .CMD
|
||
LD A,2
|
||
.CMD: CALL SELECT_IDE
|
||
LD BC,IDE.Write.Command
|
||
LD H,IDE.ATA.Nop
|
||
OUT (C),H
|
||
PAUSE_DJNZ 32
|
||
; Disable INTRQ
|
||
; LD BC,IDE.Write.DeviceControl
|
||
; LD A,%0000'0010
|
||
; OUT (C),A
|
||
; PAUSE_DJNZ 32
|
||
; ;
|
||
; CALL DisableStandBy
|
||
; PAUSE_DJNZ 32
|
||
RET
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
; DisableWriteCache:
|
||
; LD BC,IDE.Write.Features
|
||
; LD A,IDE.ATA.SetFeatures.DisableWriteCache
|
||
; OUT (C),A
|
||
; LD A,IDE.ATA.SetFeatures
|
||
; JP IDE_CMD
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
;Disable StandBy timer
|
||
; DisableStandBy:
|
||
; LD BC,IDE.Write.Counter
|
||
; XOR A
|
||
; OUT (C),A
|
||
; LD A,IDE.ATA.Idle
|
||
; JP IDE_CMD
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
/////////////////////////////////////////////////////////////////////[v]
|
||
; DISABLE_8bit:
|
||
; LD BC,IDE.Write.Features
|
||
; LD A,IDE.ATA.SetFeatures.Disable8bit
|
||
; OUT (C),A
|
||
; LD A,IDE.ATA.SetFeatures
|
||
; JP IDE_CMD
|
||
/////////////////////////////////////////////////////////////////////[^]
|
||
|
||
|
||
;!FIXIT CMOS <20><>।<EFBFBD><E0A5A4><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>祥<EFBFBD> <20><> SP2000.inc
|
||
PRIM_MASTER_CMOS_T:
|
||
DB M_CYLL,M_CYLH,M_HEAD,M_SECT
|
||
PRIM_SLAVE_CMOS_T:
|
||
DB S_CYLL,S_CYLH,S_HEAD,S_SECT
|
||
SEC_MASTER_CMOS_T:
|
||
DB SM_CYLL,SM_CYLH,SM_HEAD,SM_SECT
|
||
SEC_SLAVE_CMOS_T:
|
||
DB SS_CYLL,SS_CYLH,SS_HEAD,SS_SECT
|
||
|
||
|
||
SKIP: BYTE #FF
|
||
IDEDEV: BYTE #FF
|
||
ICHANEL: BYTE #00
|
||
MasterSlave BYTE #00
|
||
|
||
|
||
;WAITHDD DEC L
|
||
; RET NZ
|
||
; DEC H
|
||
; RET NZ
|
||
; DEC E
|
||
; RET NZ
|
||
; SCF
|
||
; RET
|
||
|
||
; E - Second * 10
|
||
|
||
;PAUSE LD HL,#0000
|
||
;PAUSE1 DEC L
|
||
; JR NZ,PAUSE1
|
||
; DEC H
|
||
; JR NZ,PAUSE1
|
||
; DEC E
|
||
; JR NZ,PAUSE1
|
||
; RET
|
||
|
||
ENDMODULE
|
||
; |