# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
# Date created = 22:40:48  September 08, 2020
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		divmmc_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus II software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY MAX7000S
set_global_assignment -name DEVICE "EPM7128STC100-7"
set_global_assignment -name TOP_LEVEL_ENTITY divmmc
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:40:48  SEPTEMBER 08, 2020"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name VHDL_FILE divmmc.vhd
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
set_global_assignment -name POWER_EXT_SUPPLY_VOLTAGE_TO_REGULATOR 3.3V
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name MAX7000_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"



set_location_assignment PIN_9 -to A[0]
set_location_assignment PIN_12 -to A[1]
set_location_assignment PIN_13 -to A[10]
set_location_assignment PIN_19 -to A[11]
set_location_assignment PIN_80 -to A[12]
set_location_assignment PIN_79 -to A[13]
set_location_assignment PIN_77 -to A[14]
set_location_assignment PIN_76 -to A[15]
set_location_assignment PIN_14 -to A[2]
set_location_assignment PIN_17 -to A[3]
set_location_assignment PIN_20 -to A[4]
set_location_assignment PIN_22 -to A[5]
set_location_assignment PIN_24 -to A[6]
set_location_assignment PIN_25 -to A[7]
set_location_assignment PIN_23 -to A[8]
set_location_assignment PIN_21 -to A[9]

set_location_assignment PIN_32 -to bankout[0]
set_location_assignment PIN_31 -to bankout[1]
set_location_assignment PIN_36 -to bankout[2]
set_location_assignment PIN_30 -to bankout[3]
set_location_assignment PIN_35 -to bankout[4]
set_location_assignment PIN_29 -to bankout[5]

set_location_assignment PIN_47 -to card[0]
set_location_assignment PIN_46 -to card[1]

set_location_assignment PIN_87 -to clock

set_location_assignment PIN_7 -to d[0]
set_location_assignment PIN_5 -to d[1]
set_location_assignment PIN_1 -to d[2]
set_location_assignment PIN_99 -to d[3]
set_location_assignment PIN_100 -to d[4]
set_location_assignment PIN_2 -to d[5]
set_location_assignment PIN_6 -to d[6]
set_location_assignment PIN_8 -to d[7]

set_location_assignment PIN_72 -to eprom

set_location_assignment PIN_81 -to iorq
set_location_assignment PIN_92 -to m1
set_location_assignment PIN_70 -to mapcondout
set_location_assignment PIN_10 -to mreq
set_location_assignment PIN_71 -to poweron

set_location_assignment PIN_98 -to ramoe
set_location_assignment PIN_28 -to ramwr
set_location_assignment PIN_83 -to rd
set_location_assignment PIN_85 -to reset


set_location_assignment PIN_75 -to romcs
set_location_assignment PIN_16 -to romoe
set_location_assignment PIN_27 -to romwr

set_location_assignment PIN_48 -to spi_clock
set_location_assignment PIN_50 -to spi_datain
set_location_assignment PIN_49 -to spi_dataout

set_location_assignment PIN_84 -to wr

set_location_assignment PIN_93 -to IORQGE
set_global_assignment -name SEARCH_PATH "h:\\zx\\cpld_project\\divmmc\\divmmc_cpld_v0\\output_files"