forked from RomanRom2/GeneralSound
10586 lines
496 KiB
Plaintext
10586 lines
496 KiB
Plaintext
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||
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||
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||
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|
||
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|
||
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|
||
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||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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||
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|
||
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|
||
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|
||
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|
||
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||
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|
||
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||
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|
||
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|
||
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||
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||
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|
||
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||
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|
||
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|
||
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||
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||
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||
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|
||
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|
||
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|
||
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|
||
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||
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||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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||
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|
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|
||
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|
||
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|
||
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||
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||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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||
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||
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||
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||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ECS-10-13-1_1"
|
||
(originalName "ECS-10-13-1")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 2)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
)
|
||
(compPin "1" (pinName "OSC1") (partNum 1) (symPinNum 2) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "OSC2") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ECS-10-13-1") )
|
||
(attachedPattern (patternNum 1) (patternName "Q")
|
||
(numPads 2)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
)
|
||
)
|
||
)
|
||
(compDef "DIODE_1206_1"
|
||
(originalName "DIODE_1206")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 2)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "VD")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "K") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "A") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "DIODE_1206") )
|
||
(attachedPattern (patternNum 1) (patternName "D1")
|
||
(numPads 2)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ÈÐ23_1"
|
||
(originalName "ÈÐ23")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 20)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "~OE") (partNum 1) (symPinNum 17) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "Q1") (partNum 1) (symPinNum 16) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "3" (pinName "D1") (partNum 1) (symPinNum 15) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "4" (pinName "D2") (partNum 1) (symPinNum 18) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "5" (pinName "Q2") (partNum 1) (symPinNum 7) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "6" (pinName "Q3") (partNum 1) (symPinNum 6) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "7" (pinName "D3") (partNum 1) (symPinNum 5) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "8" (pinName "D4") (partNum 1) (symPinNum 10) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "9" (pinName "Q4") (partNum 1) (symPinNum 9) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "10" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "11" (pinName "CLK") (partNum 1) (symPinNum 8) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "12" (pinName "Q5") (partNum 1) (symPinNum 4) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "13" (pinName "D5") (partNum 1) (symPinNum 14) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "14" (pinName "D6") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "15" (pinName "Q6") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "16" (pinName "Q7") (partNum 1) (symPinNum 13) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "17" (pinName "D7") (partNum 1) (symPinNum 12) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "18" (pinName "D8") (partNum 1) (symPinNum 11) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "19" (pinName "Q8") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "20" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ÈÐ23") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP20")
|
||
(numPads 20)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
(padNum 15) (compPinRef "15")
|
||
(padNum 16) (compPinRef "16")
|
||
(padNum 17) (compPinRef "17")
|
||
(padNum 18) (compPinRef "18")
|
||
(padNum 19) (compPinRef "19")
|
||
(padNum 20) (compPinRef "20")
|
||
)
|
||
)
|
||
)
|
||
(compDef "M29F040-150K1_1"
|
||
(originalName "M29F040-150K1")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 32)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "A18") (partNum 1) (symPinNum 19) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "2" (pinName "A16") (partNum 1) (symPinNum 17) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "3" (pinName "A15") (partNum 1) (symPinNum 16) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "4" (pinName "A12") (partNum 1) (symPinNum 13) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "5" (pinName "A7") (partNum 1) (symPinNum 8) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "6" (pinName "A6") (partNum 1) (symPinNum 7) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "7" (pinName "A5") (partNum 1) (symPinNum 6) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "8" (pinName "A4") (partNum 1) (symPinNum 5) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "9" (pinName "A3") (partNum 1) (symPinNum 4) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "10" (pinName "A2") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "11" (pinName "A1") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "12" (pinName "A0") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "13" (pinName "D0") (partNum 1) (symPinNum 20) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "14" (pinName "D1") (partNum 1) (symPinNum 21) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "15" (pinName "D2") (partNum 1) (symPinNum 22) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "16" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "17" (pinName "D3") (partNum 1) (symPinNum 23) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "18" (pinName "D4") (partNum 1) (symPinNum 24) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "19" (pinName "D5") (partNum 1) (symPinNum 25) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "20" (pinName "D6") (partNum 1) (symPinNum 26) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "21" (pinName "D7") (partNum 1) (symPinNum 27) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "22" (pinName "~CE") (partNum 1) (symPinNum 28) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "23" (pinName "A10") (partNum 1) (symPinNum 11) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "24" (pinName "~OE") (partNum 1) (symPinNum 29) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "25" (pinName "A11") (partNum 1) (symPinNum 12) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "26" (pinName "A9") (partNum 1) (symPinNum 10) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "27" (pinName "A8") (partNum 1) (symPinNum 9) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "28" (pinName "A13") (partNum 1) (symPinNum 14) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "29" (pinName "A14") (partNum 1) (symPinNum 15) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "30" (pinName "A17") (partNum 1) (symPinNum 18) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "31" (pinName "~WE") (partNum 1) (symPinNum 30) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "32" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "SST39SF040") )
|
||
(attachedPattern (patternNum 1) (patternName "M29F040-150K1")
|
||
(numPads 32)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
(padNum 15) (compPinRef "15")
|
||
(padNum 16) (compPinRef "16")
|
||
(padNum 17) (compPinRef "17")
|
||
(padNum 18) (compPinRef "18")
|
||
(padNum 19) (compPinRef "19")
|
||
(padNum 20) (compPinRef "20")
|
||
(padNum 21) (compPinRef "21")
|
||
(padNum 22) (compPinRef "22")
|
||
(padNum 23) (compPinRef "23")
|
||
(padNum 24) (compPinRef "24")
|
||
(padNum 25) (compPinRef "25")
|
||
(padNum 26) (compPinRef "26")
|
||
(padNum 27) (compPinRef "27")
|
||
(padNum 28) (compPinRef "28")
|
||
(padNum 29) (compPinRef "29")
|
||
(padNum 30) (compPinRef "30")
|
||
(padNum 31) (compPinRef "31")
|
||
(padNum 32) (compPinRef "32")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ÊÒ_1"
|
||
(originalName "ÊÒ")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 3)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
)
|
||
(compPin "B" (pinName "B") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "E" (pinName "E") (partNum 1) (symPinNum 2) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "C" (pinName "C") (partNum 1) (symPinNum 3) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ÊÒ") )
|
||
(attachedPattern (patternNum 1) (patternName "KT315B_KT315B(PRIMARY)")
|
||
(numPads 3)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "B")
|
||
(padNum 2) (compPinRef "E")
|
||
(padNum 3) (compPinRef "C")
|
||
)
|
||
)
|
||
)
|
||
(compDef "555ÈÅ19_1"
|
||
(originalName "555ÈÅ19")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 14)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "~C") (partNum 1) (symPinNum 5) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "2" (pinName "R") (partNum 1) (symPinNum 11) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "3" (pinName "Q0") (partNum 1) (symPinNum 10) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "4" (pinName "Q1") (partNum 1) (symPinNum 12) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "5" (pinName "Q2") (partNum 1) (symPinNum 4) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "6" (pinName "Q3") (partNum 1) (symPinNum 8) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "7" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "8" (pinName "Q3") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "9" (pinName "Q2") (partNum 1) (symPinNum 7) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "10" (pinName "Q1") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "11" (pinName "Q0") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "12" (pinName "R") (partNum 1) (symPinNum 6) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "13" (pinName "~C") (partNum 1) (symPinNum 9) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "14" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ÈÅ19") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP14")
|
||
(numPads 14)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
)
|
||
)
|
||
)
|
||
(compDef "4610X-2_1"
|
||
(originalName "4610X-2")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 2)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "RR")
|
||
)
|
||
(compPin "1" (pinName "1") (partNum 1) (symPinNum 2) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "2") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "4610X-2") )
|
||
(attachedPattern (patternNum 1) (patternName "R2")
|
||
(numPads 2)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ËÍ1_1"
|
||
(originalName "ËÍ1")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 14)
|
||
(numParts 6)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "1") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "2" (pinName "2") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "3" (pinName "1") (partNum 2) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "4" (pinName "2") (partNum 2) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "5" (pinName "1") (partNum 3) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "6" (pinName "2") (partNum 3) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "7" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "8" (pinName "2") (partNum 4) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "9" (pinName "1") (partNum 4) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "10" (pinName "2") (partNum 5) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "11" (pinName "1") (partNum 5) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "12" (pinName "2") (partNum 6) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "13" (pinName "1") (partNum 6) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "14" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ËÍ1") )
|
||
(attachedSymbol (partNum 2) (altType Normal) (symbolName "ËÍ1") )
|
||
(attachedSymbol (partNum 3) (altType Normal) (symbolName "ËÍ1") )
|
||
(attachedSymbol (partNum 4) (altType Normal) (symbolName "ËÍ1") )
|
||
(attachedSymbol (partNum 5) (altType Normal) (symbolName "ËÍ1") )
|
||
(attachedSymbol (partNum 6) (altType Normal) (symbolName "ËÍ1") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP14")
|
||
(numPads 14)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
)
|
||
)
|
||
)
|
||
(compDef "RES_1206_1"
|
||
(originalName "RES_1206")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 2)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "R")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "1") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "2") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "RES_1206") )
|
||
(attachedPattern (patternNum 1) (patternName "RC1206-KL_PST-C")
|
||
(numPads 2)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
)
|
||
)
|
||
)
|
||
(compDef "6T4008_1"
|
||
(originalName "6T4008")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
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|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "A18") (partNum 1) (symPinNum 19) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "2" (pinName "A16") (partNum 1) (symPinNum 17) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "3" (pinName "A14") (partNum 1) (symPinNum 15) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "4" (pinName "A12") (partNum 1) (symPinNum 13) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "5" (pinName "A7") (partNum 1) (symPinNum 8) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "6" (pinName "A6") (partNum 1) (symPinNum 7) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "7" (pinName "A5") (partNum 1) (symPinNum 6) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "8" (pinName "A4") (partNum 1) (symPinNum 5) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "9" (pinName "A3") (partNum 1) (symPinNum 4) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "10" (pinName "A2") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "11" (pinName "A1") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "12" (pinName "A0") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "13" (pinName "D0") (partNum 1) (symPinNum 23) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "14" (pinName "D1") (partNum 1) (symPinNum 24) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "15" (pinName "D2") (partNum 1) (symPinNum 25) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "16" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "17" (pinName "D3") (partNum 1) (symPinNum 26) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "18" (pinName "D4") (partNum 1) (symPinNum 27) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "19" (pinName "D5") (partNum 1) (symPinNum 28) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "20" (pinName "D6") (partNum 1) (symPinNum 29) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "21" (pinName "D7") (partNum 1) (symPinNum 30) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "22" (pinName "~CS") (partNum 1) (symPinNum 20) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "23" (pinName "A10") (partNum 1) (symPinNum 11) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "24" (pinName "~OE") (partNum 1) (symPinNum 22) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "25" (pinName "A11") (partNum 1) (symPinNum 12) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "26" (pinName "A9") (partNum 1) (symPinNum 10) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "27" (pinName "A8") (partNum 1) (symPinNum 9) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "28" (pinName "A13") (partNum 1) (symPinNum 14) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "29" (pinName "~WE") (partNum 1) (symPinNum 21) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "30" (pinName "A17") (partNum 1) (symPinNum 18) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "31" (pinName "A15") (partNum 1) (symPinNum 16) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "32" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "SRAM_512X8") )
|
||
(attachedPattern (patternNum 1) (patternName "6T4008")
|
||
(numPads 32)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
(padNum 15) (compPinRef "15")
|
||
(padNum 16) (compPinRef "16")
|
||
(padNum 17) (compPinRef "17")
|
||
(padNum 18) (compPinRef "18")
|
||
(padNum 19) (compPinRef "19")
|
||
(padNum 20) (compPinRef "20")
|
||
(padNum 21) (compPinRef "21")
|
||
(padNum 22) (compPinRef "22")
|
||
(padNum 23) (compPinRef "23")
|
||
(padNum 24) (compPinRef "24")
|
||
(padNum 25) (compPinRef "25")
|
||
(padNum 26) (compPinRef "26")
|
||
(padNum 27) (compPinRef "27")
|
||
(padNum 28) (compPinRef "28")
|
||
(padNum 29) (compPinRef "29")
|
||
(padNum 30) (compPinRef "30")
|
||
(padNum 31) (compPinRef "31")
|
||
(padNum 32) (compPinRef "32")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ÊÒ1_1"
|
||
(originalName "ÊÒ1")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 3)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
)
|
||
(compPin "B" (pinName "B") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "E" (pinName "E") (partNum 1) (symPinNum 2) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "C" (pinName "C") (partNum 1) (symPinNum 3) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ÊÒ1") )
|
||
(attachedPattern (patternNum 1) (patternName "KT315B_KT315B(PRIMARY)")
|
||
(numPads 3)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "B")
|
||
(padNum 2) (compPinRef "E")
|
||
(padNum 3) (compPinRef "C")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ËÀ2_1"
|
||
(originalName "ËÀ2")
|
||
(compHeader
|
||
(sourceLibrary "C:Program FilesDipTraceLibMy LibrariesBA86-IR82.eli")
|
||
(numPins 11)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
)
|
||
(compPin "1" (pinName "A") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "B") (partNum 1) (symPinNum 2) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "3" (pinName "C") (partNum 1) (symPinNum 3) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "4" (pinName "D") (partNum 1) (symPinNum 4) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "5" (pinName "E") (partNum 1) (symPinNum 5) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "6" (pinName "F") (partNum 1) (symPinNum 6) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "8" (pinName "Y") (partNum 1) (symPinNum 7) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "11" (pinName "G") (partNum 1) (symPinNum 8) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "12" (pinName "H") (partNum 1) (symPinNum 9) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "7" (pinName "GND") (partNum 1) (symPinNum 10) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "14" (pinName "VCC") (partNum 1) (symPinNum 11) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ËÀ2_58") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP-14")
|
||
(numPads 0)
|
||
(padPinMap
|
||
)
|
||
)
|
||
)
|
||
(compDef "Z80_1"
|
||
(originalName "Z80")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 40)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "A11") (partNum 1) (symPinNum 13) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "2" (pinName "A12") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "3" (pinName "A13") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "4" (pinName "A14") (partNum 1) (symPinNum 12) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "5" (pinName "A15") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "6" (pinName "CLK") (partNum 1) (symPinNum 37) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "7" (pinName "D4") (partNum 1) (symPinNum 35) (gateEq 1) (pinEq 0) (pinType Bidirectional) )
|
||
(compPin "8" (pinName "D3") (partNum 1) (symPinNum 25) (gateEq 1) (pinEq 0) (pinType Bidirectional) )
|
||
(compPin "9" (pinName "D5") (partNum 1) (symPinNum 22) (gateEq 1) (pinEq 0) (pinType Bidirectional) )
|
||
(compPin "10" (pinName "D6") (partNum 1) (symPinNum 23) (gateEq 1) (pinEq 0) (pinType Bidirectional) )
|
||
(compPin "11" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "12" (pinName "D2") (partNum 1) (symPinNum 24) (gateEq 1) (pinEq 0) (pinType Bidirectional) )
|
||
(compPin "13" (pinName "D7") (partNum 1) (symPinNum 34) (gateEq 1) (pinEq 0) (pinType Bidirectional) )
|
||
(compPin "14" (pinName "D0") (partNum 1) (symPinNum 26) (gateEq 1) (pinEq 0) (pinType Bidirectional) )
|
||
(compPin "15" (pinName "D1") (partNum 1) (symPinNum 36) (gateEq 1) (pinEq 0) (pinType Bidirectional) )
|
||
(compPin "16" (pinName "~INT") (partNum 1) (symPinNum 38) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "17" (pinName "~NMI") (partNum 1) (symPinNum 30) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "18" (pinName "~HALT") (partNum 1) (symPinNum 19) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "19" (pinName "~MREQ") (partNum 1) (symPinNum 28) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "20" (pinName "~IORQ") (partNum 1) (symPinNum 18) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "21" (pinName "~RD") (partNum 1) (symPinNum 33) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "22" (pinName "~WR") (partNum 1) (symPinNum 27) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "23" (pinName "~BSAK") (partNum 1) (symPinNum 29) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "24" (pinName "~WAIT") (partNum 1) (symPinNum 20) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "25" (pinName "~BSRQ") (partNum 1) (symPinNum 32) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "26" (pinName "~RES") (partNum 1) (symPinNum 21) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "27" (pinName "~M1") (partNum 1) (symPinNum 31) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "28" (pinName "~RFSH") (partNum 1) (symPinNum 17) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "29" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "30" (pinName "A0") (partNum 1) (symPinNum 10) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "31" (pinName "A1") (partNum 1) (symPinNum 11) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "32" (pinName "A2") (partNum 1) (symPinNum 16) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "33" (pinName "A3") (partNum 1) (symPinNum 8) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "34" (pinName "A4") (partNum 1) (symPinNum 9) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "35" (pinName "A5") (partNum 1) (symPinNum 15) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "36" (pinName "A6") (partNum 1) (symPinNum 6) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "37" (pinName "A7") (partNum 1) (symPinNum 7) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "38" (pinName "A8") (partNum 1) (symPinNum 14) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "39" (pinName "A9") (partNum 1) (symPinNum 4) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "40" (pinName "A10") (partNum 1) (symPinNum 5) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "Z80C00") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP40")
|
||
(numPads 40)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
(padNum 15) (compPinRef "15")
|
||
(padNum 16) (compPinRef "16")
|
||
(padNum 17) (compPinRef "17")
|
||
(padNum 18) (compPinRef "18")
|
||
(padNum 19) (compPinRef "19")
|
||
(padNum 20) (compPinRef "20")
|
||
(padNum 21) (compPinRef "21")
|
||
(padNum 22) (compPinRef "22")
|
||
(padNum 23) (compPinRef "23")
|
||
(padNum 24) (compPinRef "24")
|
||
(padNum 25) (compPinRef "25")
|
||
(padNum 26) (compPinRef "26")
|
||
(padNum 27) (compPinRef "27")
|
||
(padNum 28) (compPinRef "28")
|
||
(padNum 29) (compPinRef "29")
|
||
(padNum 30) (compPinRef "30")
|
||
(padNum 31) (compPinRef "31")
|
||
(padNum 32) (compPinRef "32")
|
||
(padNum 33) (compPinRef "33")
|
||
(padNum 34) (compPinRef "34")
|
||
(padNum 35) (compPinRef "35")
|
||
(padNum 36) (compPinRef "36")
|
||
(padNum 37) (compPinRef "37")
|
||
(padNum 38) (compPinRef "38")
|
||
(padNum 39) (compPinRef "39")
|
||
(padNum 40) (compPinRef "40")
|
||
)
|
||
)
|
||
)
|
||
(compDef "572ÏÀ1_1"
|
||
(originalName "572ÏÀ1")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 16)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
)
|
||
(compPin "1" (pinName "-") (partNum 1) (symPinNum 2) (gateEq 0) (pinEq 0) (pinType Output) )
|
||
(compPin "2" (pinName "+") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Output) )
|
||
(compPin "3" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "4" (pinName "D9") (partNum 1) (symPinNum 3) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "5" (pinName "D8") (partNum 1) (symPinNum 10) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "6" (pinName "D7") (partNum 1) (symPinNum 9) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "7" (pinName "D6") (partNum 1) (symPinNum 4) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "8" (pinName "D5") (partNum 1) (symPinNum 8) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "9" (pinName "D4") (partNum 1) (symPinNum 7) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "10" (pinName "D3") (partNum 1) (symPinNum 5) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "11" (pinName "D2") (partNum 1) (symPinNum 13) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "12" (pinName "D1") (partNum 1) (symPinNum 12) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "13" (pinName "D0") (partNum 1) (symPinNum 6) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "14" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "15" (pinName "Uref") (partNum 1) (symPinNum 11) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "16" (pinName "Rfb") (partNum 1) (symPinNum 14) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "572ÏÀ1") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP16")
|
||
(numPads 16)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
(padNum 15) (compPinRef "15")
|
||
(padNum 16) (compPinRef "16")
|
||
)
|
||
)
|
||
)
|
||
(compDef "CAP_1206_1"
|
||
(originalName "CAP_1206")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 2)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "C")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "1") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "2") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "CAP_1206") )
|
||
(attachedPattern (patternNum 1) (patternName "RC1206-KL_PST-C")
|
||
(numPads 2)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ÈÅ5_1"
|
||
(originalName "ÈÅ5")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
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|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "C2") (partNum 1) (symPinNum 8) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "2" (pinName "R1") (partNum 1) (symPinNum 6) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "3" (pinName "R2") (partNum 1) (symPinNum 5) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "4" (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) )
|
||
(compPin "5" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "6" (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) )
|
||
(compPin "7" (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) )
|
||
(compPin "8" (pinName "4") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "9" (pinName "2") (partNum 1) (symPinNum 4) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(compPin "10" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "11" (pinName "8") (partNum 1) (symPinNum 3) (gateEq 0) (pinEq 0) (pinType Output) )
|
||
(compPin "12" (pinName "1") (partNum 1) (symPinNum 2) (gateEq 0) (pinEq 0) (pinType Output) )
|
||
(compPin "13" (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) )
|
||
(compPin "14" (pinName "C1") (partNum 1) (symPinNum 7) (gateEq 0) (pinEq 0) (pinType Input) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ÈÅ5") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP14")
|
||
(numPads 14)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
)
|
||
)
|
||
)
|
||
(compDef "555ÈÐ35_1"
|
||
(originalName "555ÈÐ35")
|
||
(compHeader
|
||
(sourceLibrary "C:Program FilesDipTraceLibMy LibrariesBA86-IR82.eli")
|
||
(numPins 20)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
)
|
||
(compPin "1" (pinName "~OE~") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "Q0") (partNum 1) (symPinNum 2) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "3" (pinName "D0") (partNum 1) (symPinNum 3) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "4" (pinName "D1") (partNum 1) (symPinNum 4) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "5" (pinName "Q1") (partNum 1) (symPinNum 5) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "6" (pinName "Q2") (partNum 1) (symPinNum 6) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "7" (pinName "D2") (partNum 1) (symPinNum 7) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "8" (pinName "D3") (partNum 1) (symPinNum 8) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "9" (pinName "Q3") (partNum 1) (symPinNum 9) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "10" (pinName "GND") (partNum 1) (symPinNum 10) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "11" (pinName "C") (partNum 1) (symPinNum 11) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "12" (pinName "Q4") (partNum 1) (symPinNum 12) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "13" (pinName "D4") (partNum 1) (symPinNum 13) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "14" (pinName "D5") (partNum 1) (symPinNum 14) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "15" (pinName "Q5") (partNum 1) (symPinNum 15) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "16" (pinName "Q6") (partNum 1) (symPinNum 16) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "17" (pinName "D6") (partNum 1) (symPinNum 17) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "18" (pinName "D7") (partNum 1) (symPinNum 18) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "19" (pinName "Q7") (partNum 1) (symPinNum 19) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "20" (pinName "VCC") (partNum 1) (symPinNum 20) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "555ÈÐ35_71") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP-20")
|
||
(numPads 0)
|
||
(padPinMap
|
||
)
|
||
)
|
||
)
|
||
(compDef "ËÈ1_1"
|
||
(originalName "ËÈ1")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 14)
|
||
(numParts 4)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "D")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "A") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "2" (pinName "B") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "3" (pinName "Q") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "4" (pinName "A") (partNum 2) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "5" (pinName "B") (partNum 2) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "6" (pinName "Q") (partNum 2) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "7" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "8" (pinName "Q") (partNum 3) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "9" (pinName "B") (partNum 3) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "10" (pinName "A") (partNum 3) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "11" (pinName "Q") (partNum 4) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "12" (pinName "B") (partNum 4) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "13" (pinName "A") (partNum 4) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "14" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ËÈ1") )
|
||
(attachedSymbol (partNum 2) (altType Normal) (symbolName "ËÈ1") )
|
||
(attachedSymbol (partNum 3) (altType Normal) (symbolName "ËÈ1") )
|
||
(attachedSymbol (partNum 4) (altType Normal) (symbolName "ËÈ1") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP14")
|
||
(numPads 14)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
)
|
||
)
|
||
)
|
||
(compDef "3.5_ÄÆÅÊ_1"
|
||
(originalName "3.5_ÄÆÅÊ")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
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|
||
(numParts 1)
|
||
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|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "GND") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "LEFT") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "3" (pinName "LEFT") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "4" (pinName "RIGHT") (partNum 1) (symPinNum 4) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "5" (pinName "RIGHT") (partNum 1) (symPinNum 5) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "6" (partNum 1) (symPinNum 6) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "7" (partNum 1) (symPinNum 7) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "8" (partNum 1) (symPinNum 8) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "CONN-8PIN") )
|
||
(attachedPattern (patternNum 1) (patternName "ST-029N06")
|
||
(numPads 8)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ÊÏ11_1"
|
||
(originalName "ÊÏ11")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
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|
||
(numParts 1)
|
||
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|
||
(refDesPrefix "U")
|
||
)
|
||
(compPin "1" (pinName "S") (partNum 1) (symPinNum 4) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "A0") (partNum 1) (symPinNum 13) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "3" (pinName "B0") (partNum 1) (symPinNum 12) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "4" (pinName "Y0") (partNum 1) (symPinNum 11) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "5" (pinName "A1") (partNum 1) (symPinNum 3) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "6" (pinName "B1") (partNum 1) (symPinNum 10) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "7" (pinName "Y1") (partNum 1) (symPinNum 9) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "8" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "9" (pinName "Y2") (partNum 1) (symPinNum 2) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "10" (pinName "B2") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "11" (pinName "A2") (partNum 1) (symPinNum 8) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "12" (pinName "Y3") (partNum 1) (symPinNum 7) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "13" (pinName "B3") (partNum 1) (symPinNum 6) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "14" (pinName "A3") (partNum 1) (symPinNum 5) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "15" (pinName "~OE") (partNum 1) (symPinNum 14) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
(compPin "16" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ÊÏ11") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP16")
|
||
(numPads 16)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
(padNum 15) (compPinRef "15")
|
||
(padNum 16) (compPinRef "16")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ËÏ8_1"
|
||
(originalName "ËÏ8")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
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|
||
(numParts 4)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "D")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "~OE") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "2" (pinName "DI") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "3" (pinName "DO") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "4" (pinName "~OE") (partNum 2) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "5" (pinName "DI") (partNum 2) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "6" (pinName "DO") (partNum 2) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "7" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "8" (pinName "DO") (partNum 3) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "9" (pinName "DI") (partNum 3) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "10" (pinName "~OE") (partNum 3) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "11" (pinName "DO") (partNum 4) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "12" (pinName "DI") (partNum 4) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "13" (pinName "~OE") (partNum 4) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "14" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ËÏ8") )
|
||
(attachedSymbol (partNum 2) (altType Normal) (symbolName "ËÏ8") )
|
||
(attachedSymbol (partNum 3) (altType Normal) (symbolName "ËÏ8") )
|
||
(attachedSymbol (partNum 4) (altType Normal) (symbolName "ËÏ8") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP14")
|
||
(numPads 14)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ÒÌ8_1"
|
||
(originalName "ÒÌ8")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
(numPins 16)
|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "~R") (partNum 1) (symPinNum 9) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "2" (pinName "Q1") (partNum 1) (symPinNum 12) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "3" (pinName "~Q1") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "4" (pinName "D1") (partNum 1) (symPinNum 8) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "5" (pinName "D2") (partNum 1) (symPinNum 14) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "6" (pinName "~Q2") (partNum 1) (symPinNum 4) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "7" (pinName "Q2") (partNum 1) (symPinNum 7) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "8" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "9" (pinName "C") (partNum 1) (symPinNum 13) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "10" (pinName "Q3") (partNum 1) (symPinNum 6) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "11" (pinName "~Q3") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "12" (pinName "D3") (partNum 1) (symPinNum 11) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "13" (pinName "D4") (partNum 1) (symPinNum 5) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "14" (pinName "~Q4") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "15" (pinName "Q4") (partNum 1) (symPinNum 10) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "16" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ÒÌ8") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP16")
|
||
(numPads 16)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
(padNum 15) (compPinRef "15")
|
||
(padNum 16) (compPinRef "16")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ÈÄ7_1"
|
||
(originalName "ÈÄ7")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
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|
||
(numParts 1)
|
||
(alts (ieeeAlt False) (deMorganAlt False))
|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "A0") (partNum 1) (symPinNum 5) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "2" (pinName "A1") (partNum 1) (symPinNum 13) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "3" (pinName "A2") (partNum 1) (symPinNum 12) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "4" (pinName "~E1") (partNum 1) (symPinNum 10) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "5" (pinName "~E2") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "6" (pinName "E3") (partNum 1) (symPinNum 9) (gateEq 1) (pinEq 0) (pinType Input) )
|
||
(compPin "7" (pinName "~Y7") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "8" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "9" (pinName "~Y6") (partNum 1) (symPinNum 8) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "10" (pinName "~Y5") (partNum 1) (symPinNum 7) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "11" (pinName "~Y4") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "12" (pinName "~Y3") (partNum 1) (symPinNum 6) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "13" (pinName "~Y2") (partNum 1) (symPinNum 14) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "14" (pinName "~Y1") (partNum 1) (symPinNum 4) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "15" (pinName "~Y0") (partNum 1) (symPinNum 11) (gateEq 1) (pinEq 0) (pinType Output) )
|
||
(compPin "16" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ÈÄ7") )
|
||
(attachedPattern (patternNum 1) (patternName "DIP16")
|
||
(numPads 16)
|
||
(padPinMap
|
||
(padNum 1) (compPinRef "1")
|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
(padNum 15) (compPinRef "15")
|
||
(padNum 16) (compPinRef "16")
|
||
)
|
||
)
|
||
)
|
||
(compDef "ÒÌ9_1"
|
||
(originalName "ÒÌ9")
|
||
(compHeader
|
||
(sourceLibrary "GS.LIB")
|
||
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|
||
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|
||
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|
||
(refDesPrefix "U")
|
||
(numType Numeric)
|
||
)
|
||
(compPin "1" (pinName "~R") (partNum 1) (symPinNum 5) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "2" (pinName "Q1") (partNum 1) (symPinNum 12) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "3" (pinName "D1") (partNum 1) (symPinNum 13) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "4" (pinName "D2") (partNum 1) (symPinNum 4) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "5" (pinName "Q2") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "6" (pinName "D3") (partNum 1) (symPinNum 11) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "7" (pinName "Q3") (partNum 1) (symPinNum 10) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "8" (pinName "GND") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(compPin "9" (pinName "C") (partNum 1) (symPinNum 14) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "10" (pinName "Q4") (partNum 1) (symPinNum 8) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "11" (pinName "D4") (partNum 1) (symPinNum 9) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "12" (pinName "Q5") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "13" (pinName "D5") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "14" (pinName "D6") (partNum 1) (symPinNum 7) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "15" (pinName "Q6") (partNum 1) (symPinNum 6) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "16" (pinName "VCC") (partNum 0) (symPinNum 0) (gateEq 0) (pinEq 0) (pinType Power) )
|
||
(attachedSymbol (partNum 1) (altType Normal) (symbolName "ÒÌ9") )
|
||
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|
||
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|
||
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|
||
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|
||
(padNum 2) (compPinRef "2")
|
||
(padNum 3) (compPinRef "3")
|
||
(padNum 4) (compPinRef "4")
|
||
(padNum 5) (compPinRef "5")
|
||
(padNum 6) (compPinRef "6")
|
||
(padNum 7) (compPinRef "7")
|
||
(padNum 8) (compPinRef "8")
|
||
(padNum 9) (compPinRef "9")
|
||
(padNum 10) (compPinRef "10")
|
||
(padNum 11) (compPinRef "11")
|
||
(padNum 12) (compPinRef "12")
|
||
(padNum 13) (compPinRef "13")
|
||
(padNum 14) (compPinRef "14")
|
||
(padNum 15) (compPinRef "15")
|
||
(padNum 16) (compPinRef "16")
|
||
)
|
||
)
|
||
)
|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
)
|
||
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|
||
(compPin "2" (pinName "-") (partNum 1) (symPinNum 1) (gateEq 0) (pinEq 0) (pinType Passive) )
|
||
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|
||
(attachedPattern (patternNum 1) (patternName "K50-6-10")
|
||
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|
||
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|
||
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|
||
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|
||
)
|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
)
|
||
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|
||
(compPin "2" (pinName "A") (partNum 1) (symPinNum 1) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "3" (pinName "B") (partNum 1) (symPinNum 2) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
(compPin "4" (pinName "C") (partNum 1) (symPinNum 3) (gateEq 1) (pinEq 0) (pinType Passive) )
|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
)
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||
)
|
||
(net "Ñåòü 0"
|
||
(node "D20" "15")
|
||
(node "D28" "4")
|
||
)
|
||
(net "Ñåòü 1"
|
||
(node "D20" "12")
|
||
(node "D28" "5")
|
||
)
|
||
(net "Ñåòü 2"
|
||
(node "D20" "10")
|
||
(node "D28" "6")
|
||
)
|
||
(net "Ñåòü 3"
|
||
(node "D20" "7")
|
||
(node "D28" "7")
|
||
)
|
||
(net "Ñåòü 4"
|
||
(node "D20" "5")
|
||
(node "D28" "8")
|
||
)
|
||
(net "Ñåòü 5"
|
||
(node "D20" "2")
|
||
(node "D28" "9")
|
||
)
|
||
(net "Ñåòü 6"
|
||
(node "D21" "15")
|
||
(node "D29" "4")
|
||
)
|
||
(net "Ñåòü 7"
|
||
(node "D21" "12")
|
||
(node "D29" "5")
|
||
)
|
||
(net "Ñåòü 8"
|
||
(node "D21" "10")
|
||
(node "D29" "6")
|
||
)
|
||
(net "Ñåòü 9"
|
||
(node "D21" "7")
|
||
(node "D29" "7")
|
||
)
|
||
(net "Ñåòü 10"
|
||
(node "D21" "5")
|
||
(node "D29" "8")
|
||
)
|
||
(net "Ñåòü 11"
|
||
(node "D21" "2")
|
||
(node "D29" "9")
|
||
)
|
||
(net "Ñåòü 12"
|
||
(node "D18" "8")
|
||
(node "D18" "3")
|
||
)
|
||
(net "Ñåòü 13"
|
||
(node "D19" "1")
|
||
(node "D18" "11")
|
||
(node "D18" "2")
|
||
)
|
||
(net "Ñåòü 14"
|
||
(node "D17" "12")
|
||
(node "D36" "11")
|
||
)
|
||
(net "Ñåòü 22"
|
||
(node "D22" "15")
|
||
(node "D30" "4")
|
||
)
|
||
(net "Ñåòü 23"
|
||
(node "D22" "12")
|
||
(node "D30" "5")
|
||
)
|
||
(net "Ñåòü 24"
|
||
(node "D22" "10")
|
||
(node "D30" "6")
|
||
)
|
||
(net "Ñåòü 25"
|
||
(node "D22" "7")
|
||
(node "D30" "7")
|
||
)
|
||
(net "Ñåòü 26"
|
||
(node "D22" "5")
|
||
(node "D30" "8")
|
||
)
|
||
(net "Ñåòü 27"
|
||
(node "D22" "2")
|
||
(node "D30" "9")
|
||
)
|
||
(net "Ñåòü 30"
|
||
(node "D23" "12")
|
||
(node "D31" "5")
|
||
)
|
||
(net "Ñåòü 31"
|
||
(node "D23" "10")
|
||
(node "D31" "6")
|
||
)
|
||
(net "Ñåòü 32"
|
||
(node "D23" "7")
|
||
(node "D31" "7")
|
||
)
|
||
(net "Ñåòü 33"
|
||
(node "D23" "5")
|
||
(node "D31" "8")
|
||
)
|
||
(net "Ñåòü 34"
|
||
(node "D23" "2")
|
||
(node "D31" "9")
|
||
)
|
||
(net "Ñåòü 64"
|
||
(node "D28" "1")
|
||
(node "DA1" "2")
|
||
(node "C6" "1")
|
||
)
|
||
(net "NET00019"
|
||
(node "D39" "12")
|
||
(node "D37`" "15")
|
||
)
|
||
(net "NET00003"
|
||
(node "C16" "1")
|
||
(node "R25" "1")
|
||
(node "DA2" "6")
|
||
(node "R13" "2")
|
||
(node "R3" "2")
|
||
(node "R20" "2")
|
||
)
|
||
(net "Ñåòü 67"
|
||
(node "C9" "1")
|
||
(node "DA1" "13")
|
||
(node "D31" "1")
|
||
)
|
||
(net "Ñåòü 68"
|
||
(node "C9" "2")
|
||
(node "DA1" "14")
|
||
(node "D31" "16")
|
||
(node "R16" "1")
|
||
(node "D35" "15")
|
||
)
|
||
(net "Ñåòü 69"
|
||
(node "D30" "16")
|
||
(node "DA1" "8")
|
||
(node "C8" "2")
|
||
(node "R15" "2")
|
||
(node "D34" "15")
|
||
)
|
||
(net "Ñåòü 70"
|
||
(node "D29" "16")
|
||
(node "C7" "2")
|
||
(node "DA1" "7")
|
||
(node "R13" "1")
|
||
(node "D33" "15")
|
||
)
|
||
(net "Ñåòü 71"
|
||
(node "D28" "16")
|
||
(node "DA1" "1")
|
||
(node "C6" "2")
|
||
(node "R3" "1")
|
||
(node "D32" "15")
|
||
)
|
||
(net "Ñåòü 72"
|
||
(node "R28" "2")
|
||
(node "J1" "3")
|
||
(node "J1" "2")
|
||
)
|
||
(net "Ñåòü 73"
|
||
(node "J1" "4")
|
||
(node "J1" "5")
|
||
(node "R29" "2")
|
||
)
|
||
(net "Ñåòü 76"
|
||
(node "D24" "19")
|
||
(node "D32" "4")
|
||
)
|
||
(net "Ñåòü 77"
|
||
(node "D24" "16")
|
||
(node "D32" "5")
|
||
)
|
||
(net "Ñåòü 78"
|
||
(node "D24" "15")
|
||
(node "D32" "6")
|
||
)
|
||
(net "Ñåòü 79"
|
||
(node "D24" "12")
|
||
(node "D32" "7")
|
||
)
|
||
(net "Ñåòü 80"
|
||
(node "D24" "9")
|
||
(node "D32" "8")
|
||
)
|
||
(net "Ñåòü 81"
|
||
(node "D24" "6")
|
||
(node "D32" "9")
|
||
)
|
||
(net "Ñåòü 82"
|
||
(node "D24" "5")
|
||
(node "D32" "10")
|
||
)
|
||
(net "Ñåòü 83"
|
||
(node "D24" "2")
|
||
(node "D32" "11")
|
||
)
|
||
(net "Ñåòü 84"
|
||
(node "D25" "19")
|
||
(node "D33" "4")
|
||
)
|
||
(net "Ñåòü 85"
|
||
(node "D25" "16")
|
||
(node "D33" "5")
|
||
)
|
||
(net "Ñåòü 86"
|
||
(node "D25" "15")
|
||
(node "D33" "6")
|
||
)
|
||
(net "Ñåòü 87"
|
||
(node "D25" "12")
|
||
(node "D33" "7")
|
||
)
|
||
(net "Ñåòü 88"
|
||
(node "D25" "9")
|
||
(node "D33" "8")
|
||
)
|
||
(net "Ñåòü 89"
|
||
(node "D25" "6")
|
||
(node "D33" "9")
|
||
)
|
||
(net "Ñåòü 90"
|
||
(node "D25" "5")
|
||
(node "D33" "10")
|
||
)
|
||
(net "Ñåòü 91"
|
||
(node "D25" "2")
|
||
(node "D33" "11")
|
||
)
|
||
(net "Ñåòü 92"
|
||
(node "D26" "19")
|
||
(node "D34" "4")
|
||
)
|
||
(net "Ñåòü 93"
|
||
(node "D26" "16")
|
||
(node "D34" "5")
|
||
)
|
||
(net "Ñåòü 94"
|
||
(node "D26" "15")
|
||
(node "D34" "6")
|
||
)
|
||
(net "Ñåòü 95"
|
||
(node "D26" "12")
|
||
(node "D34" "7")
|
||
)
|
||
(net "Ñåòü 96"
|
||
(node "D26" "9")
|
||
(node "D34" "8")
|
||
)
|
||
(net "Ñåòü 97"
|
||
(node "D26" "6")
|
||
(node "D34" "9")
|
||
)
|
||
(net "Ñåòü 98"
|
||
(node "D26" "5")
|
||
(node "D34" "10")
|
||
)
|
||
(net "Ñåòü 99"
|
||
(node "D26" "2")
|
||
(node "D34" "11")
|
||
)
|
||
(net "Ñåòü 100"
|
||
(node "D27" "19")
|
||
(node "D35" "4")
|
||
)
|
||
(net "Ñåòü 101"
|
||
(node "D27" "16")
|
||
(node "D35" "5")
|
||
)
|
||
(net "Ñåòü 102"
|
||
(node "D27" "15")
|
||
(node "D35" "6")
|
||
)
|
||
(net "Ñåòü 103"
|
||
(node "D27" "12")
|
||
(node "D35" "7")
|
||
)
|
||
(net "Ñåòü 104"
|
||
(node "D27" "9")
|
||
(node "D35" "8")
|
||
)
|
||
(net "Ñåòü 105"
|
||
(node "D27" "6")
|
||
(node "D35" "9")
|
||
)
|
||
(net "Ñåòü 106"
|
||
(node "D27" "5")
|
||
(node "D35" "10")
|
||
)
|
||
(net "Ñåòü 107"
|
||
(node "D27" "2")
|
||
(node "D35" "11")
|
||
)
|
||
(net "Ñåòü 108"
|
||
(node "DA2" "13")
|
||
(node "C11" "2")
|
||
(node "D35" "1")
|
||
(node "D34" "1")
|
||
)
|
||
(net "Ñåòü 109"
|
||
(node "C10" "1")
|
||
(node "DA2" "2")
|
||
(node "D32" "1")
|
||
(node "D33" "1")
|
||
)
|
||
(net "Ñåòü 110"
|
||
(node "C10" "2")
|
||
(node "R20" "1")
|
||
(node "DA2" "1")
|
||
(node "D32" "16")
|
||
)
|
||
(net "Ñåòü 111"
|
||
(node "R23" "2")
|
||
(node "DA2" "14")
|
||
(node "C11" "1")
|
||
(node "D34" "16")
|
||
)
|
||
(net "Ñåòü 114"
|
||
(node "R24" "1")
|
||
(node "R28" "1")
|
||
(node "C16" "2")
|
||
(node "R25" "2")
|
||
(node "DA2" "7")
|
||
)
|
||
(net "Ñåòü 115"
|
||
(node "R27" "2")
|
||
(node "R29" "1")
|
||
(node "R26" "2")
|
||
(node "C17" "1")
|
||
(node "DA2" "8")
|
||
)
|
||
(net "Ñåòü 118"
|
||
(node "R24" "2")
|
||
(node "R21" "2")
|
||
(node "DA2" "10")
|
||
)
|
||
(net "Ñåòü 119"
|
||
(node "R27" "1")
|
||
(node "R22" "2")
|
||
(node "DA2" "5")
|
||
)
|
||
(net "Ñåòü 179"
|
||
)
|
||
(net "Ñåòü 180"
|
||
(node "VD4" "2")
|
||
(node "VD3" "2")
|
||
(node "D5" "4")
|
||
(node "R2" "1")
|
||
)
|
||
(net "Ñåòü 181"
|
||
(node "D12" "12")
|
||
(node "D12" "9")
|
||
(node "D5" "5")
|
||
)
|
||
(net "Ñåòü 182"
|
||
(node "D12" "5")
|
||
(node "D12" "2")
|
||
(node "D5" "9")
|
||
)
|
||
(net "Ñåòü 185"
|
||
(node "D17" "2")
|
||
(node "D17" "3")
|
||
(node "R7" "2")
|
||
)
|
||
(net "Ñåòü 186"
|
||
(node "D17" "4")
|
||
(node "D17" "5")
|
||
(node "D18" "14")
|
||
(node "ZQ1" "2")
|
||
)
|
||
(net "Ñåòü 187"
|
||
(node "D17" "1")
|
||
(node "R7" "1")
|
||
(node "ZQ1" "1")
|
||
)
|
||
(net "Ñåòü 189"
|
||
(node "D18" "1")
|
||
(node "D18" "12")
|
||
)
|
||
(net "Ñåòü 193"
|
||
(node "D19" "13")
|
||
(node "D19" "6")
|
||
)
|
||
(net "Ñåòü 195"
|
||
(node "C18" "1")
|
||
(node "D19" "11")
|
||
)
|
||
(net "Ñåòü 197"
|
||
(node "C1" "2")
|
||
(node "R12" "2")
|
||
(node "VT2" "B")
|
||
(node "R12A" "2")
|
||
)
|
||
(net "Ñåòü 198"
|
||
(node "VT1" "B")
|
||
(node "R10" "2")
|
||
)
|
||
(net "Ñåòü 199"
|
||
(node "VT3" "C")
|
||
(node "C2" "1")
|
||
(node "VT1" "C")
|
||
)
|
||
(net "Ñåòü 200"
|
||
(node "VT3" "E")
|
||
(node "R4" "2")
|
||
)
|
||
(net "Ñåòü 202"
|
||
(node "VT3" "B")
|
||
(node "R5" "2")
|
||
(node "R6" "2")
|
||
)
|
||
(net "NET00000"
|
||
(node "D39" "10")
|
||
(node "D39" "6")
|
||
)
|
||
(net "NET00001"
|
||
(node "D39" "9")
|
||
(node "D39" "3")
|
||
)
|
||
(net "Ñåòü 218"
|
||
(node "D17" "8")
|
||
(node "D36" "12")
|
||
)
|
||
(net "Ñåòü 222"
|
||
(node "D37" "13")
|
||
(node "D41" "11")
|
||
)
|
||
(net "IORQGE"
|
||
(node "D37" "5")
|
||
(node "D6" "5")
|
||
(node "C1" "1")
|
||
(node "R12" "1")
|
||
(node "D36" "8")
|
||
)
|
||
(net "*/IORQ"
|
||
(node "D37" "4")
|
||
(node "D6" "4")
|
||
(node "J1_2" "17B")
|
||
)
|
||
(net "*/IORQGE"
|
||
(node "VT2" "C")
|
||
(node "J1_1" "13A")
|
||
)
|
||
(net "*/M1"
|
||
(node "J1_2" "24B")
|
||
(node "D36" "4")
|
||
)
|
||
(net "*/RD"
|
||
(node "D37" "2")
|
||
(node "D6" "2")
|
||
(node "J1_2" "18B")
|
||
)
|
||
(net "*/RES"
|
||
(node "VD20" "1")
|
||
(node "J1_1" "20A")
|
||
(node "D41" "1")
|
||
)
|
||
(net "*A0"
|
||
(node "J1_1" "9A")
|
||
(node "D36" "2")
|
||
)
|
||
(net "*A1"
|
||
(node "J1_1" "10A")
|
||
(node "D36" "3")
|
||
)
|
||
(net "*A2"
|
||
(node "D17" "9")
|
||
(node "J1_1" "11A")
|
||
)
|
||
(net "*A3"
|
||
(node "D37" "1")
|
||
(node "D6" "1")
|
||
(node "J1_1" "12A")
|
||
)
|
||
(net "*A4"
|
||
(node "J1_1" "24A")
|
||
(node "D36" "6")
|
||
)
|
||
(net "*A5"
|
||
(node "J1_1" "23A")
|
||
(node "D36" "5")
|
||
)
|
||
(net "*A6"
|
||
(node "D17" "13")
|
||
(node "J1_1" "22A")
|
||
)
|
||
(net "*A7"
|
||
(node "D37" "3")
|
||
(node "D6" "6")
|
||
(node "J1_1" "21A")
|
||
)
|
||
(net "*D0"
|
||
(node "D12" "3")
|
||
(node "D2" "2")
|
||
(node "D3" "3")
|
||
(node "D4" "3")
|
||
(node "J1_2" "6B")
|
||
(node "D41" "3")
|
||
)
|
||
(net "*D1"
|
||
(node "D2" "5")
|
||
(node "D3" "4")
|
||
(node "D4" "4")
|
||
(node "J1_2" "7B")
|
||
(node "D41" "4")
|
||
)
|
||
(net "*D2"
|
||
(node "D2" "6")
|
||
(node "D3" "7")
|
||
(node "D4" "7")
|
||
(node "J1_2" "8B")
|
||
(node "D41" "7")
|
||
)
|
||
(net "*D3"
|
||
(node "D2" "9")
|
||
(node "D3" "8")
|
||
(node "D4" "8")
|
||
(node "J1_2" "11B")
|
||
(node "D41" "8")
|
||
)
|
||
(net "*D4"
|
||
(node "D2" "12")
|
||
(node "D3" "13")
|
||
(node "D4" "13")
|
||
(node "J1_2" "12B")
|
||
(node "D41" "13")
|
||
)
|
||
(net "*D5"
|
||
(node "D2" "15")
|
||
(node "D3" "14")
|
||
(node "D4" "14")
|
||
(node "J1_2" "10B")
|
||
(node "D41" "14")
|
||
)
|
||
(net "*D6"
|
||
(node "D2" "16")
|
||
(node "D3" "17")
|
||
(node "D4" "17")
|
||
(node "J1_2" "9B")
|
||
(node "D41" "17")
|
||
)
|
||
(net "*D7"
|
||
(node "D12" "8")
|
||
(node "D2" "19")
|
||
(node "D3" "18")
|
||
(node "D4" "18")
|
||
(node "J1_2" "3B")
|
||
(node "D41" "18")
|
||
)
|
||
(net "-5B"
|
||
(node "C3" "2")
|
||
(node "VD18" "2")
|
||
)
|
||
(net "/AX17"
|
||
(node "D39" "1")
|
||
(node "D36`" "3")
|
||
)
|
||
(net "/AX18"
|
||
(node "D39" "2")
|
||
(node "D36`" "14")
|
||
)
|
||
(net "/AX19"
|
||
(node "D39" "5")
|
||
(node "D36`" "6")
|
||
)
|
||
(net "/AX20"
|
||
(node "D39" "4")
|
||
(node "D36`" "11")
|
||
)
|
||
(net "/CC"
|
||
(node "D10" "14")
|
||
(node "D3" "1")
|
||
)
|
||
(net "/CD"
|
||
(node "VD2" "1")
|
||
(node "D10" "13")
|
||
(node "D4" "1")
|
||
)
|
||
(net "/CF"
|
||
(node "D12" "10")
|
||
(node "D12" "1")
|
||
(node "D10" "11")
|
||
)
|
||
(net "/CSDD"
|
||
(node "VD1" "1")
|
||
(node "D6" "15")
|
||
(node "D2" "1")
|
||
)
|
||
(net "/CSR"
|
||
(node "D38" "6")
|
||
(node "D8" "24")
|
||
)
|
||
(net "/IORQ"
|
||
(node "D10" "5")
|
||
(node "D11" "4")
|
||
(node "D1" "20")
|
||
)
|
||
(net "/K1"
|
||
(node "VD/K1" "2")
|
||
(node "D37`" "1")
|
||
(node "D7" "14")
|
||
(node "D13" "6")
|
||
(node "R9" "1")
|
||
(node "VD/K3" "2")
|
||
(node "VD/K4" "2")
|
||
)
|
||
(net "/K3"
|
||
(node "D7" "6")
|
||
(node "VD/K3" "1")
|
||
)
|
||
(net "/K4"
|
||
(node "D7" "3")
|
||
(node "D5" "2")
|
||
(node "VD/K4" "1")
|
||
)
|
||
(net "/M1"
|
||
(node "D10" "6")
|
||
(node "D17" "11")
|
||
(node "D1" "27")
|
||
)
|
||
(net "/MREQ"
|
||
(node "D16" "4")
|
||
(node "D9" "4")
|
||
(node "D9" "5")
|
||
(node "D1" "19")
|
||
)
|
||
(net "/RD"
|
||
(node "D16" "3")
|
||
(node "D1" "21")
|
||
(node "D15`" "24")
|
||
(node "D15" "24")
|
||
(node "D14`" "24")
|
||
(node "D14" "24")
|
||
)
|
||
(net "/RSTR"
|
||
(node "D5" "13")
|
||
(node "D10" "10")
|
||
)
|
||
(net "/WR"
|
||
(node "D1" "22")
|
||
(node "D15`" "29")
|
||
(node "D15" "29")
|
||
(node "D14`" "29")
|
||
(node "D14" "29")
|
||
)
|
||
(net "A0"
|
||
(node "D10" "1")
|
||
(node "D11" "1")
|
||
(node "D8" "12")
|
||
(node "D1" "30")
|
||
(node "D15`" "12")
|
||
(node "D15" "12")
|
||
(node "D14`" "12")
|
||
(node "D14" "12")
|
||
)
|
||
(net "A1"
|
||
(node "D10" "2")
|
||
(node "D11" "2")
|
||
(node "D8" "11")
|
||
(node "D1" "31")
|
||
(node "D15`" "11")
|
||
(node "D15" "11")
|
||
(node "D14`" "11")
|
||
(node "D14" "11")
|
||
)
|
||
(net "A2"
|
||
(node "D10" "3")
|
||
(node "D11" "3")
|
||
(node "D8" "10")
|
||
(node "D1" "32")
|
||
(node "D15`" "10")
|
||
(node "D15" "10")
|
||
(node "D14`" "10")
|
||
(node "D14" "10")
|
||
)
|
||
(net "A3"
|
||
(node "D10" "4")
|
||
(node "D11" "6")
|
||
(node "D8" "9")
|
||
(node "D1" "33")
|
||
(node "D15`" "9")
|
||
(node "D15" "9")
|
||
(node "D14`" "9")
|
||
(node "D14" "9")
|
||
)
|
||
(net "A4"
|
||
(node "D8" "8")
|
||
(node "D1" "34")
|
||
(node "D15`" "8")
|
||
(node "D15" "8")
|
||
(node "D14`" "8")
|
||
(node "D14" "8")
|
||
)
|
||
(net "A5"
|
||
(node "D8" "7")
|
||
(node "D1" "35")
|
||
(node "D15`" "7")
|
||
(node "D15" "7")
|
||
(node "D14`" "7")
|
||
(node "D14" "7")
|
||
)
|
||
(net "A6"
|
||
(node "D8" "6")
|
||
(node "D1" "36")
|
||
(node "D15`" "6")
|
||
(node "D15" "6")
|
||
(node "D14`" "6")
|
||
(node "D14" "6")
|
||
)
|
||
(net "A7"
|
||
(node "D8" "5")
|
||
(node "D1" "37")
|
||
(node "D15`" "5")
|
||
(node "D15" "5")
|
||
(node "D14`" "5")
|
||
(node "D14" "5")
|
||
)
|
||
(net "A8"
|
||
(node "D16" "1")
|
||
(node "D8" "27")
|
||
(node "D1" "38")
|
||
(node "D15`" "27")
|
||
(node "D15" "27")
|
||
(node "D14`" "27")
|
||
(node "D14" "27")
|
||
)
|
||
(net "A9"
|
||
(node "D16" "2")
|
||
(node "D8" "26")
|
||
(node "D1" "39")
|
||
(node "D15`" "26")
|
||
(node "D15" "26")
|
||
(node "D14`" "26")
|
||
(node "D14" "26")
|
||
)
|
||
(net "A10"
|
||
(node "D8" "23")
|
||
(node "D1" "40")
|
||
(node "D15`" "23")
|
||
(node "D15" "23")
|
||
(node "D14`" "23")
|
||
(node "D14" "23")
|
||
)
|
||
(net "A11"
|
||
(node "D8" "25")
|
||
(node "D1" "1")
|
||
(node "D15`" "25")
|
||
(node "D15" "25")
|
||
(node "D14`" "25")
|
||
(node "D14" "25")
|
||
)
|
||
(net "A12"
|
||
(node "D8" "4")
|
||
(node "D1" "2")
|
||
(node "D15`" "4")
|
||
(node "D15" "4")
|
||
(node "D14`" "4")
|
||
(node "D14" "4")
|
||
)
|
||
(net "A13"
|
||
(node "D38" "12")
|
||
(node "D8" "28")
|
||
(node "D1" "3")
|
||
(node "D15`" "28")
|
||
(node "D15" "28")
|
||
(node "D14`" "28")
|
||
(node "D14" "28")
|
||
)
|
||
(net "A14"
|
||
(node "D38" "13")
|
||
(node "D9" "1")
|
||
(node "D8" "29")
|
||
(node "D1" "4")
|
||
(node "D15`" "3")
|
||
(node "D15" "3")
|
||
(node "D14`" "3")
|
||
(node "D14" "3")
|
||
)
|
||
(net "A15"
|
||
(node "D16" "5")
|
||
(node "D9" "2")
|
||
(node "D1" "5")
|
||
)
|
||
(net "AX17"
|
||
(node "D40" "10")
|
||
(node "D36`" "2")
|
||
)
|
||
(net "AX18"
|
||
(node "D40" "13")
|
||
(node "D36`" "15")
|
||
)
|
||
(net "AX19"
|
||
(node "D37`" "2")
|
||
(node "D36`" "7")
|
||
)
|
||
(net "AX20"
|
||
(node "D37`" "3")
|
||
(node "D36`" "10")
|
||
)
|
||
(net "B0"
|
||
(node "D13" "15")
|
||
(node "D38" "4")
|
||
)
|
||
(net "B1"
|
||
(node "D13" "14")
|
||
(node "D38" "9")
|
||
(node "VD15" "1")
|
||
)
|
||
(net "B2"
|
||
(node "D13" "13")
|
||
)
|
||
(net "B3"
|
||
(node "D13" "12")
|
||
)
|
||
(net "B4"
|
||
(node "D13" "11")
|
||
)
|
||
(net "B5"
|
||
(node "D13" "10")
|
||
)
|
||
(net "B6"
|
||
(node "D13" "9")
|
||
)
|
||
(net "B7"
|
||
(node "D13" "7")
|
||
)
|
||
(net "B1X"
|
||
(node "D38" "8")
|
||
(node "VD16" "2")
|
||
(node "VD15" "2")
|
||
(node "R14" "1")
|
||
)
|
||
(net "CB"
|
||
(node "D7" "9")
|
||
(node "D36`" "9")
|
||
(node "D10" "15")
|
||
)
|
||
(net "CDD"
|
||
(node "VD3" "1")
|
||
(node "D10" "12")
|
||
(node "D2" "11")
|
||
)
|
||
(net "CLK"
|
||
(node "D17" "6")
|
||
(node "R38" "1")
|
||
(node "D1" "6")
|
||
)
|
||
(net "CLK1"
|
||
(node "R10" "1")
|
||
(node "D19" "10")
|
||
)
|
||
(net "CSC"
|
||
(node "D5" "10")
|
||
(node "D6" "12")
|
||
(node "D3" "11")
|
||
)
|
||
(net "CSD"
|
||
(node "VD4" "1")
|
||
(node "D6" "13")
|
||
(node "D4" "11")
|
||
)
|
||
(net "CSF"
|
||
(node "D12" "4")
|
||
(node "D12" "13")
|
||
(node "D6" "14")
|
||
)
|
||
(net "D0"
|
||
(node "D7" "4")
|
||
(node "D12" "6")
|
||
(node "D27" "3")
|
||
(node "D26" "3")
|
||
(node "D25" "3")
|
||
(node "D24" "3")
|
||
(node "D20" "3")
|
||
(node "D21" "3")
|
||
(node "D22" "3")
|
||
(node "D23" "3")
|
||
(node "D2" "3")
|
||
(node "D3" "2")
|
||
(node "D4" "2")
|
||
(node "D8" "13")
|
||
(node "D1" "14")
|
||
(node "D15`" "13")
|
||
(node "D15" "13")
|
||
(node "D14`" "13")
|
||
(node "D14" "13")
|
||
(node "HP1" "2")
|
||
)
|
||
(net "D1"
|
||
(node "D7" "5")
|
||
(node "D27" "4")
|
||
(node "D26" "4")
|
||
(node "D25" "4")
|
||
(node "D24" "4")
|
||
(node "D20" "4")
|
||
(node "D21" "4")
|
||
(node "D22" "4")
|
||
(node "D23" "4")
|
||
(node "D2" "4")
|
||
(node "D3" "5")
|
||
(node "D4" "5")
|
||
(node "D8" "14")
|
||
(node "D1" "15")
|
||
(node "D15`" "14")
|
||
(node "D15" "14")
|
||
(node "D14`" "14")
|
||
(node "D14" "14")
|
||
(node "HP1" "3")
|
||
)
|
||
(net "D2"
|
||
(node "D7" "12")
|
||
(node "D36`" "4")
|
||
(node "D27" "7")
|
||
(node "D26" "7")
|
||
(node "D25" "7")
|
||
(node "D24" "7")
|
||
(node "D20" "6")
|
||
(node "D21" "6")
|
||
(node "D22" "6")
|
||
(node "D23" "6")
|
||
(node "D2" "7")
|
||
(node "D3" "6")
|
||
(node "D4" "6")
|
||
(node "D8" "15")
|
||
(node "D1" "12")
|
||
(node "D15`" "15")
|
||
(node "D15" "15")
|
||
(node "D14`" "15")
|
||
(node "D14" "15")
|
||
)
|
||
(net "D3"
|
||
(node "D7" "13")
|
||
(node "D36`" "13")
|
||
(node "D27" "8")
|
||
(node "D26" "8")
|
||
(node "D25" "8")
|
||
(node "D24" "8")
|
||
(node "D20" "11")
|
||
(node "D21" "11")
|
||
(node "D22" "11")
|
||
(node "D23" "11")
|
||
(node "D2" "8")
|
||
(node "D3" "9")
|
||
(node "D4" "9")
|
||
(node "D8" "17")
|
||
(node "D1" "8")
|
||
(node "D15`" "17")
|
||
(node "D15" "17")
|
||
(node "D14`" "17")
|
||
(node "D14" "17")
|
||
)
|
||
(net "D4"
|
||
(node "D36`" "5")
|
||
(node "D27" "13")
|
||
(node "D26" "13")
|
||
(node "D25" "13")
|
||
(node "D24" "13")
|
||
(node "D20" "13")
|
||
(node "D21" "13")
|
||
(node "D22" "13")
|
||
(node "D23" "13")
|
||
(node "D2" "13")
|
||
(node "D3" "12")
|
||
(node "D4" "12")
|
||
(node "D8" "18")
|
||
(node "D1" "7")
|
||
(node "D15`" "18")
|
||
(node "D15" "18")
|
||
(node "D14`" "18")
|
||
(node "D14" "18")
|
||
)
|
||
(net "D5"
|
||
(node "D36`" "12")
|
||
(node "D27" "14")
|
||
(node "D26" "14")
|
||
(node "D25" "14")
|
||
(node "D24" "14")
|
||
(node "D20" "14")
|
||
(node "D21" "14")
|
||
(node "D22" "14")
|
||
(node "D23" "14")
|
||
(node "D2" "14")
|
||
(node "D3" "15")
|
||
(node "D4" "15")
|
||
(node "D8" "19")
|
||
(node "D1" "9")
|
||
(node "D15`" "19")
|
||
(node "D15" "19")
|
||
(node "D14`" "19")
|
||
(node "D14" "19")
|
||
)
|
||
(net "D6"
|
||
(node "D27" "17")
|
||
(node "D26" "17")
|
||
(node "D25" "17")
|
||
(node "D24" "17")
|
||
(node "D2" "17")
|
||
(node "D3" "16")
|
||
(node "D4" "16")
|
||
(node "D8" "20")
|
||
(node "D1" "10")
|
||
(node "D15`" "20")
|
||
(node "D15" "20")
|
||
(node "D14`" "20")
|
||
(node "D14" "20")
|
||
)
|
||
(net "D7"
|
||
(node "D12" "11")
|
||
(node "D27" "18")
|
||
(node "D26" "18")
|
||
(node "D25" "18")
|
||
(node "D24" "18")
|
||
(node "D2" "18")
|
||
(node "D3" "19")
|
||
(node "D4" "19")
|
||
(node "D8" "21")
|
||
(node "D1" "13")
|
||
(node "D15`" "21")
|
||
(node "D15" "21")
|
||
(node "D14`" "21")
|
||
(node "D14" "21")
|
||
(node "HP1" "9")
|
||
)
|
||
(net "NET00020"
|
||
(node "VD/K1" "1")
|
||
(node "D39" "8")
|
||
)
|
||
(net "NET00002"
|
||
(node "VD1" "2")
|
||
(node "VD2" "2")
|
||
(node "D5" "1")
|
||
(node "R1" "1")
|
||
)
|
||
(net "NET00021"
|
||
(node "D16" "6")
|
||
(node "D38" "11")
|
||
)
|
||
(net "NET00008"
|
||
(node "VT5" "B")
|
||
(node "R18" "2")
|
||
)
|
||
(net "D6/3"
|
||
(node "D6" "3")
|
||
(node "D41" "12")
|
||
)
|
||
(net "NET00009"
|
||
(node "D38" "1")
|
||
(node "D9" "13")
|
||
)
|
||
(net "K1"
|
||
(node "D7" "15")
|
||
)
|
||
(net "K2"
|
||
(node "D7" "10")
|
||
(node "D13" "3")
|
||
)
|
||
(net "K3"
|
||
(node "D40" "6")
|
||
(node "D7" "7")
|
||
(node "D13" "2")
|
||
)
|
||
(net "K4"
|
||
(node "D40" "3")
|
||
(node "D7" "2")
|
||
(node "D13" "1")
|
||
)
|
||
(net "NX15"
|
||
(node "D40" "4")
|
||
(node "D15`" "31")
|
||
(node "D15" "31")
|
||
(node "D14`" "31")
|
||
(node "D14" "31")
|
||
)
|
||
(net "NX16"
|
||
(node "D40" "7")
|
||
(node "D15`" "2")
|
||
(node "D15" "2")
|
||
(node "D14`" "2")
|
||
(node "D14" "2")
|
||
)
|
||
(net "NX17"
|
||
(node "D40" "9")
|
||
(node "D15`" "30")
|
||
(node "D15" "30")
|
||
(node "D14`" "30")
|
||
(node "D14" "30")
|
||
)
|
||
(net "NX18"
|
||
(node "D40" "12")
|
||
(node "D15`" "1")
|
||
(node "D15" "1")
|
||
(node "D14`" "1")
|
||
(node "D14" "1")
|
||
)
|
||
(net "P1"
|
||
(node "D5" "3")
|
||
(node "D11" "13")
|
||
)
|
||
(net "P2"
|
||
(node "D5" "11")
|
||
(node "D11" "12")
|
||
)
|
||
(net "R2"
|
||
(node "D5" "12")
|
||
(node "D23" "15")
|
||
(node "D31" "4")
|
||
)
|
||
(net "NET00018"
|
||
(node "VT4" "B")
|
||
(node "R8" "2")
|
||
(node "C18" "2")
|
||
)
|
||
(net "RAM1"
|
||
(node "D39" "13")
|
||
(node "D40" "1")
|
||
(node "D9" "14")
|
||
(node "D38" "10")
|
||
(node "VD16" "1")
|
||
)
|
||
(net "RAM2"
|
||
(node "D37`" "5")
|
||
(node "D37`" "4")
|
||
(node "D13" "5")
|
||
(node "D13" "4")
|
||
(node "D38" "3")
|
||
)
|
||
(net "ROMX"
|
||
(node "D38" "5")
|
||
(node "D9" "15")
|
||
)
|
||
(net "NET00004"
|
||
(node "R26" "1")
|
||
(node "C17" "2")
|
||
(node "DA2" "9")
|
||
(node "R16" "2")
|
||
(node "R15" "1")
|
||
(node "R23" "1")
|
||
)
|
||
(net "T0"
|
||
(node "D16" "15")
|
||
(node "D24" "11")
|
||
)
|
||
(net "T1"
|
||
(node "D16" "14")
|
||
(node "D25" "11")
|
||
)
|
||
(net "T2"
|
||
(node "D16" "13")
|
||
(node "D27" "11")
|
||
(node "D26" "11")
|
||
)
|
||
(net "T3"
|
||
(node "D16" "12")
|
||
)
|
||
(net "V0"
|
||
(node "D20" "9")
|
||
(node "D10" "9")
|
||
)
|
||
(net "V1"
|
||
(node "D21" "9")
|
||
(node "D10" "7")
|
||
)
|
||
(net "V2"
|
||
(node "D22" "9")
|
||
(node "D11" "15")
|
||
)
|
||
(net "V3"
|
||
(node "D23" "9")
|
||
(node "D11" "14")
|
||
)
|
||
(net "VIRTGND"
|
||
(node "D28" "15")
|
||
(node "D30" "15")
|
||
(node "D29" "15")
|
||
(node "D31" "15")
|
||
(node "C4" "1")
|
||
(node "VD19" "1")
|
||
(node "R11" "2")
|
||
)
|
||
(net "Z+5B"
|
||
(node "D40" "2")
|
||
(node "D37`" "6")
|
||
(node "D7" "1")
|
||
(node "D36`" "1")
|
||
(node "R1" "2")
|
||
(node "R2" "2")
|
||
(node "D20" "1")
|
||
(node "D21" "1")
|
||
(node "D22" "1")
|
||
(node "D23" "1")
|
||
(node "D9" "6")
|
||
(node "D37" "6")
|
||
(node "VT2" "E")
|
||
(node "R12A" "1")
|
||
(node "R19" "1")
|
||
(node "J1_2" "28B")
|
||
(node "J1_1" "29A")
|
||
(node "J1_1" "3A")
|
||
(node "R11" "1")
|
||
(node "R17" "2")
|
||
(node "R5" "1")
|
||
(node "R4" "1")
|
||
(node "R38" "2")
|
||
(node "R9" "2")
|
||
(node "R14" "2")
|
||
(node "C26" "2")
|
||
(node "D8" "31")
|
||
(node "D8" "1")
|
||
(node "D8" "3")
|
||
(node "D8" "2")
|
||
(node "D8" "30")
|
||
(node "D1" "24")
|
||
(node "D1" "17")
|
||
(node "D1" "25")
|
||
(node "D41" "20")
|
||
(node "HP1" "1")
|
||
(node "D36" "14")
|
||
(node "D36" "1")
|
||
)
|
||
(net "Z80/RES"
|
||
(node "R19" "2")
|
||
(node "VD20" "2")
|
||
(node "VT5" "C")
|
||
(node "D1" "26")
|
||
)
|
||
(net "ZGND"
|
||
(node "D40" "5")
|
||
(node "D40" "14")
|
||
(node "D40" "11")
|
||
(node "D40" "15")
|
||
(node "D27" "1")
|
||
(node "D26" "1")
|
||
(node "D25" "1")
|
||
(node "D24" "1")
|
||
(node "D35" "12")
|
||
(node "D35" "13")
|
||
(node "D34" "12")
|
||
(node "D34" "13")
|
||
(node "R21" "1")
|
||
(node "R22" "1")
|
||
(node "D31" "12")
|
||
(node "D31" "13")
|
||
(node "D31" "10")
|
||
(node "D31" "11")
|
||
(node "D30" "12")
|
||
(node "D30" "13")
|
||
(node "D30" "10")
|
||
(node "D30" "11")
|
||
(node "D29" "12")
|
||
(node "D29" "13")
|
||
(node "D29" "10")
|
||
(node "D29" "11")
|
||
(node "D28" "10")
|
||
(node "D28" "11")
|
||
(node "D28" "13")
|
||
(node "D28" "2")
|
||
(node "D28" "12")
|
||
(node "DA1" "3")
|
||
(node "D30" "2")
|
||
(node "DA1" "10")
|
||
(node "D29" "2")
|
||
(node "DA1" "5")
|
||
(node "DA1" "12")
|
||
(node "D31" "2")
|
||
(node "J1" "1")
|
||
(node "DA2" "12")
|
||
(node "D35" "2")
|
||
(node "D34" "2")
|
||
(node "D33" "2")
|
||
(node "D32" "12")
|
||
(node "D32" "13")
|
||
(node "DA2" "3")
|
||
(node "D9" "3")
|
||
(node "D32" "2")
|
||
(node "D33" "12")
|
||
(node "D33" "13")
|
||
(node "C3" "1")
|
||
(node "VT5" "E")
|
||
(node "J1_2" "30B")
|
||
(node "J1_1" "30A")
|
||
(node "J1_1" "14A")
|
||
(node "J1_1" "7A")
|
||
(node "J1_1" "6A")
|
||
(node "C4" "2")
|
||
(node "VD19" "2")
|
||
(node "VT4" "E")
|
||
(node "R8" "1")
|
||
(node "VD17" "1")
|
||
(node "R6" "1")
|
||
(node "VT1" "E")
|
||
(node "D19" "2")
|
||
(node "D19" "12")
|
||
(node "C26" "1")
|
||
(node "D8" "22")
|
||
(node "D41" "10")
|
||
(node "D36" "7")
|
||
)
|
||
(net "~CS0"
|
||
(node "D39" "11")
|
||
(node "D14" "22")
|
||
)
|
||
(net "~CS1"
|
||
(node "D37`" "13")
|
||
(node "D14`" "22")
|
||
)
|
||
(net "~CS3"
|
||
(node "D37`" "11")
|
||
(node "D15" "22")
|
||
)
|
||
(net "~CS4"
|
||
(node "D37`" "9")
|
||
(node "D15`" "22")
|
||
)
|
||
(net "~INT"
|
||
(node "VT4" "C")
|
||
(node "R17" "1")
|
||
(node "D1" "16")
|
||
)
|
||
(net "GND"
|
||
(node "D6" "8")
|
||
(node "D9" "8")
|
||
(node "D37" "8")
|
||
(node "D10" "8")
|
||
(node "D11" "8")
|
||
(node "D13" "8")
|
||
(node "D16" "8")
|
||
(node "D37`" "8")
|
||
(node "D28" "3")
|
||
(node "D29" "3")
|
||
(node "D30" "3")
|
||
(node "D31" "3")
|
||
(node "D32" "3")
|
||
(node "D33" "3")
|
||
(node "D34" "3")
|
||
(node "D35" "3")
|
||
(node "D12" "7")
|
||
(node "D39" "7")
|
||
(node "D38" "7")
|
||
(node "D17" "7")
|
||
(node "D5" "7")
|
||
(node "D20" "8")
|
||
(node "D21" "8")
|
||
(node "D22" "8")
|
||
(node "D23" "8")
|
||
(node "D40" "8")
|
||
(node "D7" "8")
|
||
(node "D36`" "8")
|
||
(node "D2" "10")
|
||
(node "D3" "10")
|
||
(node "D4" "10")
|
||
(node "D24" "10")
|
||
(node "D25" "10")
|
||
(node "D26" "10")
|
||
(node "D27" "10")
|
||
(node "D19" "7")
|
||
(node "D18" "10")
|
||
(node "D8" "16")
|
||
(node "D1" "29")
|
||
(node "D14`" "16")
|
||
(node "D15`" "16")
|
||
(node "D15" "16")
|
||
(node "D14" "16")
|
||
)
|
||
(net "VCC"
|
||
(node "D6" "16")
|
||
(node "D9" "16")
|
||
(node "D37" "16")
|
||
(node "D10" "16")
|
||
(node "D11" "16")
|
||
(node "D13" "16")
|
||
(node "D16" "16")
|
||
(node "D37`" "16")
|
||
(node "D28" "14")
|
||
(node "D29" "14")
|
||
(node "D30" "14")
|
||
(node "D31" "14")
|
||
(node "D32" "14")
|
||
(node "D33" "14")
|
||
(node "D34" "14")
|
||
(node "D35" "14")
|
||
(node "D12" "14")
|
||
(node "D39" "14")
|
||
(node "D38" "14")
|
||
(node "D17" "14")
|
||
(node "D5" "14")
|
||
(node "D20" "16")
|
||
(node "D21" "16")
|
||
(node "D22" "16")
|
||
(node "D23" "16")
|
||
(node "D40" "16")
|
||
(node "D7" "16")
|
||
(node "D36`" "16")
|
||
(node "D2" "20")
|
||
(node "D3" "20")
|
||
(node "D4" "20")
|
||
(node "D24" "20")
|
||
(node "D25" "20")
|
||
(node "D26" "20")
|
||
(node "D27" "20")
|
||
(node "D19" "14")
|
||
(node "D18" "5")
|
||
(node "D8" "32")
|
||
(node "D1" "11")
|
||
(node "D14`" "32")
|
||
(node "D15`" "32")
|
||
(node "D15" "32")
|
||
(node "D14" "32")
|
||
)
|
||
(net "+5V"
|
||
(node "DA2" "4")
|
||
(node "DA1" "4")
|
||
)
|
||
(net "-5V"
|
||
(node "DA2" "11")
|
||
(node "DA1" "11")
|
||
)
|
||
(net "NET00005"
|
||
(node "D30" "1")
|
||
(node "DA1" "9")
|
||
(node "C8" "1")
|
||
)
|
||
(net "NET00007"
|
||
(node "D29" "1")
|
||
(node "C7" "1")
|
||
(node "DA1" "6")
|
||
)
|
||
(net "NET00011"
|
||
(node "D38" "2")
|
||
(node "D9" "12")
|
||
)
|
||
(net "NET00013"
|
||
(node "C2" "2")
|
||
(node "VD17" "2")
|
||
(node "VD18" "1")
|
||
)
|
||
(net "NET00014"
|
||
(node "R18" "1")
|
||
(node "D41" "19")
|
||
)
|
||
(net "NET00006"
|
||
(node "D11" "5")
|
||
(node "D17" "10")
|
||
)
|
||
(netClass "DEFAULT_DIP0"
|
||
(netNameRef "Ñåòü 0")
|
||
(netNameRef "Ñåòü 1")
|
||
(netNameRef "Ñåòü 2")
|
||
(netNameRef "Ñåòü 3")
|
||
(netNameRef "Ñåòü 4")
|
||
(netNameRef "Ñåòü 5")
|
||
(netNameRef "Ñåòü 6")
|
||
(netNameRef "Ñåòü 7")
|
||
(netNameRef "Ñåòü 8")
|
||
(netNameRef "Ñåòü 9")
|
||
(netNameRef "Ñåòü 10")
|
||
(netNameRef "Ñåòü 11")
|
||
(netNameRef "Ñåòü 12")
|
||
(netNameRef "Ñåòü 13")
|
||
(netNameRef "V0")
|
||
(netNameRef "Ñåòü 22")
|
||
(netNameRef "Ñåòü 23")
|
||
(netNameRef "Ñåòü 24")
|
||
(netNameRef "Ñåòü 25")
|
||
(netNameRef "Ñåòü 26")
|
||
(netNameRef "Ñåòü 27")
|
||
(netNameRef "Ñåòü 30")
|
||
(netNameRef "Ñåòü 31")
|
||
(netNameRef "Ñåòü 32")
|
||
(netNameRef "Ñåòü 33")
|
||
(netNameRef "Ñåòü 34")
|
||
(netNameRef "Ñåòü 64")
|
||
(netNameRef "~CS1")
|
||
(netNameRef "~CS3")
|
||
(netNameRef "Ñåòü 67")
|
||
(netNameRef "Ñåòü 68")
|
||
(netNameRef "Ñåòü 69")
|
||
(netNameRef "Ñåòü 70")
|
||
(netNameRef "Ñåòü 71")
|
||
(netNameRef "Ñåòü 72")
|
||
(netNameRef "Ñåòü 73")
|
||
(netNameRef "Ñåòü 76")
|
||
(netNameRef "Ñåòü 77")
|
||
(netNameRef "Ñåòü 78")
|
||
(netNameRef "Ñåòü 79")
|
||
(netNameRef "Ñåòü 80")
|
||
(netNameRef "Ñåòü 81")
|
||
(netNameRef "Ñåòü 82")
|
||
(netNameRef "Ñåòü 83")
|
||
(netNameRef "Ñåòü 84")
|
||
(netNameRef "Ñåòü 85")
|
||
(netNameRef "Ñåòü 86")
|
||
(netNameRef "Ñåòü 87")
|
||
(netNameRef "Ñåòü 88")
|
||
(netNameRef "Ñåòü 89")
|
||
(netNameRef "Ñåòü 90")
|
||
(netNameRef "Ñåòü 91")
|
||
(netNameRef "Ñåòü 92")
|
||
(netNameRef "Ñåòü 93")
|
||
(netNameRef "Ñåòü 94")
|
||
(netNameRef "Ñåòü 95")
|
||
(netNameRef "Ñåòü 96")
|
||
(netNameRef "Ñåòü 97")
|
||
(netNameRef "Ñåòü 98")
|
||
(netNameRef "Ñåòü 99")
|
||
(netNameRef "Ñåòü 100")
|
||
(netNameRef "Ñåòü 101")
|
||
(netNameRef "Ñåòü 102")
|
||
(netNameRef "Ñåòü 103")
|
||
(netNameRef "Ñåòü 104")
|
||
(netNameRef "Ñåòü 105")
|
||
(netNameRef "Ñåòü 106")
|
||
(netNameRef "Ñåòü 107")
|
||
(netNameRef "Ñåòü 108")
|
||
(netNameRef "Ñåòü 109")
|
||
(netNameRef "Ñåòü 110")
|
||
(netNameRef "Ñåòü 111")
|
||
(netNameRef "Ñåòü 114")
|
||
(netNameRef "Ñåòü 115")
|
||
(netNameRef "Ñåòü 118")
|
||
(netNameRef "Ñåòü 119")
|
||
(netNameRef "Ñåòü 179")
|
||
(netNameRef "Ñåòü 180")
|
||
(netNameRef "Ñåòü 181")
|
||
(netNameRef "Ñåòü 182")
|
||
(netNameRef "Ñåòü 185")
|
||
(netNameRef "Ñåòü 186")
|
||
(netNameRef "Ñåòü 187")
|
||
(netNameRef "Ñåòü 189")
|
||
(netNameRef "Ñåòü 193")
|
||
(netNameRef "Ñåòü 195")
|
||
(netNameRef "Ñåòü 197")
|
||
(netNameRef "Ñåòü 198")
|
||
(netNameRef "Ñåòü 199")
|
||
(netNameRef "Ñåòü 200")
|
||
(netNameRef "Ñåòü 202")
|
||
(netNameRef "~CS0")
|
||
(netNameRef "~INT")
|
||
(netNameRef "~CS4")
|
||
(netNameRef "VIRTGND")
|
||
(netNameRef "V3")
|
||
(netNameRef "V2")
|
||
(netNameRef "*/IORQ")
|
||
(netNameRef "*/IORQGE")
|
||
(netNameRef "*/M1")
|
||
(netNameRef "*/RD")
|
||
(netNameRef "*/RES")
|
||
(netNameRef "*A0")
|
||
(netNameRef "*A1")
|
||
(netNameRef "*A2")
|
||
(netNameRef "*A3")
|
||
(netNameRef "*A4")
|
||
(netNameRef "*A5")
|
||
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||
)
|
||
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|
||
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|
||
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|
||
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|
||
(port (pt 287.02 652.78) (portType NoOutline_Sgl_Vert) (portPinLength PortPinShort) (netNameRef "/K3") )
|
||
(port (pt 299.72 485.14) (portType NoOutline_Sgl_Vert) (portPinLength PortPinShort) (netNameRef "P2") )
|
||
(port (pt 299.72 505.46) (portType NoOutline_Sgl_Vert) (portPinLength PortPinShort) (netNameRef "/CF") )
|
||
(port (pt 299.72 513.08) (portType NoOutline_Sgl_Vert) (portPinLength PortPinShort) (netNameRef "CSD") )
|
||
(port (pt 299.72 520.7) (portType NoOutline_Sgl_Vert) (portPinLength PortPinShort) (netNameRef "CDD") )
|
||
(port (pt 299.72 528.32) (portType NoOutline_Sgl_Vert) (portPinLength PortPinShort) (netNameRef "/K4") )
|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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|
||
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||
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||
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||
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||
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|
||
(reportShowColumnNames True)
|
||
(reportFieldsSections
|
||
(reportFields
|
||
(reportField
|
||
(reportFieldName "Variant")
|
||
(reportFieldType PropertyTypeVariant)
|
||
(reportFieldSortOrder 1)
|
||
(reportFieldSortType ascending)
|
||
(reportFieldShowFlag True)
|
||
(reportFieldColumnWidth 7)
|
||
)
|
||
)
|
||
)
|
||
)
|
||
)
|
||
)
|
||
)
|