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6 lines
227 B
Tcl
6 lines
227 B
Tcl
create_clock -period 32.1MHz -name {clk_32mhz} [get_ports {clk32}]
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create_generated_clock -name {gclk} -divide_by 2 -source [get_ports {clk32}] [get_registers {midi_clk_cnt[2]}]
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set_false_path -from [get_ports {cfg[*]}]
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