mirror of
https://github.com/romychs/ESPKit.git
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86 lines
3.0 KiB
C
86 lines
3.0 KiB
C
/*
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==========================================================
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Header file with Definitions for Sprinter-WiFi ISA Card
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Author: Roman A. Boykov
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License: BSD 3-Clause
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==========================================================
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*/
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#ifndef __ESPDEF_H
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#define __ESPDEF_H
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//#define ESTEXT
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#define PORT_ISA 0x9FBD
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#define PORT_SYSTEM 0x1FFD
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#define PORT_MMU3 0xE2
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#ifdef ESTEX
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#define PORT_UART 0xC3E8 // COM3 base port in memory
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#else
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#define PORT_UART 0x03E8 // COM3 base port
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#endif
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/* UART TC16C550 Registers */
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#define REG_RBR PORT_UART + 0
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#define REG_THR PORT_UART + 0
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#define REG_IER PORT_UART + 1
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#define REG_IIR PORT_UART + 2
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#define REG_FCR PORT_UART + 2
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#define REG_LCR PORT_UART + 3
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#define REG_MCR PORT_UART + 4
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#define REG_LSR PORT_UART + 5
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#define REG_MSR PORT_UART + 6
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#define REG_SCR PORT_UART + 7
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#define REG_DLL PORT_UART + 0
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#define REG_DLM PORT_UART + 1
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#define REG_AFR PORT_UART + 2
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/* UART TC16C550 Register bits */
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#define MCR_DTR 0x01
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#define MCR_RTS 0x02
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#define MCR_RST 0x04
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#define MCR_PGM 0x08
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#define MCR_LOOP 0x10
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#define MCR_AFE 0x20
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#define LCR_WL8 0x03 // 8 bits word len
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#define LCR_SB2 0x04 // 1.5 or 2 stp bits
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#define LCR_DLAB 0x80 // enable Divisor latch
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#define FCR_FIFO 0x01 // Enable FIFO for rx and tx
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#define FCR_RESET_RX 0x02 // Reset Rx FIFO
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#define FCR_RESET_TX 0x04 // Reset Tx FIFO
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#define FCR_DMA 0x08 // set -RXRDY, -TXRDY to "1"
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#define FCR_TR1 0x00 // trigger on 1 byte in fifo
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#define FCR_TR4 0x40 // trigger on 4 bytes in fifo
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#define FCR_TR8 0x80 // trigger on 8 bytes in fifo
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#define FCR_TR14 0xC0 // trigger on 14 bytes in fifo
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#define LSR_DR 0x01 // Data Ready
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#define LSR_OE 0x02 // Overrun Error
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#define LSR_PE 0x04 // Parity Error
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#define LSR_FE 0x08 // Framing Error
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#define LSR_BI 0x10 // Break Interrupt
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#define LSR_THRE 0x20 // Transmitter Holding Register
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#define LSR_TEMT 0x40 // Transmitter empty
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#define LSR_RCVE 0x80 // Error in receiver FIFO
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/* PORT_ISA bits */
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#define ISA_A14 0x01
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#define ISA_A15 0x02
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#define ISA_A16 0x04
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#define ISA_A17 0x08
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#define ISA_A18 0x10
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#define ISA_A19 0x20
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#define ISA_AEN 0x40
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#define ISA_RESET 0x80
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/* Speed divider for UART */
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#define BAUD_RATE 115200 // Connection speed with ESP8266
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#define XIN_FREQ 14745600 // On board frequency generator for TL16C550
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#define DIVISOR 8 // XIN_FREQ / (BAUD_RATE * 16) Frequency divider for Transmitter/Receiver
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#endif |