mirror of
https://github.com/romychs/OK240.2-Firmware.git
synced 2026-04-21 10:53:18 +03:00
136 lines
3.1 KiB
PHP
136 lines
3.1 KiB
PHP
; =======================================================
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; Ocean-240.2
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; Computer with FDC variant.
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; IO Ports definitions
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;
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; By Romych 2025-09-09
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; =======================================================
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IFNDEF _IO_PORTS
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DEFINE _IO_PORTS
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; -------------------------------------------------------
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; КР580ВВ55 DD79
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; -------------------------------------------------------
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; Port A - User port A
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USR_DD79PA EQU 0x00
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; Port B - User port B
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USR_DD79PB EQU 0x01
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; Port C - User port C
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USR_DD79PC EQU 0x02
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; Config: [1][ma1,ma0][0-aO|1-aI],[0-chO,1-chI],[mb],[0-bO|1-bI],[0-clO,1-clI]
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; Set bit: [0][xxx][bbb][0|1]
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USR_DD79CTR EQU 0x03
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; -------------------------------------------------------
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; КР1818ВГ93
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; -------------------------------------------------------
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; WR: FDC CMD
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; RD: STATUS
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FDC_CMD EQU 0x20
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; FDC TRACK
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FDC_TRACK EQU 0x21
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; FDC SECTOR
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FDC_SECT EQU 0x22
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; FDC DATA
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FDC_DATA EQU 0x23
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; RD: Bit 0 - DRQ
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FDC_WAIT EQU 0x24
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; Controller port
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; RD: [MOTST,SSEL,x,x,DRSEL,MOT1,MOT0,INTRQ]
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; WR: [x,x,SSEL,#DDEN,INIT,DRSEL,MOT1,MOT0]
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FLOPPY EQU 0x25
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; -------------------------------------------------------
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; КР580ВВ55 DD78
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; -------------------------------------------------------
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; Port A - Keyboard Data
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KBD_DD78PA EQU 0x40
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; Port B - JST3,SHFT,CTRL,ACK,TAPE5,TAPE4,GK,GC
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KBD_DD78PB EQU 0x41
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; Port C - [PC7..0]
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KBD_DD78PC EQU 0x42
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; Сonfig: [1][ma1,ma0][0-aO|1-aI],[0-chO,1-chI],[mb],[0-bO|1-bI],[0-clO,1-clI]
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; Set bit: [0][xxx][bbb][0|1];
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KBD_DD78CTR EQU 0x43
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; -------------------------------------------------------
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; КР580ВИ53 DD70
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; -------------------------------------------------------
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; Counter 1
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TMR_DD70C1 EQU 0x60
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; Counter 2
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TMR_DD70C2 EQU 0x61
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; Counter 3
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TMR_DD70C3 EQU 0x62
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; Config: [sc1,sc0][rl1,rl0][m2,m1,m0][bcd]
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; sc - timer, rl=01-LSB, 10-MSB, 11-LSB+MSB
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; mode 000 - int on fin,
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; 001 - one shot,
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; x10 - rate gen,
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; x11-sq wave
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TMR_DD70CTR EQU 0x63
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; Programable Interrupt controller PIC KR580VV59
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PIC_DD75RS EQU 0x80
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PIC_DD75RM EQU 0x81
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; -------------------------------------------------------
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; КР580ВВ51 DD72
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; -------------------------------------------------------
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; Data
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UART_DD72RD EQU 0xA0
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; [RST,RQ_RX,RST_ERR,PAUSE,RX_EN,RX_RDY,TX_RDY]
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UART_DD72RR EQU 0xA1
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; -------------------------------------------------------
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; КР580ВВ55 DD17
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; -------------------------------------------------------
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; Port A - VShift[8..1]
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SYS_DD17PA EQU 0xC0
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; Port B - [ROM14,13][REST][ENROM-][A18,17,16][32k]
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SYS_DD17PB EQU 0xC1
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; Port C - HShift[HS5..1,SB3..1]
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SYS_DD17PC EQU 0xC2
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; Сonfig: [1][ma1,ma0][0-aO|1-aI],[0-chO,1-chI],[mb],[0-bO|1-bI],[0-clO,1-clI]
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; Set bit: [0][xxx][bbb][0|1];
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SYS_DD17CTR EQU 0xC3
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; -------------------------------------------------------
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; КР580ВВ55 DD67
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; -------------------------------------------------------
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; Port A - LPT Data
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LPT_DD67PA EQU 0xE0
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; Port B - [VSU,C/M,FL3..1,COL3..1]
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VID_DD67PB EQU 0xE1
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; Port C - [USER3..1,STB-LP,BELL,TAPE3..1]
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DD67PC EQU 0xE2
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; Сonfig: [1][ma1,ma0][0-aO|1-aI],[0-chO,1-chI],[mb],[0-bO|1-bI],[0-clO,1-clI]
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; Set bit: [0][xxx][bbb][0|1];
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DD67CTR EQU 0xE3
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ENDIF |