Impl MEM BP, StateSave, BP with Expr, Toolbar

This commit is contained in:
romych committed 2026-03-19 00:20:41 +03:00
1 parent b200f269a0
commit 415664fc8d
40 files changed
+7845 -419

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+18 -6
View File
@@ -33,9 +33,15 @@ type Z80 struct {
intPending bool
nmiPending bool
core z80.MemIoRW
core z80.MemIoRW
memAccess map[uint16]byte
}
const (
MemAccessRead = 1
MemAccessWrite = 2
)
// New initializes a Z80 instance and return pointer to it
func New(core z80.MemIoRW) *Z80 {
z := Z80{}
@@ -90,7 +96,9 @@ func New(core z80.MemIoRW) *Z80 {
}
// RunInstruction executes the next instruction in memory + handles interrupts
func (z *Z80) RunInstruction() uint32 {
func (z *Z80) RunInstruction() (uint32, *map[uint16]byte) {
z.memAccess = map[uint16]byte{}
pre := z.cycleCount
if z.isHalted {
z.execOpcode(0x00)
@@ -99,10 +107,10 @@ func (z *Z80) RunInstruction() uint32 {
z.execOpcode(opcode)
}
z.processInterrupts()
return z.cycleCount - pre
return z.cycleCount - pre, &z.memAccess
}
func (z *Z80) SetState(state *z80.Z80CPU) {
func (z *Z80) SetState(state *z80.CPU) {
z.cycleCount = 0
z.a = state.A
z.b = state.B
@@ -148,8 +156,8 @@ func (z *Z80) SetState(state *z80.Z80CPU) {
z.nmiPending = false
z.intData = 0
}
func (z *Z80) GetState() *z80.Z80CPU {
return &z80.Z80CPU{
func (z *Z80) GetState() *z80.CPU {
return &z80.CPU{
A: z.a,
B: z.b,
C: z.c,
@@ -211,3 +219,7 @@ func (z *Z80) getAltFlags() z80.FlagsType {
C: z.f_&0x01 != 0,
}
}
func (z *Z80) PC() uint16 {
return z.pc
}
+8 -2
View File
@@ -3,18 +3,24 @@ package c99
import log "github.com/sirupsen/logrus"
func (z *Z80) rb(addr uint16) byte {
z.memAccess[addr] = MemAccessRead
return z.core.MemRead(addr)
}
func (z *Z80) wb(addr uint16, val byte) {
z.memAccess[addr] = MemAccessWrite
z.core.MemWrite(addr, val)
}
func (z *Z80) rw(addr uint16) uint16 {
z.memAccess[addr] = MemAccessRead
z.memAccess[addr+1] = MemAccessRead
return (uint16(z.core.MemRead(addr+1)) << 8) | uint16(z.core.MemRead(addr))
}
func (z *Z80) ww(addr uint16, val uint16) {
z.memAccess[addr] = MemAccessWrite
z.memAccess[addr+1] = MemAccessWrite
z.core.MemWrite(addr, byte(val))
z.core.MemWrite(addr+1, byte(val>>8))
}
@@ -30,13 +36,13 @@ func (z *Z80) popW() uint16 {
}
func (z *Z80) nextB() byte {
b := z.rb(z.pc)
b := z.core.MemRead(z.pc)
z.pc++
return b
}
func (z *Z80) nextW() uint16 {
w := z.rw(z.pc)
w := (uint16(z.core.MemRead(z.pc+1)) << 8) | uint16(z.core.MemRead(z.pc))
z.pc += 2
return w
}