mirror of
https://github.com/romychs/Ocean-240.2-Emulator.git
synced 2026-04-21 11:03:21 +03:00
411 lines
7.2 KiB
Go
411 lines
7.2 KiB
Go
package z80em
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var edInstructions = []func(s *Z80Type){
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// 0x40 : IN B, (C)
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0x40: func(s *Z80Type) {
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s.B = s.doIn(s.bc())
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},
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// 0x41 : OUT (C), B
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0x41: func(s *Z80Type) {
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s.core.IOWrite(s.bc(), s.B)
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},
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// 0x42 : SBC HL, BC
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0x42: func(s *Z80Type) {
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s.doHlSbc(s.bc())
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},
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// 0x43 : LD (nn), BC
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0x43: func(s *Z80Type) {
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s.setWord(s.nextWord(), s.bc())
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},
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// 0x44 : NEG
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0x44: func(s *Z80Type) {
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s.doNeg()
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},
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// 0x45 : RETN
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0x45: func(s *Z80Type) {
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s.PC = s.PopWord() - 1
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s.Iff1 = s.Iff2
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},
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// 0x46 : IM 0
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0x46: func(s *Z80Type) {
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s.IMode = 0
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},
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// 0x47 : LD I, A
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0x47: func(s *Z80Type) {
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s.I = s.A
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},
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// 0x48 : IN C, (C)
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0x48: func(s *Z80Type) {
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s.C = s.doIn(s.bc())
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},
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// 0x49 : OUT (C), C
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0x49: func(s *Z80Type) {
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s.core.IOWrite(s.bc(), s.C)
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},
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// 0x4a : ADC HL, BC
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0x4A: func(s *Z80Type) {
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s.doHlAdc(s.bc())
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},
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// 0x4b : LD BC, (nn)
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0x4B: func(s *Z80Type) {
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s.setBc(s.getWord(s.nextWord()))
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},
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// 0x4c : NEG (Undocumented)
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0x4C: func(s *Z80Type) {
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s.doNeg()
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},
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// 0x4d : RETI
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0x4D: func(s *Z80Type) {
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s.PC = s.PopWord() - 1
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},
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// 0x4e : IM 0 (Undocumented)
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0x4E: func(s *Z80Type) {
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s.IMode = 0
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},
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// 0x4f : LD R, A
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0x4F: func(s *Z80Type) {
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s.R = s.A
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},
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// 0x50 : IN D, (C)
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0x50: func(s *Z80Type) {
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s.D = s.doIn(s.bc())
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},
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// 0x51 : OUT (C), D
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0x51: func(s *Z80Type) {
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s.core.IOWrite(s.bc(), s.D)
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},
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// 0x52 : SBC HL, DE
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0x52: func(s *Z80Type) {
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s.doHlSbc(s.de())
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},
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// 0x53 : LD (nn), DE
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0x53: func(s *Z80Type) {
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s.setWord(s.nextWord(), s.de())
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},
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// 0x54 : NEG (Undocumented)
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0x54: func(s *Z80Type) {
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s.doNeg()
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},
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// 0x55 : RETN
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0x55: func(s *Z80Type) {
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s.PC = s.PopWord() - 1
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s.Iff1 = s.Iff2
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},
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// 0x56 : IM 1
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0x56: func(s *Z80Type) {
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s.IMode = 1
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},
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// 0x57 : LD A, I
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0x57: func(s *Z80Type) {
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s.A = s.I
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s.Flags.S = s.A&0x80 != 0
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s.Flags.Z = s.A == 0
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s.Flags.H = false
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s.Flags.P = s.Iff2 != 0
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s.Flags.N = false
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s.updateXYFlags(s.A)
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},
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// 0x58 : IN E, (C)
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0x58: func(s *Z80Type) {
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s.E = s.doIn(s.bc())
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},
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// 0x59 : OUT (C), E
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0x59: func(s *Z80Type) {
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s.core.IOWrite(s.bc(), s.E)
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},
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// 0x5a : ADC HL, DE
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0x5A: func(s *Z80Type) {
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s.doHlAdc(s.de())
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},
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// 0x5b : LD DE, (nn)
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0x5B: func(s *Z80Type) {
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s.setDe(s.getWord(s.nextWord()))
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},
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// 0x5c : NEG (Undocumented)
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0x5C: func(s *Z80Type) {
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s.doNeg()
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},
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// 0x5d : RETN
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0x5D: func(s *Z80Type) {
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s.PC = s.PopWord() - 1
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s.Iff1 = s.Iff2
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},
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// 0x5e : IM 2
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0x5E: func(s *Z80Type) {
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s.IMode = 2
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},
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// 0x5f : LD A, R
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0x5F: func(s *Z80Type) {
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s.A = s.R
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s.Flags.S = s.A&0x80 != 0
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s.Flags.Z = s.A == 0
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s.Flags.H = false
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s.Flags.P = s.Iff2 != 0
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s.Flags.N = false
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s.updateXYFlags(s.A)
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},
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// 0x60 : IN H, (C)
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0x60: func(s *Z80Type) {
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s.H = s.doIn(s.bc())
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},
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// 0x61 : OUT (C), H
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0x61: func(s *Z80Type) {
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s.core.IOWrite(s.bc(), s.H)
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},
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// 0x62 : SBC HL, HL
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0x62: func(s *Z80Type) {
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s.doHlSbc(s.hl())
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},
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// 0x63 : LD (nn), HL (Undocumented)
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0x63: func(s *Z80Type) {
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s.setWord(s.nextWord(), s.hl())
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},
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// 0x64 : NEG (Undocumented)
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0x64: func(s *Z80Type) {
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s.doNeg()
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},
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// 0x65 : RETN
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0x65: func(s *Z80Type) {
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s.PC = s.PopWord() - 1
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s.Iff1 = s.Iff2
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},
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// 0x66 : IM 0
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0x66: func(s *Z80Type) {
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s.IMode = 0
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},
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// 0x67 : RRD
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0x67: func(s *Z80Type) {
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hlValue := s.core.M1MemRead(s.hl())
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temp1 := hlValue & 0x0f
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temp2 := s.A & 0x0f
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hlValue = ((hlValue & 0xf0) >> 4) | (temp2 << 4)
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s.A = (s.A & 0xf0) | temp1
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s.core.MemWrite(s.hl(), hlValue)
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s.Flags.S = s.A&0x80 != 0
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s.Flags.Z = s.A == 0
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s.Flags.H = false
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s.Flags.P = ParityBits[s.A]
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s.Flags.N = false
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s.updateXYFlags(s.A)
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},
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// 0x68 : IN L, (C)
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0x68: func(s *Z80Type) {
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s.L = s.doIn(s.bc())
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},
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// 0x69 : OUT (C), L
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0x69: func(s *Z80Type) {
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s.core.IOWrite(s.bc(), s.L)
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},
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// 0x6a : ADC HL, HL
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0x6A: func(s *Z80Type) {
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s.doHlAdc(s.hl())
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},
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// 0x6b : LD HL, (nn) (Undocumented)
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0x6B: func(s *Z80Type) {
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s.setHl(s.getWord(s.nextWord()))
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},
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// 0x6C : NEG (Undocumented)
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0x6C: func(s *Z80Type) {
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s.doNeg()
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},
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// 0x6D : RETN
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0x6D: func(s *Z80Type) {
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s.PC = s.PopWord() - 1
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s.Iff1 = s.Iff2
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},
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// 0x6E : IM 0
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0x6E: func(s *Z80Type) {
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s.IMode = 0
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},
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// 0x6f : RLD
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0x6F: func(s *Z80Type) {
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hlValue := s.core.MemRead(s.hl())
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temp1 := hlValue & 0xf0
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temp2 := s.A & 0x0f
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hlValue = ((hlValue & 0x0f) << 4) | temp2
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s.A = (s.A & 0xf0) | (temp1 >> 4)
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s.core.MemWrite(s.hl(), hlValue)
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s.Flags.S = s.A&0x80 != 0
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s.Flags.Z = s.A == 0
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s.Flags.H = false
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s.Flags.P = ParityBits[s.A]
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s.Flags.N = false
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s.updateXYFlags(s.A)
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},
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// 0x70 : INF
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0x70: func(s *Z80Type) {
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s.doIn(s.bc())
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},
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// 0x71 : OUT (C), 0 (Undocumented)
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0x71: func(s *Z80Type) {
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s.core.IOWrite(s.bc(), 0)
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},
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// 0x72 : SBC HL, SP
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0x72: func(s *Z80Type) {
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s.doHlSbc(s.SP)
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},
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// 0x73 : LD (nn), SP
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0x73: func(s *Z80Type) {
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s.setWord(s.nextWord(), s.SP)
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},
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// 0x74 : NEG (Undocumented)
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0x74: func(s *Z80Type) {
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s.doNeg()
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},
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// 0x75 : RETN
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0x75: func(s *Z80Type) {
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s.PC = s.PopWord() - 1
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s.Iff1 = s.Iff2
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},
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// 0x76 : IM 1
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0x76: func(s *Z80Type) {
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s.IMode = 1
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},
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// 0x78 : IN A, (C)
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0x78: func(s *Z80Type) {
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s.A = s.core.IORead(s.bc())
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},
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// 0x79 : OUT (C), A
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0x79: func(s *Z80Type) {
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s.core.IOWrite(s.bc(), s.A)
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},
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// 0x7a : ADC HL, SP
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0x7A: func(s *Z80Type) {
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s.doHlAdc(s.SP)
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},
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// 0x7b : LD SP, (nn)
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0x7B: func(s *Z80Type) {
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s.SP = s.getWord(s.nextWord())
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},
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// 0x7c : NEG (Undocumented)
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0x7C: func(s *Z80Type) {
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s.doNeg()
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},
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// 0x7d : RETN
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0x7D: func(s *Z80Type) {
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s.PC = s.PopWord() - 1
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s.Iff1 = s.Iff2
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},
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// 0x7e : IM 2
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0x7E: func(s *Z80Type) {
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s.IMode = 2
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},
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// 0xa0 : LDI
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0xA0: func(s *Z80Type) {
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s.doLdi()
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},
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// 0xa1 : CPI
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0xA1: func(s *Z80Type) {
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s.doCpi()
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},
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// 0xa2 : INI
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0xA2: func(s *Z80Type) {
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s.doIni()
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},
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// 0xa3 : OUTI
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0xA3: func(s *Z80Type) {
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s.doOuti()
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},
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// 0xa8 : LDD
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0xA8: func(s *Z80Type) {
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s.doLdd()
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},
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// 0xa9 : CPD
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0xA9: func(s *Z80Type) {
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s.doCpd()
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},
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// 0xaa : IND
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0xAA: func(s *Z80Type) {
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s.doInd()
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},
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// 0xab : OUTD
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0xAB: func(s *Z80Type) {
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s.doOutd()
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},
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// 0xb0 : LDIR
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0xB0: func(s *Z80Type) {
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s.doLdi()
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if (s.B | s.C) != 0 {
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s.CycleCounter += 5
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s.PC -= 2
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}
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},
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// 0xb1 : CPIR
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0xB1: func(s *Z80Type) {
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s.doCpi()
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if !s.Flags.Z && (s.B|s.C) != 0 {
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s.CycleCounter += 5
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s.PC -= 2
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}
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},
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// 0xb2 : INIR
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0xB2: func(s *Z80Type) {
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s.doIni()
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if s.B != 0 {
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s.CycleCounter += 5
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s.PC -= 2
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}
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},
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// 0xb3 : OTIR
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0xB3: func(s *Z80Type) {
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s.doOuti()
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if s.B != 0 {
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s.CycleCounter += 5
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s.PC -= 2
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}
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},
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// 0xb8 : LDDR
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0xB8: func(s *Z80Type) {
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s.doLdd()
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if (s.B | s.C) != 0 {
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s.CycleCounter += 5
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s.PC -= 2
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}
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},
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// 0xb9 : CPDR
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0xB9: func(s *Z80Type) {
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s.doCpd()
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if !s.Flags.Z && (s.B|s.C) != 0 {
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s.CycleCounter += 5
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s.PC -= 2
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}
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},
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// 0xba : INDR
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0xBA: func(s *Z80Type) {
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s.doInd()
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if s.B != 0 {
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s.CycleCounter += 5
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s.PC -= 2
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}
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},
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// 0xbb : OTDR
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0xBB: func(s *Z80Type) {
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s.doOutd()
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if s.B != 0 {
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s.CycleCounter += 5
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s.PC -= 2
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}
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},
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}
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func (z *Z80Type) opcodeED() {
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z.incR()
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z.PC++
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opcode := z.core.M1MemRead(z.PC)
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fun := edInstructions[opcode]
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if fun != nil {
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fun(z)
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z.CycleCounter += CycleCountsEd[opcode]
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} else {
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z.PC--
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z.CycleCounter += CycleCounts[0]
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}
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}
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