mirror of
https://github.com/romychs/Ocean-240.2-Emulator.git
synced 2026-04-21 11:03:21 +03:00
138 lines
3.3 KiB
Go
138 lines
3.3 KiB
Go
package okean240
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import (
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"os"
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log "github.com/sirupsen/logrus"
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)
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const RamBlockSize = 16 * 1024 // 16Kb
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const RamSize = 512 * 1024 // 512kb (16xRU7) or 128k (16xRU5)
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const RamBlocks = RamSize / RamBlockSize // 32 Ram blocks for 512k, 8 for 128k
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const RamDefaultInitPattern = 0x3f
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const RamWindows = 4
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const RSTBit = 0x20
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const ROMDisBit = 0x10
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const AccessHiBit = 0x01
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const ExtRamAddrBits = 0x0E
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const (
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WindowNo0 = iota
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WindowNo1
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WindowNo2
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WindowNo3
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)
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type RamBlock struct {
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id byte
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memory [RamBlockSize]byte
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}
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type Memory struct {
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allMemory [RamBlocks]*RamBlock
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memoryWindow [RamWindows]*RamBlock
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rom0 RamBlock // monitor + monitor
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rom1 RamBlock // cpm + monitor
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config byte
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}
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type MemoryInterface interface {
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// Init - Initialize memory at "computer started"
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Init(rom0 string, rom1 string)
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// Configure - Set memory configuration
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Configure(value byte)
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// M1MemRead Read byte from memoryWindow for specified address
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M1MemRead(addr uint16) byte
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// MemRead Read byte from memoryWindow for specified address
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MemRead(addr uint16) byte
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// MemWrite Write byte to memoryWindow to specified address
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MemWrite(addr uint16, val byte)
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}
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func (m *Memory) Init(monFile string, cmpFile string) {
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// empty RAM
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var id byte = 0
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for block := range m.allMemory {
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rb := RamBlock{}
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rb.id = id
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id++
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for addr := 0; addr < RamBlockSize; addr++ {
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rb.memory[addr] = RamDefaultInitPattern
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}
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m.allMemory[block] = &rb
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}
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// Command ROM files and init ROM0,1
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// Read the entire file into a byte slice
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rom0bin, err := os.ReadFile(monFile)
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if err != nil {
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log.Fatal(err)
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}
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rom1bin, err := os.ReadFile(cmpFile)
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if err != nil {
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log.Fatal(err)
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}
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m.rom0 = RamBlock{}
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m.rom0.id = 100
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m.rom1 = RamBlock{}
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m.rom0.id = 101
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half := RamBlockSize / 2
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for i := 0; i < half; i++ {
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// mon+mon
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m.rom0.memory[i] = rom0bin[i]
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m.rom0.memory[i+half] = rom0bin[i]
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// cp/m + mon
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m.rom1.memory[i] = rom1bin[i]
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m.rom1.memory[i+half] = rom0bin[i]
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}
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// Config mem with RST pin Hi
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m.Configure(RSTBit)
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}
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// Configure - Configure memoryWindow windows
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func (m *Memory) Configure(value byte) {
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m.config = value
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if m.config&RSTBit != 0 {
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// RST bit set just after System RESET
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// All memoryWindow windows points to ROM0 (monitor)
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for i := 0; i < RamWindows; i++ {
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m.memoryWindow[i] = &m.rom0
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}
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} else {
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// Map RAM blocks to windows
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sp := (m.config & ExtRamAddrBits) << 1 // 0,4,8,12
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for i := byte(0); i < RamWindows; i++ {
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m.memoryWindow[i] = m.allMemory[sp+i]
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}
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// Map two hi windows to low windows in 32k flag set
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if m.config&AccessHiBit == 1 {
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m.memoryWindow[WindowNo0] = m.memoryWindow[WindowNo2]
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m.memoryWindow[WindowNo1] = m.memoryWindow[WindowNo3]
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}
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// If ROM enabled, map ROM to last window
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if m.config&ROMDisBit == 0 {
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// If ROM enabled, CP/M + Mon at window 3 [0xC000:0xFFFF]
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m.memoryWindow[WindowNo3] = &m.rom1
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}
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}
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}
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func (m *Memory) M1MemRead(addr uint16) byte {
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return m.memoryWindow[addr>>14].memory[addr&0x3fff]
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}
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func (m *Memory) MemRead(addr uint16) byte {
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return m.memoryWindow[addr>>14].memory[addr&0x3fff]
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}
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func (m *Memory) MemWrite(addr uint16, val byte) {
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window := addr >> 14
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offset := addr & 0x3fff
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if window == 1 {
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//log.Debugf("at vram [%2x][%4x]", window, offset)
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}
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m.memoryWindow[window].memory[offset] = val
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}
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