mirror of
https://github.com/romychs/Ocean-240.2-Emulator.git
synced 2026-04-21 11:03:21 +03:00
900 lines
20 KiB
Go
900 lines
20 KiB
Go
package js
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import (
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"fmt"
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"okemu/z80"
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log "github.com/sirupsen/logrus"
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)
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type Z80 struct {
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z80.Z80CPU
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core z80.MemIoRW
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}
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func (z *Z80) Reset() {
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z.A = 0
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z.R = 0
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z.SP = 0xff
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z.PC = 0
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z.Flags.SetFlags(0xff)
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// Interrupts disabled
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z.IMode = 0
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z.Iff1 = false
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z.Iff2 = false
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z.InterruptOccurred = false
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// Start not halted
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z.Halted = false
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z.DoDelayedDI = false
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z.DoDelayedEI = false
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// no cycles
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z.CycleCounter = 0
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fmt.Println("CPUInterface State Reset")
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}
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func (z *Z80) GetState() *z80.Z80CPU {
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return &z80.Z80CPU{
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A: z.A,
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B: z.B,
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C: z.C,
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D: z.D,
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E: z.E,
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H: z.H,
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L: z.L,
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AAlt: z.AAlt,
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BAlt: z.BAlt,
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CAlt: z.CAlt,
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DAlt: z.DAlt,
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EAlt: z.EAlt,
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HAlt: z.HAlt,
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IX: z.IX,
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IY: z.IY,
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R: z.R,
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SP: z.SP,
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PC: z.PC,
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Flags: z.Flags,
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FlagsAlt: z.FlagsAlt,
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IMode: z.IMode,
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Iff1: z.Iff1,
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Iff2: z.Iff2,
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Halted: z.Halted,
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DoDelayedDI: z.DoDelayedDI,
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DoDelayedEI: z.DoDelayedEI,
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CycleCounter: z.CycleCounter,
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}
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}
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func (z *Z80) SetState(state *Z80) {
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z.A = state.A
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z.B = state.B
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z.C = state.C
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z.D = state.D
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z.E = state.E
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z.H = state.H
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z.L = state.L
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z.AAlt = state.AAlt
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z.BAlt = state.BAlt
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z.CAlt = state.CAlt
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z.DAlt = state.DAlt
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z.EAlt = state.EAlt
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z.HAlt = state.HAlt
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z.IX = state.IX
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z.IY = state.IY
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z.I = state.I
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z.R = state.R
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z.SP = state.SP
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z.PC = state.PC
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z.Flags = state.Flags
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z.FlagsAlt = state.FlagsAlt
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z.IMode = state.IMode
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z.Iff1 = state.Iff1
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z.Iff2 = state.Iff2
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z.Halted = state.Halted
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z.DoDelayedDI = state.DoDelayedDI
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z.DoDelayedEI = state.DoDelayedEI
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z.CycleCounter = state.CycleCounter
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}
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// New Create new
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func New(memIoRW z80.MemIoRW) *Z80 {
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return &Z80{
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Z80CPU: z80.Z80CPU{
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A: 0,
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B: 0,
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C: 0,
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D: 0,
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E: 0,
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H: 0,
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L: 0,
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AAlt: 0,
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BAlt: 0,
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CAlt: 0,
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DAlt: 0,
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EAlt: 0,
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HAlt: 0,
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IX: 0,
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IY: 0,
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I: 0,
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R: 0,
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SP: 0xffff,
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PC: 0,
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Flags: z80.FlagsType{S: true, Z: true, Y: true, H: true, X: true, P: true, N: true, C: true},
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FlagsAlt: z80.FlagsType{S: true, Z: true, Y: true, H: true, X: true, P: true, N: true, C: true},
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IMode: 0,
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Iff1: false,
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Iff2: false,
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Halted: false,
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DoDelayedDI: false,
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DoDelayedEI: false,
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CycleCounter: 0,
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InterruptOccurred: false,
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},
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core: memIoRW,
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}
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}
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func (z *Z80) RunInstruction() uint64 {
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z.incR()
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if !z.Halted {
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// If the previous instruction was a DI or an EI,
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// we'll need to disable or enable interrupts
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// after whatever instruction we're about to run is finished.
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doingDelayedDi := false
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doingDelayedEi := false
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if z.DoDelayedDI {
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z.DoDelayedDI = false
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doingDelayedDi = true
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} else if z.DoDelayedEI {
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z.DoDelayedEI = false
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doingDelayedEi = true
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}
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// Read the byte at the PC and run the instruction it encodes.
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opcode := z.core.M1MemRead(z.PC)
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z.decodeInstruction(opcode)
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// HALT does not increase the PC
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if !z.Halted {
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z.PC++
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}
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// Actually do the delayed interrupt disable/enable if we have one.
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if doingDelayedDi {
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z.Iff1 = false
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z.Iff2 = false
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} else if doingDelayedEi {
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z.Iff1 = true
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z.Iff2 = true
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}
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// And finally clear out the cycle counter for the next instruction
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// before returning it to the emulator core.
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cycleCounter := z.CycleCounter
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z.CycleCounter = 0
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return uint64(cycleCounter)
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}
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// HALTED
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// During HALT, NOPs are executed which is 4T
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z.core.M1MemRead(z.PC) // HALT does a normal M1 fetch to keep the memory refresh active. The result is ignored (NOP).
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return 4
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}
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// Simulates pulsing the processor's INT (or NMI) pin
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//
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// nonMaskable - true if this is a non-maskable interrupt
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// data - the value to be placed on the data bus, if needed
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func (z *Z80) interrupt(nonMaskable bool, data byte) {
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if nonMaskable {
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// An interrupt, if halted, does increase the PC
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if z.Halted {
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z.PC++
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}
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// The high bit of R is not affected by this increment,
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// it can only be changed using the LD R, A instruction.
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z.incR()
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// Non-maskable interrupts are always handled the same way;
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// clear IFF1 and then do a CALL 0x0066.
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// Also, all interrupts reset the HALT state.
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z.Halted = false
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z.Iff2 = z.Iff1
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z.Iff1 = false
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z.pushWord(z.PC)
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z.PC = 0x66
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z.CycleCounter += 11
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} else if z.Iff1 {
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// An interrupt, if halted, does increase the PC
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if z.Halted {
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z.PC++
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}
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// The high bit of R is not affected by this increment,
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// it can only be changed using the LD R,A instruction.
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z.incR()
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z.Halted = false
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z.Iff1 = false
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z.Iff2 = false
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if z.IMode == 0 {
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// In the 8080-compatible interrupt mode,
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// decode the content of the data bus as an instruction and run it.
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// it'z probably a RST instruction, which pushes (PC+1) onto the stack
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// so we should decrement PC before we decode the instruction
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z.PC--
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z.decodeInstruction(data)
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z.PC++ // increment PC upon return
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z.CycleCounter += 2
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} else if z.IMode == 1 {
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// Mode 1 is always just RST 0x38.
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z.pushWord(z.PC)
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z.PC = 0x0038
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z.CycleCounter += 13
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} else if z.IMode == 2 {
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// Mode 2 uses the value on the data bus as in index
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// into the vector table pointer to by the I register.
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z.pushWord(z.PC)
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// The Z80 manual says that this address must be 2-byte aligned,
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// but it doesn't appear that this is actually the case on the hardware,
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// so we don't attempt to enforce that here.
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vectorAddress := (uint16(z.I) << 8) | uint16(data)
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z.PC = z.getWord(vectorAddress) //uint16( z.core.MemRead(vectorAddress)) | (uint16(z.core.MemRead(vectorAddress+1)) << 8)
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z.CycleCounter += 19
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// A "notification" is generated so that the calling program can break on it.
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z.InterruptOccurred = true
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}
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}
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}
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func (z *Z80) pushWord(operand uint16) {
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z.SP--
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z.core.MemWrite(z.SP, byte(operand>>8))
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z.SP--
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z.core.MemWrite(z.SP, byte(operand&0x00ff))
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}
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func (z *Z80) getOperand(opcode byte) byte {
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switch opcode & 0x07 {
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case 0:
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return z.B
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case 1:
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return z.C
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case 2:
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return z.D
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case 3:
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return z.E
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case 4:
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return z.H
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case 5:
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return z.L
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case 6:
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return z.core.MemRead(z.hl())
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default:
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return z.A
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}
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}
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func (z *Z80) decodeInstruction(opcode byte) {
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// Handle HALT right up front, because it fouls up our LD decoding
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// by falling where LD (HL), (HL) ought to be.
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if opcode == OpHalt {
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z.Halted = true
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} else if opcode >= OpLdBB && opcode < OpAddAB {
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// 8-bit register loads.
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z.load8bit(opcode, z.getOperand(opcode))
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} else if (opcode >= OpAddAB) && (opcode < OpRetNz) {
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// 8-bit register ALU instructions.
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z.alu8bit(opcode, z.getOperand(opcode))
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} else {
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fun := instructions[opcode]
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fun(z)
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}
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z.CycleCounter += CycleCounts[opcode]
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}
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func (z *Z80) load8bit(opcode byte, operand byte) {
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switch (opcode & 0x38) >> 3 {
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case 0:
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z.B = operand
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case 1:
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z.C = operand
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case 2:
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z.D = operand
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case 3:
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z.E = operand
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case 4:
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z.H = operand
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case 5:
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z.L = operand
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case 6:
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z.core.MemWrite(z.hl(), operand)
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default:
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z.A = operand
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}
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}
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// alu8bit Handle ALU Operations, ADD, ADC SUB, SBC, AND, XOR, OR
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func (z *Z80) alu8bit(opcode byte, operand byte) {
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switch (opcode & 0x38) >> 3 {
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case 0:
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z.doAdd(operand)
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case 1:
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z.doAdc(operand)
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case 2:
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z.doSub(operand)
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case 3:
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z.doSbc(operand)
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case 4:
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z.doAnd(operand)
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case 5:
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z.doXor(operand)
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case 6:
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z.doOr(operand)
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default:
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z.doCp(operand)
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}
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}
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// updateXYFlags Set flags X and Y based on result bits
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func (z *Z80) updateXYFlags(result byte) {
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z.Flags.Y = result&0x20 != 0
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z.Flags.X = result&0x08 != 0
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}
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// PushWord - Decrement stack pointer and put specified word value to stack
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func (z *Z80) PushWord(operand uint16) {
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z.SP--
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z.core.MemWrite(z.SP, byte((operand&0xff00)>>8))
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z.SP--
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z.core.MemWrite(z.SP, byte(operand&0x00ff))
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}
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// PopWord - Get word value from top of stack and increment stack pointer
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func (z *Z80) PopWord() uint16 {
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result := uint16(z.core.MemRead(z.SP))
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z.SP++
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result |= uint16(z.core.MemRead(z.SP)) << 8
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z.SP++
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return result
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}
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// doConditionalAbsoluteJump - Implements the JP [condition],nn instructions.
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func (z *Z80) doConditionalAbsoluteJump(condition bool) {
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if condition {
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// We're taking this jump, so write the new PC,
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// and then decrement the thing we just wrote,
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// because the instruction decoder increments the PC
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// unconditionally at the end of every instruction,
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// and we need to counteract that so we end up at the jump target.
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z.PC = z.getWord(z.PC + 1) //uint16( z.core.MemRead(z.PC+1)) | (uint16(z.core.MemRead(z.PC+2)) << 8)
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z.PC--
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} else {
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// We're not taking this jump, just move the PC past the operand.
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z.PC += 2
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}
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}
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// doConditionalRelativeJump - Implements the JR [condition],nn instructions.
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func (z *Z80) doConditionalRelativeJump(condition bool) {
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if condition {
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// We need a few more cycles to actually take the jump.
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z.CycleCounter += 5
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// Calculate the offset specified by our operand.
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offset := z.core.MemRead(z.PC + 1)
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// Add the offset to the PC, also skipping past this instruction.
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if offset < 0 {
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z.PC = z.PC - uint16(-offset)
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} else {
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z.PC = z.PC + uint16(offset)
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}
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}
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z.PC++
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}
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// doConditionalCall - Implements CALL [condition],nn instructions.
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func (z *Z80) doConditionalCall(condition bool) {
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if condition {
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z.CycleCounter += 7
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z.PushWord(z.PC + 3)
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z.PC = z.getWord(z.PC + 1) // uint16( z.core.MemRead(z.PC+1)) | (uint16(z.core.MemRead(z.PC+2)) << 8)
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z.PC--
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} else {
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z.PC += 2
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}
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}
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func (z *Z80) doConditionalReturn(condition bool) {
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if condition {
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z.CycleCounter += 6
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z.PC = z.PopWord() - 1
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}
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}
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// doReset - Implements RST [address] instructions.
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func (z *Z80) doReset(address uint16) {
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z.PushWord(z.PC + 1)
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z.PC = address - 1
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}
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// doAdd Handle ADD A, [operand] instructions.
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func (z *Z80) doAdd(operand byte) {
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var result = uint16(z.A) + uint16(operand)
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z.Flags.S = result&0x80 != 0
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z.Flags.Z = result&0x00ff == 0
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z.Flags.H = (((operand & 0x0f) + (z.A & 0x0f)) & 0x10) != 0
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z.Flags.P = ((z.A & 0x80) == (operand & 0x80)) && (z.A&0x80 != byte(result&0x80))
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z.Flags.N = false
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z.Flags.C = result&0x0100 != 0
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z.A = byte(result & 0xff)
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z.updateXYFlags(z.A)
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}
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// doAdc Handle ADC A, [operand] instructions.
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func (z *Z80) doAdc(operand byte) {
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add := byte(0)
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if z.Flags.C {
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add = 1
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}
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var result = uint16(z.A) + uint16(operand) + uint16(add)
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z.Flags.S = result&0x80 != 0
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z.Flags.Z = result&0x00ff == 0
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z.Flags.H = (((operand & 0x0f) + (z.A & 0x0f) + add) & 0x10) != 0
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z.Flags.P = ((z.A & 0x80) == (operand & 0x80)) && (z.A&0x80 != byte(result&0x80))
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z.Flags.N = false
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z.Flags.C = result&0x0100 != 0
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z.A = byte(result & 0xff)
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z.updateXYFlags(z.A)
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}
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// doSub Handle SUB A, [operand] instructions.
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func (z *Z80) doSub(operand byte) {
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var result = uint16(z.A) - uint16(operand)
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z.Flags.S = result&0x80 != 0
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z.Flags.Z = result&0x00ff == 0
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z.Flags.H = (((z.A & 0x0f) - (operand & 0x0f)) & 0x10) != 0
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z.Flags.P = ((z.A & 0x80) != (operand & 0x80)) && ((z.A & 0x80) != byte(result&0x80))
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z.Flags.N = true
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z.Flags.C = result&0x0100 != 0
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z.A = byte(result & 0xff)
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z.updateXYFlags(z.A)
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}
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// doSbc Handle SBC A, [operand] instructions.
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func (z *Z80) doSbc(operand byte) {
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sub := byte(0)
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if z.Flags.C {
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sub = 1
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}
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var result = uint16(z.A) - uint16(operand) - uint16(sub)
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z.Flags.S = result&0x80 != 0
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z.Flags.Z = result&0x00ff == 0
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z.Flags.H = (((z.A & 0x0f) - (operand & 0x0f) - sub) & 0x10) != 0
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z.Flags.P = ((z.A & 0x80) != (operand & 0x80)) && (z.A&0x80 != byte(result&0x80))
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z.Flags.N = true
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z.Flags.C = result&0x0100 != 0
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z.A = byte(result & 0xff)
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z.updateXYFlags(z.A)
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}
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// setLogicFlags Set common flags for logic ALU Ops
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func (z *Z80) setLogicFlags() {
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z.Flags.S = z.A&0x80 != 0
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z.Flags.Z = z.A == 0
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z.Flags.P = ParityBits[z.A]
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z.Flags.N = false
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z.Flags.C = false
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}
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// doAnd handle AND [operand] instructions.
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func (z *Z80) doAnd(operand byte) {
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z.A &= operand
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z.setLogicFlags()
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z.Flags.H = true
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z.updateXYFlags(z.A)
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}
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// doXor handle XOR [operand] instructions.
|
|
func (z *Z80) doXor(operand byte) {
|
|
z.A ^= operand
|
|
z.setLogicFlags()
|
|
z.Flags.H = false
|
|
z.updateXYFlags(z.A)
|
|
}
|
|
|
|
// doOr handle OR [operand] instructions.
|
|
func (z *Z80) doOr(operand byte) {
|
|
z.A |= operand
|
|
z.setLogicFlags()
|
|
z.Flags.H = false
|
|
z.updateXYFlags(z.A)
|
|
}
|
|
|
|
// doCp handle CP [operand] instructions.
|
|
func (z *Z80) doCp(operand byte) {
|
|
tmp := z.A
|
|
z.doSub(operand)
|
|
z.A = tmp
|
|
z.updateXYFlags(operand)
|
|
}
|
|
|
|
// doInc handle INC [operand] instructions.
|
|
func (z *Z80) doInc(operand byte) byte {
|
|
var result = uint16(operand) + 1
|
|
r8 := byte(result & 0xff)
|
|
z.Flags.S = r8&0x80 != 0
|
|
z.Flags.Z = r8 == 0
|
|
z.Flags.H = (operand & 0x0f) == 0x0f
|
|
z.Flags.P = operand == 0x7f
|
|
z.Flags.N = false
|
|
z.updateXYFlags(r8)
|
|
return r8
|
|
}
|
|
|
|
// doDec handle DEC [operand] instructions.
|
|
func (z *Z80) doDec(operand byte) byte {
|
|
var result = uint16(operand) - 1
|
|
r8 := byte(result & 0xff)
|
|
z.Flags.S = r8&0x80 != 0
|
|
z.Flags.Z = r8 == 0
|
|
z.Flags.H = (operand & 0x0f) == 0x00
|
|
z.Flags.P = operand == 0x80
|
|
z.Flags.N = true
|
|
z.updateXYFlags(r8)
|
|
return r8
|
|
}
|
|
|
|
// doHlAdd handle ADD HL,[operand] instructions.
|
|
func (z *Z80) doHlAdd(operand uint16) {
|
|
// The HL arithmetic instructions are the same as the A ones,
|
|
// just with twice as many bits happening.
|
|
hl := z.hl() //uint16(z.L) | (uint16(z.H) << 8)
|
|
result := uint32(hl) + uint32(operand)
|
|
z.Flags.N = false
|
|
z.Flags.C = result > 0xffff
|
|
z.Flags.H = ((hl&0x0fff)+(operand&0x0fff))&0x1000 > 0
|
|
z.setHl(uint16(result))
|
|
z.updateXYFlags(z.H)
|
|
}
|
|
|
|
// doHlAdc handle ADC HL,[operand] instructions.
|
|
func (z *Z80) doHlAdc(operand uint16) {
|
|
if z.Flags.C {
|
|
operand++
|
|
}
|
|
hl := z.hl()
|
|
result := uint32(hl) + uint32(operand)
|
|
z.Flags.S = (result & 0x8000) != 0
|
|
z.Flags.Z = result&0xffff == 0
|
|
z.Flags.H = (((hl & 0x0fff) + (operand & 0x0fff)) & 0x1000) != 0
|
|
z.Flags.P = ((hl & 0x8000) == (operand & 0x8000)) && (uint16(result&0x8000) != (hl & 0x8000))
|
|
z.Flags.N = false
|
|
z.Flags.C = result > 0xffff
|
|
z.setHl(uint16(result))
|
|
z.updateXYFlags(z.H)
|
|
}
|
|
|
|
// doHlSbc handle SBC HL,[operand] instructions.
|
|
func (z *Z80) doHlSbc(operand uint16) {
|
|
if z.Flags.C {
|
|
operand++
|
|
}
|
|
|
|
hl := z.hl() //uint16(z.L) | (uint16(z.H) << 8)
|
|
result := uint32(hl) - uint32(operand)
|
|
|
|
z.Flags.S = (result & 0x8000) != 0
|
|
z.Flags.Z = result&0xffff == 0
|
|
z.Flags.H = (((hl & 0x0fff) - (operand & 0x0fff)) & 0x1000) != 0
|
|
z.Flags.P = ((hl & 0x8000) != (operand & 0x8000)) && (uint16(result&0x8000) != (hl & 0x8000))
|
|
z.Flags.N = true
|
|
z.Flags.C = result > 0xffff
|
|
|
|
z.setHl(uint16(result))
|
|
|
|
z.updateXYFlags(z.H)
|
|
}
|
|
|
|
func (z *Z80) doIn(port uint16) byte {
|
|
var result = z.core.IORead(port)
|
|
|
|
z.Flags.S = result&0x80 != 0
|
|
z.Flags.Z = result == 0
|
|
z.Flags.H = false
|
|
z.Flags.P = ParityBits[result]
|
|
z.Flags.N = false
|
|
z.updateXYFlags(result)
|
|
return result
|
|
}
|
|
|
|
func (z *Z80) doNeg() {
|
|
// This instruction is defined to not alter the register if it === 0x80.
|
|
a := int8(z.A)
|
|
if z.A != 0x80 {
|
|
// This is a signed operation, so convert A to a signed value.
|
|
z.A = byte(-a)
|
|
}
|
|
z.Flags.S = z.A&0x80 != 0
|
|
z.Flags.Z = z.A == 0
|
|
z.Flags.H = ((-a) & 0x0f) > 0
|
|
z.Flags.P = z.A == 0x80
|
|
z.Flags.N = true
|
|
z.Flags.C = z.A != 0
|
|
z.updateXYFlags(z.A)
|
|
}
|
|
|
|
func (z *Z80) doLdi() {
|
|
// Copy the value that we're supposed to copy.
|
|
readValue := z.core.MemRead(z.hl())
|
|
z.core.MemWrite(z.de(), readValue)
|
|
|
|
z.incDe()
|
|
z.incHl()
|
|
z.decBc()
|
|
|
|
z.Flags.H = false
|
|
z.Flags.P = (z.C | z.B) != 0
|
|
z.Flags.N = false
|
|
z.Flags.Y = ((z.A+readValue)&0x02)>>1 != 0
|
|
z.Flags.X = ((z.A+readValue)&0x08)>>3 != 0
|
|
}
|
|
|
|
func (z *Z80) fhv() byte {
|
|
if z.Flags.H {
|
|
return 1
|
|
}
|
|
return 0
|
|
}
|
|
|
|
func (z *Z80) doCpi() {
|
|
tempCarry := z.Flags.C
|
|
readValue := z.core.MemRead(z.hl())
|
|
z.doCp(readValue)
|
|
|
|
z.Flags.C = tempCarry
|
|
fh := z.fhv()
|
|
z.Flags.Y = ((z.A - readValue - fh) & 0x02) != 0
|
|
z.Flags.X = ((z.A - readValue - fh) & 0x08) != 0
|
|
z.incHl()
|
|
z.decBc()
|
|
z.Flags.P = (z.B | z.C) != 0
|
|
}
|
|
|
|
func (z *Z80) doIni() {
|
|
z.core.MemWrite(z.hl(), z.core.IORead(z.bc()))
|
|
z.incHl()
|
|
z.B = z.doDec(z.B)
|
|
z.Flags.N = true
|
|
}
|
|
|
|
func (z *Z80) doOuti() {
|
|
z.B = z.doDec(z.B)
|
|
z.core.IOWrite(z.bc(), z.core.MemRead(z.hl()))
|
|
z.incHl()
|
|
z.Flags.N = true
|
|
}
|
|
|
|
func (z *Z80) doLdd() {
|
|
z.Flags.N = false
|
|
z.Flags.H = false
|
|
readValue := z.core.MemRead(z.hl())
|
|
z.core.MemWrite(z.de(), readValue)
|
|
z.decDe()
|
|
z.decHl()
|
|
z.decBc()
|
|
z.Flags.P = (z.C | z.B) != 0
|
|
z.Flags.Y = ((z.A + readValue) & 0x02) != 0
|
|
z.Flags.X = ((z.A + readValue) & 0x08) != 0
|
|
}
|
|
|
|
func (z *Z80) doCpd() {
|
|
tempCarry := z.Flags.C
|
|
readValue := z.core.MemRead(z.hl())
|
|
z.doCp(readValue)
|
|
|
|
z.Flags.C = tempCarry
|
|
|
|
fh := z.fhv()
|
|
|
|
z.Flags.Y = ((z.A-readValue-fh)&0x02)>>1 != 0
|
|
z.Flags.X = ((z.A-readValue-fh)&0x08)>>3 != 0
|
|
|
|
z.decHl()
|
|
z.decBc()
|
|
|
|
z.Flags.P = (z.B | z.C) != 0
|
|
}
|
|
|
|
func (z *Z80) doInd() {
|
|
z.core.MemWrite(z.hl(), z.core.IORead(z.bc()))
|
|
z.decHl()
|
|
z.B = z.doDec(z.B)
|
|
z.Flags.N = true
|
|
}
|
|
|
|
func (z *Z80) doOutd() {
|
|
z.B = z.doDec(z.B)
|
|
z.core.IOWrite(z.bc(), z.core.MemRead(z.hl()))
|
|
z.decHl()
|
|
z.Flags.N = true
|
|
}
|
|
|
|
type OpShift func(operand byte) byte
|
|
|
|
func (z *Z80) doRlc(operand byte) byte {
|
|
z.Flags.C = operand&0x80 != 0
|
|
var fc byte = 0
|
|
if z.Flags.C {
|
|
fc = 1
|
|
}
|
|
operand = (operand << 1) | fc
|
|
z.setShiftFlags(operand)
|
|
return operand
|
|
}
|
|
|
|
func (z *Z80) doRrc(operand byte) byte {
|
|
z.Flags.C = operand&1 != 0
|
|
var fc byte = 0
|
|
if z.Flags.C {
|
|
fc = 0x80
|
|
}
|
|
operand = ((operand >> 1) & 0x7f) | fc
|
|
z.setShiftFlags(operand)
|
|
return operand
|
|
}
|
|
|
|
func (z *Z80) doRl(operand byte) byte {
|
|
var fc byte = 0
|
|
if z.Flags.C {
|
|
fc = 1
|
|
}
|
|
z.Flags.C = operand&0x80 != 0
|
|
operand = (operand << 1) | fc
|
|
z.setShiftFlags(operand)
|
|
return operand
|
|
}
|
|
|
|
func (z *Z80) doRr(operand byte) byte {
|
|
var fc byte = 0
|
|
if z.Flags.C {
|
|
fc = 0x80
|
|
}
|
|
z.Flags.C = operand&1 != 0
|
|
operand = ((operand >> 1) & 0x7f) | fc
|
|
z.setShiftFlags(operand)
|
|
return operand
|
|
}
|
|
|
|
func (z *Z80) doSla(operand byte) byte {
|
|
z.Flags.C = operand&0x80 != 0
|
|
operand = operand << 1
|
|
z.setShiftFlags(operand)
|
|
return operand
|
|
}
|
|
|
|
func (z *Z80) doSra(operand byte) byte {
|
|
z.Flags.C = operand&1 != 0
|
|
operand = ((operand >> 1) & 0x7f) | (operand & 0x80)
|
|
z.setShiftFlags(operand)
|
|
return operand
|
|
}
|
|
|
|
func (z *Z80) doSll(operand byte) byte {
|
|
z.Flags.C = operand&0x80 != 0
|
|
operand = (operand << 1) | 1
|
|
z.setShiftFlags(operand)
|
|
return operand
|
|
}
|
|
|
|
func (z *Z80) doSrl(operand byte) byte {
|
|
z.Flags.C = operand&1 != 0
|
|
operand = (operand >> 1) & 0x7f
|
|
z.setShiftFlags(operand)
|
|
z.Flags.S = false
|
|
return operand
|
|
}
|
|
|
|
func (z *Z80) doIxAdd(operand uint16) {
|
|
z.Flags.N = false
|
|
result := uint32(z.IX) + uint32(operand)
|
|
z.Flags.C = result > 0xffff
|
|
z.Flags.H = (((z.IX & 0xfff) + (operand & 0xfff)) & 0x1000) != 0
|
|
|
|
z.updateXYFlags(byte((result & 0xff00) >> 8))
|
|
z.IX = uint16(result & 0xffff)
|
|
}
|
|
|
|
func (z *Z80) setShiftFlags(operand byte) {
|
|
z.Flags.N = false
|
|
z.Flags.H = false
|
|
z.Flags.Z = operand == 0
|
|
z.Flags.P = ParityBits[operand]
|
|
z.Flags.S = (operand & 0x80) != 0
|
|
z.updateXYFlags(operand)
|
|
}
|
|
|
|
// ============== get register pairs
|
|
|
|
func (z *Z80) bc() uint16 {
|
|
return (uint16(z.B) << 8) | uint16(z.C)
|
|
}
|
|
|
|
func (z *Z80) de() uint16 {
|
|
return (uint16(z.D) << 8) | uint16(z.E)
|
|
}
|
|
|
|
func (z *Z80) hl() uint16 {
|
|
return (uint16(z.H) << 8) | uint16(z.L)
|
|
}
|
|
|
|
// ============ helper fn
|
|
|
|
func (z *Z80) incBc() {
|
|
z.setBc(z.bc() + 1)
|
|
}
|
|
|
|
func (z *Z80) decBc() {
|
|
z.setBc(z.bc() - 1)
|
|
}
|
|
|
|
func (z *Z80) incDe() {
|
|
z.setDe(z.de() + 1)
|
|
}
|
|
|
|
func (z *Z80) decDe() {
|
|
z.setDe(z.de() - 1)
|
|
}
|
|
|
|
func (z *Z80) incHl() {
|
|
z.setHl(z.hl() + 1)
|
|
}
|
|
|
|
func (z *Z80) decHl() {
|
|
z.setHl(z.hl() - 1)
|
|
}
|
|
|
|
func (z *Z80) setHl(val uint16) {
|
|
z.L = byte(val & 0xff)
|
|
z.H = byte(val >> 8)
|
|
}
|
|
|
|
func (z *Z80) setDe(val uint16) {
|
|
z.E = byte(val & 0xff)
|
|
z.D = byte(val >> 8)
|
|
}
|
|
|
|
func (z *Z80) setBc(val uint16) {
|
|
z.C = byte(val & 0xff)
|
|
z.B = byte(val >> 8)
|
|
}
|
|
|
|
// incR Increment R at the start of every instruction cycle.
|
|
// The high bit of R is not affected by this increment,
|
|
// it can only be changed using the LD R, A instruction.
|
|
// Note: also a HALT does increment the R register.
|
|
func (z *Z80) incR() {
|
|
z.R = (z.R & 0x80) | (((z.R & 0x7f) + 1) & 0x7f)
|
|
}
|
|
|
|
// getWord Return 16bit value from memory by specified address
|
|
func (z *Z80) getWord(address uint16) uint16 {
|
|
return (uint16(z.core.MemRead(address+1)) << 8) | uint16(z.core.MemRead(address))
|
|
}
|
|
|
|
func (z *Z80) setWord(address uint16, value uint16) {
|
|
z.core.MemWrite(address, byte(value))
|
|
z.core.MemWrite(address+1, byte(value>>8))
|
|
}
|
|
|
|
func (z *Z80) debugOutput() {
|
|
log.Debugf("PC: %04X, AF: %04X, BC: %04X, DE: %04X, HL: %04X, SP: %04X, IX: %04X, IY: %04X, I: %02X, R: %02X",
|
|
z.PC, (uint16(z.A)<<8)|uint16(z.Flags.GetFlags()), z.bc(), z.de(), z.hl(), z.SP, z.IX, z.IY, z.I, z.R)
|
|
|
|
log.Debugf("\t(%02X %02X %02X %02X), cyc: %d\n", z.core.MemRead(z.PC), z.core.MemRead(z.PC+1),
|
|
z.core.MemRead(z.PC+2), z.core.MemRead(z.PC+3), z.CycleCounter)
|
|
}
|