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Init, buffer TX and RX procedures debug complete

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This commit is contained in:
boykovra 2024-07-11 15:41:51 +03:00
parent 2a422f7a39
commit 8d5f374035
5 changed files with 123 additions and 60 deletions
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120
Sources/ESPLib/esplib.asm
View File

@ -48,7 +48,7 @@ LSR_OE EQU 0x02 ; Overrun Error
LSR_PE EQU 0x04 ; Parity Error LSR_PE EQU 0x04 ; Parity Error
LSR_FE EQU 0x08 ; Framing Error LSR_FE EQU 0x08 ; Framing Error
LSR_BI EQU 0x10 ; Break Interrupt LSR_BI EQU 0x10 ; Break Interrupt
LSR_THRE EQU 0x20 ; Transmitter Holding Register LSR_THRE EQU 0x20 ; Transmitter Holding Register Empty
LSR_TEMT EQU 0x40 ; Transmitter empty LSR_TEMT EQU 0x40 ; Transmitter empty
LSR_RCVE EQU 0x80 ; Error in receiver FIFO LSR_RCVE EQU 0x80 ; Error in receiver FIFO
@ -115,12 +115,29 @@ UF_T_FND
; Test slot, A - ISA Slot no. 0 or 1 ; Test slot, A - ISA Slot no. 0 or 1
UT_T_SLOT UT_T_SLOT
; check IER hi bits, will be 0
LD (ISA.ISA_SLOT), A LD (ISA.ISA_SLOT), A
LD HL, REG_IER LD HL, REG_IER
CALL UART_READ CALL UART_READ
AND 0xF0 AND 0xF0
RET NZ
; check SCR register
LD DE,0x5555
CALL CHK_SCR
RET NZ
LD DE,0xAAAA
CALL CHK_SCR
RET RET
CHK_SCR
LD HL, REG_SCR
CALL UART_WRITE
CALL UART_READ
CP D
RET
; ------------------------------------------------------ ; ------------------------------------------------------
; Init UART device TL16C550 ; Init UART device TL16C550
@ -133,13 +150,13 @@ UART_INIT
LD A, FCR_TR8 | FCR_FIFO ; Enable FIFO buffer, trigger to 14 byte LD A, FCR_TR8 | FCR_FIFO ; Enable FIFO buffer, trigger to 14 byte
LD (IX+_FCR),A LD (IX+_FCR),A
XOR A XOR A
LD (IX+_IER), A ; Disable interrupts LD (IX+_IER), A ; Disable interrupts
; Set 8bit word and Divisor for speed ; Set 8bit word and Divisor for speed
LD A, LCR_DLAB | LCR_WL8 LD A, LCR_DLAB | LCR_WL8
LD (IX+_LCR), A ; Enable Baud rate latch LD (IX+_LCR), A ; Enable Baud rate latch
LD A, DIVISOR LD A, DIVISOR
LD (IX+_DLL), A ; 8 - 115200 LD (IX+_DLL), A ; 8 - 115200
XOR A XOR A
LD (IX+_DLM), A LD (IX+_DLM), A
LD A, LCR_WL8 ; 8bit word, disable latch LD A, LCR_WL8 ; 8bit word, disable latch
@ -175,24 +192,29 @@ UART_WRITE
; Out: CF=1 - tr not ready, CF=0 ready ; Out: CF=1 - tr not ready, CF=0 ready
; ------------------------------------------------------ ; ------------------------------------------------------
UART_WAIT_TR UART_WAIT_TR
PUSH AF, BC, HL
CALL ISA.ISA_OPEN CALL ISA.ISA_OPEN
LD BC, 100 CALL UART_WAIT_TR_INT
CALL ISA.ISA_CLOSE
RET
;
; Wait, without open/close ISA
;
UART_WAIT_TR_INT
PUSH AF, BC, HL
LD BC, 500
LD HL, REG_LSR LD HL, REG_LSR
WAIT_TR_BZY WAIT_TR_BZY
LD A,(HL) LD A,(HL)
AND A, LSR_THRE AND A, LSR_THRE
JR NZ,WAIT_TR_RDY JR NZ,WAIT_TR_RDY
CALL UTIL.DELAY_1MS CALL UTIL.DELAY_100uS ; ~11 bit tx delay
DEC BC DEC BC
LD A, C LD A, C
OR B OR B
JR NZ,WAIT_TR_BZY JR NZ,WAIT_TR_BZY
SCF SCF
WAIT_TR_RDY WAIT_TR_RDY
CALL ISA.ISA_CLOSE
POP HL, BC, AF POP HL, BC, AF
RET RET
@ -211,7 +233,7 @@ UTB_NOT_R
RET RET
; ------------------------------------------------------ ; ------------------------------------------------------
; char uart_tx_buffer(char* tbuff, int size) ; Transmit buffer
; Inp: HL -> buffer, BC - size ; Inp: HL -> buffer, BC - size
; Out: CF=0 - Ok, CF=1 - Timeout ; Out: CF=0 - Ok, CF=1 - Timeout
; ------------------------------------------------------ ; ------------------------------------------------------
@ -225,8 +247,8 @@ UTX_NEXT
OR C OR C
JR Z,UTX_EMP JR Z,UTX_EMP
; check transmitter ready ; check transmitter ready
CALL UART_WAIT_TR CALL UART_WAIT_TR_INT
JR C, UTX_EMP JR C, UTX_TXNR
; transmitt byte ; transmitt byte
LD A,(HL) LD A,(HL)
INC HL INC HL
@ -234,22 +256,54 @@ UTX_NEXT
DEC BC DEC BC
JR UTX_NEXT JR UTX_NEXT
; CF=0 ; CF=0
XOR A UTX_EMP
UTX_EMP AND A
UTX_TXNR
CALL ISA.ISA_CLOSE CALL ISA.ISA_CLOSE
POP HL,DE,BC POP HL,DE,BC
RET RET
; ------------------------------------------------------
; Transmit zero ended string
; Inp: HL -> buffer
; Out: CF=0 - Ok, CF=1 - Timeout
; ------------------------------------------------------
UART_TX_STRING
PUSH DE,HL
LD DE, REG_THR
CALL ISA.ISA_OPEN
UTXS_NEXT
LD A,(HL)
AND A
JR Z,UTXS_END
; check transmitter ready
CALL UART_WAIT_TR_INT
JR C, UTXS_TXNR
; transmitt byte
LD A,(HL)
INC HL
LD (DE),A
JR UTXS_NEXT
; CF=0
UTXS_END
AND A
UTXS_TXNR
CALL ISA.ISA_CLOSE
POP HL,DE
RET
; ------------------------------------------------------ ; ------------------------------------------------------
; Empty receiver FIFO buffer ; Empty receiver FIFO buffer
; ------------------------------------------------------ ; ------------------------------------------------------
UART_EMPTY_RS UART_EMPTY_RS
PUSH AF, HL PUSH DE, HL
CALL ISA.ISA_OPEN LD E, FCR_TR8 | FCR_RESET_RX | FCR_FIFO
LD A, FCR_TR8 | FCR_RESET_RX | FCR_FIFO
LD HL, REG_FCR LD HL, REG_FCR
LD (HL), A CALL UART_WRITE
CALL ISA.ISA_CLOSE POP HL, DE
POP HL, AF
RET RET
; ------------------------------------------------------ ; ------------------------------------------------------
@ -259,7 +313,7 @@ UART_EMPTY_RS
; ------------------------------------------------------ ; ------------------------------------------------------
UART_WAIT_RS1 UART_WAIT_RS1
PUSH BC,HL PUSH BC,HL
WAIT_MS+* LD BC,0x0000 WAIT_MS+* LD BC,0x2000
JR UVR_NEXT JR UVR_NEXT
UART_WAIT_RS UART_WAIT_RS
PUSH BC,HL PUSH BC,HL
@ -274,6 +328,11 @@ UVR_NEXT
OR C OR C
JR NZ,UVR_NEXT JR NZ,UVR_NEXT
UVR_TO UVR_TO
IF TRACE
PUSH AF,BC,DE,HL
PRINTLN MSG_RCV_EMPTY
POP HL,DE,BC,AF
ENDIF
SCF SCF
UVR_OK UVR_OK
POP HL,BC POP HL,BC
@ -288,15 +347,14 @@ ESP_RESET
CALL ISA.ISA_OPEN CALL ISA.ISA_OPEN
LD HL, REG_MCR LD HL, REG_MCR
LD A, MCR_RST | MCR_RTS ; 0110b ESP -PGM=1, -RST=0, -RTS=0 LD A, MCR_RST ;| MCR_RTS ; -OUT1=0 -> RESET ESP
LD (HL), A LD (REG_MCR), A
CALL UTIL.DELAY_1MS CALL UTIL.DELAY_1MS
;LD HL, REG_MCR LD A, MCR_AFE | MCR_RTS ; 0x22 -OUT1=1 RTS=1 AutoFlow enabled
LD A, MCR_AFE | MCR_RTS ; 0x22 -RST = 1 -RTS=0 AutoFlow enabled
LD (HL), A LD (HL), A
CALL ISA.ISA_CLOSE CALL ISA.ISA_CLOSE
; wait 2s for ESP firmware boot
LD HL,2000 LD HL,2000
CALL UTIL.DELAY CALL UTIL.DELAY
@ -337,8 +395,8 @@ UART_TX_CMD
CALL UART_EMPTY_RS CALL UART_EMPTY_RS
; HL - Buffer, BC - Size ; HL - Buffer, BC - Size
CALL UTIL.STRLEN ;CALL UTIL.STRLEN
CALL UART_TX_BUFFER CALL UART_TX_STRING
JR NC, UTC_STRT_RX JR NC, UTC_STRT_RX
; error, transmit timeout ; error, transmit timeout
LD A, RES_TX_TIMEOUT LD A, RES_TX_TIMEOUT
@ -413,6 +471,10 @@ UTC_RET
POP HL, DE, BC POP HL, DE, BC
RET RET
IF TRACE
MSG_RCV_EMPTY
DB "Receiver is empty!",0
ENDIF
; Buffer to receive response from ESP ; Buffer to receive response from ESP
RS_BUFF DS RS_BUFF_SIZE, 0 RS_BUFF DS RS_BUFF_SIZE, 0

5
Sources/ESPLib/isa.asm
View File

@ -26,17 +26,14 @@ ISA_RST EQU 0x80
; Reset ISA device ; Reset ISA device
; ------------------------------------------------------ ; ------------------------------------------------------
ISA_RESET ISA_RESET
PUSH AF,BC,HL
LD BC, PORT_ISA LD BC, PORT_ISA
LD A,ISA_RST | ISA_AEN ; RESET=1 AEN=1 LD A,ISA_RST | ISA_AEN ; RESET=1 AEN=1
OUT (C), A OUT (C), A
CALL UTIL.DELAY_1MS CALL UTIL.DELAY_1MS
XOR A XOR A
OUT (C), A ; RESET=0 AEN=0 OUT (C), A ; RESET=0 AEN=0
LD HL,20 LD HL,100
CALL UTIL.DELAY CALL UTIL.DELAY
POP HL,BC,AF
RET RET
; ------------------------------------------------------ ; ------------------------------------------------------

17
Sources/ESPLib/util.asm
View File

@ -15,7 +15,7 @@ DELAY
LD HL,20 LD HL,20
DELAY_NXT DELAY_NXT
CALL SUB_DELAY CALL DELAY_1MS_INT
DEC HL DEC HL
LD A,H LD A,H
OR L OR L
@ -24,7 +24,9 @@ DELAY_NXT
POP HL,BC,AF POP HL,BC,AF
RET RET
SUB_DELAY
DELAY_1MS_INT
LD BC,400 LD BC,400
SBD_NXT SBD_NXT
DEC BC DEC BC
@ -36,13 +38,20 @@ SBD_NXT
; TODO: Do it with timer
DELAY_1MS DELAY_1MS
PUSH BC PUSH BC
CALL SUB_DELAY CALL DELAY_1MS_INT
POP BC POP BC
RET RET
DELAY_100uS
PUSH BC
LD BC,40
CALL SBD_NXT
POP BC
RET
; ------------------------------------------------------ ; ------------------------------------------------------
; Calc length of zero ended string ; Calc length of zero ended string
; Inp: HL - pointer to string ; Inp: HL - pointer to string

2
Sources/ESPLib/wcommon.asm
View File

@ -190,7 +190,7 @@ CMD_SET_SPEED
DB "AT+UART_CUR=115200,8,1,0,3\r\n",0 DB "AT+UART_CUR=115200,8,1,0,3\r\n",0
CMD_ECHO_OFF CMD_ECHO_OFF
DB "ATE0\r\n",0 DB "ATE0\r\n",0
CMD_STATION_MODE CMD_STATION_MODE
DB "AT+CWMODE=1\r\n",0 DB "AT+CWMODE=1\r\n",0
CMD_NO_SLEEP CMD_NO_SLEEP
DB "AT+SLEEP=0\r\n",0 DB "AT+SLEEP=0\r\n",0

39
Sources/ESPLib/wterm.asm
View File

@ -6,7 +6,7 @@
; Set to 1 to turn debug ON with DeZog VSCode plugin ; Set to 1 to turn debug ON with DeZog VSCode plugin
; Set to 0 to compile .EXE ; Set to 0 to compile .EXE
DEBUG EQU 1 DEBUG EQU 0
; Set to 1 to output TRACE messages ; Set to 1 to output TRACE messages
TRACE EQU 1 TRACE EQU 1
@ -75,30 +75,25 @@ START
PRINTLN WCOMMON.MSG_ESP_RESET PRINTLN WCOMMON.MSG_ESP_RESET
CALL WIFI.ESP_RESET CALL WIFI.ESP_RESET
CALL WIFI.UART_EMPTY_RS
LD HL,REG_SCR ; IF TRACE
LD E,0x55 ; ; Dump, DLB=0 registers
CALL WIFI.UART_WRITE ; LD BC, 0x0800
; CALL DUMP_REGS
LD E, FCR_TR8 | FCR_FIFO
LD HL, REG_FCR
CALL WIFI.UART_WRITE
; Debug, dump all registers ; ; Dump, DLAB=1 registers
LD BC, 0x0800 ; LD HL, REG_LCR
CALL DUMP_REGS ; LD E, LCR_DLAB | LCR_WL8
; CALL WIFI.UART_WRITE
; LD BC, 0x0210
; CALL DUMP_REGS
; Dump, page2 ; LD HL, REG_LCR
LD HL, REG_LCR ; LD E, LCR_WL8
LD E, LCR_DLAB | LCR_WL8 ; CALL WIFI.UART_WRITE
CALL WIFI.UART_WRITE ; ENDIF
LD BC, 0x0310
CALL DUMP_REGS
LD HL, REG_LCR
LD E, LCR_WL8
CALL WIFI.UART_WRITE
; Turn local echo Off ; Turn local echo Off
CALL WCOMMON.INIT_ESP CALL WCOMMON.INIT_ESP