Migrated to EPM7128

This commit is contained in:
Roman Boykov 2024-02-14 15:03:54 +03:00
parent 5575050ecd
commit 48f31950f0
4 changed files with 15 additions and 15 deletions

9
.gitignore vendored
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@ -3,5 +3,14 @@
*.smsg
*.summary
*.done
*.vo
*.xdo
*.xrf
*.cdf
*.jdi
*.pin
db/
incremental_db/
Firmware/simulation/
Firmware/db/
Firmware/incremental_db/

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@ -36,8 +36,8 @@
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY MAX3000A
set_global_assignment -name DEVICE "EPM3128ATC100-10"
set_global_assignment -name FAMILY MAX7000S
set_global_assignment -name DEVICE "EPM7128STC100-10"
set_global_assignment -name TOP_LEVEL_ENTITY SprinterJoy
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:52:46 APRIL 04, 2022"
@ -45,14 +45,13 @@ set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 10
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
set_global_assignment -name SYSTEMVERILOG_FILE SprinterJoy.sv
set_global_assignment -name MAX7000_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name MAX7000_DEVICE_IO_STANDARD TTL
set_location_assignment PIN_92 -to a[0]
set_location_assignment PIN_93 -to a[1]
set_location_assignment PIN_94 -to a[2]
@ -65,14 +64,6 @@ set_location_assignment PIN_1 -to a[8]
set_location_assignment PIN_2 -to a[9]
set_location_assignment PIN_5 -to a[10]
set_location_assignment PIN_6 -to a[11]
set_location_assignment PIN_4 -to TDI
set_location_assignment PIN_62 -to TCK
set_location_assignment PIN_73 -to TDO
set_location_assignment PIN_15 -to TMS
set_location_assignment PIN_7 -to a[12]
set_location_assignment PIN_8 -to a[13]
set_location_assignment PIN_9 -to a[14]
set_location_assignment PIN_10 -to a[15]
set_location_assignment PIN_90 -to clk14
set_location_assignment PIN_87 -to clk50
set_location_assignment PIN_12 -to d[0]
@ -89,9 +80,9 @@ set_global_assignment -name SYSTEMVERILOG_FILE ClockGenerator.sv
set_global_assignment -name SYSTEMVERILOG_FILE SegaJoy.sv
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_location_assignment PIN_36 -to sj1[5]
set_location_assignment PIN_35 -to sj1[5]
set_location_assignment PIN_29 -to sj1[4]
set_location_assignment PIN_35 -to sj1[3]
set_location_assignment PIN_76 -to sj1[3]
set_location_assignment PIN_32 -to sj1[2]
set_location_assignment PIN_30 -to sj1[1]
set_location_assignment PIN_28 -to sj1[0]

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Firmware/SprinterJoy.qws Normal file

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@ -11,7 +11,7 @@ module SprinterJoy (
input wire reset, // ISA RESET
input wire ior_n, // ISA -IOR
input wire [15:0] a, // ISA A0-A15
input wire [11:0] a, // ISA A0-A15
inout wire [7:0] d, // ISA D0-D7
input wire [5:0] sj1, // Sega Joystick 1