Initial for master

This commit is contained in:
Roman Boykov 2024-01-29 22:49:58 +03:00
parent 8b2474bd18
commit b5da88ed68
33 changed files with 26316 additions and 674 deletions

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*.bak
*.rpt
*.smsg
*.summary
*.done
db/
incremental_db/

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/*
* Делитель частоты для формирования сигнала опроса джойстика Sega
*/
module ClockGenerator (
input wire clk, // Input clock
input wire reset,
output reg sj_clk // Clock for sega joystick
);
reg [6:0] clk_ctr;
localparam [6:0] divisor = 120;
//assign sj_clk = clk_ctr[7];
always_ff @ (posedge clk, posedge reset)
if (reset) begin
clk_ctr <= 7'h00;
sj_clk <= 1'b0;
end
else begin
if (clk_ctr == divisor) begin
clk_ctr <= 7'h00;
sj_clk <= !sj_clk;
end
else clk_ctr <= clk_ctr + 1'b1;
end
endmodule

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SprinterJoy
------------
Исходные коды прошивки для CPLD EPM3128.
Проект для Quartus II v13.0.1 Web Edition.

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/*
* Модуль опроса джойстиков
*/
module SegaJoy(
input reg clk,
input wire reset,
output reg sel1,
output reg sel2,
input wire [5:0] sj1,
input wire [5:0] sj2,
output reg [11:0] status1,
output reg [11:0] status2,
output reg [1:0] sj_type1,
output reg [1:0] sj_type2
);
localparam [7:0] divisor = 180;
reg [7:0] cycle;
reg [5:0] s0;
reg [5:0] s1;
reg [5:0] s4;
reg [5:0] s5;
reg [5:0] s6;
reg [11:0] combo;
always_ff @ (posedge clk, posedge reset)
if (reset) begin
cycle <= 8'h00;
sel1 <= 1'b0;
sel2 <= 1'b0;
status1 <= 12'h000;
status2 <= 12'h000;
end else begin
case (cycle)
// JOY 1
0: sel1 <= 0;
1: s0 <= sj1;
2: sel1 <= 1;
3: s1 <= sj1;
4: sel1 <= 0;
//8: s2 <= sj1;
6: sel1 <= 1;
//11: s3 <= sj1;
8: sel1 <= 0;
9: s4 <= sj1;
10: sel1 <= 1;
11: s5 <= sj1;
12: sel1 <= 0;
13: s6 <= sj1;
14: begin
//sj_dbg <= s4;
combo <= ~({s5[3:0], s0[5:4], s1});
if (s4[1:0] == 2'b00 && s6[3:0] == 4'b1111) sj_type1 <= 2'b10;
else if (s6[3:2] == 2'b00) sj_type1 <= 2'b01;
else sj_type1 <= 2'b00;
end
15:
/* Все значения получены, фиксируем результаты */
case (sj_type1)
2'b10: status1 <= combo;
2'b01: status1 <= {4'b0000, combo[7:0]};
default:
status1 <= {6'b000000, combo[5:0]};
endcase
// JOY 2
16: sel2 <= 0;
17: s0 <= sj2;
18: sel2 <= 1;
19: s1 <= sj2;
20: sel2 <= 0;
//8: s2 <= sj2;
22: sel2 <= 1;
//11: s3 <= sj2;
24: sel2 <= 0;
25: s4 <= sj2;
26: sel2 <= 1;
27: s5 <= sj2;
28: sel2 <= 0;
29: s6 <= sj2;
30: begin
//sj_dbg <= s4;
combo <= ~({s5[3:0], s0[5:4], s1});
if (s4[1:0] == 2'b00 && s6[3:0] == 4'b1111) sj_type2 <= 2'b10;
else if (s6[3:2] == 2'b00) sj_type2 <= 2'b01;
else sj_type2 <= 2'b00;
end
31:
/* Все значения получены, фиксируем результаты */
case (sj_type2)
2'b10: status2 <= combo;
2'b01: status2 <= {4'b0000, combo[7:0]};
default:
status2 <= {6'b000000, combo[5:0]};
endcase
endcase
if (cycle == divisor) cycle <= 8'hff;
else cycle <= cycle + 1'b1;
end
endmodule

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<?xml version="1.0" encoding="UTF-8"?>
<pin_planner>
<pin_info>
<pin name="sj[0]" source="Pin Planner" >
</pin>
<pin name="sj[1]" source="Pin Planner" >
</pin>
<pin name="sj[2]" source="Pin Planner" >
</pin>
<pin name="sj[3]" source="Pin Planner" >
</pin>
<pin name="sj[4]" source="Pin Planner" >
</pin>
<pin name="sj[5]" source="Pin Planner" >
</pin>
<pin name="sj_sel" source="Pin Planner" >
</pin>
</pin_info>
<buses>
</buses>
<group_file_association>
</group_file_association>
<pin_planner_file_specifies>
</pin_planner_file_specifies>
</pin_planner>

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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 32-bit
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
# Date created = 17:48:02 January 19, 2023
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "13.0"
DATE = "17:48:02 January 19, 2023"
# Revisions
PROJECT_REVISION = "SprinterJoy"

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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 32-bit
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
# Date created = 17:52:46 April 04, 2022
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# SprinterJoy_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY MAX3000A
set_global_assignment -name DEVICE "EPM3128ATC100-10"
set_global_assignment -name TOP_LEVEL_ENTITY SprinterJoy
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:52:46 APRIL 04, 2022"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 10
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
set_global_assignment -name SYSTEMVERILOG_FILE SprinterJoy.sv
set_global_assignment -name MAX7000_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_location_assignment PIN_92 -to a[0]
set_location_assignment PIN_93 -to a[1]
set_location_assignment PIN_94 -to a[2]
set_location_assignment PIN_96 -to a[3]
set_location_assignment PIN_97 -to a[4]
set_location_assignment PIN_98 -to a[5]
set_location_assignment PIN_99 -to a[6]
set_location_assignment PIN_100 -to a[7]
set_location_assignment PIN_1 -to a[8]
set_location_assignment PIN_2 -to a[9]
set_location_assignment PIN_5 -to a[10]
set_location_assignment PIN_6 -to a[11]
set_location_assignment PIN_4 -to TDI
set_location_assignment PIN_62 -to TCK
set_location_assignment PIN_73 -to TDO
set_location_assignment PIN_15 -to TMS
set_location_assignment PIN_7 -to a[12]
set_location_assignment PIN_8 -to a[13]
set_location_assignment PIN_9 -to a[14]
set_location_assignment PIN_10 -to a[15]
set_location_assignment PIN_90 -to clk14
set_location_assignment PIN_87 -to clk50
set_location_assignment PIN_12 -to d[0]
set_location_assignment PIN_13 -to d[1]
set_location_assignment PIN_14 -to d[2]
set_location_assignment PIN_16 -to d[3]
set_location_assignment PIN_17 -to d[4]
set_location_assignment PIN_19 -to d[5]
set_location_assignment PIN_20 -to d[6]
set_location_assignment PIN_21 -to d[7]
set_location_assignment PIN_24 -to ior_n
set_location_assignment PIN_89 -to reset
set_global_assignment -name SYSTEMVERILOG_FILE ClockGenerator.sv
set_global_assignment -name SYSTEMVERILOG_FILE SegaJoy.sv
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_location_assignment PIN_36 -to sj1[5]
set_location_assignment PIN_29 -to sj1[4]
set_location_assignment PIN_35 -to sj1[3]
set_location_assignment PIN_32 -to sj1[2]
set_location_assignment PIN_30 -to sj1[1]
set_location_assignment PIN_28 -to sj1[0]
set_location_assignment PIN_31 -to sj1_sel
set_location_assignment PIN_50 -to sj2[5]
set_location_assignment PIN_45 -to sj2[4]
set_location_assignment PIN_49 -to sj2[3]
set_location_assignment PIN_48 -to sj2[2]
set_location_assignment PIN_46 -to sj2[1]
set_location_assignment PIN_44 -to sj2[0]
set_location_assignment PIN_47 -to sj2_sel

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{ "" "" "" "*" { } { } 0 20028 "" 0 0 "Quartus II" 0 -1 0 ""}
{ "" "" "" "*" { } { } 0 335095 "" 0 0 "Quartus II" 0 -1 0 ""}

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//
// Sprinter
// Интерфейс Sega-джойстиков для ISA шины
//
module SprinterJoy (
// Сигналы шины ISA
input wire clk14, // 14MHz ISA Clock
input wire clk50, // 50MHz Oscillator Clock
input wire reset, // ISA RESET
input wire ior_n, // ISA -IOR
input wire [15:0] a, // ISA A0-A15
inout wire [7:0] d, // ISA D0-D7
input wire [5:0] sj1, // Sega Joystick 1
// 0 - UP
// 1 - DN
// 2 - LT
// 3 - RT
// 4 - B
// 5 - C
output wire sj1_sel, // Sega Joystick SEL sygnal
input wire [5:0] sj2, // Sega Joystick 2
output wire sj2_sel // Sega Joystick 2 SEL sygnal
);
reg [11:0] sj1_status;
reg [1:0] sj1_type;
reg [11:0] sj2_status;
reg [1:0] sj2_type;
//reg [5:0] sj_dbg;
reg [7:0] d_out; // выходные данные
assign d[7:0] = (port_r) ? d_out : 8'hzz;
reg sj_clk;
reg port_r;
ClockGenerator clockGenerator(
.clk(clk50),
.reset(reset),
.sj_clk(sj_clk)
);
SegaJoy segaJoy(
.clk(sj_clk),
.reset(reset),
.sel1(sj1_sel),
.sel2(sj2_sel),
.sj1(sj1),
.sj2(sj2),
.status1(sj1_status),
.status2(sj2_status),
.sj_type1(sj1_type),
.sj_type2(sj2_type)
);
always_ff @ (posedge clk14, posedge reset)
if (reset) begin
port_r <= 0;
end else begin
if (a[11:2] == 10'b0010010100) begin // Выбран порт 0x250..0x253
port_r <= !ior_n;
if (port_r) begin
case (a[1:0])
//2'b00: d_out <= 8'h5D; // Порт 250 - 'SD' = Sega Joy, для детекта карты
2'b00: d_out <= sj1_status[7:0]; // Порт 250 - Младший байт состояния кнопок
2'b01: d_out <= {sj1_type, 2'b00, sj1_status[11:8]}; // Порт 251 - Старший байт состояния кнопок (биты 7 и 6 - тип джойстика)
2'b10: d_out <= sj2_status[7:0]; // Порт 252 - Младший байт состояния кнопок
2'b11: d_out <= {sj2_type, 2'b00, sj2_status[11:8]}; // Порт 253 - Старший байт состояния кнопок (биты 7 и 6 - тип джойстика)
//default:
// d_out <= 8'h00;
endcase;
end;
end else begin
port_r <= 0;
end
end
endmodule

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/* Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition */
JedecChain;
FileRevision(JESD32A);
DefaultMfr(6E);
P ActionCode(Cfg)
Device PartName(EPM3128AT100) Path("/home/roma/projects/hobby/PC/Sprinter/SprinterJoy/Firmware/output_files/") File("SprinterJoy.pof") MfrSpec(OpMask(7));
ChainEnd;
AlteraBegin;
ChainType(JTAG);
AlteraEnd;

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<sld_project_info>
<project>
<hash md5_digest_80b="5c54dd77ebe72cc6ded9"/>
</project>
<file_info>
<file device="EPM3128ATC100-10" path="SprinterJoy.sof" usercode="0x00000000"/>
</file_info>
</sld_project_info>

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-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files from any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--
-- This is a Quartus II output file. It is for reporting purposes only, and is
-- not intended for use as a Quartus II input file. This file cannot be used
-- to make Quartus II pin assignments - for instructions on how to make pin
-- assignments, please see Quartus II help.
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
-- NC : No Connect. This pin has no internal connection to the device.
-- DNU : Do Not Use. This pin MUST NOT be connected.
-- VCCINT : Dedicated power pin, which MUST be connected to VCC (3.3V).
-- VCCIO : Dedicated power pin, which MUST be connected to VCC
-- of its bank.
-- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND.
-- It can also be used to report unused dedicated pins. The connection
-- on the board for unused dedicated pins depends on whether this will
-- be used in a future design. One example is device migration. When
-- using device migration, refer to the device pin-tables. If it is a
-- GND pin in the pin table or if it will not be used in a future design
-- for another purpose the it MUST be connected to GND. If it is an unused
-- dedicated pin, then it can be connected to a valid signal on the board
-- (low, high, or toggling) if that signal is required for a different
-- revision of the design.
-- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins.
-- This pin should be connected to GND. It may also be connected to a
-- valid signal on the board (low, high, or toggling) if that signal
-- is required for a different revision of the design.
-- GND* : Unused I/O pin. Connect each pin marked GND* directly to GND
-- or leave it unconnected.
-- RESERVED : Unused I/O pin, which MUST be left unconnected.
-- RESERVED_INPUT : Pin is tri-stated and should be connected to the board.
-- RESERVED_INPUT_WITH_WEAK_PULLUP : Pin is tri-stated with internal weak pull-up resistor.
-- RESERVED_INPUT_WITH_BUS_HOLD : Pin is tri-stated with bus-hold circuitry.
-- RESERVED_OUTPUT_DRIVEN_HIGH : Pin is output driven high.
-- NON_MIGRATABLE: This pin cannot be migrated.
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
-- Pin directions (input, output or bidir) are based on device operating in user mode.
---------------------------------------------------------------------------------
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
CHIP "SprinterJoy" ASSIGNED TO AN: EPM3128ATC100-10
Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
-------------------------------------------------------------------------------------------------------------
a[8] : 1 : input : 3.3-V LVTTL : : : Y
a[9] : 2 : input : 3.3-V LVTTL : : : Y
VCCIO : 3 : power : : 3.3V : :
TDI : 4 : input : 3.3-V LVTTL : : : Y
a[10] : 5 : input : 3.3-V LVTTL : : : Y
a[11] : 6 : input : 3.3-V LVTTL : : : Y
a[12] : 7 : input : 3.3-V LVTTL : : : Y
a[13] : 8 : input : 3.3-V LVTTL : : : Y
a[14] : 9 : input : 3.3-V LVTTL : : : Y
a[15] : 10 : input : 3.3-V LVTTL : : : Y
GND : 11 : gnd : : : :
d[0] : 12 : bidir : 3.3-V LVTTL : : : Y
d[1] : 13 : bidir : 3.3-V LVTTL : : : Y
d[2] : 14 : bidir : 3.3-V LVTTL : : : Y
TMS : 15 : input : 3.3-V LVTTL : : : Y
d[3] : 16 : bidir : 3.3-V LVTTL : : : Y
d[4] : 17 : bidir : 3.3-V LVTTL : : : Y
VCCIO : 18 : power : : 3.3V : :
d[5] : 19 : bidir : 3.3-V LVTTL : : : Y
d[6] : 20 : bidir : 3.3-V LVTTL : : : Y
d[7] : 21 : bidir : 3.3-V LVTTL : : : Y
RESERVED_INPUT : 22 : : : : :
RESERVED_INPUT : 23 : : : : :
ior_n : 24 : input : 3.3-V LVTTL : : : Y
RESERVED_INPUT : 25 : : : : :
GND : 26 : gnd : : : :
RESERVED_INPUT : 27 : : : : :
sj1[0] : 28 : input : 3.3-V LVTTL : : : Y
sj1[4] : 29 : input : 3.3-V LVTTL : : : Y
sj1[1] : 30 : input : 3.3-V LVTTL : : : Y
sj1_sel : 31 : output : 3.3-V LVTTL : : : Y
sj1[2] : 32 : input : 3.3-V LVTTL : : : Y
GND : 33 : gnd : : : :
VCCIO : 34 : power : : 3.3V : :
sj1[3] : 35 : input : 3.3-V LVTTL : : : Y
sj1[5] : 36 : input : 3.3-V LVTTL : : : Y
RESERVED_INPUT : 37 : : : : :
GND : 38 : gnd : : : :
VCCINT : 39 : power : : 3.3V : :
RESERVED_INPUT : 40 : : : : :
RESERVED_INPUT : 41 : : : : :
RESERVED_INPUT : 42 : : : : :
GND : 43 : gnd : : : :
sj2[0] : 44 : input : 3.3-V LVTTL : : : Y
sj2[4] : 45 : input : 3.3-V LVTTL : : : Y
sj2[1] : 46 : input : 3.3-V LVTTL : : : Y
sj2_sel : 47 : output : 3.3-V LVTTL : : : Y
sj2[2] : 48 : input : 3.3-V LVTTL : : : Y
sj2[3] : 49 : input : 3.3-V LVTTL : : : Y
sj2[5] : 50 : input : 3.3-V LVTTL : : : Y
VCCIO : 51 : power : : 3.3V : :
RESERVED_INPUT : 52 : : : : :
GND : 53 : gnd : : : :
RESERVED_INPUT : 54 : : : : :
RESERVED_INPUT : 55 : : : : :
RESERVED_INPUT : 56 : : : : :
RESERVED_INPUT : 57 : : : : :
RESERVED_INPUT : 58 : : : : :
GND : 59 : gnd : : : :
RESERVED_INPUT : 60 : : : : :
RESERVED_INPUT : 61 : : : : :
TCK : 62 : input : 3.3-V LVTTL : : : Y
RESERVED_INPUT : 63 : : : : :
RESERVED_INPUT : 64 : : : : :
GND : 65 : gnd : : : :
VCCIO : 66 : power : : 3.3V : :
RESERVED_INPUT : 67 : : : : :
RESERVED_INPUT : 68 : : : : :
RESERVED_INPUT : 69 : : : : :
RESERVED_INPUT : 70 : : : : :
RESERVED_INPUT : 71 : : : : :
RESERVED_INPUT : 72 : : : : :
TDO : 73 : output : 3.3-V LVTTL : : : Y
GND : 74 : gnd : : : :
RESERVED_INPUT : 75 : : : : :
RESERVED_INPUT : 76 : : : : :
RESERVED_INPUT : 77 : : : : :
GND : 78 : gnd : : : :
RESERVED_INPUT : 79 : : : : :
RESERVED_INPUT : 80 : : : : :
RESERVED_INPUT : 81 : : : : :
VCCIO : 82 : power : : 3.3V : :
RESERVED_INPUT : 83 : : : : :
RESERVED_INPUT : 84 : : : : :
RESERVED_INPUT : 85 : : : : :
GND : 86 : gnd : : : :
clk50 : 87 : input : 3.3-V LVTTL : : : Y
GND+ : 88 : : : : :
reset : 89 : input : 3.3-V LVTTL : : : Y
clk14 : 90 : input : 3.3-V LVTTL : : : Y
VCCINT : 91 : power : : 3.3V : :
a[0] : 92 : input : 3.3-V LVTTL : : : Y
a[1] : 93 : input : 3.3-V LVTTL : : : Y
a[2] : 94 : input : 3.3-V LVTTL : : : Y
GND : 95 : gnd : : : :
a[3] : 96 : input : 3.3-V LVTTL : : : Y
a[4] : 97 : input : 3.3-V LVTTL : : : Y
a[5] : 98 : input : 3.3-V LVTTL : : : Y
a[6] : 99 : input : 3.3-V LVTTL : : : Y
a[7] : 100 : input : 3.3-V LVTTL : : : Y

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set tool_name "ModelSim-Altera (Verilog)"
set corner_file_list {
{{"Slow Model"} {SprinterJoy.vo SprinterJoy_v.sdo}}
}

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vendor_name = ModelSim
source_file = 1, /home/roma/projects/hobby/PC/Sprinter/SprinterJoy2/Firmware/SprinterJoy.sv
source_file = 1, /home/roma/projects/hobby/PC/Sprinter/SprinterJoy2/Firmware/ClockGenerator.sv
source_file = 1, /home/roma/projects/hobby/PC/Sprinter/SprinterJoy2/Firmware/SegaJoy.sv
source_file = 1, /home/roma/projects/hobby/PC/Sprinter/SprinterJoy2/Firmware/db/SprinterJoy.cbx.xml
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/lpm_add_sub.tdf
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/addcore.inc
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/look_add.inc
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/bypassff.inc
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/altshift.inc
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/alt_stratix_add_sub.inc
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/aglobal130.inc
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/cbx.lst
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/addcore.tdf
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/a_csnbuffer.inc
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/a_csnbuffer.tdf
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/look_add.tdf
source_file = 1, /home/roma/soft/Quartus_13.sp1/quartus/libraries/megafunctions/altshift.tdf
design_name = SprinterJoy
instance = comp, \clk50~I , clk50, SprinterJoy, 1
instance = comp, \reset~I , reset, SprinterJoy, 1
instance = comp, \clockGenerator|clk_ctr[3] , clockGenerator|clk_ctr[3], SprinterJoy, 1
instance = comp, \clockGenerator|clk_ctr[4] , clockGenerator|clk_ctr[4], SprinterJoy, 1
instance = comp, \clockGenerator|clk_ctr[0] , clockGenerator|clk_ctr[0], SprinterJoy, 1
instance = comp, \clockGenerator|clk_ctr[1] , clockGenerator|clk_ctr[1], SprinterJoy, 1
instance = comp, \clockGenerator|clk_ctr[2] , clockGenerator|clk_ctr[2], SprinterJoy, 1
instance = comp, \clockGenerator|clk_ctr[5] , clockGenerator|clk_ctr[5], SprinterJoy, 1
instance = comp, \clockGenerator|clk_ctr[6] , clockGenerator|clk_ctr[6], SprinterJoy, 1
instance = comp, \clockGenerator|sj_clk , clockGenerator|sj_clk, SprinterJoy, 1
instance = comp, \segaJoy|cycle[0] , segaJoy|cycle[0], SprinterJoy, 1
instance = comp, \segaJoy|cycle[1] , segaJoy|cycle[1], SprinterJoy, 1
instance = comp, \segaJoy|cycle[2] , segaJoy|cycle[2], SprinterJoy, 1
instance = comp, \segaJoy|cycle[4] , segaJoy|cycle[4], SprinterJoy, 1
instance = comp, \segaJoy|cycle[5] , segaJoy|cycle[5], SprinterJoy, 1
instance = comp, \segaJoy|cycle[6] , segaJoy|cycle[6], SprinterJoy, 1
instance = comp, \segaJoy|cycle[7] , segaJoy|cycle[7], SprinterJoy, 1
instance = comp, \segaJoy|cycle[3] , segaJoy|cycle[3], SprinterJoy, 1
instance = comp, \segaJoy|sel1 , segaJoy|sel1, SprinterJoy, 1
instance = comp, \segaJoy|sel2 , segaJoy|sel2, SprinterJoy, 1
instance = comp, \clk14~I , clk14, SprinterJoy, 1
instance = comp, \a[0]~I , a[0], SprinterJoy, 1
instance = comp, \a[1]~I , a[1], SprinterJoy, 1
instance = comp, \sj2[4]~I , sj2[4], SprinterJoy, 1
instance = comp, \sj1[4]~I , sj1[4], SprinterJoy, 1
instance = comp, \segaJoy|s1[4] , segaJoy|s1[4], SprinterJoy, 1
instance = comp, \segaJoy|combo[4] , segaJoy|combo[4], SprinterJoy, 1
instance = comp, \segaJoy|status2[4] , segaJoy|status2[4], SprinterJoy, 1
instance = comp, \segaJoy|status1[4] , segaJoy|status1[4], SprinterJoy, 1
instance = comp, \ior_n~I , ior_n, SprinterJoy, 1
instance = comp, \a[2]~I , a[2], SprinterJoy, 1
instance = comp, \a[3]~I , a[3], SprinterJoy, 1
instance = comp, \a[4]~I , a[4], SprinterJoy, 1
instance = comp, \a[5]~I , a[5], SprinterJoy, 1
instance = comp, \a[6]~I , a[6], SprinterJoy, 1
instance = comp, \a[7]~I , a[7], SprinterJoy, 1
instance = comp, \a[8]~I , a[8], SprinterJoy, 1
instance = comp, \a[9]~I , a[9], SprinterJoy, 1
instance = comp, \a[10]~I , a[10], SprinterJoy, 1
instance = comp, \a[11]~I , a[11], SprinterJoy, 1
instance = comp, \d_out[4] , d_out[4], SprinterJoy, 1
instance = comp, \sj2[5]~I , sj2[5], SprinterJoy, 1
instance = comp, \sj1[5]~I , sj1[5], SprinterJoy, 1
instance = comp, \segaJoy|s1[5] , segaJoy|s1[5], SprinterJoy, 1
instance = comp, \segaJoy|combo[5] , segaJoy|combo[5], SprinterJoy, 1
instance = comp, \segaJoy|status2[5] , segaJoy|status2[5], SprinterJoy, 1
instance = comp, \segaJoy|status1[5] , segaJoy|status1[5], SprinterJoy, 1
instance = comp, \d_out[5] , d_out[5], SprinterJoy, 1
instance = comp, \sj2[0]~I , sj2[0], SprinterJoy, 1
instance = comp, \sj1[0]~I , sj1[0], SprinterJoy, 1
instance = comp, \segaJoy|s1[0] , segaJoy|s1[0], SprinterJoy, 1
instance = comp, \segaJoy|combo[0] , segaJoy|combo[0], SprinterJoy, 1
instance = comp, \segaJoy|status1[0] , segaJoy|status1[0], SprinterJoy, 1
instance = comp, \segaJoy|status2[0] , segaJoy|status2[0], SprinterJoy, 1
instance = comp, \segaJoy|s5[0] , segaJoy|s5[0], SprinterJoy, 1
instance = comp, \segaJoy|combo[8] , segaJoy|combo[8], SprinterJoy, 1
instance = comp, \sj2[3]~I , sj2[3], SprinterJoy, 1
instance = comp, \sj1[3]~I , sj1[3], SprinterJoy, 1
instance = comp, \segaJoy|s6[3] , segaJoy|s6[3], SprinterJoy, 1
instance = comp, \sj2[2]~I , sj2[2], SprinterJoy, 1
instance = comp, \sj1[2]~I , sj1[2], SprinterJoy, 1
instance = comp, \segaJoy|s6[2] , segaJoy|s6[2], SprinterJoy, 1
instance = comp, \sj2[1]~I , sj2[1], SprinterJoy, 1
instance = comp, \sj1[1]~I , sj1[1], SprinterJoy, 1
instance = comp, \segaJoy|s6[1] , segaJoy|s6[1], SprinterJoy, 1
instance = comp, \segaJoy|s6[0] , segaJoy|s6[0], SprinterJoy, 1
instance = comp, \segaJoy|s4[1] , segaJoy|s4[1], SprinterJoy, 1
instance = comp, \segaJoy|s4[0] , segaJoy|s4[0], SprinterJoy, 1
instance = comp, \segaJoy|sj_type2[1]~21 , segaJoy|sj_type2[1]~21, SprinterJoy, 1
instance = comp, \segaJoy|sj_type2[1] , segaJoy|sj_type2[1], SprinterJoy, 1
instance = comp, \segaJoy|sj_type2[0] , segaJoy|sj_type2[0], SprinterJoy, 1
instance = comp, \segaJoy|status2[8]~127 , segaJoy|status2[8]~127, SprinterJoy, 1
instance = comp, \segaJoy|status2[8] , segaJoy|status2[8], SprinterJoy, 1
instance = comp, \segaJoy|sj_type1[0] , segaJoy|sj_type1[0], SprinterJoy, 1
instance = comp, \segaJoy|sj_type1[1]~20 , segaJoy|sj_type1[1]~20, SprinterJoy, 1
instance = comp, \segaJoy|sj_type1[1] , segaJoy|sj_type1[1], SprinterJoy, 1
instance = comp, \segaJoy|status1[8]~127 , segaJoy|status1[8]~127, SprinterJoy, 1
instance = comp, \segaJoy|status1[8] , segaJoy|status1[8], SprinterJoy, 1
instance = comp, \d_out[0] , d_out[0], SprinterJoy, 1
instance = comp, \segaJoy|s1[1] , segaJoy|s1[1], SprinterJoy, 1
instance = comp, \segaJoy|combo[1] , segaJoy|combo[1], SprinterJoy, 1
instance = comp, \segaJoy|status1[1] , segaJoy|status1[1], SprinterJoy, 1
instance = comp, \segaJoy|status2[1] , segaJoy|status2[1], SprinterJoy, 1
instance = comp, \segaJoy|s5[1] , segaJoy|s5[1], SprinterJoy, 1
instance = comp, \segaJoy|combo[9] , segaJoy|combo[9], SprinterJoy, 1
instance = comp, \segaJoy|status2[9]~125 , segaJoy|status2[9]~125, SprinterJoy, 1
instance = comp, \segaJoy|status2[9] , segaJoy|status2[9], SprinterJoy, 1
instance = comp, \segaJoy|status1[9]~125 , segaJoy|status1[9]~125, SprinterJoy, 1
instance = comp, \segaJoy|status1[9] , segaJoy|status1[9], SprinterJoy, 1
instance = comp, \d_out[1] , d_out[1], SprinterJoy, 1
instance = comp, \segaJoy|s1[2] , segaJoy|s1[2], SprinterJoy, 1
instance = comp, \segaJoy|combo[2] , segaJoy|combo[2], SprinterJoy, 1
instance = comp, \segaJoy|status1[2] , segaJoy|status1[2], SprinterJoy, 1
instance = comp, \segaJoy|status2[2] , segaJoy|status2[2], SprinterJoy, 1
instance = comp, \segaJoy|s5[2] , segaJoy|s5[2], SprinterJoy, 1
instance = comp, \segaJoy|combo[10] , segaJoy|combo[10], SprinterJoy, 1
instance = comp, \segaJoy|status2[10]~123 , segaJoy|status2[10]~123, SprinterJoy, 1
instance = comp, \segaJoy|status2[10] , segaJoy|status2[10], SprinterJoy, 1
instance = comp, \segaJoy|status1[10]~123 , segaJoy|status1[10]~123, SprinterJoy, 1
instance = comp, \segaJoy|status1[10] , segaJoy|status1[10], SprinterJoy, 1
instance = comp, \d_out[2] , d_out[2], SprinterJoy, 1
instance = comp, \segaJoy|s1[3] , segaJoy|s1[3], SprinterJoy, 1
instance = comp, \segaJoy|combo[3] , segaJoy|combo[3], SprinterJoy, 1
instance = comp, \segaJoy|status1[3] , segaJoy|status1[3], SprinterJoy, 1
instance = comp, \segaJoy|status2[3] , segaJoy|status2[3], SprinterJoy, 1
instance = comp, \segaJoy|s5[3] , segaJoy|s5[3], SprinterJoy, 1
instance = comp, \segaJoy|combo[11] , segaJoy|combo[11], SprinterJoy, 1
instance = comp, \segaJoy|status2[11]~121 , segaJoy|status2[11]~121, SprinterJoy, 1
instance = comp, \segaJoy|status2[11] , segaJoy|status2[11], SprinterJoy, 1
instance = comp, \segaJoy|status1[11]~121 , segaJoy|status1[11]~121, SprinterJoy, 1
instance = comp, \segaJoy|status1[11] , segaJoy|status1[11], SprinterJoy, 1
instance = comp, \d_out[3] , d_out[3], SprinterJoy, 1
instance = comp, \segaJoy|s0[4] , segaJoy|s0[4], SprinterJoy, 1
instance = comp, \segaJoy|combo[6] , segaJoy|combo[6], SprinterJoy, 1
instance = comp, \segaJoy|status1[6]~132 , segaJoy|status1[6]~132, SprinterJoy, 1
instance = comp, \segaJoy|status1[6] , segaJoy|status1[6], SprinterJoy, 1
instance = comp, \segaJoy|status2[6]~132 , segaJoy|status2[6]~132, SprinterJoy, 1
instance = comp, \segaJoy|status2[6] , segaJoy|status2[6], SprinterJoy, 1
instance = comp, \d_out[6] , d_out[6], SprinterJoy, 1
instance = comp, \segaJoy|s0[5] , segaJoy|s0[5], SprinterJoy, 1
instance = comp, \segaJoy|combo[7] , segaJoy|combo[7], SprinterJoy, 1
instance = comp, \segaJoy|status1[7]~129 , segaJoy|status1[7]~129, SprinterJoy, 1
instance = comp, \segaJoy|status1[7] , segaJoy|status1[7], SprinterJoy, 1
instance = comp, \segaJoy|status2[7]~129 , segaJoy|status2[7]~129, SprinterJoy, 1
instance = comp, \segaJoy|status2[7] , segaJoy|status2[7], SprinterJoy, 1
instance = comp, \d_out[7] , d_out[7], SprinterJoy, 1
instance = comp, \a[12]~I , a[12], SprinterJoy, 1
instance = comp, \a[13]~I , a[13], SprinterJoy, 1
instance = comp, \a[14]~I , a[14], SprinterJoy, 1
instance = comp, \a[15]~I , a[15], SprinterJoy, 1
instance = comp, \sj1_sel~I , sj1_sel, SprinterJoy, 1
instance = comp, \sj2_sel~I , sj2_sel, SprinterJoy, 1
instance = comp, \d[4]~I , d[4], SprinterJoy, 1
instance = comp, \d[5]~I , d[5], SprinterJoy, 1
instance = comp, \d[0]~I , d[0], SprinterJoy, 1
instance = comp, \d[1]~I , d[1], SprinterJoy, 1
instance = comp, \d[2]~I , d[2], SprinterJoy, 1
instance = comp, \d[3]~I , d[3], SprinterJoy, 1
instance = comp, \d[6]~I , d[6], SprinterJoy, 1
instance = comp, \d[7]~I , d[7], SprinterJoy, 1

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Sprinter Joy!
-------------
Принципиальная схема и плата в доступных для просмотра форматах.

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Sprinter Joy!
-------------
Схема и печатная плата.

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Sprinter Joy!
-------------
Исходные файлы проекта в формате EasyEDA.
How to use
At EasyEDA editor, Click the document icon on the topbar, via "Document" > "Open" > "EasyEDA Source", and select json file, then open it at the editor.

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LICENSE
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GNU GENERAL PUBLIC LICENSE
Version 3, 29 June 2007
Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>
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9
README.md Normal file
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Sprinter Joy!
-------------
Карта формата ISA-8 для подключения джойстиков Sega MD к компьютеру Sprinter.
[Спринтер в Телеграм](https://t.me/zx_sprinter)
[Спринтер в Web](https://www.sprinter.ru/)

4
Software/README.md Normal file
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Sprinter Joy!
-------------
Исходный код да языке Solid-C для тестирования платы джойстиков.

120
Software/TESTSD.C Normal file
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#pragma nonrec
#include <stdio.h>
#include <conio.h>
#include <dos.h>
unsigned port;
char b;
char save_mmu3;
#define port_isa 0x9FBD
#define port_system 0x1FFD
#define isa_addr_base 0xC000
#define sj_addr_base 0x250
#define emm_win_p3 0xE2
#define port_sj 0xC250
#define SJ_DET port_sj
#define SJ_STATUS1 port_sj+2
#define SJ_STATUS2 port_sj+3
/*
#define BAUD_RATE 115200
#define XIN_FREQ 14745600
#define DIVISOR XIN_FREQ / (BAUD_RATE * 16)
*/
/**
* Small delay
*/
delay() {
unsigned ctr;
for (ctr=0; ctr<2000; ctr++) {
}
}
/**
* Reset ISA device
*/
reset_isa() {
outp(port_isa, 0xc0); // RESET=1 AEN=1
delay();
outp(port_isa,0); // RESET=0 AEN=0
delay();
delay();
}
/*
* Open access to ISA ports as memory
*/
open_isa() {
save_mmu3 = inp(emm_win_p3);
outp(port_system, 0x11);
outp(emm_win_p3, 0xd4);
outp(port_isa, 0);
}
/*
* Close access to ISA ports
*/
close_isa() {
outp(port_system, 0x01);
outp(emm_win_p3, save_mmu3);
}
char read_port(port)
unsigned port;
{
char rb;
open_isa();
rb = mget(port);
close_isa();
return rb;
}
void write_port(port, b)
unsigned port;
char b;
{
open_isa();
mset(port, b);
close_isa();
}
char detect;
char status1;
char status2;
unsigned ctr;
unsigned d;
main() {
printf("\nReset ISA devices\n");
reset_isa();
printf("\nRead SegaJoy\n");
for (ctr=0; ctr<=60; ctr++) {
detect = read_port(SJ_DET);
status1 = read_port(SJ_STATUS1);
status2 = read_port(SJ_STATUS2);
printf("DET="); hex8(detect);
printf("; ST1="); hex8(status1);
printf("; ST2="); hex8(status2);
printf("\n");
for (ctr=0; ctr<400; ctr++) {
delay();
}
}
for (d=0; d<400; d++) {
delay();
}
printf("\nExiting\n");
}