mirror of
https://github.com/romychs/SprinterJoy.git
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95 lines
4.3 KiB
Plaintext
95 lines
4.3 KiB
Plaintext
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2013 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 32-bit
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# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
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# Date created = 17:52:46 April 04, 2022
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# SprinterJoy_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY MAX7000S
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set_global_assignment -name DEVICE "EPM7128STC100-10"
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set_global_assignment -name TOP_LEVEL_ENTITY SprinterJoy
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:52:46 APRIL 04, 2022"
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set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
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set_global_assignment -name SYSTEMVERILOG_FILE SprinterJoy.sv
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set_global_assignment -name MAX7000_DEVICE_IO_STANDARD TTL
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set_location_assignment PIN_92 -to a[0]
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set_location_assignment PIN_93 -to a[1]
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set_location_assignment PIN_94 -to a[2]
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set_location_assignment PIN_96 -to a[3]
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set_location_assignment PIN_97 -to a[4]
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set_location_assignment PIN_98 -to a[5]
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set_location_assignment PIN_99 -to a[6]
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set_location_assignment PIN_100 -to a[7]
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set_location_assignment PIN_1 -to a[8]
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set_location_assignment PIN_2 -to a[9]
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set_location_assignment PIN_5 -to a[10]
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set_location_assignment PIN_6 -to a[11]
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set_location_assignment PIN_90 -to clk14
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set_location_assignment PIN_12 -to d[0]
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set_location_assignment PIN_13 -to d[1]
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set_location_assignment PIN_14 -to d[2]
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set_location_assignment PIN_16 -to d[3]
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set_location_assignment PIN_17 -to d[4]
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set_location_assignment PIN_19 -to d[5]
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set_location_assignment PIN_20 -to d[6]
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set_location_assignment PIN_21 -to d[7]
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set_location_assignment PIN_24 -to ior_n
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set_location_assignment PIN_89 -to reset
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set_global_assignment -name SYSTEMVERILOG_FILE ClockGenerator.sv
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set_global_assignment -name SYSTEMVERILOG_FILE SegaJoy.sv
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set_global_assignment -name USE_CONFIGURATION_DEVICE ON
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set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
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set_location_assignment PIN_36 -to sj1[5]
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set_location_assignment PIN_29 -to sj1[4]
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set_location_assignment PIN_35 -to sj1[3]
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set_location_assignment PIN_32 -to sj1[2]
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set_location_assignment PIN_30 -to sj1[1]
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set_location_assignment PIN_28 -to sj1[0]
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set_location_assignment PIN_31 -to sj1_sel
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set_location_assignment PIN_50 -to sj2[5]
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set_location_assignment PIN_45 -to sj2[4]
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set_location_assignment PIN_49 -to sj2[3]
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set_location_assignment PIN_48 -to sj2[2]
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set_location_assignment PIN_46 -to sj2[1]
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set_location_assignment PIN_44 -to sj2[0]
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set_location_assignment PIN_47 -to sj2_sel |