mirror of
https://github.com/romychs/z80go.git
synced 2026-04-16 08:44:20 +03:00
CPU emulator pass all tests
This commit is contained in:
parent
44c36ecb94
commit
d05db31cd2
29
cpu.go
29
cpu.go
@ -22,6 +22,7 @@ func NewCPU(core MemIoRW) *CPU {
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// z.codeCoverage map[uint16]bool
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z.extendedStackEnabled = false
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//z.extendedStack [65536]uint8
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z.extendedStack = map[uint16]PushValueType{}
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return &z
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}
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@ -68,15 +69,10 @@ func (z *CPU) SetState(state *CPU) {
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z.I = state.I
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z.R = state.R
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z.Flags.S = state.Flags.S
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z.Flags.Z = state.Flags.Z
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z.Flags.Y = state.Flags.Y
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z.Flags.H = state.Flags.H
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z.Flags.X = state.Flags.X
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z.Flags.P = state.Flags.P
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z.Flags.N = state.Flags.N
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z.Flags.C = state.Flags.C
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z.Flags = state.Flags
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z.FlagsAlt = state.FlagsAlt
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z.MemPtr = state.MemPtr
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z.IMode = state.IMode
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z.Iff1 = state.Iff1
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z.Iff2 = state.Iff2
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@ -108,8 +104,8 @@ func (z *CPU) GetState() *CPU {
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SP: z.SP,
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PC: z.PC,
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Flags: z.flags(),
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FlagsAlt: z.altFlags(),
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Flags: z.Flags,
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FlagsAlt: z.FlagsAlt,
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IMode: z.IMode,
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Iff1: z.Iff1,
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Iff2: z.Iff2,
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@ -117,7 +113,7 @@ func (z *CPU) GetState() *CPU {
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CycleCount: z.cycleCount,
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IntOccurred: z.IntOccurred,
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NmiOccurred: z.NmiOccurred,
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memPtr: z.memPtr,
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MemPtr: z.MemPtr,
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}
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}
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@ -147,17 +143,18 @@ func (z *CPU) CodeCoverage() map[uint16]bool {
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func (z *CPU) SetExtendedStack(enabled bool) {
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z.extendedStackEnabled = enabled
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if enabled {
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for addr := 0; addr < 65536; addr++ {
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z.extendedStack[addr] = PushValueTypeDefault
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}
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clear(z.extendedStack)
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//for addr := 0; addr < 65536; addr++ {
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// z.extendedStack[uint16(addr)] = PushValueTypeDefault
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//}
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}
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}
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// ExtendedStack - return array with markers of PushValueType* for each byte of memory
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func (z *CPU) ExtendedStack() ([]byte, error) {
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func (z *CPU) ExtendedStack() (map[uint16]PushValueType, error) {
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var err error
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if !z.extendedStackEnabled {
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err = errors.New("error, z80: ExtendedStack disabled")
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}
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return z.extendedStack[:], err
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return z.extendedStack, err
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}
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@ -2,20 +2,21 @@ package dis
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import (
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"fmt"
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"okemu/z80"
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"strings"
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"github.com/romychs/z80go"
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)
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type Disassembler struct {
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pc uint16
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core z80.MemIoRW
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core z80go.MemIoRW
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}
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type Disassembly interface {
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Disassm(pc uint16) string
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}
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func NewDisassembler(core z80.MemIoRW) *Disassembler {
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func NewDisassembler(core z80go.MemIoRW) *Disassembler {
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d := Disassembler{
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pc: 0,
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core: core,
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@ -46,6 +46,7 @@ func setMemory(addr uint16, value []byte) {
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var test = []byte{0x31, 0x2c, 0x05, 0x11, 0x0e, 0x01, 0x0e, 0x09, 0xcd, 0x05, 0x00, 0xc3, 0x00, 0x00}
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func Test_LD_SP_nn(t *testing.T) {
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t.Logf("Disassembler Z80 test")
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expected := " 0100 LD SP, 0x052C"
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setMemory(0x100, test)
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res := disasm.Disassm(0x100)
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4
go.mod
4
go.mod
@ -4,5 +4,7 @@ go 1.25
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require (
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github.com/sirupsen/logrus v1.9.4
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gopkg.in/yaml.v3 v3.0.1
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gopkg.in/yaml.v3 v3.0.1
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)
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require golang.org/x/sys v0.13.0 // indirect
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3
go.sum
3
go.sum
@ -1,3 +1,6 @@
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github.com/sirupsen/logrus v1.9.4 h1:TsZE7l11zFCLZnZ+teH4Umoq5BhEIfIzfRDZ1Uzql2w=
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github.com/sirupsen/logrus v1.9.4/go.mod h1:ftWc9WdOfJ0a92nsE2jF5u5ZwH8Bv2zdeOC42RjbV2g=
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golang.org/x/sys v0.13.0 h1:Af8nKPmuFypiUBjVoU9V20FiaFXOcuZI21p0ycVYYGE=
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golang.org/x/sys v0.13.0/go.mod h1:oPkhp1MJrh7nUepCBck5+mAzfO9JrbApNNgaTdGDITg=
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gopkg.in/check.v1 v0.0.0-20161208181325-20d25e280405/go.mod h1:Co6ibVJAznAaIkqp8huTwlJQCZ016jof/cbN4VW5Yz0=
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gopkg.in/yaml.v3 v3.0.1/go.mod h1:K4uyk7z7BCEPqu6E+C64Yfv1cQ7kz7rIZviUmN+EgEM=
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@ -191,7 +191,7 @@ func (z *CPU) Reset() {
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z.SP = 0xFFFF
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z.IX = 0
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z.IY = 0
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z.memPtr = 0
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z.MemPtr = 0
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z.A = 0xFF
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z.B = 0
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@ -213,7 +213,7 @@ func (z *CPU) Reset() {
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z.R = 0
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z.Flags.SetFlags(0xff)
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z.FlagsAlt.SetFlags(0xff)
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z.FlagsAlt.SetFlags(0x00)
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z.iffDelay = 0
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z.IMode = 0
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87
opcodes.go
87
opcodes.go
@ -5,7 +5,7 @@ import log "github.com/sirupsen/logrus"
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// jumps to an address
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func (z *CPU) jump(addr uint16) {
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z.PC = addr
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z.memPtr = addr
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z.MemPtr = addr
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}
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// jumps to next word in memory if condition is true
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@ -14,7 +14,7 @@ func (z *CPU) condJump(condition bool) {
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if condition {
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z.jump(addr)
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}
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z.memPtr = addr
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z.MemPtr = addr
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}
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// calls to next word in memory
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@ -22,7 +22,7 @@ func (z *CPU) call(addr uint16) {
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z.pushW(z.PC)
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z.extendedStack[z.SP] = PushValueTypeCall
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z.PC = addr
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z.memPtr = addr
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z.MemPtr = addr
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}
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// calls to next word in memory if condition is true
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@ -32,13 +32,13 @@ func (z *CPU) condCall(condition bool) {
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z.call(addr)
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z.cycleCount += 7
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}
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z.memPtr = addr
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z.MemPtr = addr
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}
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// returns from subroutine
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func (z *CPU) ret() {
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z.PC = z.popW()
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z.memPtr = z.PC
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z.MemPtr = z.PC
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}
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// returns from subroutine if condition is true
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@ -55,7 +55,7 @@ func (z *CPU) jr(offset byte) {
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} else {
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z.PC += uint16(offset)
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}
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z.memPtr = z.PC
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z.MemPtr = z.PC
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}
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func (z *CPU) condJr(condition bool) {
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@ -101,7 +101,7 @@ func (z *CPU) addW(a uint16, b uint16, cy bool) uint16 {
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msb := z.addB(byte(a>>8), byte(b>>8), z.Flags.C)
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result := (uint16(msb) << 8) | uint16(lsb)
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z.Flags.Z = result == 0
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z.memPtr = a + 1
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z.MemPtr = a + 1
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return result
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}
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@ -111,7 +111,7 @@ func (z *CPU) subW(a uint16, b uint16, cy bool) uint16 {
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msb := z.subB(byte(a>>8), byte(b>>8), z.Flags.C)
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result := (uint16(msb) << 8) | uint16(lsb)
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z.Flags.Z = result == 0
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z.memPtr = a + 1
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z.MemPtr = a + 1
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return result
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}
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@ -388,14 +388,14 @@ func (z *CPU) cpi() {
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z.Flags.Y = val&0x02 != 0
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z.Flags.P = z.bc() != 0
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z.Flags.C = cf
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z.memPtr += 1
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z.MemPtr += 1
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}
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func (z *CPU) cpd() {
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z.cpi()
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// same as cpi but HL is decremented instead of incremented
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z.setHL(z.hl() - 2)
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z.memPtr -= 2
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z.MemPtr -= 2
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}
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func (z *CPU) inRC(r *byte) {
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@ -410,7 +410,7 @@ func (z *CPU) inRC(r *byte) {
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func (z *CPU) ini() {
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val := z.core.IORead(z.bc())
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z.wb(z.hl(), val)
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z.memPtr = z.bc() + 1
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z.MemPtr = z.bc() + 1
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z.B--
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other := val + z.C + 1
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@ -432,7 +432,7 @@ func (z *CPU) ini() {
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func (z *CPU) ind() {
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val := z.core.IORead(z.bc())
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z.wb(z.hl(), val)
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z.memPtr = z.bc() - 1
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z.MemPtr = z.bc() - 1
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z.B--
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other := val + z.C - 1
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@ -451,13 +451,7 @@ func (z *CPU) ind() {
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z.updateXY(z.B)
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z.setHL(z.hl() - 1)
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}
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func (z *CPU) outi() {
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val := z.rb(z.hl())
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z.B--
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z.memPtr = z.bc() + 1
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z.core.IOWrite(z.bc(), val)
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z.setHL(z.hl() + 1)
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func (z *CPU) outCmnFlags(val uint8) {
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other := val + z.L
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z.Flags.N = val&0x80 != 0
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if other < val {
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@ -473,25 +467,22 @@ func (z *CPU) outi() {
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z.updateXY(z.B)
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}
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func (z *CPU) outi() {
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val := z.rb(z.hl())
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z.B--
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z.MemPtr = z.bc() + 1
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z.core.IOWrite(z.bc(), val)
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z.setHL(z.hl() + 1)
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z.outCmnFlags(val)
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}
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func (z *CPU) outd() {
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val := z.rb(z.hl())
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z.B--
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z.memPtr = z.bc() - 1
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z.MemPtr = z.bc() - 1
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z.core.IOWrite(z.bc(), val)
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z.setHL(z.hl() - 1)
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other := val + z.L
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z.Flags.N = val&0x80 != 0
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if other < val {
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z.Flags.H = true
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z.Flags.C = true
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} else {
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z.Flags.H = false
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z.Flags.C = false
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}
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z.Flags.P = parity((other & 0x07) ^ z.B)
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z.Flags.Z = z.B == 0
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z.Flags.S = z.B&0x80 != 0
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z.updateXY(z.B)
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z.outCmnFlags(val)
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}
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func (z *CPU) daa() {
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@ -529,7 +520,7 @@ func (z *CPU) displace(baseAddr uint16, offset byte) uint16 {
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addr += uint16(offset)
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}
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//addr := baseAddr + uint16(displacement)
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z.memPtr = addr
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z.MemPtr = addr
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return addr
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}
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@ -751,29 +742,29 @@ func (z *CPU) execOpcode(opcode byte) {
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case 0x0A:
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// ld a,(bc)
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z.A = z.rb(z.bc())
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z.memPtr = z.bc() + 1
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z.MemPtr = z.bc() + 1
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case 0x1A:
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// ld a,(de)
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z.A = z.rb(z.de())
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z.memPtr = z.de() + 1
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z.MemPtr = z.de() + 1
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case 0x3A:
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// ld a,(**)
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addr := z.nextW()
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z.A = z.rb(addr)
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z.memPtr = addr + 1
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z.MemPtr = addr + 1
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case 0x02:
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// ld (bc),a
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z.wb(z.bc(), z.A)
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z.memPtr = (uint16(z.A) << 8) | ((z.bc() + 1) & 0xFF)
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z.MemPtr = (uint16(z.A) << 8) | ((z.bc() + 1) & 0xFF)
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case 0x12:
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// ld (de),a
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z.wb(z.de(), z.A)
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z.memPtr = (uint16(z.A) << 8) | ((z.de() + 1) & 0xFF)
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z.MemPtr = (uint16(z.A) << 8) | ((z.de() + 1) & 0xFF)
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case 0x32:
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// ld (**),a
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addr := z.nextW()
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z.wb(addr, z.A)
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z.memPtr = (uint16(z.A) << 8) | ((addr + 1) & 0xFF)
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z.MemPtr = (uint16(z.A) << 8) | ((addr + 1) & 0xFF)
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case 0x01:
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z.setBC(z.nextW()) // ld bc,**
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case 0x11:
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@ -787,12 +778,12 @@ func (z *CPU) execOpcode(opcode byte) {
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// ld hl,(**)
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addr := z.nextW()
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z.setHL(z.rw(addr))
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z.memPtr = addr + 1
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z.MemPtr = addr + 1
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case 0x22:
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// ld (**),hl
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addr := z.nextW()
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z.ww(addr, z.hl())
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z.memPtr = addr + 1
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z.MemPtr = addr + 1
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case 0xF9:
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z.SP = z.hl() // ld sp,hl
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@ -806,7 +797,7 @@ func (z *CPU) execOpcode(opcode byte) {
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val := z.rw(z.SP)
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z.ww(z.SP, z.hl())
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z.setHL(val)
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z.memPtr = val
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z.MemPtr = val
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case 0x87:
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z.A = z.addB(z.A, z.A, false) // add a,a
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case 0x80:
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@ -1103,7 +1094,7 @@ func (z *CPU) execOpcode(opcode byte) {
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z.condJr(z.B != 0) // djnz *
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case 0x18:
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z.PC += uint16(z.nextB()) // jr *
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z.memPtr = z.PC
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z.MemPtr = z.PC
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case 0x20:
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z.condJr(!z.Flags.Z) // jr nz, *
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case 0x28:
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@ -1202,19 +1193,19 @@ func (z *CPU) execOpcode(opcode byte) {
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// in a,(n)
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port := (uint16(z.A) << 8) | uint16(z.nextB())
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z.A = z.core.IORead(port)
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z.memPtr = port + 1 // (uint16(a) << 8) | (uint16(z.a+1) & 0x00ff)
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z.MemPtr = port + 1 // (uint16(a) << 8) | (uint16(z.a+1) & 0x00ff)
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case 0xD3:
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// out (n), a
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port := uint16(z.nextB())
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z.core.IOWrite(port, z.A)
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z.memPtr = ((port + 1) & 0x00ff) | (uint16(z.A) << 8)
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z.MemPtr = ((port + 1) & 0x00ff) | (uint16(z.A) << 8)
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case 0x08:
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// ex af,af'
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a := z.A
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f := z.Flags.Flags()
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f := z.Flags.AsByte()
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z.A = z.AAlt
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z.Flags.SetFlags(z.FlagsAlt.Flags())
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z.Flags.SetFlags(z.FlagsAlt.AsByte())
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z.AAlt = a
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z.FlagsAlt.SetFlags(f)
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@ -63,7 +63,7 @@ func (z *CPU) execOpcodeCB(opcode byte) {
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// in bit (hl), x/y flags are handled differently:
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if z_ == 6 {
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z.updateXY(byte(z.memPtr >> 8))
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z.updateXY(byte(z.MemPtr >> 8))
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z.cycleCount += 4
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}
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@ -96,11 +96,11 @@ func (z *CPU) execOpcodeDDFD(opcode byte, iz *uint16) {
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case 0x2A:
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addr := z.nextW()
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*iz = z.rw(addr) // ld iz,(**)
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z.memPtr = addr + 1
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z.MemPtr = addr + 1
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case 0x22:
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addr := z.nextW()
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z.ww(addr, *iz) // ld (**),iz
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z.memPtr = addr + 1
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z.MemPtr = addr + 1
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case 0x21:
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*iz = z.nextW() // ld iz,**
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case 0x36:
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@ -192,7 +192,7 @@ func (z *CPU) execOpcodeDDFD(opcode byte, iz *uint16) {
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val := z.rw(z.SP)
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z.ww(z.SP, *iz)
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*iz = val
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z.memPtr = val
|
||||
z.MemPtr = val
|
||||
case 0xCB:
|
||||
addr := z.displace(*iz, z.nextB())
|
||||
op := z.nextB()
|
||||
|
||||
60
opcodesED.go
60
opcodesED.go
@ -44,7 +44,7 @@ func (z *CPU) execOpcodeED(opcode byte) {
|
||||
if z.bc() != 0 {
|
||||
z.PC -= 2
|
||||
z.cycleCount += 5
|
||||
z.memPtr = z.PC + 1
|
||||
z.MemPtr = z.PC + 1
|
||||
}
|
||||
} // ldir
|
||||
|
||||
@ -57,7 +57,7 @@ func (z *CPU) execOpcodeED(opcode byte) {
|
||||
if z.bc() != 0 {
|
||||
z.PC -= 2
|
||||
z.cycleCount += 5
|
||||
z.memPtr = z.PC + 1
|
||||
z.MemPtr = z.PC + 1
|
||||
}
|
||||
} // lddr
|
||||
|
||||
@ -71,7 +71,7 @@ func (z *CPU) execOpcodeED(opcode byte) {
|
||||
if z.bc() != 0 && !z.Flags.Z {
|
||||
z.PC -= 2
|
||||
z.cycleCount += 5
|
||||
z.memPtr = z.PC + 1
|
||||
z.MemPtr = z.PC + 1
|
||||
} else {
|
||||
//z.mem_ptr++
|
||||
}
|
||||
@ -82,15 +82,15 @@ func (z *CPU) execOpcodeED(opcode byte) {
|
||||
if z.bc() != 0 && !z.Flags.Z {
|
||||
z.PC -= 2
|
||||
z.cycleCount += 5
|
||||
z.memPtr = z.PC + 1
|
||||
z.MemPtr = z.PC + 1
|
||||
} else {
|
||||
//z.mem_ptr++
|
||||
}
|
||||
case 0x40:
|
||||
z.inRC(&z.B) // in b, (c)
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x48:
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
z.inRC(&z.C) // in c, (c)
|
||||
z.updateXY(z.C)
|
||||
//case 0x4e:
|
||||
@ -98,28 +98,28 @@ func (z *CPU) execOpcodeED(opcode byte) {
|
||||
|
||||
case 0x50:
|
||||
z.inRC(&z.D) // in d, (c)
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x58:
|
||||
// in e, (c)
|
||||
z.inRC(&z.E)
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
z.updateXY(z.E)
|
||||
case 0x60:
|
||||
z.inRC(&z.H) // in h, (c)
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x68:
|
||||
z.inRC(&z.L) // in l, (c)
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
z.updateXY(z.L)
|
||||
case 0x70:
|
||||
// in (c)
|
||||
var val byte
|
||||
z.inRC(&val)
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x78:
|
||||
// in a, (c)
|
||||
z.inRC(&z.A)
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
z.updateXY(z.A)
|
||||
case 0xA2:
|
||||
z.ini() // ini
|
||||
@ -142,29 +142,29 @@ func (z *CPU) execOpcodeED(opcode byte) {
|
||||
}
|
||||
case 0x41:
|
||||
z.core.IOWrite(z.bc(), z.B) // out (c), b
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x49:
|
||||
z.core.IOWrite(z.bc(), z.C) // out (c), c
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x51:
|
||||
z.core.IOWrite(z.bc(), z.D) // out (c), d
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x59:
|
||||
z.core.IOWrite(z.bc(), z.E) // out (c), e
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x61:
|
||||
z.core.IOWrite(z.bc(), z.H) // out (c), h
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x69:
|
||||
z.core.IOWrite(z.bc(), z.L) // out (c), l
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x71:
|
||||
z.core.IOWrite(z.bc(), 0) // out (c), 0
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0x79:
|
||||
// out (c), a
|
||||
z.core.IOWrite(z.bc(), z.A)
|
||||
z.memPtr = z.bc() + 1
|
||||
z.MemPtr = z.bc() + 1
|
||||
case 0xA3:
|
||||
z.outi() // outi
|
||||
case 0xB3:
|
||||
@ -204,42 +204,42 @@ func (z *CPU) execOpcodeED(opcode byte) {
|
||||
// ld (**), bc
|
||||
addr := z.nextW()
|
||||
z.ww(addr, z.bc())
|
||||
z.memPtr = addr + 1
|
||||
z.MemPtr = addr + 1
|
||||
case 0x53:
|
||||
// ld (**), de
|
||||
addr := z.nextW()
|
||||
z.ww(addr, z.de())
|
||||
z.memPtr = addr + 1
|
||||
z.MemPtr = addr + 1
|
||||
case 0x63:
|
||||
// ld (**), hl
|
||||
addr := z.nextW()
|
||||
z.ww(addr, z.hl())
|
||||
z.memPtr = addr + 1
|
||||
z.MemPtr = addr + 1
|
||||
case 0x73:
|
||||
// ld (**), hl
|
||||
addr := z.nextW()
|
||||
z.ww(addr, z.SP)
|
||||
z.memPtr = addr + 1
|
||||
z.MemPtr = addr + 1
|
||||
case 0x4B:
|
||||
// ld bc, (**)
|
||||
addr := z.nextW()
|
||||
z.setBC(z.rw(addr))
|
||||
z.memPtr = addr + 1
|
||||
z.MemPtr = addr + 1
|
||||
case 0x5B:
|
||||
// ld de, (**)
|
||||
addr := z.nextW()
|
||||
z.setDE(z.rw(addr))
|
||||
z.memPtr = addr + 1
|
||||
z.MemPtr = addr + 1
|
||||
case 0x6B:
|
||||
// ld hl, (**)
|
||||
addr := z.nextW()
|
||||
z.setHL(z.rw(addr))
|
||||
z.memPtr = addr + 1
|
||||
z.MemPtr = addr + 1
|
||||
case 0x7B:
|
||||
// ld sp,(**)
|
||||
addr := z.nextW()
|
||||
z.SP = z.rw(addr)
|
||||
z.memPtr = addr + 1
|
||||
z.MemPtr = addr + 1
|
||||
case 0x44, 0x54, 0x64, 0x74, 0x4C, 0x5C, 0x6C, 0x7C:
|
||||
z.A = z.subB(0, z.A, false) // neg
|
||||
case 0x46, 0x4e, 0x66, 0x6e:
|
||||
@ -261,7 +261,7 @@ func (z *CPU) execOpcodeED(opcode byte) {
|
||||
z.Flags.Z = z.A == 0
|
||||
z.Flags.S = z.A&0x80 != 0
|
||||
z.Flags.P = parity(z.A)
|
||||
z.memPtr = z.hl() + 1
|
||||
z.MemPtr = z.hl() + 1
|
||||
case 0x6F:
|
||||
// rld
|
||||
a := z.A
|
||||
@ -274,7 +274,7 @@ func (z *CPU) execOpcodeED(opcode byte) {
|
||||
z.Flags.Z = z.A == 0
|
||||
z.Flags.S = z.A&0x80 != 0
|
||||
z.Flags.P = parity(z.A)
|
||||
z.memPtr = z.hl() + 1
|
||||
z.MemPtr = z.hl() + 1
|
||||
default:
|
||||
log.Errorf("Unknown ED opcode: %02X\n", opcode)
|
||||
}
|
||||
|
||||
136
z80go.go
136
z80go.go
@ -59,52 +59,78 @@ type FlagsType struct {
|
||||
|
||||
// CPU - Processor state
|
||||
type CPU struct {
|
||||
A byte `json:"a,omitempty"`
|
||||
B byte `json:"b,omitempty"`
|
||||
C byte `json:"c,omitempty"`
|
||||
D byte `json:"d,omitempty"`
|
||||
E byte `json:"e,omitempty"`
|
||||
H byte `json:"h,omitempty"`
|
||||
L byte `json:"l,omitempty"`
|
||||
AAlt byte `json:"AAlt,omitempty"`
|
||||
BAlt byte `json:"BAlt,omitempty"`
|
||||
CAlt byte `json:"CAlt,omitempty"`
|
||||
DAlt byte `json:"DAlt,omitempty"`
|
||||
EAlt byte `json:"EAlt,omitempty"`
|
||||
HAlt byte `json:"HAlt,omitempty"`
|
||||
LAlt byte `json:"LAlt,omitempty"`
|
||||
IX uint16 `json:"IX,omitempty"`
|
||||
IY uint16 `json:"IY,omitempty"`
|
||||
I byte `json:"i,omitempty"`
|
||||
R byte `json:"r,omitempty"`
|
||||
SP uint16 `json:"SP,omitempty"`
|
||||
PC uint16 `json:"PC,omitempty"`
|
||||
Flags FlagsType `json:"flags"`
|
||||
FlagsAlt FlagsType `json:"flagsAlt"`
|
||||
IMode byte `json:"IMode,omitempty"`
|
||||
Iff1 bool `json:"iff1,omitempty"`
|
||||
Iff2 bool `json:"iff2,omitempty"`
|
||||
Halted bool `json:"halted,omitempty"`
|
||||
CycleCount uint32 `json:"cycleCount,omitempty"`
|
||||
IntOccurred bool `json:"intOccurred,omitempty"`
|
||||
NmiOccurred bool `json:"interruptOccurred,omitempty"`
|
||||
memPtr uint16
|
||||
core MemIoRW
|
||||
intData byte
|
||||
cycleCount uint32 // cycle count (t-states)
|
||||
memAccess map[uint16]byte
|
||||
codeCoverageEnabled bool
|
||||
codeCoverage map[uint16]bool
|
||||
// base register set
|
||||
A byte `json:"a,omitempty"`
|
||||
B byte `json:"b,omitempty"`
|
||||
C byte `json:"c,omitempty"`
|
||||
D byte `json:"d,omitempty"`
|
||||
E byte `json:"e,omitempty"`
|
||||
H byte `json:"h,omitempty"`
|
||||
L byte `json:"l,omitempty"`
|
||||
// alternate register set
|
||||
AAlt byte `json:"AAlt,omitempty"`
|
||||
BAlt byte `json:"BAlt,omitempty"`
|
||||
CAlt byte `json:"CAlt,omitempty"`
|
||||
DAlt byte `json:"DAlt,omitempty"`
|
||||
EAlt byte `json:"EAlt,omitempty"`
|
||||
HAlt byte `json:"HAlt,omitempty"`
|
||||
LAlt byte `json:"LAlt,omitempty"`
|
||||
// index registers
|
||||
IX uint16 `json:"IX,omitempty"`
|
||||
IY uint16 `json:"IY,omitempty"`
|
||||
|
||||
I byte `json:"i,omitempty"`
|
||||
|
||||
// memory refresh register
|
||||
R byte `json:"r,omitempty"`
|
||||
|
||||
// stack pointer
|
||||
SP uint16 `json:"SP,omitempty"`
|
||||
|
||||
// program counter
|
||||
PC uint16 `json:"PC,omitempty"`
|
||||
|
||||
// cpu flags
|
||||
Flags FlagsType `json:"flags"`
|
||||
|
||||
// alternate cpu flags
|
||||
FlagsAlt FlagsType `json:"flagsAlt"`
|
||||
|
||||
// Interrupt mode
|
||||
IMode byte `json:"IMode,omitempty"`
|
||||
Iff1 bool `json:"iff1,omitempty"`
|
||||
Iff2 bool `json:"iff2,omitempty"`
|
||||
Halted bool `json:"halted,omitempty"`
|
||||
CycleCount uint32 `json:"cycleCount,omitempty"`
|
||||
IntOccurred bool `json:"intOccurred,omitempty"`
|
||||
NmiOccurred bool `json:"interruptOccurred,omitempty"`
|
||||
// mw hidden register
|
||||
MemPtr uint16
|
||||
|
||||
// methods to access CPU to memory and IO ports of computer
|
||||
core MemIoRW
|
||||
intData byte
|
||||
// Total CPU cycle count (t-states)
|
||||
cycleCount uint32
|
||||
// map of memory access
|
||||
memAccess map[uint16]byte
|
||||
// enable or disable code coverage marking
|
||||
codeCoverageEnabled bool
|
||||
// map of code coverage
|
||||
codeCoverage map[uint16]bool
|
||||
// enable of disable stack data marking
|
||||
extendedStackEnabled bool
|
||||
extendedStack map[uint16]PushValueType
|
||||
iffDelay byte
|
||||
intPending bool
|
||||
nmiPending bool
|
||||
// map of stack data marking
|
||||
extendedStack map[uint16]PushValueType
|
||||
|
||||
iffDelay byte
|
||||
intPending bool
|
||||
nmiPending bool
|
||||
}
|
||||
|
||||
// Flags - return flags as byte value
|
||||
// AsByte - return flags as byte value
|
||||
// Used to simplify manipulations with AF register from debugger
|
||||
func (f *FlagsType) Flags() byte {
|
||||
func (f *FlagsType) AsByte() byte {
|
||||
var flags byte = 0
|
||||
if f.S {
|
||||
flags |= 0x80
|
||||
@ -174,19 +200,19 @@ func (z *CPU) IIFStr() string {
|
||||
return string(flags)
|
||||
}
|
||||
|
||||
//// Flags - return state of CPU flags
|
||||
//func Flags(f byte) FlagsType {
|
||||
// return FlagsType{
|
||||
// S: f&0x80 != 0,
|
||||
// Z: f&0x40 != 0,
|
||||
// Y: f&0x20 != 0,
|
||||
// H: f&0x10 != 0,
|
||||
// X: f&0x08 != 0,
|
||||
// P: f&0x04 != 0,
|
||||
// N: f&0x02 != 0,
|
||||
// C: f&0x01 != 0,
|
||||
// }
|
||||
//}
|
||||
// NewFlags build new object of FlagsType from byte
|
||||
func NewFlags(f byte) *FlagsType {
|
||||
return &FlagsType{
|
||||
S: f&0x80 != 0,
|
||||
Z: f&0x40 != 0,
|
||||
Y: f&0x20 != 0,
|
||||
H: f&0x10 != 0,
|
||||
X: f&0x08 != 0,
|
||||
P: f&0x04 != 0,
|
||||
N: f&0x02 != 0,
|
||||
C: f&0x01 != 0,
|
||||
}
|
||||
}
|
||||
|
||||
// SetFlags - set CPU flags by flags byte.
|
||||
// Used to simplify manipulations with AF register from debugger
|
||||
|
||||
@ -4,12 +4,11 @@ import (
|
||||
"bufio"
|
||||
"bytes"
|
||||
_ "embed"
|
||||
"okemu/z80"
|
||||
"okemu/z80/c99"
|
||||
"strconv"
|
||||
"strings"
|
||||
"testing"
|
||||
|
||||
"github.com/romychs/z80go"
|
||||
log "github.com/sirupsen/logrus"
|
||||
)
|
||||
|
||||
@ -82,7 +81,7 @@ var testIn []byte
|
||||
var testExpected []byte
|
||||
|
||||
type Computer struct {
|
||||
cpu *c99.Z80
|
||||
cpu *z80go.CPU
|
||||
memory [65536]byte
|
||||
ports [256]byte
|
||||
}
|
||||
@ -94,8 +93,6 @@ var computer Computer
|
||||
|
||||
var testNames []string
|
||||
|
||||
//var z80 *c99.Z80
|
||||
|
||||
func init() {
|
||||
z80TestsIn = make(map[string]Z80TestIn)
|
||||
z80TestsExpected = make(map[string]Expect)
|
||||
@ -107,7 +104,7 @@ func init() {
|
||||
for addr := 0; addr < 255; addr++ {
|
||||
computer.ports[addr] = 0
|
||||
}
|
||||
computer.cpu = c99.New(&computer)
|
||||
computer.cpu = z80go.NewCPU(&computer)
|
||||
}
|
||||
|
||||
func (c *Computer) M1MemRead(addr uint16) byte {
|
||||
@ -403,7 +400,8 @@ func TestZ80Fuse(t *testing.T) {
|
||||
}
|
||||
cy := uint32(0)
|
||||
for {
|
||||
cy += computer.cpu.RunInstruction()
|
||||
c, _ := computer.cpu.RunInstruction()
|
||||
cy += c
|
||||
if cy >= uint32(exp.state.tStates) {
|
||||
break
|
||||
}
|
||||
@ -413,38 +411,37 @@ func TestZ80Fuse(t *testing.T) {
|
||||
}
|
||||
|
||||
func setComputerState(test Z80TestIn) {
|
||||
state := z80.CPU{
|
||||
A: byte(test.registers.AF >> 8),
|
||||
B: byte(test.registers.BC >> 8),
|
||||
C: byte(test.registers.BC),
|
||||
D: byte(test.registers.DE >> 8),
|
||||
E: byte(test.registers.DE),
|
||||
H: byte(test.registers.HL >> 8),
|
||||
L: byte(test.registers.HL),
|
||||
AAlt: byte(test.registers.AFa >> 8),
|
||||
BAlt: byte(test.registers.BCa >> 8),
|
||||
CAlt: byte(test.registers.BCa),
|
||||
DAlt: byte(test.registers.DEa >> 8),
|
||||
EAlt: byte(test.registers.DEa),
|
||||
HAlt: byte(test.registers.HLa >> 8),
|
||||
LAlt: byte(test.registers.HLa),
|
||||
IX: test.registers.IX,
|
||||
IY: test.registers.IY,
|
||||
I: test.state.I,
|
||||
R: test.state.R,
|
||||
SP: test.registers.SP,
|
||||
PC: test.registers.PC,
|
||||
Flags: z80.GetFlags(byte(test.registers.AF)),
|
||||
FlagsAlt: z80.GetFlags(byte(test.registers.AFa)),
|
||||
IMode: test.state.IM,
|
||||
Iff1: test.state.IFF1,
|
||||
Iff2: test.state.IFF2,
|
||||
Halted: test.state.isHalted,
|
||||
DoDelayedDI: false,
|
||||
DoDelayedEI: false,
|
||||
CycleCount: 0,
|
||||
InterruptOccurred: false,
|
||||
MemPtr: test.registers.MemPtr,
|
||||
state := z80go.CPU{
|
||||
A: byte(test.registers.AF >> 8),
|
||||
B: byte(test.registers.BC >> 8),
|
||||
C: byte(test.registers.BC),
|
||||
D: byte(test.registers.DE >> 8),
|
||||
E: byte(test.registers.DE),
|
||||
H: byte(test.registers.HL >> 8),
|
||||
L: byte(test.registers.HL),
|
||||
AAlt: byte(test.registers.AFa >> 8),
|
||||
BAlt: byte(test.registers.BCa >> 8),
|
||||
CAlt: byte(test.registers.BCa),
|
||||
DAlt: byte(test.registers.DEa >> 8),
|
||||
EAlt: byte(test.registers.DEa),
|
||||
HAlt: byte(test.registers.HLa >> 8),
|
||||
LAlt: byte(test.registers.HLa),
|
||||
IX: test.registers.IX,
|
||||
IY: test.registers.IY,
|
||||
I: test.state.I,
|
||||
R: test.state.R,
|
||||
SP: test.registers.SP,
|
||||
PC: test.registers.PC,
|
||||
Flags: *z80go.NewFlags(byte(test.registers.AF)),
|
||||
FlagsAlt: *z80go.NewFlags(byte(test.registers.AFa)),
|
||||
IMode: test.state.IM,
|
||||
Iff1: test.state.IFF1,
|
||||
Iff2: test.state.IFF2,
|
||||
Halted: test.state.isHalted,
|
||||
CycleCount: 0,
|
||||
IntOccurred: false,
|
||||
NmiOccurred: false,
|
||||
MemPtr: test.registers.MemPtr,
|
||||
}
|
||||
|
||||
// Setup CPU
|
||||
@ -577,12 +574,12 @@ func checkComputerState(t *testing.T, name string) {
|
||||
}
|
||||
|
||||
// FLAGS
|
||||
if lo(exp.registers.AF) != state.Flags.GetFlags() {
|
||||
t.Errorf("%s: Expected Flags to be %08b, got %08b", name, lo(exp.registers.AF), state.Flags.GetFlags())
|
||||
if lo(exp.registers.AF) != state.Flags.AsByte() {
|
||||
t.Errorf("%s: Expected Flags to be %08b, got %08b", name, lo(exp.registers.AF), state.Flags.AsByte())
|
||||
}
|
||||
|
||||
if lo(exp.registers.AFa) != state.FlagsAlt.GetFlags() {
|
||||
t.Errorf("%s: Expected Flags' to be %08b, got %08b", name, lo(exp.registers.AFa), state.FlagsAlt.GetFlags())
|
||||
if lo(exp.registers.AFa) != state.FlagsAlt.AsByte() {
|
||||
t.Errorf("%s: Expected Flags' to be %08b, got %08b", name, lo(exp.registers.AFa), state.FlagsAlt.AsByte())
|
||||
}
|
||||
|
||||
// Check memory
|
||||
|
||||
Loading…
Reference in New Issue
Block a user