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The core processor of the cartridge is an Altera/Intel MAX CPLD chip housed in a **TQFP-100** package.
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*Important Note:* This repository is based on the official RBSC/ZX-EQ project documentation. All enhancements, structural modifications, and edge-connector changes have been executed with strict respect to the original authors.
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*Important Note:* This repository is based on the official [RBSC/ZX-EQ](https://github.com/RBSC/ZX-EQ) project documentation. All enhancements, structural modifications, and edge-connector changes have been executed with strict respect to the original authors.
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***
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@ -41,10 +41,10 @@ Depending on which CPLD chip family you choose to solder, you must adjust the on
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Thanks to the universal power distribution layout, this project natively supports firmware code targeting different Altera/Intel CPLD generations.
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This repository includes custom modifications and provides full, seamless integration with the **alternative firmware repository by andykarpov (zx-eq-firmware)**. This third-party code branch vastly broadens the choice of compatible LED bar components and pin polarities.
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This repository includes custom modifications and provides full, seamless integration with the **alternative firmware repository by [andykarpov/zx-eq-firmware](https://github.com/andykarpov/zx-eq-firmware)**. This third-party code branch vastly broadens the choice of compatible LED bar components and pin polarities.
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### Available Firmware Binaries
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Please browse the [/Firmware](https://github.com/Alex-2-Graf/ZX-EQ) folder of this repository. Select the specific `.pof`/`.jed` file that exactly matches your soldered CPLD model, your specific LED segment bar configuration, and desired polarity.
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Please browse the [/Firmware](Firmware) folder of this repository. Select the specific `.pof`/`.jed` file that exactly matches your soldered CPLD model, your specific LED segment bar configuration, and desired polarity.
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### JTAG Programming Steps
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1. Connect an **Altera USB Blaster** (or equivalent hardware programmer) to the onboard 10-pin JTAG header.
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@ -55,7 +55,7 @@ Please browse the [/Firmware](https://github.com/Alex-2-Graf/ZX-EQ) folder of th
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## 🎨 Hardware Gallery & PCB Renders
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Visual project documentation, high-definition photographs of assembled devices, and 3D PCB renders can be found inside the [/Foto](https://github.com/Alex-2-Graf/ZX-EQ) directory.
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Visual project documentation, high-definition photographs of assembled devices, and 3D PCB renders can be found inside the [/Foto](Foto) directory.
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