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Add "PC SoG/CS coast" compatibility option
tvp_source_setup() disables the TVP7002 internal H-PLL coast for every PC-type preset. That is right for RGBHV, but with sync-on-green or composite sync the serration pulses during vsync disturb the H-PLL every frame; on a NeXTstation Color (1120x832, SoG) this caused continuous horizontal jitter, jitter in the top third of the picture and a periodic HDMI re-sync. With the option on, coast is re-enabled after setup when the sync source is SOG or CSYNC; RGBHV is untouched. Default Off, so existing behaviour is unchanged. Stored as profile item id 68. On the NeXT, this option together with the existing settings Analog sync LPF = 10 MHz, ADC PLL BW = Low and H-PLL Pre/Post-Coast = 4/4 ran 19 minutes without a sync loss, mode re-program or IT6613 video-stable change. SPARCstation 20 framebuffers (ZX, TurboGX) over composite sync are stable without it. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com> Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01WiXHy7Jhh5yTdsBaenucgw
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@@ -392,7 +392,7 @@ status_t get_status(tvp_sync_input_t syncinput)
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status = (status < MODE_CHANGE) ? MODE_CHANGE : status;
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}
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if (memcmp(&tc, &cm.cc, offsetof(avconfig_t, sl_mode)) || (update_cur_vm == 1))
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if (memcmp(&tc, &cm.cc, offsetof(avconfig_t, sl_mode)) || (update_cur_vm == 1) || (tc.pc_sog_coast != cm.cc.pc_sog_coast))
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status = (status < MODE_CHANGE) ? MODE_CHANGE : status;
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cm.totlines = totlines;
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@@ -714,6 +714,12 @@ void program_mode()
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(alt_u8)h_synclen_px,
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(alt_8)(cm.cc.clamp_offset-SIGNED_NUMVAL_ZERO),
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vmode_changed);
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// tvp_source_setup() disables the internal coast signal for PC-type presets, which is correct for RGBHV but
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// leaves the H-PLL exposed to vsync serration pulses on sync-on-green / composite-sync inputs. Keep coast
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// enabled for those when the option is set (needed e.g. for 13W3 workstation displays).
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if ((target_type & VIDEO_PC) && cm.cc.pc_sog_coast && ((target_tvp_sync <= TVP_SOG3) || (target_tvp_sync >= TVP_CS_A)))
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tvp_set_coast_enable(1);
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set_lpf(cm.cc.video_lpf);
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set_csc(cm.cc.ypbpr_cs);
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@@ -180,6 +180,13 @@ inline void tvp_set_hpllcoast(alt_u8 pre, alt_u8 post)
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tvp_writereg(TVP_HPLLPOSTCOAST, post);
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}
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// Enable/disable the internal H-PLL coast signal (MISCCTRL4 bit 2, "Coast Dis")
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void tvp_set_coast_enable(alt_u8 enable)
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{
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alt_u8 val = tvp_readreg(TVP_MISCCTRL4) & 0xFB;
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tvp_writereg(TVP_MISCCTRL4, val | (enable ? 0x00 : 0x04));
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}
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inline void tvp_set_linelen_tol(alt_u8 val) {
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tvp_writereg(TVP_LINELENTOL, val);
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}
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@@ -90,6 +90,8 @@ inline void tvp_powerup();
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inline void tvp_set_hpllcoast(alt_u8 pre, alt_u8 post);
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void tvp_set_coast_enable(alt_u8 enable);
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inline void tvp_set_linelen_tol(alt_u8 val);
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inline void tvp_set_ssthold(alt_u8 vsdetect_thold);
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@@ -159,6 +159,7 @@ typedef struct {
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alt_u8 full_tx_setup;
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alt_u8 av3_alt_rgb;
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avinput_t link_av;
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alt_u8 pc_sog_coast;
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} __attribute__((packed)) avconfig_t;
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int set_default_profile(int update_cc);
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@@ -248,6 +248,7 @@ MENU(menu_compatibility, P99_PROTECT({ \
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{ "Default HDMI VIC", OPT_AVCONFIG_NUMVALUE, { .num = { &tc.default_vic, OPT_NOWRAP, 0, HDMI_1080p50, value_disp } } },
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{ "Panasonic hack", OPT_AVCONFIG_SELECTION, { .sel = { &tc.panasonic_hack, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
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{ "Disable PR2x", OPT_AVCONFIG_SELECTION, { .sel = { &tc.hdmi_pr2x_disable, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
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{ "PC SoG/CS coast", OPT_AVCONFIG_SELECTION, { .sel = { &tc.pc_sog_coast, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
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}))
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MENU(menu_audio, P99_PROTECT({ \
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@@ -144,6 +144,7 @@ const ude_item_map ude_profile_items[] = {
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UDE_ITEM(67, 120, tc.o480p_pbox),
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UDE_ITEM(61, 122, tc.hdmi_ar),
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UDE_ITEM(61, 122, tc.hdmi_pr2x_disable),
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UDE_ITEM(68, 122, tc.pc_sog_coast),
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};
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int write_userdata(uint8_t entry) {
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