Add "PC SoG/CS coast" compatibility option

tvp_source_setup() disables the TVP7002 internal H-PLL coast for every
PC-type preset. That is right for RGBHV, but with sync-on-green or
composite sync the serration pulses during vsync disturb the H-PLL every
frame; on a NeXTstation Color (1120x832, SoG) this caused continuous
horizontal jitter, jitter in the top third of the picture and a periodic
HDMI re-sync. With the option on, coast is re-enabled after setup when the
sync source is SOG or CSYNC; RGBHV is untouched. Default Off, so existing
behaviour is unchanged. Stored as profile item id 68.

On the NeXT, this option together with the existing settings Analog sync
LPF = 10 MHz, ADC PLL BW = Low and H-PLL Pre/Post-Coast = 4/4 ran 19
minutes without a sync loss, mode re-program or IT6613 video-stable
change. SPARCstation 20 framebuffers (ZX, TurboGX) over composite sync are
stable without it.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01WiXHy7Jhh5yTdsBaenucgw

software/sys_controller/src/menu.c

@@ -248,6 +248,7 @@ MENU(menu_compatibility, P99_PROTECT({ \
     { "Default HDMI VIC",                       OPT_AVCONFIG_NUMVALUE,  { .num = { &tc.default_vic,     OPT_NOWRAP, 0, HDMI_1080p50, value_disp } } },
     { "Panasonic hack",                        OPT_AVCONFIG_SELECTION, { .sel = { &tc.panasonic_hack,   OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
     { "Disable PR2x",                          OPT_AVCONFIG_SELECTION, { .sel = { &tc.hdmi_pr2x_disable, OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
+    { "PC SoG/CS coast",                       OPT_AVCONFIG_SELECTION, { .sel = { &tc.pc_sog_coast,     OPT_WRAP, SETTING_ITEM(off_on_desc) } } },
 }))
 
 MENU(menu_audio, P99_PROTECT({ \

software/sys_controller/src/userdata.c

@@ -144,6 +144,7 @@ const ude_item_map ude_profile_items[] = {
     UDE_ITEM(67, 120, tc.o480p_pbox),
     UDE_ITEM(61, 122, tc.hdmi_ar),
     UDE_ITEM(61, 122, tc.hdmi_pr2x_disable),
+    UDE_ITEM(68, 122, tc.pc_sog_coast),
 };
 
 int write_userdata(uint8_t entry) {