8 Commits

Author	SHA1	Message	Date
marqs	4676cbd2f0	integrate zero-riscy	2018-10-06 13:19:12 +03:00
marqs	e1d8446752	BSP and sw modifications	2018-09-26 00:19:24 +03:00
marqs	dd4ffde231	update to Quartus 17.1	2017-12-07 21:35:08 +02:00
marqs	d98c23c8c1	Update project files to Quartus 17.0.	2017-05-29 19:15:34 +03:00
marqs	03bf4c2c9a	Update to Quartus 16.1.	2016-12-13 20:55:10 +02:00
marqs	f55e9a877e	SD SPI implementation finished	2016-10-21 01:19:53 +03:00
marqs	71d60144e8	Timer and SPI added.	2016-10-16 12:53:54 +03:00
marqs	388c464f63	Initial public release (FW 0.64)	2016-02-23 01:03:50 +02:00