Commit Graph
4 Commits
Author SHA1 Message Date
Russell Harmon 2995f43728 Add a 2x by 3x line3x mode for the PSP's 480x272.
Temporary commit, I don't want people to use this mode until I can
implement 3x by 3x line3x.
2020-06-14 09:54:14 +00:00
Russell Harmon c2b0687e7b Set fast output on HDMI_TX pins.
Also adjust timing constraits to reflect working state with line3x at
162 MHz.
2020-06-14 09:54:06 +00:00
Russell Harmon 71147c44dd Add 480x272 sampling/optimized mode for the PSP.
This commit adds both a 480p input sampling mode and line2x optimized
mode for the PSP's 480x272 picture. The line2x optimized mode is enabled
automatically when the sampling mode is selected.

When in-game, the PSP outputs a letterboxed 480p picture. The active
portion of the screen is 480x272, but is treated as 480p (480x720).

In addition, a line2x optimized mode is added which produces a 960x544
output picture, which if desired the top + bottom pixels can be dropped
producing a 960x540 (qHD) picture.

To generate a qHD picture, use the following settings:

V. Active: 270
V. Backporch: 135
2020-06-03 20:33:36 +00:00
Russell Harmon d80a9fbb0c Ignore paths which use shared clock lines.
Quartus calculates fmax (the theoretical maximum clock rate) based on
the entirety of the logic between registers. In the case of the pclk_*
lines, this includes some invalid paths which cross between the
3x <-> 2x and 5x <-> 4x clock domains. This is because these clocks
share output pins from the PLL, but the PLL is configured to output only
one of these clocks at a time, and the correct output from the logic is
selected via a multiplexer. Therefore these paths cannot co-occur.

This has the effect of increasing the calculated fmax of these paths to:

pclk_3x: 107.98 MHz -> 132.52 MHz
pclk_5x: 162.23 MHz -> 170.33 MHz
2020-06-01 00:31:44 +00:00