RomanRom2/ossc

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mirror of https://github.com/marqs85/ossc synced 2026-10-30 19:57:20 +03:00

Commit Graph

Author	SHA1	Message	Date
marqs	c83653c880	Release 0.69 * Improved remote control handling code * Fixed occasional mode change loop when switching to a non-interlace mode utilizing odd-field sync signal * Fixed randomly missing blue channel at power-on when using DVI output mode * Added H-PLL coast options * Finer tuning range for scanline strength and mask v0.69	2016-04-15 22:05:53 +03:00
marqs	f502b2e46c	Release 0.67. - Code cleanup - Some project files added - PAL linetriple added - FPGA PLL parameters optimized - Reduced jitter on low video clock sources v0.67	2016-03-27 23:09:31 +03:00
marqs	388c464f63	Initial public release (FW 0.64)	2016-02-23 01:03:50 +02:00

Author

SHA1

Message

Date

marqs

c83653c880

Release 0.69

* Improved remote control handling code
* Fixed occasional mode change loop when switching to a non-interlace mode utilizing odd-field sync signal
* Fixed randomly missing blue channel at power-on when using DVI output mode
* Added H-PLL coast options
* Finer tuning range for scanline strength and mask

v0.69

2016-04-15 22:05:53 +03:00

marqs

f502b2e46c

Release 0.67.

- Code cleanup
- Some project files added
- PAL linetriple added
- FPGA PLL parameters optimized
- Reduced jitter on low video clock sources

v0.67

2016-03-27 23:09:31 +03:00

marqs

388c464f63

Initial public release (FW 0.64)

2016-02-23 01:03:50 +02:00