RomanRom2/proto-PCIexpress-KiCad
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This commit is contained in:
Luca Anastasio 2019-07-26 22:45:01 +02:00
parent b22ee25c99
commit ccba2162c9
21 changed files with 14628 additions and 189 deletions
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2
Library/PCIexpress.3dshapes/PCIexpress_bracket_adapter.step
View File

@ -5,7 +5,7 @@ HEADER;
FILE_DESCRIPTION(('HOOPS Exchange Step'),'2;1');
FILE_NAME('c:\\tempstorage\\6455638199712972\\STD-PC-PCIe-BRACKET-LOW-ADAPTER.step',
FILE_NAME('PCIexpress_bracket_adapter.step',
'2019-07-17T22:04:06+00:00',
('SYSTEM'),
('Unknown organisation'),

2
Library/PCIexpress.3dshapes/PCIexpress_bracket_full.step
View File

@ -5,7 +5,7 @@ HEADER;
FILE_DESCRIPTION(('HOOPS Exchange Step'),'2;1');
FILE_NAME('c:\\tempstorage\\6660294919947353\\STD-PC-PCIe-BRACKET-SPEC.step',
FILE_NAME('PCIexpress_bracket_full.step',
'2019-07-17T22:04:23+00:00',
('SYSTEM'),
('Unknown organisation'),

2
Library/PCIexpress.3dshapes/PCIexpress_bracket_low.step
View File

@ -5,7 +5,7 @@ HEADER;
FILE_DESCRIPTION(('HOOPS Exchange Step'),'2;1');
FILE_NAME('c:\\tempstorage\\2749037528679612\\STD-PC-PCIe-BRACKET-LOW-SPEC.step',
FILE_NAME('PCIexpress_bracket_low.step',
'2019-07-17T22:04:16+00:00',
('SYSTEM'),
('Unknown organisation'),

14
Library/PCIexpress.lib
View File

@ -48,7 +48,7 @@ X +3.3V A9 600 -900 150 L 50 50 1 1 w
X +12V B1 -600 -100 150 R 50 50 1 1 w
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
X ~CLKREQ B12 -600 -1300 150 R 50 50 1 1 C
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
X GND B13 -600 -1400 150 R 50 50 1 1 w
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
@ -169,7 +169,7 @@ X +3.3V A9 600 -900 150 L 50 50 1 1 w
X +12V B1 -600 -100 150 R 50 50 1 1 w
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
X ~CLKREQ B12 -600 -1300 150 R 50 50 1 1 C
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
X GND B13 -600 -1400 150 R 50 50 1 1 w
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
@ -189,7 +189,7 @@ X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
X GND B29 -600 -3100 150 R 50 50 1 1 w
X +12V B3 -600 -300 150 R 50 50 1 1 w
X ~PWRBRK B30 -600 -3200 150 R 50 50 1 1 C
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
X GND B32 -600 -3400 150 R 50 50 1 1 w
X PETp4 B33 -600 -3600 150 R 50 50 1 1 O
@ -300,7 +300,7 @@ X +3.3V A9 600 -900 150 L 50 50 1 1 w
X +12V B1 -600 -100 150 R 50 50 1 1 w
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
X ~CLKREQ B12 -600 -1300 150 R 50 50 1 1 C
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
X GND B13 -600 -1400 150 R 50 50 1 1 w
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
@ -320,7 +320,7 @@ X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
X GND B29 -600 -3100 150 R 50 50 1 1 w
X +12V B3 -600 -300 150 R 50 50 1 1 w
X ~PWRBRK B30 -600 -3200 150 R 50 50 1 1 C
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
X GND B32 -600 -3400 150 R 50 50 1 1 w
X GND B4 -600 -400 150 R 50 50 1 1 w
@ -400,7 +400,7 @@ X +3.3V A9 600 -900 150 L 50 50 1 1 w
X +12V B1 -600 -100 150 R 50 50 1 1 w
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
X ~CLKREQ B12 -600 -1300 150 R 50 50 1 1 C
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
X GND B13 -600 -1400 150 R 50 50 1 1 w
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
@ -420,7 +420,7 @@ X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
X GND B29 -600 -3100 150 R 50 50 1 1 w
X +12V B3 -600 -300 150 R 50 50 1 1 w
X ~PWRBRK B30 -600 -3200 150 R 50 50 1 1 C
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
X GND B32 -600 -3400 150 R 50 50 1 1 w
X PETp4 B33 -600 -3600 150 R 50 50 1 1 O

1033
PCIexpress_x16_full/PCIexpress_connector.sch
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File diff suppressed because it is too large Load Diff

39
PCIexpress_x16_full/PCIexpress_x16_full-cache.lib
View File

@ -1,6 +1,41 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# PCIexpress_PCIexpress_bracket
#
DEF PCIexpress_PCIexpress_bracket J 0 40 Y Y 1 F N
@ -118,7 +153,7 @@ X +3.3V A9 600 -900 150 L 50 50 1 1 w
X +12V B1 -600 -100 150 R 50 50 1 1 w
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
X ~CLKREQ B12 -600 -1300 150 R 50 50 1 1 C
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
X GND B13 -600 -1400 150 R 50 50 1 1 w
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
@ -138,7 +173,7 @@ X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
X GND B29 -600 -3100 150 R 50 50 1 1 w
X +12V B3 -600 -300 150 R 50 50 1 1 w
X ~PWRBRK B30 -600 -3200 150 R 50 50 1 1 C
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
X GND B32 -600 -3400 150 R 50 50 1 1 w
X PETp4 B33 -600 -3600 150 R 50 50 1 1 O

5100
PCIexpress_x16_full/PCIexpress_x16_full.kicad_pcb
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File diff suppressed because it is too large Load Diff

301
PCIexpress_x16_full/PCIexpress_x16_full.pro
View File

@ -1,29 +1,10 @@
update=22/05/2015 07:44:53
update=ven 26 lug 2019 22:25:34 CEST
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
@ -31,3 +12,283 @@ NetIExt=net
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=4
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.08889999999999999
MinViaDiameter=0.45
MinViaDrill=0.2
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.0889
TrackWidth2=0.0889
TrackWidth3=0.127
TrackWidth4=0.2
ViaDiameter1=0.45
ViaDrill1=0.2
ViaDiameter2=0.45
ViaDrill2=0.2
ViaDiameter3=0.5
ViaDrill3=0.25
ViaDiameter4=0.55
ViaDrill4=0.3
dPairWidth1=0.2
dPairGap1=0.2
dPairViaGap1=0.25
dPairWidth2=0.2
dPairGap2=0.2
dPairViaGap2=0.2
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=1
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=1
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=1
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=1
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.0889
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.2
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Diff-100-PCIe
Clearance=0.2
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.2
dPairViaGap=0.25
[pcbnew/Netclasses/2]
Name=JLC2313-100d-3.5
Clearance=0.1
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.0889
dPairGap=0.1016
dPairViaGap=0.25
[pcbnew/Netclasses/3]
Name=JLC2313-100d-4
Clearance=0.1
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.1016
dPairGap=0.127
dPairViaGap=0.25
[pcbnew/Netclasses/4]
Name=JLC7628-100d-8
Clearance=0.2
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2032
dPairGap=0.2032
dPairViaGap=0.25

413
PCIexpress_x16_full/PCIexpress_x16_full.sch
View File

@ -1,26 +1,423 @@
EESchema Schematic File Version 4
LIBS:PCIexpress_x16_full-cache
EELAYER 29 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 2
Title ""
Sheet 1 34
Title "PCIexpress_x16_full"
Date ""
Rev ""
Comp ""
Comp "Author: Luca Anastasio"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 2300 5400 700 700
S 1350 1050 900 5200
U 5D508B15
F0 "PCIexpress_connector" 50
F1 "PCIexpress_connector.sch" 50
F2 "TX0+" O R 3000 5500 50
F3 "TX0-" O R 3000 5600 50
F4 "TX1+" O R 3000 5700 50
F5 "TX1-" O R 3000 5800 50
F2 "PET0_P" O R 2250 2300 50
F3 "PET0_N" O R 2250 2400 50
F4 "REFCLK+" O R 2250 2000 50
F5 "REFCLK-" O R 2250 2100 50
F6 "~PRSNT2x16" U L 1350 1550 50
F7 "TDO" I L 1350 1700 50
F8 "TMS" O R 2250 1400 50
F9 "TDI" O R 2250 1600 50
F10 "TCK" O R 2250 1500 50
F11 "PET1_P" O R 2250 2550 50
F12 "PET1_N" O R 2250 2650 50
F13 "PET2_P" O R 2250 2800 50
F14 "PET2_N" O R 2250 2900 50
F15 "PET3_P" O R 2250 3050 50
F16 "PET3_N" O R 2250 3150 50
F17 "PER1_P" I L 1350 2550 50
F18 "PER1_N" I L 1350 2650 50
F19 "PER2_P" I L 1350 2800 50
F20 "PER2_N" I L 1350 2900 50
F21 "PER3_P" I L 1350 3050 50
F22 "PER3_N" I L 1350 3150 50
F23 "PER4_P" I L 1350 3300 50
F24 "PER4_N" I L 1350 3400 50
F25 "PER5_P" I L 1350 3550 50
F26 "PER5_N" I L 1350 3650 50
F27 "PER6_P" I L 1350 3800 50
F28 "PER6_N" I L 1350 3900 50
F29 "PER7_P" I L 1350 4050 50
F30 "PER7_N" I L 1350 4150 50
F31 "~WAKE" I L 1350 1850 50
F32 "~TRST" O R 2250 1700 50
F33 "SMCLK" B L 1350 2000 50
F34 "SMDAT" B L 1350 2100 50
F35 "~PERST" O R 2250 1850 50
F36 "~PRSNT1" U L 1350 1150 50
F37 "~PRSNT2x8" U L 1350 1450 50
F38 "~PRSNT2x4" U L 1350 1350 50
F39 "~PRSNT2x1" U L 1350 1250 50
F40 "PET4_P" O R 2250 3300 50
F41 "PET4_N" O R 2250 3400 50
F42 "PET5_P" O R 2250 3550 50
F43 "PET5_N" O R 2250 3650 50
F44 "PET6_P" O R 2250 3800 50
F45 "PET6_N" O R 2250 3900 50
F46 "PET7_P" O R 2250 4050 50
F47 "PET7_N" O R 2250 4150 50
F48 "PER0_N" I L 1350 2400 50
F49 "PER0_P" I L 1350 2300 50
F50 "PER8_P" I L 1350 4300 50
F51 "PER8_N" I L 1350 4400 50
F52 "PER9_P" I L 1350 4550 50
F53 "PER9_N" I L 1350 4650 50
F54 "PET8_P" O R 2250 4300 50
F55 "PET8_N" O R 2250 4400 50
F56 "PET9_P" O R 2250 4550 50
F57 "PET9_N" O R 2250 4650 50
F58 "PER11_P" I L 1350 5050 50
F59 "PER11_N" I L 1350 5150 50
F60 "PER12_P" I L 1350 5300 50
F61 "PER12_N" I L 1350 5400 50
F62 "PER13_P" I L 1350 5550 50
F63 "PER13_N" I L 1350 5650 50
F64 "PER14_P" I L 1350 5800 50
F65 "PER14_N" I L 1350 5900 50
F66 "PER15_P" I L 1350 6050 50
F67 "PER15_N" I L 1350 6150 50
F68 "PER10_N" I L 1350 4900 50
F69 "PER10_P" I L 1350 4800 50
F70 "PET10_P" O R 2250 4800 50
F71 "PET10_N" O R 2250 4900 50
F72 "PET11_P" O R 2250 5050 50
F73 "PET11_N" O R 2250 5150 50
F74 "PET12_P" O R 2250 5300 50
F75 "PET12_N" O R 2250 5400 50
F76 "PET13_P" O R 2250 5550 50
F77 "PET13_N" O R 2250 5650 50
F78 "PET14_P" O R 2250 5800 50
F79 "PET14_N" O R 2250 5900 50
F80 "PET15_P" O R 2250 6050 50
F81 "PET15_N" O R 2250 6150 50
$EndSheet
Text Label 2350 2400 0 50 ~ 0
PET0_N
Text Label 2350 2300 0 50 ~ 0
PET0_P
Text Label 2350 2650 0 50 ~ 0
PET1_N
Text Label 2350 2550 0 50 ~ 0
PET1_P
Text Label 2350 2900 0 50 ~ 0
PET2_N
Text Label 2350 2800 0 50 ~ 0
PET2_P
Text Label 2350 3150 0 50 ~ 0
PET3_N
Text Label 2350 3050 0 50 ~ 0
PET3_P
Text Label 2350 3400 0 50 ~ 0
PET4_N
Text Label 2350 3300 0 50 ~ 0
PET4_P
Text Label 2350 3650 0 50 ~ 0
PET5_N
Text Label 2350 3550 0 50 ~ 0
PET5_P
Text Label 2350 3900 0 50 ~ 0
PET6_N
Text Label 2350 3800 0 50 ~ 0
PET6_P
Text Label 2350 4150 0 50 ~ 0
PET7_N
Text Label 2350 4050 0 50 ~ 0
PET7_P
Text Label 2350 4400 0 50 ~ 0
PET8_N
Text Label 2350 4300 0 50 ~ 0
PET8_P
Text Label 2350 4650 0 50 ~ 0
PET9_N
Text Label 2350 4550 0 50 ~ 0
PET9_P
Text Label 2350 4900 0 50 ~ 0
PET10_N
Text Label 2350 4800 0 50 ~ 0
PET10_P
Text Label 2350 5150 0 50 ~ 0
PET11_N
Text Label 2350 5050 0 50 ~ 0
PET11_P
Text Label 2350 5400 0 50 ~ 0
PET12_N
Text Label 2350 5300 0 50 ~ 0
PET12_P
Text Label 2350 5650 0 50 ~ 0
PET13_N
Text Label 2350 5550 0 50 ~ 0
PET13_P
Text Label 2350 5900 0 50 ~ 0
PET14_N
Text Label 2350 5800 0 50 ~ 0
PET14_P
Text Label 2350 6150 0 50 ~ 0
PET15_N
Text Label 2350 6050 0 50 ~ 0
PET15_P
Text Label 1250 2400 2 50 ~ 0
PER0_N
Text Label 1250 2300 2 50 ~ 0
PER0_P
Text Label 1250 2650 2 50 ~ 0
PER1_N
Text Label 1250 2550 2 50 ~ 0
PER1_P
Text Label 1250 2900 2 50 ~ 0
PER2_N
Text Label 1250 2800 2 50 ~ 0
PER2_P
Text Label 1250 3150 2 50 ~ 0
PER3_N
Text Label 1250 3050 2 50 ~ 0
PER3_P
Text Label 1250 3400 2 50 ~ 0
PER4_N
Text Label 1250 3300 2 50 ~ 0
PER4_P
Text Label 1250 3650 2 50 ~ 0
PER5_N
Text Label 1250 3550 2 50 ~ 0
PER5_P
Text Label 1250 3900 2 50 ~ 0
PER6_N
Text Label 1250 3800 2 50 ~ 0
PER6_P
Text Label 1250 4150 2 50 ~ 0
PER7_N
Text Label 1250 4050 2 50 ~ 0
PER7_P
Text Label 1250 4400 2 50 ~ 0
PER8_N
Text Label 1250 4300 2 50 ~ 0
PER8_P
Text Label 1250 4650 2 50 ~ 0
PER9_N
Text Label 1250 4550 2 50 ~ 0
PER9_P
Text Label 1250 4900 2 50 ~ 0
PER10_N
Text Label 1250 4800 2 50 ~ 0
PER10_P
Text Label 1250 5150 2 50 ~ 0
PER11_N
Text Label 1250 5050 2 50 ~ 0
PER11_P
Text Label 1250 5400 2 50 ~ 0
PER12_N
Text Label 1250 5300 2 50 ~ 0
PER12_P
Text Label 1250 5650 2 50 ~ 0
PER13_N
Text Label 1250 5550 2 50 ~ 0
PER13_P
Text Label 1250 5900 2 50 ~ 0
PER14_N
Text Label 1250 5800 2 50 ~ 0
PER14_P
Text Label 1250 6150 2 50 ~ 0
PER15_N
Text Label 1250 6050 2 50 ~ 0
PER15_P
Wire Wire Line
1250 6150 1350 6150
Wire Wire Line
1250 6050 1350 6050
Wire Wire Line
1250 5900 1350 5900
Wire Wire Line
1250 5800 1350 5800
Wire Wire Line
1250 5650 1350 5650
Wire Wire Line
1250 5550 1350 5550
Wire Wire Line
1250 5400 1350 5400
Wire Wire Line
1250 5300 1350 5300
Wire Wire Line
2250 6150 2350 6150
Wire Wire Line
2250 6050 2350 6050
Wire Wire Line
2250 5900 2350 5900
Wire Wire Line
2250 5800 2350 5800
Wire Wire Line
2250 5650 2350 5650
Wire Wire Line
2250 5550 2350 5550
Wire Wire Line
2250 5400 2350 5400
Wire Wire Line
2250 5300 2350 5300
Wire Wire Line
2250 5150 2350 5150
Wire Wire Line
2250 5050 2350 5050
Wire Wire Line
2250 4900 2350 4900
Wire Wire Line
2250 4800 2350 4800
Wire Wire Line
1250 5150 1350 5150
Wire Wire Line
1250 5050 1350 5050
Wire Wire Line
1250 4900 1350 4900
Wire Wire Line
1250 4800 1350 4800
Wire Wire Line
1250 4650 1350 4650
Wire Wire Line
1250 4550 1350 4550
Wire Wire Line
1250 4400 1350 4400
Wire Wire Line
1250 4300 1350 4300
Wire Wire Line
2250 4650 2350 4650
Wire Wire Line
2250 4550 2350 4550
Wire Wire Line
2250 4400 2350 4400
Wire Wire Line
2250 4300 2350 4300
Wire Wire Line
2250 4150 2350 4150
Wire Wire Line
2250 4050 2350 4050
Wire Wire Line
2250 3900 2350 3900
Wire Wire Line
2250 3800 2350 3800
Wire Wire Line
2250 3650 2350 3650
Wire Wire Line
2250 3550 2350 3550
Wire Wire Line
2250 3400 2350 3400
Wire Wire Line
2250 3300 2350 3300
Wire Wire Line
2250 3150 2350 3150
Wire Wire Line
2250 3050 2350 3050
Wire Wire Line
2250 2900 2350 2900
Wire Wire Line
2250 2800 2350 2800
Wire Wire Line
1250 4150 1350 4150
Wire Wire Line
1250 4050 1350 4050
Wire Wire Line
1250 3900 1350 3900
Wire Wire Line
1250 3800 1350 3800
Wire Wire Line
1250 3650 1350 3650
Wire Wire Line
1250 3550 1350 3550
Wire Wire Line
1250 3400 1350 3400
Wire Wire Line
1250 3300 1350 3300
Wire Wire Line
1250 3150 1350 3150
Wire Wire Line
1250 3050 1350 3050
Wire Wire Line
1250 2900 1350 2900
Wire Wire Line
1250 2800 1350 2800
Wire Wire Line
1250 2650 1350 2650
Wire Wire Line
1250 2550 1350 2550
Wire Wire Line
1250 2400 1350 2400
Wire Wire Line
1250 2300 1350 2300
Wire Wire Line
2250 2650 2350 2650
Wire Wire Line
2250 2550 2350 2550
Wire Wire Line
2250 2400 2350 2400
Wire Wire Line
2250 2300 2350 2300
Text Label 2350 2000 0 50 ~ 0
REFCLK+
Text Label 2350 2100 0 50 ~ 0
REFCLK-
Text Label 2350 1850 0 50 ~ 0
~PERST
Text Label 2350 1700 0 50 ~ 0
~TRST
Text Label 2350 1600 0 50 ~ 0
TDI
Text Label 2350 1500 0 50 ~ 0
TCK
Text Label 2350 1400 0 50 ~ 0
TMS
Text Label 1250 2000 2 50 ~ 0
SMCLK
Text Label 1250 2100 2 50 ~ 0
SMDAT
Text Label 1250 1850 2 50 ~ 0
~WAKE
Text Label 1250 1700 2 50 ~ 0
TDO
Text Label 1250 1150 2 50 ~ 0
~PRSNT1
Text Label 1250 1250 2 50 ~ 0
~PRSNT2x1
Text Label 1250 1350 2 50 ~ 0
~PRSNT2x4
Text Label 1250 1450 2 50 ~ 0
~PRSNT2x8
Text Label 1250 1550 2 50 ~ 0
~PRSNT2x16
Wire Wire Line
1250 2100 1350 2100
Wire Wire Line
1250 2000 1350 2000
Wire Wire Line
2250 2100 2350 2100
Wire Wire Line
2250 2000 2350 2000
Wire Wire Line
2250 1700 2350 1700
Wire Wire Line
2250 1600 2350 1600
Wire Wire Line
2250 1500 2350 1500
Wire Wire Line
2250 1400 2350 1400
Wire Wire Line
1250 1550 1350 1550
Wire Wire Line
1250 1450 1350 1450
Wire Wire Line
1250 1350 1350 1350
Wire Wire Line
1250 1250 1350 1250
Wire Wire Line
1250 1700 1350 1700
Wire Wire Line
1250 1850 1350 1850
Wire Wire Line
1250 1150 1350 1150
Wire Wire Line
2250 1850 2350 1850
$EndSCHEMATC

89
PCIexpress_x16_full/decap.sch Normal file
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@ -0,0 +1,89 @@
EESchema Schematic File Version 4
LIBS:PCIexpress_x16_full-cache
EELAYER 29 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 19 34
Title "PCIexpress_x16_full"
Date ""
Rev ""
Comp "Author: Luca Anastasio"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Device:C C?
U 1 1 5DAB6859
P 6300 3200
AR Path="/5D508B15/5DAB6859" Ref="C?" Part="1"
AR Path="/5D508B15/5DAB5272/5DAB6859" Ref="C1" Part="1"
AR Path="/5D508B15/5DB8E95F/5DAB6859" Ref="C3" Part="1"
AR Path="/5D508B15/5DBA1257/5DAB6859" Ref="C5" Part="1"
AR Path="/5D508B15/5DBB44A0/5DAB6859" Ref="C7" Part="1"
AR Path="/5D508B15/5DBC901F/5DAB6859" Ref="C9" Part="1"
AR Path="/5D508B15/5DBC9029/5DAB6859" Ref="C11" Part="1"
AR Path="/5D508B15/5DBC9033/5DAB6859" Ref="C13" Part="1"
AR Path="/5D508B15/5DBDE98A/5DAB6859" Ref="C15" Part="1"
AR Path="/5D508B15/5DBF611B/5DAB6859" Ref="C17" Part="1"
AR Path="/5D508B15/5DBF6125/5DAB6859" Ref="C19" Part="1"
AR Path="/5D508B15/5DBF612F/5DAB6859" Ref="C21" Part="1"
AR Path="/5D508B15/5DBF6139/5DAB6859" Ref="C23" Part="1"
AR Path="/5D508B15/5DC10432/5DAB6859" Ref="C25" Part="1"
AR Path="/5D508B15/5DC1043C/5DAB6859" Ref="C27" Part="1"
AR Path="/5D508B15/5DC10446/5DAB6859" Ref="C29" Part="1"
AR Path="/5D508B15/5DC10450/5DAB6859" Ref="C31" Part="1"
F 0 "C1" V 6048 3200 50 0000 C CNN
F 1 "100n" V 6139 3200 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 6338 3050 50 0001 C CNN
F 3 "~" H 6300 3200 50 0001 C CNN
1 6300 3200
0 1 1 0
$EndComp
$Comp
L Device:C C?
U 1 1 5DAB685F
P 6300 3700
AR Path="/5D508B15/5DAB685F" Ref="C?" Part="1"
AR Path="/5D508B15/5DAB5272/5DAB685F" Ref="C2" Part="1"
AR Path="/5D508B15/5DB8E95F/5DAB685F" Ref="C4" Part="1"
AR Path="/5D508B15/5DBA1257/5DAB685F" Ref="C6" Part="1"
AR Path="/5D508B15/5DBB44A0/5DAB685F" Ref="C8" Part="1"
AR Path="/5D508B15/5DBC901F/5DAB685F" Ref="C10" Part="1"
AR Path="/5D508B15/5DBC9029/5DAB685F" Ref="C12" Part="1"
AR Path="/5D508B15/5DBC9033/5DAB685F" Ref="C14" Part="1"
AR Path="/5D508B15/5DBDE98A/5DAB685F" Ref="C16" Part="1"
AR Path="/5D508B15/5DBF611B/5DAB685F" Ref="C18" Part="1"
AR Path="/5D508B15/5DBF6125/5DAB685F" Ref="C20" Part="1"
AR Path="/5D508B15/5DBF612F/5DAB685F" Ref="C22" Part="1"
AR Path="/5D508B15/5DBF6139/5DAB685F" Ref="C24" Part="1"
AR Path="/5D508B15/5DC10432/5DAB685F" Ref="C26" Part="1"
AR Path="/5D508B15/5DC1043C/5DAB685F" Ref="C28" Part="1"
AR Path="/5D508B15/5DC10446/5DAB685F" Ref="C30" Part="1"
AR Path="/5D508B15/5DC10450/5DAB685F" Ref="C32" Part="1"
F 0 "C2" V 6048 3700 50 0000 C CNN
F 1 "100n" V 6139 3700 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 6338 3550 50 0001 C CNN
F 3 "~" H 6300 3700 50 0001 C CNN
1 6300 3700
0 -1 1 0
$EndComp
Wire Wire Line
6450 3200 6550 3200
Wire Wire Line
6450 3700 6550 3700
Wire Wire Line
6150 3200 6050 3200
Wire Wire Line
6150 3700 6050 3700
Text HLabel 6550 3200 2 50 Input ~ 0
IN+
Text HLabel 6050 3200 0 50 Output ~ 0
OUT+
Text HLabel 6050 3700 0 50 Output ~ 0
OUT-
Text HLabel 6550 3700 2 50 Input ~ 0
IN-
$EndSCHEMATC

155
PCIexpress_x16_full/term.sch Normal file
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@ -0,0 +1,155 @@
EESchema Schematic File Version 4
LIBS:PCIexpress_x16_full-cache
EELAYER 29 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 18 34
Title "PCIexpress_x16_full"
Date ""
Rev ""
Comp "Author: Luca Anastasio"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Device:R R1
U 1 1 5D52DCBC
P 4750 3800
AR Path="/5D508B15/5D516DFB/5D52DCBC" Ref="R1" Part="1"
AR Path="/5D508B15/5D5D39ED/5D52DCBC" Ref="R?" Part="1"
AR Path="/5D508B15/5D5DF906/5D52DCBC" Ref="R3" Part="1"
AR Path="/5D508B15/5D761049/5D52DCBC" Ref="R5" Part="1"
AR Path="/5D508B15/5D76CFC3/5D52DCBC" Ref="R7" Part="1"
AR Path="/5D508B15/5D87B438/5D52DCBC" Ref="R9" Part="1"
AR Path="/5D508B15/5D87B440/5D52DCBC" Ref="R11" Part="1"
AR Path="/5D508B15/5D87B446/5D52DCBC" Ref="R13" Part="1"
AR Path="/5D508B15/5D88A9FD/5D52DCBC" Ref="R15" Part="1"
AR Path="/5D508B15/5D9667F2/5D52DCBC" Ref="R17" Part="1"
AR Path="/5D508B15/5D9667FA/5D52DCBC" Ref="R19" Part="1"
AR Path="/5D508B15/5D9E5907/5D52DCBC" Ref="R21" Part="1"
AR Path="/5D508B15/5D9E590D/5D52DCBC" Ref="R23" Part="1"
AR Path="/5D508B15/5D9E5913/5D52DCBC" Ref="R25" Part="1"
AR Path="/5D508B15/5D9E5919/5D52DCBC" Ref="R27" Part="1"
AR Path="/5D508B15/5D9E5923/5D52DCBC" Ref="R29" Part="1"
AR Path="/5D508B15/5D9E5929/5D52DCBC" Ref="R31" Part="1"
F 0 "R31" H 4820 3846 50 0000 L CNN
F 1 "49.9" H 4820 3755 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 4680 3800 50 0001 C CNN
F 3 "~" H 4750 3800 50 0001 C CNN
1 4750 3800
1 0 0 -1
$EndComp
$Comp
L Device:R R2
U 1 1 5D52E298
P 5750 3800
AR Path="/5D508B15/5D516DFB/5D52E298" Ref="R2" Part="1"
AR Path="/5D508B15/5D5D39ED/5D52E298" Ref="R?" Part="1"
AR Path="/5D508B15/5D5DF906/5D52E298" Ref="R4" Part="1"
AR Path="/5D508B15/5D761049/5D52E298" Ref="R6" Part="1"
AR Path="/5D508B15/5D76CFC3/5D52E298" Ref="R8" Part="1"
AR Path="/5D508B15/5D87B438/5D52E298" Ref="R10" Part="1"
AR Path="/5D508B15/5D87B440/5D52E298" Ref="R12" Part="1"
AR Path="/5D508B15/5D87B446/5D52E298" Ref="R14" Part="1"
AR Path="/5D508B15/5D88A9FD/5D52E298" Ref="R16" Part="1"
AR Path="/5D508B15/5D9667F2/5D52E298" Ref="R18" Part="1"
AR Path="/5D508B15/5D9667FA/5D52E298" Ref="R20" Part="1"
AR Path="/5D508B15/5D9E5907/5D52E298" Ref="R22" Part="1"
AR Path="/5D508B15/5D9E590D/5D52E298" Ref="R24" Part="1"
AR Path="/5D508B15/5D9E5913/5D52E298" Ref="R26" Part="1"
AR Path="/5D508B15/5D9E5919/5D52E298" Ref="R28" Part="1"
AR Path="/5D508B15/5D9E5923/5D52E298" Ref="R30" Part="1"
AR Path="/5D508B15/5D9E5929/5D52E298" Ref="R32" Part="1"
F 0 "R32" H 5820 3846 50 0000 L CNN
F 1 "49.9" H 5820 3755 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 5680 3800 50 0001 C CNN
F 3 "~" H 5750 3800 50 0001 C CNN
1 5750 3800
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0109
U 1 1 5D52E619
P 4750 4050
AR Path="/5D508B15/5D516DFB/5D52E619" Ref="#PWR0109" Part="1"
AR Path="/5D508B15/5D5D39ED/5D52E619" Ref="#PWR?" Part="1"
AR Path="/5D508B15/5D5DF906/5D52E619" Ref="#PWR0111" Part="1"
AR Path="/5D508B15/5D761049/5D52E619" Ref="#PWR0113" Part="1"
AR Path="/5D508B15/5D76CFC3/5D52E619" Ref="#PWR0115" Part="1"
AR Path="/5D508B15/5D87B438/5D52E619" Ref="#PWR0117" Part="1"
AR Path="/5D508B15/5D87B440/5D52E619" Ref="#PWR0119" Part="1"
AR Path="/5D508B15/5D87B446/5D52E619" Ref="#PWR0121" Part="1"
AR Path="/5D508B15/5D88A9FD/5D52E619" Ref="#PWR0123" Part="1"
AR Path="/5D508B15/5D9667F2/5D52E619" Ref="#PWR0125" Part="1"
AR Path="/5D508B15/5D9667FA/5D52E619" Ref="#PWR0127" Part="1"
AR Path="/5D508B15/5D9E5907/5D52E619" Ref="#PWR0129" Part="1"
AR Path="/5D508B15/5D9E590D/5D52E619" Ref="#PWR0131" Part="1"
AR Path="/5D508B15/5D9E5913/5D52E619" Ref="#PWR0133" Part="1"
AR Path="/5D508B15/5D9E5919/5D52E619" Ref="#PWR0135" Part="1"
AR Path="/5D508B15/5D9E5923/5D52E619" Ref="#PWR0137" Part="1"
AR Path="/5D508B15/5D9E5929/5D52E619" Ref="#PWR0139" Part="1"
F 0 "#PWR0139" H 4750 3800 50 0001 C CNN
F 1 "GND" H 4755 3877 50 0000 C CNN
F 2 "" H 4750 4050 50 0001 C CNN
F 3 "" H 4750 4050 50 0001 C CNN
1 4750 4050
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0110
U 1 1 5D52EC15
P 5750 4050
AR Path="/5D508B15/5D516DFB/5D52EC15" Ref="#PWR0110" Part="1"
AR Path="/5D508B15/5D5D39ED/5D52EC15" Ref="#PWR?" Part="1"
AR Path="/5D508B15/5D5DF906/5D52EC15" Ref="#PWR0112" Part="1"
AR Path="/5D508B15/5D761049/5D52EC15" Ref="#PWR0114" Part="1"
AR Path="/5D508B15/5D76CFC3/5D52EC15" Ref="#PWR0116" Part="1"
AR Path="/5D508B15/5D87B438/5D52EC15" Ref="#PWR0118" Part="1"
AR Path="/5D508B15/5D87B440/5D52EC15" Ref="#PWR0120" Part="1"
AR Path="/5D508B15/5D87B446/5D52EC15" Ref="#PWR0122" Part="1"
AR Path="/5D508B15/5D88A9FD/5D52EC15" Ref="#PWR0124" Part="1"
AR Path="/5D508B15/5D9667F2/5D52EC15" Ref="#PWR0126" Part="1"
AR Path="/5D508B15/5D9667FA/5D52EC15" Ref="#PWR0128" Part="1"
AR Path="/5D508B15/5D9E5907/5D52EC15" Ref="#PWR0130" Part="1"
AR Path="/5D508B15/5D9E590D/5D52EC15" Ref="#PWR0132" Part="1"
AR Path="/5D508B15/5D9E5913/5D52EC15" Ref="#PWR0134" Part="1"
AR Path="/5D508B15/5D9E5919/5D52EC15" Ref="#PWR0136" Part="1"
AR Path="/5D508B15/5D9E5923/5D52EC15" Ref="#PWR0138" Part="1"
AR Path="/5D508B15/5D9E5929/5D52EC15" Ref="#PWR0140" Part="1"
F 0 "#PWR0140" H 5750 3800 50 0001 C CNN
F 1 "GND" H 5755 3877 50 0000 C CNN
F 2 "" H 5750 4050 50 0001 C CNN
F 3 "" H 5750 4050 50 0001 C CNN
1 5750 4050
1 0 0 -1
$EndComp
Wire Wire Line
4750 3950 4750 4050
Wire Wire Line
5750 3950 5750 4050
Text HLabel 5850 3550 2 50 Input ~ 0
IN+
Text HLabel 4850 3550 2 50 Input ~ 0
IN-
Text HLabel 5650 3550 0 50 Output ~ 0
OUT+
Text HLabel 4650 3550 0 50 Output ~ 0
OUT-
Wire Wire Line
5750 3650 5750 3550
Wire Wire Line
5650 3550 5750 3550
Connection ~ 5750 3550
Wire Wire Line
5750 3550 5850 3550
Wire Wire Line
4650 3550 4750 3550
Wire Wire Line
4750 3650 4750 3550
Connection ~ 4750 3550
Wire Wire Line
4750 3550 4850 3550
$EndSCHEMATC

25
PCIexpress_x16_half/.gitignore vendored Normal file
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# For PCBs designed using KiCad: http://www.kicad-pcb.org/
# Format documentation: http://kicad-pcb.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv

1344
PCIexpress_x16_half/PCIexpress_connector.sch Normal file
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File diff suppressed because it is too large Load Diff

297
PCIexpress_x16_half/PCIexpress_x16_half-cache.lib Normal file
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@ -0,0 +1,297 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# PCIexpress_PCIexpress_bracket
#
DEF PCIexpress_PCIexpress_bracket J 0 40 Y Y 1 F N
F0 "J" 0 0 50 H V C CNN
F1 "PCIexpress_PCIexpress_bracket" 0 0 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
PCIexpress_bracket_*
$ENDFPLIST
DRAW
ENDDRAW
ENDDEF
#
# PCIexpress_PCIexpress_x16
#
DEF PCIexpress_PCIexpress_x16 J 0 40 Y Y 1 F N
F0 "J" 0 150 50 H V C CNN
F1 "PCIexpress_PCIexpress_x16" 0 50 50 H V C CNN
F2 "PCIexpress:PCIexpress_x16" 0 -950 50 H I C CNN
F3 "" 0 -950 50 H I C CNN
DRAW
T 0 0 -8650 50 0 0 0 x16 Normal 0 C C
T 0 0 -3450 50 0 0 0 x4 Normal 0 C C
T 0 0 -5250 50 0 0 0 x8 Normal 0 C C
T 0 0 -1150 50 0 1 1 notch Normal 0 C C
T 0 0 -1950 50 0 1 1 x1 Normal 0 C C
S 450 0 -450 -8700 1 1 10 f
P 2 0 0 0 450 -5300 -450 -5300 N
P 2 0 0 0 450 -3500 -450 -3500 N
P 2 1 1 0 450 -2000 -450 -2000 N
P 2 1 1 0 450 -1200 -450 -1200 N
X ~PRSNT1 A1 600 -100 150 L 50 50 1 1 P
X +3.3V A10 600 -1000 150 L 50 50 1 1 w
X ~PERST A11 600 -1100 150 L 50 50 1 1 O
X GND A12 600 -1300 150 L 50 50 1 1 w
X REFCLK+ A13 600 -1400 150 L 50 50 1 1 O
X REFCLK- A14 600 -1500 150 L 50 50 1 1 O
X GND A15 600 -1600 150 L 50 50 1 1 w
X PERp0 A16 600 -1700 150 L 50 50 1 1 I
X PERn0 A17 600 -1800 150 L 50 50 1 1 I
X GND A18 600 -1900 150 L 50 50 1 1 w
X RSVD A19 600 -2100 150 L 50 50 1 1 N
X +12V A2 600 -200 150 L 50 50 1 1 w
X GND A20 600 -2200 150 L 50 50 1 1 w
X PERp1 A21 600 -2300 150 L 50 50 1 1 I
X PERn1 A22 600 -2400 150 L 50 50 1 1 I
X GND A23 600 -2500 150 L 50 50 1 1 w
X GND A24 600 -2600 150 L 50 50 1 1 w
X PERp2 A25 600 -2700 150 L 50 50 1 1 I
X PERn2 A26 600 -2800 150 L 50 50 1 1 I
X GND A27 600 -2900 150 L 50 50 1 1 w
X GND A28 600 -3000 150 L 50 50 1 1 w
X PERp3 A29 600 -3100 150 L 50 50 1 1 I
X +12V A3 600 -300 150 L 50 50 1 1 w
X PERn3 A30 600 -3200 150 L 50 50 1 1 I
X GND A31 600 -3300 150 L 50 50 1 1 w
X RSVD A32 600 -3400 150 L 50 50 1 1 N
X RSVD A33 600 -3600 150 L 50 50 1 1 N
X GND A34 600 -3700 150 L 50 50 1 1 w
X PERp4 A35 600 -3800 150 L 50 50 1 1 I
X PERn4 A36 600 -3900 150 L 50 50 1 1 I
X GND A37 600 -4000 150 L 50 50 1 1 w
X GND A38 600 -4100 150 L 50 50 1 1 w
X PERp5 A39 600 -4200 150 L 50 50 1 1 I
X GND A4 600 -400 150 L 50 50 1 1 w
X PERn5 A40 600 -4300 150 L 50 50 1 1 I
X GND A41 600 -4400 150 L 50 50 1 1 w
X GND A42 600 -4500 150 L 50 50 1 1 w
X PERp6 A43 600 -4600 150 L 50 50 1 1 I
X PERn6 A44 600 -4700 150 L 50 50 1 1 I
X GND A45 600 -4800 150 L 50 50 1 1 w
X GND A46 600 -4900 150 L 50 50 1 1 w
X PERp7 A47 600 -5000 150 L 50 50 1 1 I
X PERn7 A48 600 -5100 150 L 50 50 1 1 I
X GND A49 600 -5200 150 L 50 50 1 1 w
X TCK A5 600 -500 150 L 50 50 1 1 O
X RSVD A50 600 -5400 150 L 50 50 1 1 N
X GND A51 600 -5500 150 L 50 50 1 1 w
X PERp8 A52 600 -5600 150 L 50 50 1 1 I
X PERn8 A53 600 -5700 150 L 50 50 1 1 I
X GND A54 600 -5800 150 L 50 50 1 1 w
X GND A55 600 -5900 150 L 50 50 1 1 w
X PERp9 A56 600 -6000 150 L 50 50 1 1 I
X PERn9 A57 600 -6100 150 L 50 50 1 1 I
X GND A58 600 -6200 150 L 50 50 1 1 w
X GND A59 600 -6300 150 L 50 50 1 1 w
X TDI A6 600 -600 150 L 50 50 1 1 O
X PERp10 A60 600 -6400 150 L 50 50 1 1 I
X PERn10 A61 600 -6500 150 L 50 50 1 1 I
X GND A62 600 -6600 150 L 50 50 1 1 w
X GND A63 600 -6700 150 L 50 50 1 1 w
X PERp11 A64 600 -6800 150 L 50 50 1 1 I
X PERn11 A65 600 -6900 150 L 50 50 1 1 I
X GND A66 600 -7000 150 L 50 50 1 1 w
X GND A67 600 -7100 150 L 50 50 1 1 w
X PERp12 A68 600 -7200 150 L 50 50 1 1 I
X PERn12 A69 600 -7300 150 L 50 50 1 1 I
X TDO A7 600 -700 150 L 50 50 1 1 I
X GND A70 600 -7400 150 L 50 50 1 1 w
X GND A71 600 -7500 150 L 50 50 1 1 w
X PERp13 A72 600 -7600 150 L 50 50 1 1 I
X PERn13 A73 600 -7700 150 L 50 50 1 1 I
X GND A74 600 -7800 150 L 50 50 1 1 w
X GND A75 600 -7900 150 L 50 50 1 1 w
X PERp14 A76 600 -8000 150 L 50 50 1 1 I
X PERn14 A77 600 -8100 150 L 50 50 1 1 I
X GND A78 600 -8200 150 L 50 50 1 1 w
X GND A79 600 -8300 150 L 50 50 1 1 w
X TMS A8 600 -800 150 L 50 50 1 1 O
X PERp15 A80 600 -8400 150 L 50 50 1 1 I
X PERn15 A81 600 -8500 150 L 50 50 1 1 I
X GND A82 600 -8600 150 L 50 50 1 1 w
X +3.3V A9 600 -900 150 L 50 50 1 1 w
X +12V B1 -600 -100 150 R 50 50 1 1 w
X +3.3V_aux B10 -600 -1000 150 R 50 50 1 1 w
X ~WAKE B11 -600 -1100 150 R 50 50 1 1 C
X RSVD B12 -600 -1300 150 R 50 50 1 1 N
X GND B13 -600 -1400 150 R 50 50 1 1 w
X PETp0 B14 -600 -1500 150 R 50 50 1 1 O
X PETn0 B15 -600 -1600 150 R 50 50 1 1 O
X GND B16 -600 -1700 150 R 50 50 1 1 w
X ~PRSNT2 B17 -600 -1800 150 R 50 50 1 1 P
X GND B18 -600 -1900 150 R 50 50 1 1 w
X PETp1 B19 -600 -2100 150 R 50 50 1 1 O
X +12V B2 -600 -200 150 R 50 50 1 1 w
X PETn1 B20 -600 -2200 150 R 50 50 1 1 O
X GND B21 -600 -2300 150 R 50 50 1 1 w
X GND B22 -600 -2400 150 R 50 50 1 1 w
X PETp2 B23 -600 -2500 150 R 50 50 1 1 O
X PETn2 B24 -600 -2600 150 R 50 50 1 1 O
X GND B25 -600 -2700 150 R 50 50 1 1 w
X GND B26 -600 -2800 150 R 50 50 1 1 w
X PETp3 B27 -600 -2900 150 R 50 50 1 1 O
X PETn3 B28 -600 -3000 150 R 50 50 1 1 O
X GND B29 -600 -3100 150 R 50 50 1 1 w
X +12V B3 -600 -300 150 R 50 50 1 1 w
X RSVD B30 -600 -3200 150 R 50 50 1 1 N
X ~PRSNT2 B31 -600 -3300 150 R 50 50 1 1 P
X GND B32 -600 -3400 150 R 50 50 1 1 w
X PETp4 B33 -600 -3600 150 R 50 50 1 1 O
X PETn4 B34 -600 -3700 150 R 50 50 1 1 O
X GND B35 -600 -3800 150 R 50 50 1 1 w
X GND B36 -600 -3900 150 R 50 50 1 1 w
X PETp5 B37 -600 -4000 150 R 50 50 1 1 O
X PETn5 B38 -600 -4100 150 R 50 50 1 1 O
X GND B39 -600 -4200 150 R 50 50 1 1 w
X GND B4 -600 -400 150 R 50 50 1 1 w
X GND B40 -600 -4300 150 R 50 50 1 1 w
X PETp6 B41 -600 -4400 150 R 50 50 1 1 O
X PETn6 B42 -600 -4500 150 R 50 50 1 1 O
X GND B43 -600 -4600 150 R 50 50 1 1 w
X GND B44 -600 -4700 150 R 50 50 1 1 w
X PETp7 B45 -600 -4800 150 R 50 50 1 1 O
X PETn7 B46 -600 -4900 150 R 50 50 1 1 O
X GND B47 -600 -5000 150 R 50 50 1 1 w
X ~PRSNT2 B48 -600 -5100 150 R 50 50 1 1 P
X GND B49 -600 -5200 150 R 50 50 1 1 w
X SMCLK B5 -600 -500 150 R 50 50 1 1 C
X PETp8 B50 -600 -5400 150 R 50 50 1 1 O
X PETn8 B51 -600 -5500 150 R 50 50 1 1 O
X GND B52 -600 -5600 150 R 50 50 1 1 w
X GND B53 -600 -5700 150 R 50 50 1 1 w
X PETp9 B54 -600 -5800 150 R 50 50 1 1 O
X PETn9 B55 -600 -5900 150 R 50 50 1 1 O
X GND B56 -600 -6000 150 R 50 50 1 1 w
X GND B57 -600 -6100 150 R 50 50 1 1 w
X PETp10 B58 -600 -6200 150 R 50 50 1 1 O
X PETn10 B59 -600 -6300 150 R 50 50 1 1 O
X SMDAT B6 -600 -600 150 R 50 50 1 1 C
X GND B60 -600 -6400 150 R 50 50 1 1 w
X GND B61 -600 -6500 150 R 50 50 1 1 w
X PETp11 B62 -600 -6600 150 R 50 50 1 1 O
X PETn11 B63 -600 -6700 150 R 50 50 1 1 O
X GND B64 -600 -6800 150 R 50 50 1 1 w
X GND B65 -600 -6900 150 R 50 50 1 1 w
X PETp12 B66 -600 -7000 150 R 50 50 1 1 O
X PETn12 B67 -600 -7100 150 R 50 50 1 1 O
X GND B68 -600 -7200 150 R 50 50 1 1 w
X GND B69 -600 -7300 150 R 50 50 1 1 w
X GND B7 -600 -700 150 R 50 50 1 1 w
X PETp13 B70 -600 -7400 150 R 50 50 1 1 O
X PETn13 B71 -600 -7500 150 R 50 50 1 1 O
X GND B72 -600 -7600 150 R 50 50 1 1 w
X GND B73 -600 -7700 150 R 50 50 1 1 w
X PETp14 B74 -600 -7800 150 R 50 50 1 1 O
X PETn14 B75 -600 -7900 150 R 50 50 1 1 O
X GND B76 -600 -8000 150 R 50 50 1 1 w
X GND B77 -600 -8100 150 R 50 50 1 1 w
X PETp15 B78 -600 -8200 150 R 50 50 1 1 O
X PETn15 B79 -600 -8300 150 R 50 50 1 1 O
X +3.3V B8 -600 -800 150 R 50 50 1 1 w
X GND B80 -600 -8400 150 R 50 50 1 1 w
X ~PRSNT2 B81 -600 -8500 150 R 50 50 1 1 P
X RSVD B82 -600 -8600 150 R 50 50 1 1 N
X ~TRST B9 -600 -900 150 R 50 50 1 1 O
ENDDRAW
ENDDEF
#
# power_+12V
#
DEF power_+12V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+12V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +12V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+3.3V
#
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+3.3V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS +3.3V
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_+3.3VA
#
DEF power_+3.3VA #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+3.3VA" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

5034
PCIexpress_x16_half/PCIexpress_x16_half.kicad_pcb Normal file
View File

File diff suppressed because it is too large Load Diff

294
PCIexpress_x16_half/PCIexpress_x16_half.pro Normal file
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@ -0,0 +1,294 @@
update=ven 26 lug 2019 22:25:34 CEST
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=4
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.08889999999999999
MinViaDiameter=0.45
MinViaDrill=0.2
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.0889
TrackWidth2=0.0889
TrackWidth3=0.127
TrackWidth4=0.2
ViaDiameter1=0.45
ViaDrill1=0.2
ViaDiameter2=0.45
ViaDrill2=0.2
ViaDiameter3=0.5
ViaDrill3=0.25
ViaDiameter4=0.55
ViaDrill4=0.3
dPairWidth1=0.2
dPairGap1=0.2
dPairViaGap1=0.25
dPairWidth2=0.2
dPairGap2=0.2
dPairViaGap2=0.2
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=1
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=1
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=1
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=1
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.0889
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.2
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Diff-100-PCIe
Clearance=0.2
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.2
dPairViaGap=0.25
[pcbnew/Netclasses/2]
Name=JLC2313-100d-3.5
Clearance=0.1
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.0889
dPairGap=0.1016
dPairViaGap=0.25
[pcbnew/Netclasses/3]
Name=JLC2313-100d-4
Clearance=0.1
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.1016
dPairGap=0.127
dPairViaGap=0.25
[pcbnew/Netclasses/4]
Name=JLC7628-100d-8
Clearance=0.2
TrackWidth=0.0889
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2032
dPairGap=0.2032
dPairViaGap=0.25

423
PCIexpress_x16_half/PCIexpress_x16_half.sch Normal file
View File

@ -0,0 +1,423 @@
EESchema Schematic File Version 4
LIBS:PCIexpress_x16_half-cache
EELAYER 29 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 34
Title "PCIexpress_x16_half"
Date ""
Rev ""
Comp "Author: Luca Anastasio"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 1350 1050 900 5200
U 5D508B15
F0 "PCIexpress_connector" 50
F1 "PCIexpress_connector.sch" 50
F2 "PET0_P" O R 2250 2300 50
F3 "PET0_N" O R 2250 2400 50
F4 "REFCLK+" O R 2250 2000 50
F5 "REFCLK-" O R 2250 2100 50
F6 "~PRSNT2x16" U L 1350 1550 50
F7 "TDO" I L 1350 1700 50
F8 "TMS" O R 2250 1400 50
F9 "TDI" O R 2250 1600 50
F10 "TCK" O R 2250 1500 50
F11 "PET1_P" O R 2250 2550 50
F12 "PET1_N" O R 2250 2650 50
F13 "PET2_P" O R 2250 2800 50
F14 "PET2_N" O R 2250 2900 50
F15 "PET3_P" O R 2250 3050 50
F16 "PET3_N" O R 2250 3150 50
F17 "PER1_P" I L 1350 2550 50
F18 "PER1_N" I L 1350 2650 50
F19 "PER2_P" I L 1350 2800 50
F20 "PER2_N" I L 1350 2900 50
F21 "PER3_P" I L 1350 3050 50
F22 "PER3_N" I L 1350 3150 50
F23 "PER4_P" I L 1350 3300 50
F24 "PER4_N" I L 1350 3400 50
F25 "PER5_P" I L 1350 3550 50
F26 "PER5_N" I L 1350 3650 50
F27 "PER6_P" I L 1350 3800 50
F28 "PER6_N" I L 1350 3900 50
F29 "PER7_P" I L 1350 4050 50
F30 "PER7_N" I L 1350 4150 50
F31 "~WAKE" I L 1350 1850 50
F32 "~TRST" O R 2250 1700 50
F33 "SMCLK" B L 1350 2000 50
F34 "SMDAT" B L 1350 2100 50
F35 "~PERST" O R 2250 1850 50
F36 "~PRSNT1" U L 1350 1150 50
F37 "~PRSNT2x8" U L 1350 1450 50
F38 "~PRSNT2x4" U L 1350 1350 50
F39 "~PRSNT2x1" U L 1350 1250 50
F40 "PET4_P" O R 2250 3300 50
F41 "PET4_N" O R 2250 3400 50
F42 "PET5_P" O R 2250 3550 50
F43 "PET5_N" O R 2250 3650 50
F44 "PET6_P" O R 2250 3800 50
F45 "PET6_N" O R 2250 3900 50
F46 "PET7_P" O R 2250 4050 50
F47 "PET7_N" O R 2250 4150 50
F48 "PER0_N" I L 1350 2400 50
F49 "PER0_P" I L 1350 2300 50
F50 "PER8_P" I L 1350 4300 50
F51 "PER8_N" I L 1350 4400 50
F52 "PER9_P" I L 1350 4550 50
F53 "PER9_N" I L 1350 4650 50
F54 "PET8_P" O R 2250 4300 50
F55 "PET8_N" O R 2250 4400 50
F56 "PET9_P" O R 2250 4550 50
F57 "PET9_N" O R 2250 4650 50
F58 "PER11_P" I L 1350 5050 50
F59 "PER11_N" I L 1350 5150 50
F60 "PER12_P" I L 1350 5300 50
F61 "PER12_N" I L 1350 5400 50
F62 "PER13_P" I L 1350 5550 50
F63 "PER13_N" I L 1350 5650 50
F64 "PER14_P" I L 1350 5800 50
F65 "PER14_N" I L 1350 5900 50
F66 "PER15_P" I L 1350 6050 50
F67 "PER15_N" I L 1350 6150 50
F68 "PER10_N" I L 1350 4900 50
F69 "PER10_P" I L 1350 4800 50
F70 "PET10_P" O R 2250 4800 50
F71 "PET10_N" O R 2250 4900 50
F72 "PET11_P" O R 2250 5050 50
F73 "PET11_N" O R 2250 5150 50
F74 "PET12_P" O R 2250 5300 50
F75 "PET12_N" O R 2250 5400 50
F76 "PET13_P" O R 2250 5550 50
F77 "PET13_N" O R 2250 5650 50
F78 "PET14_P" O R 2250 5800 50
F79 "PET14_N" O R 2250 5900 50
F80 "PET15_P" O R 2250 6050 50
F81 "PET15_N" O R 2250 6150 50
$EndSheet
Text Label 2350 2400 0 50 ~ 0
PET0_N
Text Label 2350 2300 0 50 ~ 0
PET0_P
Text Label 2350 2650 0 50 ~ 0
PET1_N
Text Label 2350 2550 0 50 ~ 0
PET1_P
Text Label 2350 2900 0 50 ~ 0
PET2_N
Text Label 2350 2800 0 50 ~ 0
PET2_P
Text Label 2350 3150 0 50 ~ 0
PET3_N
Text Label 2350 3050 0 50 ~ 0
PET3_P
Text Label 2350 3400 0 50 ~ 0
PET4_N
Text Label 2350 3300 0 50 ~ 0
PET4_P
Text Label 2350 3650 0 50 ~ 0
PET5_N
Text Label 2350 3550 0 50 ~ 0
PET5_P
Text Label 2350 3900 0 50 ~ 0
PET6_N
Text Label 2350 3800 0 50 ~ 0
PET6_P
Text Label 2350 4150 0 50 ~ 0
PET7_N
Text Label 2350 4050 0 50 ~ 0
PET7_P
Text Label 2350 4400 0 50 ~ 0
PET8_N
Text Label 2350 4300 0 50 ~ 0
PET8_P
Text Label 2350 4650 0 50 ~ 0
PET9_N
Text Label 2350 4550 0 50 ~ 0
PET9_P
Text Label 2350 4900 0 50 ~ 0
PET10_N
Text Label 2350 4800 0 50 ~ 0
PET10_P
Text Label 2350 5150 0 50 ~ 0
PET11_N
Text Label 2350 5050 0 50 ~ 0
PET11_P
Text Label 2350 5400 0 50 ~ 0
PET12_N
Text Label 2350 5300 0 50 ~ 0
PET12_P
Text Label 2350 5650 0 50 ~ 0
PET13_N
Text Label 2350 5550 0 50 ~ 0
PET13_P
Text Label 2350 5900 0 50 ~ 0
PET14_N
Text Label 2350 5800 0 50 ~ 0
PET14_P
Text Label 2350 6150 0 50 ~ 0
PET15_N
Text Label 2350 6050 0 50 ~ 0
PET15_P
Text Label 1250 2400 2 50 ~ 0
PER0_N
Text Label 1250 2300 2 50 ~ 0
PER0_P
Text Label 1250 2650 2 50 ~ 0
PER1_N
Text Label 1250 2550 2 50 ~ 0
PER1_P
Text Label 1250 2900 2 50 ~ 0
PER2_N
Text Label 1250 2800 2 50 ~ 0
PER2_P
Text Label 1250 3150 2 50 ~ 0
PER3_N
Text Label 1250 3050 2 50 ~ 0
PER3_P
Text Label 1250 3400 2 50 ~ 0
PER4_N
Text Label 1250 3300 2 50 ~ 0
PER4_P
Text Label 1250 3650 2 50 ~ 0
PER5_N
Text Label 1250 3550 2 50 ~ 0
PER5_P
Text Label 1250 3900 2 50 ~ 0
PER6_N
Text Label 1250 3800 2 50 ~ 0
PER6_P
Text Label 1250 4150 2 50 ~ 0
PER7_N
Text Label 1250 4050 2 50 ~ 0
PER7_P
Text Label 1250 4400 2 50 ~ 0
PER8_N
Text Label 1250 4300 2 50 ~ 0
PER8_P
Text Label 1250 4650 2 50 ~ 0
PER9_N
Text Label 1250 4550 2 50 ~ 0
PER9_P
Text Label 1250 4900 2 50 ~ 0
PER10_N
Text Label 1250 4800 2 50 ~ 0
PER10_P
Text Label 1250 5150 2 50 ~ 0
PER11_N
Text Label 1250 5050 2 50 ~ 0
PER11_P
Text Label 1250 5400 2 50 ~ 0
PER12_N
Text Label 1250 5300 2 50 ~ 0
PER12_P
Text Label 1250 5650 2 50 ~ 0
PER13_N
Text Label 1250 5550 2 50 ~ 0
PER13_P
Text Label 1250 5900 2 50 ~ 0
PER14_N
Text Label 1250 5800 2 50 ~ 0
PER14_P
Text Label 1250 6150 2 50 ~ 0
PER15_N
Text Label 1250 6050 2 50 ~ 0
PER15_P
Wire Wire Line
1250 6150 1350 6150
Wire Wire Line
1250 6050 1350 6050
Wire Wire Line
1250 5900 1350 5900
Wire Wire Line
1250 5800 1350 5800
Wire Wire Line
1250 5650 1350 5650
Wire Wire Line
1250 5550 1350 5550
Wire Wire Line
1250 5400 1350 5400
Wire Wire Line
1250 5300 1350 5300
Wire Wire Line
2250 6150 2350 6150
Wire Wire Line
2250 6050 2350 6050
Wire Wire Line
2250 5900 2350 5900
Wire Wire Line
2250 5800 2350 5800
Wire Wire Line
2250 5650 2350 5650
Wire Wire Line
2250 5550 2350 5550
Wire Wire Line
2250 5400 2350 5400
Wire Wire Line
2250 5300 2350 5300
Wire Wire Line
2250 5150 2350 5150
Wire Wire Line
2250 5050 2350 5050
Wire Wire Line
2250 4900 2350 4900
Wire Wire Line
2250 4800 2350 4800
Wire Wire Line
1250 5150 1350 5150
Wire Wire Line
1250 5050 1350 5050
Wire Wire Line
1250 4900 1350 4900
Wire Wire Line
1250 4800 1350 4800
Wire Wire Line
1250 4650 1350 4650
Wire Wire Line
1250 4550 1350 4550
Wire Wire Line
1250 4400 1350 4400
Wire Wire Line
1250 4300 1350 4300
Wire Wire Line
2250 4650 2350 4650
Wire Wire Line
2250 4550 2350 4550
Wire Wire Line
2250 4400 2350 4400
Wire Wire Line
2250 4300 2350 4300
Wire Wire Line
2250 4150 2350 4150
Wire Wire Line
2250 4050 2350 4050
Wire Wire Line
2250 3900 2350 3900
Wire Wire Line
2250 3800 2350 3800
Wire Wire Line
2250 3650 2350 3650
Wire Wire Line
2250 3550 2350 3550
Wire Wire Line
2250 3400 2350 3400
Wire Wire Line
2250 3300 2350 3300
Wire Wire Line
2250 3150 2350 3150
Wire Wire Line
2250 3050 2350 3050
Wire Wire Line
2250 2900 2350 2900
Wire Wire Line
2250 2800 2350 2800
Wire Wire Line
1250 4150 1350 4150
Wire Wire Line
1250 4050 1350 4050
Wire Wire Line
1250 3900 1350 3900
Wire Wire Line
1250 3800 1350 3800
Wire Wire Line
1250 3650 1350 3650
Wire Wire Line
1250 3550 1350 3550
Wire Wire Line
1250 3400 1350 3400
Wire Wire Line
1250 3300 1350 3300
Wire Wire Line
1250 3150 1350 3150
Wire Wire Line
1250 3050 1350 3050
Wire Wire Line
1250 2900 1350 2900
Wire Wire Line
1250 2800 1350 2800
Wire Wire Line
1250 2650 1350 2650
Wire Wire Line
1250 2550 1350 2550
Wire Wire Line
1250 2400 1350 2400
Wire Wire Line
1250 2300 1350 2300
Wire Wire Line
2250 2650 2350 2650
Wire Wire Line
2250 2550 2350 2550
Wire Wire Line
2250 2400 2350 2400
Wire Wire Line
2250 2300 2350 2300
Text Label 2350 2000 0 50 ~ 0
REFCLK+
Text Label 2350 2100 0 50 ~ 0
REFCLK-
Text Label 2350 1850 0 50 ~ 0
~PERST
Text Label 2350 1700 0 50 ~ 0
~TRST
Text Label 2350 1600 0 50 ~ 0
TDI
Text Label 2350 1500 0 50 ~ 0
TCK
Text Label 2350 1400 0 50 ~ 0
TMS
Text Label 1250 2000 2 50 ~ 0
SMCLK
Text Label 1250 2100 2 50 ~ 0
SMDAT
Text Label 1250 1850 2 50 ~ 0
~WAKE
Text Label 1250 1700 2 50 ~ 0
TDO
Text Label 1250 1150 2 50 ~ 0
~PRSNT1
Text Label 1250 1250 2 50 ~ 0
~PRSNT2x1
Text Label 1250 1350 2 50 ~ 0
~PRSNT2x4
Text Label 1250 1450 2 50 ~ 0
~PRSNT2x8
Text Label 1250 1550 2 50 ~ 0
~PRSNT2x16
Wire Wire Line
1250 2100 1350 2100
Wire Wire Line
1250 2000 1350 2000
Wire Wire Line
2250 2100 2350 2100
Wire Wire Line
2250 2000 2350 2000
Wire Wire Line
2250 1700 2350 1700
Wire Wire Line
2250 1600 2350 1600
Wire Wire Line
2250 1500 2350 1500
Wire Wire Line
2250 1400 2350 1400
Wire Wire Line
1250 1550 1350 1550
Wire Wire Line
1250 1450 1350 1450
Wire Wire Line
1250 1350 1350 1350
Wire Wire Line
1250 1250 1350 1250
Wire Wire Line
1250 1700 1350 1700
Wire Wire Line
1250 1850 1350 1850
Wire Wire Line
1250 1150 1350 1150
Wire Wire Line
2250 1850 2350 1850
$EndSCHEMATC

89
PCIexpress_x16_half/decap.sch Normal file
View File

@ -0,0 +1,89 @@
EESchema Schematic File Version 4
LIBS:PCIexpress_x16_half-cache
EELAYER 29 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 19 34
Title "PCIexpress_x16_half"
Date ""
Rev ""
Comp "Author: Luca Anastasio"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Device:C C?
U 1 1 5DAB6859
P 6300 3200
AR Path="/5D508B15/5DAB6859" Ref="C?" Part="1"
AR Path="/5D508B15/5DAB5272/5DAB6859" Ref="C1" Part="1"
AR Path="/5D508B15/5DB8E95F/5DAB6859" Ref="C3" Part="1"
AR Path="/5D508B15/5DBA1257/5DAB6859" Ref="C5" Part="1"
AR Path="/5D508B15/5DBB44A0/5DAB6859" Ref="C7" Part="1"
AR Path="/5D508B15/5DBC901F/5DAB6859" Ref="C9" Part="1"
AR Path="/5D508B15/5DBC9029/5DAB6859" Ref="C11" Part="1"
AR Path="/5D508B15/5DBC9033/5DAB6859" Ref="C13" Part="1"
AR Path="/5D508B15/5DBDE98A/5DAB6859" Ref="C15" Part="1"
AR Path="/5D508B15/5DBF611B/5DAB6859" Ref="C17" Part="1"
AR Path="/5D508B15/5DBF6125/5DAB6859" Ref="C19" Part="1"
AR Path="/5D508B15/5DBF612F/5DAB6859" Ref="C21" Part="1"
AR Path="/5D508B15/5DBF6139/5DAB6859" Ref="C23" Part="1"
AR Path="/5D508B15/5DC10432/5DAB6859" Ref="C25" Part="1"
AR Path="/5D508B15/5DC1043C/5DAB6859" Ref="C27" Part="1"
AR Path="/5D508B15/5DC10446/5DAB6859" Ref="C29" Part="1"
AR Path="/5D508B15/5DC10450/5DAB6859" Ref="C31" Part="1"
F 0 "C1" V 6048 3200 50 0000 C CNN
F 1 "100n" V 6139 3200 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 6338 3050 50 0001 C CNN
F 3 "~" H 6300 3200 50 0001 C CNN
1 6300 3200
0 1 1 0
$EndComp
$Comp
L Device:C C?
U 1 1 5DAB685F
P 6300 3700
AR Path="/5D508B15/5DAB685F" Ref="C?" Part="1"
AR Path="/5D508B15/5DAB5272/5DAB685F" Ref="C2" Part="1"
AR Path="/5D508B15/5DB8E95F/5DAB685F" Ref="C4" Part="1"
AR Path="/5D508B15/5DBA1257/5DAB685F" Ref="C6" Part="1"
AR Path="/5D508B15/5DBB44A0/5DAB685F" Ref="C8" Part="1"
AR Path="/5D508B15/5DBC901F/5DAB685F" Ref="C10" Part="1"
AR Path="/5D508B15/5DBC9029/5DAB685F" Ref="C12" Part="1"
AR Path="/5D508B15/5DBC9033/5DAB685F" Ref="C14" Part="1"
AR Path="/5D508B15/5DBDE98A/5DAB685F" Ref="C16" Part="1"
AR Path="/5D508B15/5DBF611B/5DAB685F" Ref="C18" Part="1"
AR Path="/5D508B15/5DBF6125/5DAB685F" Ref="C20" Part="1"
AR Path="/5D508B15/5DBF612F/5DAB685F" Ref="C22" Part="1"
AR Path="/5D508B15/5DBF6139/5DAB685F" Ref="C24" Part="1"
AR Path="/5D508B15/5DC10432/5DAB685F" Ref="C26" Part="1"
AR Path="/5D508B15/5DC1043C/5DAB685F" Ref="C28" Part="1"
AR Path="/5D508B15/5DC10446/5DAB685F" Ref="C30" Part="1"
AR Path="/5D508B15/5DC10450/5DAB685F" Ref="C32" Part="1"
F 0 "C2" V 6048 3700 50 0000 C CNN
F 1 "100n" V 6139 3700 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 6338 3550 50 0001 C CNN
F 3 "~" H 6300 3700 50 0001 C CNN
1 6300 3700
0 -1 1 0
$EndComp
Wire Wire Line
6450 3200 6550 3200
Wire Wire Line
6450 3700 6550 3700
Wire Wire Line
6150 3200 6050 3200
Wire Wire Line
6150 3700 6050 3700
Text HLabel 6550 3200 2 50 Input ~ 0
IN+
Text HLabel 6050 3200 0 50 Output ~ 0
OUT+
Text HLabel 6050 3700 0 50 Output ~ 0
OUT-
Text HLabel 6550 3700 2 50 Input ~ 0
IN-
$EndSCHEMATC

3
PCIexpress_x16_half/fp-lib-table Normal file
View File

@ -0,0 +1,3 @@
(fp_lib_table
(lib (name PCIexpress)(type KiCad)(uri ${KIPRJMOD}/../Library/PCIexpress.pretty)(options "")(descr ""))
)

3
PCIexpress_x16_half/sym-lib-table Normal file
View File

@ -0,0 +1,3 @@
(sym_lib_table
(lib (name PCIexpress)(type Legacy)(uri ${KIPRJMOD}/../Library/PCIexpress.lib)(options "")(descr ""))
)

155
PCIexpress_x16_half/term.sch Normal file
View File

@ -0,0 +1,155 @@
EESchema Schematic File Version 4
LIBS:PCIexpress_x16_half-cache
EELAYER 29 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 18 34
Title "PCIexpress_x16_half"
Date ""
Rev ""
Comp "Author: Luca Anastasio"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Device:R R1
U 1 1 5D52DCBC
P 4750 3800
AR Path="/5D508B15/5D516DFB/5D52DCBC" Ref="R1" Part="1"
AR Path="/5D508B15/5D5D39ED/5D52DCBC" Ref="R?" Part="1"
AR Path="/5D508B15/5D5DF906/5D52DCBC" Ref="R3" Part="1"
AR Path="/5D508B15/5D761049/5D52DCBC" Ref="R5" Part="1"
AR Path="/5D508B15/5D76CFC3/5D52DCBC" Ref="R7" Part="1"
AR Path="/5D508B15/5D87B438/5D52DCBC" Ref="R9" Part="1"
AR Path="/5D508B15/5D87B440/5D52DCBC" Ref="R11" Part="1"
AR Path="/5D508B15/5D87B446/5D52DCBC" Ref="R13" Part="1"
AR Path="/5D508B15/5D88A9FD/5D52DCBC" Ref="R15" Part="1"
AR Path="/5D508B15/5D9667F2/5D52DCBC" Ref="R17" Part="1"
AR Path="/5D508B15/5D9667FA/5D52DCBC" Ref="R19" Part="1"
AR Path="/5D508B15/5D9E5907/5D52DCBC" Ref="R21" Part="1"
AR Path="/5D508B15/5D9E590D/5D52DCBC" Ref="R23" Part="1"
AR Path="/5D508B15/5D9E5913/5D52DCBC" Ref="R25" Part="1"
AR Path="/5D508B15/5D9E5919/5D52DCBC" Ref="R27" Part="1"
AR Path="/5D508B15/5D9E5923/5D52DCBC" Ref="R29" Part="1"
AR Path="/5D508B15/5D9E5929/5D52DCBC" Ref="R31" Part="1"
F 0 "R31" H 4820 3846 50 0000 L CNN
F 1 "49.9" H 4820 3755 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 4680 3800 50 0001 C CNN
F 3 "~" H 4750 3800 50 0001 C CNN
1 4750 3800
1 0 0 -1
$EndComp
$Comp
L Device:R R2
U 1 1 5D52E298
P 5750 3800
AR Path="/5D508B15/5D516DFB/5D52E298" Ref="R2" Part="1"
AR Path="/5D508B15/5D5D39ED/5D52E298" Ref="R?" Part="1"
AR Path="/5D508B15/5D5DF906/5D52E298" Ref="R4" Part="1"
AR Path="/5D508B15/5D761049/5D52E298" Ref="R6" Part="1"
AR Path="/5D508B15/5D76CFC3/5D52E298" Ref="R8" Part="1"
AR Path="/5D508B15/5D87B438/5D52E298" Ref="R10" Part="1"
AR Path="/5D508B15/5D87B440/5D52E298" Ref="R12" Part="1"
AR Path="/5D508B15/5D87B446/5D52E298" Ref="R14" Part="1"
AR Path="/5D508B15/5D88A9FD/5D52E298" Ref="R16" Part="1"
AR Path="/5D508B15/5D9667F2/5D52E298" Ref="R18" Part="1"
AR Path="/5D508B15/5D9667FA/5D52E298" Ref="R20" Part="1"
AR Path="/5D508B15/5D9E5907/5D52E298" Ref="R22" Part="1"
AR Path="/5D508B15/5D9E590D/5D52E298" Ref="R24" Part="1"
AR Path="/5D508B15/5D9E5913/5D52E298" Ref="R26" Part="1"
AR Path="/5D508B15/5D9E5919/5D52E298" Ref="R28" Part="1"
AR Path="/5D508B15/5D9E5923/5D52E298" Ref="R30" Part="1"
AR Path="/5D508B15/5D9E5929/5D52E298" Ref="R32" Part="1"
F 0 "R32" H 5820 3846 50 0000 L CNN
F 1 "49.9" H 5820 3755 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 5680 3800 50 0001 C CNN
F 3 "~" H 5750 3800 50 0001 C CNN
1 5750 3800
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0109
U 1 1 5D52E619
P 4750 4050
AR Path="/5D508B15/5D516DFB/5D52E619" Ref="#PWR0109" Part="1"
AR Path="/5D508B15/5D5D39ED/5D52E619" Ref="#PWR?" Part="1"
AR Path="/5D508B15/5D5DF906/5D52E619" Ref="#PWR0111" Part="1"
AR Path="/5D508B15/5D761049/5D52E619" Ref="#PWR0113" Part="1"
AR Path="/5D508B15/5D76CFC3/5D52E619" Ref="#PWR0115" Part="1"
AR Path="/5D508B15/5D87B438/5D52E619" Ref="#PWR0117" Part="1"
AR Path="/5D508B15/5D87B440/5D52E619" Ref="#PWR0119" Part="1"
AR Path="/5D508B15/5D87B446/5D52E619" Ref="#PWR0121" Part="1"
AR Path="/5D508B15/5D88A9FD/5D52E619" Ref="#PWR0123" Part="1"
AR Path="/5D508B15/5D9667F2/5D52E619" Ref="#PWR0125" Part="1"
AR Path="/5D508B15/5D9667FA/5D52E619" Ref="#PWR0127" Part="1"
AR Path="/5D508B15/5D9E5907/5D52E619" Ref="#PWR0129" Part="1"
AR Path="/5D508B15/5D9E590D/5D52E619" Ref="#PWR0131" Part="1"
AR Path="/5D508B15/5D9E5913/5D52E619" Ref="#PWR0133" Part="1"
AR Path="/5D508B15/5D9E5919/5D52E619" Ref="#PWR0135" Part="1"
AR Path="/5D508B15/5D9E5923/5D52E619" Ref="#PWR0137" Part="1"
AR Path="/5D508B15/5D9E5929/5D52E619" Ref="#PWR0139" Part="1"
F 0 "#PWR0139" H 4750 3800 50 0001 C CNN
F 1 "GND" H 4755 3877 50 0000 C CNN
F 2 "" H 4750 4050 50 0001 C CNN
F 3 "" H 4750 4050 50 0001 C CNN
1 4750 4050
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0110
U 1 1 5D52EC15
P 5750 4050
AR Path="/5D508B15/5D516DFB/5D52EC15" Ref="#PWR0110" Part="1"
AR Path="/5D508B15/5D5D39ED/5D52EC15" Ref="#PWR?" Part="1"
AR Path="/5D508B15/5D5DF906/5D52EC15" Ref="#PWR0112" Part="1"
AR Path="/5D508B15/5D761049/5D52EC15" Ref="#PWR0114" Part="1"
AR Path="/5D508B15/5D76CFC3/5D52EC15" Ref="#PWR0116" Part="1"
AR Path="/5D508B15/5D87B438/5D52EC15" Ref="#PWR0118" Part="1"
AR Path="/5D508B15/5D87B440/5D52EC15" Ref="#PWR0120" Part="1"
AR Path="/5D508B15/5D87B446/5D52EC15" Ref="#PWR0122" Part="1"
AR Path="/5D508B15/5D88A9FD/5D52EC15" Ref="#PWR0124" Part="1"
AR Path="/5D508B15/5D9667F2/5D52EC15" Ref="#PWR0126" Part="1"
AR Path="/5D508B15/5D9667FA/5D52EC15" Ref="#PWR0128" Part="1"
AR Path="/5D508B15/5D9E5907/5D52EC15" Ref="#PWR0130" Part="1"
AR Path="/5D508B15/5D9E590D/5D52EC15" Ref="#PWR0132" Part="1"
AR Path="/5D508B15/5D9E5913/5D52EC15" Ref="#PWR0134" Part="1"
AR Path="/5D508B15/5D9E5919/5D52EC15" Ref="#PWR0136" Part="1"
AR Path="/5D508B15/5D9E5923/5D52EC15" Ref="#PWR0138" Part="1"
AR Path="/5D508B15/5D9E5929/5D52EC15" Ref="#PWR0140" Part="1"
F 0 "#PWR0140" H 5750 3800 50 0001 C CNN
F 1 "GND" H 5755 3877 50 0000 C CNN
F 2 "" H 5750 4050 50 0001 C CNN
F 3 "" H 5750 4050 50 0001 C CNN
1 5750 4050
1 0 0 -1
$EndComp
Wire Wire Line
4750 3950 4750 4050
Wire Wire Line
5750 3950 5750 4050
Text HLabel 5850 3550 2 50 Input ~ 0
IN+
Text HLabel 4850 3550 2 50 Input ~ 0
IN-
Text HLabel 5650 3550 0 50 Output ~ 0
OUT+
Text HLabel 4650 3550 0 50 Output ~ 0
OUT-
Wire Wire Line
5750 3650 5750 3550
Wire Wire Line
5650 3550 5750 3550
Connection ~ 5750 3550
Wire Wire Line
5750 3550 5850 3550
Wire Wire Line
4650 3550 4750 3550
Wire Wire Line
4750 3650 4750 3550
Connection ~ 4750 3550
Wire Wire Line
4750 3550 4850 3550
$EndSCHEMATC