mirror of
https://github.com/lucanastasio/PCIexpress-KiCad
synced 2025-11-09 20:56:00 +03:00
1019 lines
67 KiB
Plaintext
1019 lines
67 KiB
Plaintext
(kicad_pcb (version 20171130) (host pcbnew 5.1.3-ffb9f22~84~ubuntu16.04.1)
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(general
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(thickness 1.6)
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(drawings 48)
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(tracks 35)
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(zones 0)
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(modules 6)
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(nets 25)
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)
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(page B)
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(title_block
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(title PCIexpress_x16_full)
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(company "Author: Luca Anastasio")
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)
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(layers
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(0 F.Cu power)
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(1 In1.Cu power)
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(2 In2.Cu power)
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(31 B.Cu power)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.0889)
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(user_trace_width 0.0889)
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(user_trace_width 0.127)
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(user_trace_width 0.2)
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(trace_clearance 0.0889)
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(zone_clearance 0)
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(zone_45_only no)
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(trace_min 0.0889)
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(via_size 0.45)
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(via_drill 0.2)
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(via_min_size 0.45)
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(via_min_drill 0.2)
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(user_via 0.45 0.2)
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(user_via 0.5 0.25)
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(user_via 0.55 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.05)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.12)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.051)
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(solder_mask_min_width 0.25)
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(aux_axis_origin 109.625 194.125)
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(grid_origin 109.625 194.125)
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(visible_elements FFFDFFFF)
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(pcbplotparams
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(layerselection 0x010fc_ffffffff)
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(usegerberextensions false)
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(usegerberattributes false)
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(usegerberadvancedattributes false)
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(creategerberjobfile false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net 1 GND)
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(net 2 +12V)
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(net 3 +3V3)
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(net 4 +3.3VA)
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(net 5 "Net-(J2-PadB12)")
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(net 6 /PER0_P)
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(net 7 /PER0_N)
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(net 8 /SMCLK)
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(net 9 /SMDAT)
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(net 10 /~TRST)
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(net 11 /~WAKE)
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(net 12 /PET0_P)
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(net 13 /PET0_N)
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(net 14 /~PRSNT2x1)
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(net 15 /~PRSNT1)
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(net 16 /TCK)
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(net 17 /TDI)
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(net 18 /TDO)
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(net 19 /TMS)
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(net 20 /~PERST)
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(net 21 /REFCLK-)
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(net 22 /REFCLK+)
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(net 23 /PCIexpress_connector/_PER0_P)
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(net 24 /PCIexpress_connector/_PER0_N)
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(net_class Default "This is the default net class."
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(clearance 0.0889)
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(trace_width 0.0889)
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(via_dia 0.45)
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(via_drill 0.2)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(diff_pair_width 0.2)
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(diff_pair_gap 0.2)
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(add_net +12V)
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(add_net +3.3VA)
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(add_net +3V3)
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(add_net /SMCLK)
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(add_net /SMDAT)
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(add_net /TCK)
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(add_net /TDI)
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(add_net /TDO)
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(add_net /TMS)
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(add_net /~PERST)
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(add_net /~PRSNT1)
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(add_net /~PRSNT2x1)
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(add_net /~TRST)
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(add_net /~WAKE)
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(add_net GND)
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(add_net "Net-(J2-PadB12)")
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)
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(net_class Diff-100-PCIe ""
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(clearance 0.2)
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(trace_width 0.0889)
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(via_dia 0.45)
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(via_drill 0.2)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(diff_pair_width 0.2)
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(diff_pair_gap 0.2)
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(add_net /PCIexpress_connector/_PER0_N)
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(add_net /PCIexpress_connector/_PER0_P)
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(add_net /PER0_N)
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(add_net /PER0_P)
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(add_net /PET0_N)
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(add_net /PET0_P)
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(add_net /REFCLK+)
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(add_net /REFCLK-)
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)
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(net_class JLC2313-100d-3.5 ""
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(clearance 0.1)
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(trace_width 0.0889)
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(via_dia 0.45)
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(via_drill 0.2)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(diff_pair_width 0.0889)
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(diff_pair_gap 0.1016)
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)
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(net_class JLC2313-100d-4 ""
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(clearance 0.1)
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(trace_width 0.0889)
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(via_dia 0.45)
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(via_drill 0.2)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(diff_pair_width 0.1016)
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(diff_pair_gap 0.127)
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)
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(net_class JLC7628-100d-8 ""
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(clearance 0.2)
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(trace_width 0.0889)
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(via_dia 0.45)
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(via_drill 0.2)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(diff_pair_width 0.2032)
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(diff_pair_gap 0.2032)
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)
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(module PCIexpress:PCIexpress_x1 (layer F.Cu) (tedit 5D338A37) (tstamp 5D4F3706)
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(at 109.625 194.125)
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(descr "PCIexpress x1 footprint")
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(tags PCIexpress)
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(path /5D508B15/5D4FEBD7)
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(attr virtual)
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(fp_text reference J2 (at 0 -19.75) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value PCIexpress_x1 (at 0 -23) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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(fp_text user "Keep out components and traces both sides" (at 264.25 -65.25 90) (layer Cmts.User)
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(effects (font (size 1 1) (thickness 0.15)))
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(fp_text user %R (at 0 -17.5) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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(fp_arc (start 12 -7.45) (end 11.05 -7.45) (angle 180) (layer Dwgs.User) (width 0.12))
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(fp_text user "Full height max" (at 36.75 -108.25) (layer Cmts.User)
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(fp_text user "Half length max" (at 124.5 -72.25 90) (layer Cmts.User)
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(fp_poly (pts (xy -11.8 -4.5) (xy -11.8 -8) (xy -3.8 -8) (xy -3.8 -4.5)) (layer F.Mask) (width 0))
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|
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(fp_circle (center 261.77 -106.13) (end 263.37 -106.13) (layer Dwgs.User) (width 0.12))
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(pad B1 connect rect (at 0.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 2 +12V))
|
|
(pad B2 connect rect (at 1.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 2 +12V))
|
|
(pad B3 connect rect (at 2.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 2 +12V))
|
|
(pad B4 connect rect (at 3.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 1 GND))
|
|
(pad B5 connect rect (at 4.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 8 /SMCLK))
|
|
(pad B6 connect rect (at 5.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 9 /SMDAT))
|
|
(pad B7 connect rect (at 6.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 1 GND))
|
|
(pad B8 connect rect (at 7.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 3 +3V3))
|
|
(pad B9 connect rect (at 8.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 10 /~TRST))
|
|
(pad B10 connect rect (at 9.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 4 +3.3VA))
|
|
(pad B11 connect rect (at 10.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 11 /~WAKE))
|
|
(pad B14 connect rect (at 15.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 12 /PET0_P))
|
|
(pad B15 connect rect (at 16.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 13 /PET0_N))
|
|
(pad B16 connect rect (at 17.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 1 GND))
|
|
(pad B17 connect rect (at 18.5 -4) (size 0.7 3.2) (layers F.Cu)
|
|
(net 14 /~PRSNT2x1))
|
|
(pad B18 connect rect (at 19.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 1 GND))
|
|
(pad B12 connect rect (at 13.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 5 "Net-(J2-PadB12)"))
|
|
(pad B13 connect rect (at 14.5 -3.5) (size 0.7 4.2) (layers F.Cu)
|
|
(net 1 GND))
|
|
(pad A1 connect rect (at 0.5 -4) (size 0.7 3.2) (layers B.Cu)
|
|
(net 15 /~PRSNT1))
|
|
(pad A2 connect rect (at 1.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 2 +12V))
|
|
(pad A3 connect rect (at 2.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 2 +12V))
|
|
(pad A4 connect rect (at 3.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 1 GND))
|
|
(pad A5 connect rect (at 4.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 16 /TCK))
|
|
(pad A6 connect rect (at 5.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 17 /TDI))
|
|
(pad A7 connect rect (at 6.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 18 /TDO))
|
|
(pad A8 connect rect (at 7.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 19 /TMS))
|
|
(pad A9 connect rect (at 8.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 3 +3V3))
|
|
(pad A10 connect rect (at 9.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 3 +3V3))
|
|
(pad A11 connect rect (at 10.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 20 /~PERST))
|
|
(pad A14 connect rect (at 15.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 21 /REFCLK-))
|
|
(pad A15 connect rect (at 16.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 1 GND))
|
|
(pad A16 connect rect (at 17.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 23 /PCIexpress_connector/_PER0_P))
|
|
(pad A17 connect rect (at 18.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 24 /PCIexpress_connector/_PER0_N))
|
|
(pad A18 connect rect (at 19.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 1 GND))
|
|
(pad A12 connect rect (at 13.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 1 GND))
|
|
(pad A13 connect rect (at 14.5 -3.5) (size 0.7 4.2) (layers B.Cu)
|
|
(net 22 /REFCLK+))
|
|
)
|
|
|
|
(module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5B301BBE) (tstamp 5D3B9A8E)
|
|
(at 128.375 183.125 90)
|
|
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
|
|
(tags capacitor)
|
|
(path /5D508B15/5DAB5272/5DAB685F)
|
|
(attr smd)
|
|
(fp_text reference C2 (at -2.5 0 90) (layer B.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
|
)
|
|
(fp_text value 100n (at 0 -1.43 90) (layer B.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
|
)
|
|
(fp_text user %R (at 0 0 90) (layer B.Fab)
|
|
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
|
|
)
|
|
(fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
|
|
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
|
|
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
|
|
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
|
|
(pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
|
|
(net 7 /PER0_N))
|
|
(pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
|
|
(net 24 /PCIexpress_connector/_PER0_N))
|
|
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5B301BBE) (tstamp 5D3B9A7D)
|
|
(at 126.875 183.125 270)
|
|
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
|
|
(tags capacitor)
|
|
(path /5D508B15/5DAB5272/5DAB6859)
|
|
(attr smd)
|
|
(fp_text reference C1 (at 2.5 0 90) (layer B.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
|
)
|
|
(fp_text value 100n (at 0 -1.43 90) (layer B.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
|
)
|
|
(fp_text user %R (at 0 0 90) (layer B.Fab)
|
|
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
|
|
)
|
|
(fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05))
|
|
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer B.SilkS) (width 0.12))
|
|
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
|
|
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
|
|
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
|
|
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
|
|
(pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
|
|
(net 23 /PCIexpress_connector/_PER0_P))
|
|
(pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
|
|
(net 6 /PER0_P))
|
|
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5D3B91F9)
|
|
(at 124.125 180.625 180)
|
|
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
|
|
(tags resistor)
|
|
(path /5D508B15/5D516DFB/5D52E298)
|
|
(attr smd)
|
|
(fp_text reference R2 (at 0 1.375) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value 49.9 (at 0 1.43) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text user %R (at 0 0) (layer F.Fab)
|
|
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
|
)
|
|
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
|
|
(pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
|
(net 1 GND))
|
|
(pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
|
(net 12 /PET0_P))
|
|
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5D3B91E8)
|
|
(at 127.125 180.625)
|
|
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
|
|
(tags resistor)
|
|
(path /5D508B15/5D516DFB/5D52DCBC)
|
|
(attr smd)
|
|
(fp_text reference R1 (at 0 -1.375) (layer F.SilkS)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value 49.9 (at 0 1.43) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text user %R (at 0 0) (layer F.Fab)
|
|
(effects (font (size 0.4 0.4) (thickness 0.06)))
|
|
)
|
|
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
|
|
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
|
|
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
|
|
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
|
|
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
|
|
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
|
(net 1 GND))
|
|
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
|
(net 13 /PET0_N))
|
|
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
|
|
(at (xyz 0 0 0))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 0))
|
|
)
|
|
)
|
|
|
|
(module PCIexpress:PCIexpress_bracket_full (layer F.Cu) (tedit 5D33889E) (tstamp 5D3B1558)
|
|
(at 109.625 194.125)
|
|
(descr "PCIexpress full height bracket")
|
|
(tags "PCIexpress bracket")
|
|
(path /5D508B15/5D51ADA7)
|
|
(attr virtual)
|
|
(fp_text reference J1 (at 0 -19.75) (layer F.SilkS) hide
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_text value PCIexpress_bracket (at 0 -23) (layer F.Fab)
|
|
(effects (font (size 1 1) (thickness 0.15)))
|
|
)
|
|
(fp_circle (center -37.65 -9.35) (end -36.05 -9.35) (layer Dwgs.User) (width 0.12))
|
|
(fp_circle (center -37.65 -94.75) (end -36.05 -94.75) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -46.18 10.09) (end -46.62188 15.140707) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -47.04 10.09) (end -47.48188 15.140707) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -35.74 -5.375) (end -46.18 -5.375) (layer Dwgs.User) (width 0.12))
|
|
(fp_arc (start -35.74 -6.645) (end -35.74 -5.375) (angle -90) (layer Dwgs.User) (width 0.12))
|
|
(fp_arc (start -35.74 -12.055) (end -34.47 -12.055) (angle -90) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -34.47 -12.055) (end -34.47 -6.645) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -35.74 -13.325) (end -46.18 -13.325) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -35.74 -90.775) (end -46.18 -90.775) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -35.74 -98.725) (end -46.18 -98.725) (layer Dwgs.User) (width 0.12))
|
|
(fp_arc (start -35.74 -92.045) (end -35.74 -90.775) (angle -90) (layer Dwgs.User) (width 0.12))
|
|
(fp_arc (start -35.74 -97.455) (end -34.47 -97.455) (angle -90) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -34.47 -97.455) (end -34.47 -92.045) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -58.47 -104.86) (end -58.47 -105.72) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -47.04 -105.72) (end -58.47 -105.72) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -47.04 -104.86) (end -58.47 -104.86) (layer Dwgs.User) (width 0.12))
|
|
(fp_arc (start -47.04 -104.86) (end -46.18 -104.86) (angle -90) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -47.04 -104.86) (end -47.04 10.09) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -47.48188 15.140707) (end -46.62188 15.140707) (layer Dwgs.User) (width 0.12))
|
|
(fp_line (start -46.18 -104.86) (end -46.18 10.09) (layer Dwgs.User) (width 0.12))
|
|
(model ${KIPRJMOD}/../Library/PCIexpress.3dshapes/PCIexpress_bracket_full.step
|
|
(offset (xyz -46.18 104.86 15.86))
|
|
(scale (xyz 1 1 1))
|
|
(rotate (xyz 0 0 90))
|
|
)
|
|
)
|
|
|
|
(gr_line (start 129.775 181.375) (end 376.4777 181.375) (layer Edge.Cuts) (width 0.15))
|
|
(gr_line (start 129.775 193.625) (end 129.775 181.375) (layer Edge.Cuts) (width 0.15))
|
|
(gr_line (start 129.275 194.125) (end 129.775 193.625) (layer Edge.Cuts) (width 0.15))
|
|
(gr_line (start 123.075 194.125) (end 129.275 194.125) (layer Edge.Cuts) (width 0.15))
|
|
(target plus (at 109.625 194.125) (size 5) (width 0.05) (layer Edge.Cuts))
|
|
(gr_circle (center 371.395 87.995) (end 372.995 87.995) (layer Edge.Cuts) (width 0.15))
|
|
(gr_circle (center 371.395 177.525) (end 372.995 177.525) (layer Edge.Cuts) (width 0.15))
|
|
(gr_line (start 69.555 104.425) (end 69.555 180.375) (layer Dwgs.User) (width 0.15))
|
|
(gr_line (start 109.475 180.375) (end 109.475 193.625) (layer Dwgs.User) (width 0.15))
|
|
(gr_line (start 64.475 180.375) (end 109.475 180.375) (layer Dwgs.User) (width 0.15))
|
|
(gr_line (start 64.475 104.425) (end 64.475 180.375) (layer Dwgs.User) (width 0.15))
|
|
(gr_line (start 77.175 104.425) (end 64.475 104.425) (layer Dwgs.User) (width 0.15))
|
|
(gr_line (start 77.175 83.975) (end 77.175 104.425) (layer Dwgs.User) (width 0.15))
|
|
(gr_line (start 201.625 83.975) (end 77.175 83.975) (layer Dwgs.User) (width 0.15))
|
|
(gr_line (start 201.625 85.975) (end 201.625 83.975) (layer Dwgs.User) (width 0.15))
|
|
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