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ide: Add non-space cs access methods, use them wherever possible [O. Galibert]

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This commit is contained in:
Olivier Galibert 2017-12-16 13:21:01 +01:00
parent 77829f8671
commit 0932b9c2ae
40 changed files with 315 additions and 223 deletions
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8
src/devices/bus/a1bus/a1cffa.cpp
View File

@ -100,7 +100,7 @@ READ8_MEMBER(a1bus_cffa_device::cffa_r)
break;
case 0x8:
m_lastdata = m_ata->read16_cs0(space, (offset & 0xf) - 8, 0xff);
m_lastdata = m_ata->read16_cs0((offset & 0xf) - 8, 0xff);
return m_lastdata & 0x00ff;
case 0x9:
@ -110,7 +110,7 @@ READ8_MEMBER(a1bus_cffa_device::cffa_r)
case 0xd:
case 0xe:
case 0xf:
return m_ata->read16_cs0(space, (offset & 0xf) - 8, 0xff);
return m_ata->read16_cs0((offset & 0xf) - 8, 0xff);
}
return 0xff;
@ -135,7 +135,7 @@ WRITE8_MEMBER(a1bus_cffa_device::cffa_w)
case 0x8:
m_ata->write16_cs0(space, (offset & 0xf) - 8, data, 0xff);
m_ata->write16_cs0((offset & 0xf) - 8, data, 0xff);
break;
case 0x9:
@ -145,7 +145,7 @@ WRITE8_MEMBER(a1bus_cffa_device::cffa_w)
case 0xd:
case 0xe:
case 0xf:
m_ata->write16_cs0(space, (offset & 0xf) - 8, data, 0xff);
m_ata->write16_cs0((offset & 0xf) - 8, data, 0xff);
break;
}

8
src/devices/bus/a2bus/a2cffa.cpp
View File

@ -148,7 +148,7 @@ uint8_t a2bus_cffa2000_device::read_c0nx(address_space &space, uint8_t offset)
// Apple /// driver uses sta $c080,x when writing, which causes spurious reads of c088
if (!m_inwritecycle)
{
m_lastreaddata = m_ata->read16_cs0(space, offset - 8, 0xffff);
m_lastreaddata = m_ata->read16_cs0(offset - 8);
}
return m_lastreaddata & 0xff;
@ -159,7 +159,7 @@ uint8_t a2bus_cffa2000_device::read_c0nx(address_space &space, uint8_t offset)
case 0xd:
case 0xe:
case 0xf:
return m_ata->read16_cs0(space, offset-8, 0xff);
return m_ata->read16_cs0(offset-8, 0xff);
}
return 0xff;
@ -195,7 +195,7 @@ void a2bus_cffa2000_device::write_c0nx(address_space &space, uint8_t offset, uin
m_lastdata &= 0xff00;
m_lastdata |= data;
// printf("%02x to 8, m_lastdata = %x\n", data, m_lastdata);
m_ata->write16_cs0(space, offset-8, m_lastdata, 0xffff);
m_ata->write16_cs0(offset-8, m_lastdata);
break;
case 9:
@ -205,7 +205,7 @@ void a2bus_cffa2000_device::write_c0nx(address_space &space, uint8_t offset, uin
case 0xd:
case 0xe:
case 0xf:
m_ata->write16_cs0(space, offset-8, data, 0xff);
m_ata->write16_cs0(offset-8, data, 0xff);
break;
}
}

12
src/devices/bus/a2bus/a2vulcan.cpp
View File

@ -168,7 +168,7 @@ uint8_t a2bus_vulcanbase_device::read_c0nx(address_space &space, uint8_t offset)
switch (offset)
{
case 0:
m_lastdata = m_ata->read16_cs0(space, offset, 0xffff);
m_lastdata = m_ata->read16_cs0(offset);
// printf("IDE: read %04x\n", m_lastdata);
m_last_read_was_0 = true;
return m_lastdata&0xff;
@ -181,7 +181,7 @@ uint8_t a2bus_vulcanbase_device::read_c0nx(address_space &space, uint8_t offset)
}
else
{
return m_ata->read16_cs0(space, offset, 0xff);
return m_ata->read16_cs0(offset, 0xff);
}
case 2:
@ -190,7 +190,7 @@ uint8_t a2bus_vulcanbase_device::read_c0nx(address_space &space, uint8_t offset)
case 5:
case 6:
case 7:
return m_ata->read16_cs0(space, offset, 0xff);
return m_ata->read16_cs0(offset, 0xff);
default:
logerror("a2vulcan: unknown read @ C0n%x\n", offset);
@ -222,11 +222,11 @@ void a2bus_vulcanbase_device::write_c0nx(address_space &space, uint8_t offset, u
m_lastdata &= 0x00ff;
m_lastdata |= (data << 8);
// printf("IDE: write %04x\n", m_lastdata);
m_ata->write16_cs0(space, 0, m_lastdata, 0xffff);
m_ata->write16_cs0(0, m_lastdata);
}
else
{
m_ata->write16_cs0(space, offset, data, 0xff);
m_ata->write16_cs0(offset, data, 0xff);
}
break;
@ -237,7 +237,7 @@ void a2bus_vulcanbase_device::write_c0nx(address_space &space, uint8_t offset, u
case 6:
case 7:
// printf("%02x to IDE controller @ %x\n", data, offset);
m_ata->write16_cs0(space, offset, data, 0xff);
m_ata->write16_cs0(offset, data, 0xff);
break;
case 9: // ROM bank

8
src/devices/bus/a2bus/a2zipdrive.cpp
View File

@ -111,10 +111,10 @@ uint8_t a2bus_zipdrivebase_device::read_c0nx(address_space &space, uint8_t offse
case 5:
case 6:
case 7:
return m_ata->read16_cs0(space, offset, 0xff);
return m_ata->read16_cs0(offset, 0xff);
case 8: // data port
m_lastdata = m_ata->read16_cs0(space, offset, 0xffff);
m_lastdata = m_ata->read16_cs0(offset);
// printf("%04x @ IDE data\n", m_lastdata);
return m_lastdata&0xff;
@ -147,7 +147,7 @@ void a2bus_zipdrivebase_device::write_c0nx(address_space &space, uint8_t offset,
case 6:
case 7:
// printf("%02x to IDE controller @ %x\n", data, offset);
m_ata->write16_cs0(space, offset, data, 0xff);
m_ata->write16_cs0(offset, data, 0xff);
break;
case 8:
@ -159,7 +159,7 @@ void a2bus_zipdrivebase_device::write_c0nx(address_space &space, uint8_t offset,
// printf("%02x to IDE data hi\n", data);
m_lastdata &= 0x00ff;
m_lastdata |= (data << 8);
m_ata->write16_cs0(space, 0, m_lastdata, 0xffff);
m_ata->write16_cs0(0, m_lastdata);
break;
default:

10
src/devices/bus/adam/ide.cpp
View File

@ -114,7 +114,7 @@ uint8_t powermate_ide_device::adam_bd_r(address_space &space, offs_t offset, uin
case 0x05:
case 0x06:
case 0x07:
data = m_ata->read16_cs0(space, offset & 0x07, 0xff);
data = m_ata->read16_cs0(offset & 0x07, 0xff);
break;
case 0x40: // Printer status
@ -135,7 +135,7 @@ uint8_t powermate_ide_device::adam_bd_r(address_space &space, offs_t offset, uin
break;
case 0x58:
m_ata_data = m_ata->read16_cs0(space, 0, 0xffff);
m_ata_data = m_ata->read16_cs0(0);
data = m_ata_data & 0xff;
break;
@ -145,7 +145,7 @@ uint8_t powermate_ide_device::adam_bd_r(address_space &space, offs_t offset, uin
break;
case 0x5a:
data = m_ata->read16_cs1(space, 6, 0xff);
data = m_ata->read16_cs1(6, 0xff);
break;
case 0x5b: // Digital Input Register
@ -174,7 +174,7 @@ void powermate_ide_device::adam_bd_w(address_space &space, offs_t offset, uint8_
case 0x05:
case 0x06:
case 0x07:
m_ata->write16_cs0(space, offset & 0x07, data, 0xff);
m_ata->write16_cs0(offset & 0x07, data, 0xff);
break;
case 0x40:
@ -186,7 +186,7 @@ void powermate_ide_device::adam_bd_w(address_space &space, offs_t offset, uint8_
case 0x58:
m_ata_data |= data;
m_ata->write16_cs0(space, 0, m_ata_data, 0xffff);
m_ata->write16_cs0(0, m_ata_data);
break;
case 0x59:

16
src/devices/bus/amiga/zorro/buddha.cpp
View File

@ -257,7 +257,7 @@ WRITE16_MEMBER( buddha_device::ide_interrupt_enable_w )
READ16_MEMBER( buddha_device::ide_0_cs0_r )
{
uint16_t data = m_ata_0->read16_cs0(space, (offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
uint16_t data = m_ata_0->read16_cs0((offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
data = (data << 8) | (data >> 8);
if (VERBOSE)
@ -274,12 +274,12 @@ WRITE16_MEMBER( buddha_device::ide_0_cs0_w )
mem_mask = (mem_mask << 8) | (mem_mask >> 8);
data = (data << 8) | (data >> 8);
m_ata_0->write16_cs0(space, (offset >> 1) & 0x07, data, mem_mask);
m_ata_0->write16_cs0((offset >> 1) & 0x07, data, mem_mask);
}
READ16_MEMBER( buddha_device::ide_0_cs1_r )
{
uint16_t data = m_ata_0->read16_cs1(space, (offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
uint16_t data = m_ata_0->read16_cs1((offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
data = (data << 8) | (data >> 8);
if (VERBOSE)
@ -296,12 +296,12 @@ WRITE16_MEMBER( buddha_device::ide_0_cs1_w )
mem_mask = (mem_mask << 8) | (mem_mask >> 8);
data = (data << 8) | (data >> 8);
m_ata_0->write16_cs1(space, (offset >> 1) & 0x07, data, mem_mask);
m_ata_0->write16_cs1((offset >> 1) & 0x07, data, mem_mask);
}
READ16_MEMBER( buddha_device::ide_1_cs0_r )
{
uint16_t data = m_ata_1->read16_cs0(space, (offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
uint16_t data = m_ata_1->read16_cs0((offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
data = (data << 8) | (data >> 8);
if (VERBOSE)
@ -318,12 +318,12 @@ WRITE16_MEMBER( buddha_device::ide_1_cs0_w )
mem_mask = (mem_mask << 8) | (mem_mask >> 8);
data = (data << 8) | (data >> 8);
m_ata_1->write16_cs0(space, (offset >> 1) & 0x07, data, mem_mask);
m_ata_1->write16_cs0((offset >> 1) & 0x07, data, mem_mask);
}
READ16_MEMBER( buddha_device::ide_1_cs1_r )
{
uint16_t data = m_ata_1->read16_cs1(space, (offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
uint16_t data = m_ata_1->read16_cs1((offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
data = (data << 8) | (data >> 8);
if (VERBOSE)
@ -340,5 +340,5 @@ WRITE16_MEMBER( buddha_device::ide_1_cs1_w )
mem_mask = (mem_mask << 8) | (mem_mask >> 8);
data = (data << 8) | (data >> 8);
m_ata_1->write16_cs1(space, (offset >> 1) & 0x07, data, mem_mask);
m_ata_1->write16_cs1((offset >> 1) & 0x07, data, mem_mask);
}

8
src/devices/bus/c64/ide64.cpp
View File

@ -172,13 +172,13 @@ uint8_t c64_ide64_cartridge_device::c64_cd_r(address_space &space, offs_t offset
if (io1_offset >= 0x20 && io1_offset < 0x28)
{
m_ata_data = m_ata->read16_cs0(space, offset & 0x07, 0xffff);
m_ata_data = m_ata->read16_cs0(offset & 0x07);
data = m_ata_data & 0xff;
}
else if (io1_offset >= 0x28 && io1_offset < 0x30)
{
m_ata_data = m_ata->read16_cs1(space, offset & 0x07, 0xffff);
m_ata_data = m_ata->read16_cs1(offset & 0x07);
data = m_ata_data & 0xff;
}
@ -275,13 +275,13 @@ void c64_ide64_cartridge_device::c64_cd_w(address_space &space, offs_t offset, u
{
m_ata_data = (m_ata_data & 0xff00) | data;
m_ata->write16_cs0(space, offset & 0x07, m_ata_data, 0xffff);
m_ata->write16_cs0(offset & 0x07, m_ata_data);
}
else if (io1_offset >= 0x28 && io1_offset < 0x30)
{
m_ata_data = (m_ata_data & 0xff00) | data;
m_ata->write16_cs1(space, offset & 0x07, m_ata_data, 0xffff);
m_ata->write16_cs1(offset & 0x07, m_ata_data);
}
else if (io1_offset == 0x31)
{

10
src/devices/bus/cpc/symbfac2.cpp
View File

@ -135,27 +135,27 @@ READ8_MEMBER(cpc_symbiface2_device::ide_cs0_r)
else
{
m_iohigh = true;
m_ide_data = m_ide->read16_cs0(space,offset);
m_ide_data = m_ide->read16_cs0(offset);
return m_ide_data & 0xff;
}
}
else
return m_ide->read16_cs0(space,offset);
return m_ide->read16_cs0(offset);
}
WRITE8_MEMBER(cpc_symbiface2_device::ide_cs0_w)
{
m_ide->write16_cs0(space,offset,data);
m_ide->write16_cs0(offset, data);
}
READ8_MEMBER(cpc_symbiface2_device::ide_cs1_r)
{
return m_ide->read16_cs1(space,offset);
return m_ide->read16_cs1(offset);
}
WRITE8_MEMBER(cpc_symbiface2_device::ide_cs1_w)
{
m_ide->write16_cs1(space,offset,data);
m_ide->write16_cs1(offset, data);
}
// RTC (Dallas DS1287A)

4
src/devices/bus/isa/ide.cpp
View File

@ -16,12 +16,12 @@
READ8_MEMBER(isa16_ide_device::ide16_alt_r )
{
return m_ide->read16_cs1(space, 6/2, 0xff);
return m_ide->read16_cs1(6/2, 0xff);
}
WRITE8_MEMBER(isa16_ide_device::ide16_alt_w )
{
m_ide->write16_cs1(space, 6/2, data, 0xff);
m_ide->write16_cs1(6/2, data, 0xff);
}
DEVICE_ADDRESS_MAP_START(map, 16, isa16_ide_device)

12
src/devices/bus/isa/side116.cpp
View File

@ -134,13 +134,13 @@ READ8_MEMBER( side116_device::read )
if (offset == 0)
{
uint16_t ide_data = m_ata->read16_cs0(space, 0, 0xffff);
uint16_t ide_data = m_ata->read16_cs0(0);
data = ide_data & 0xff;
m_latch = ide_data >> 8;
}
else if (offset < 8)
{
data = m_ata->read16_cs0(space, offset & 7, 0xff);
data = m_ata->read16_cs0(offset & 7, 0xff);
}
else if (offset == 8)
{
@ -148,7 +148,7 @@ READ8_MEMBER( side116_device::read )
}
else
{
data = m_ata->read16_cs1(space, offset & 7, 0xff);
data = m_ata->read16_cs1(offset & 7, 0xff);
}
return data;
@ -159,11 +159,11 @@ WRITE8_MEMBER( side116_device::write )
if (offset == 0)
{
uint16_t ide_data = (m_latch << 8) | data;
m_ata->write16_cs0(space, 0, ide_data, 0xffff);
m_ata->write16_cs0(0, ide_data);
}
else if (offset < 8)
{
m_ata->write16_cs0(space, offset & 7, data, 0xff);
m_ata->write16_cs0(offset & 7, data, 0xff);
}
else if (offset == 8)
{
@ -171,7 +171,7 @@ WRITE8_MEMBER( side116_device::write )
}
else
{
m_ata->write16_cs1(space, offset & 7, data, 0xff);
m_ata->write16_cs1(offset & 7, data, 0xff);
}
}

12
src/devices/bus/isa/xtide.cpp
View File

@ -63,13 +63,13 @@ READ8_MEMBER( xtide_device::read )
if (offset == 0)
{
uint16_t data16 = m_ata->read16_cs0(space, offset & 7, 0xffff);
uint16_t data16 = m_ata->read16_cs0(offset & 7);
result = data16 & 0xff;
m_d8_d15_latch = data16 >> 8;
}
else if (offset < 8)
{
result = m_ata->read16_cs0(space, offset & 7, 0xff);
result = m_ata->read16_cs0(offset & 7, 0xff);
}
else if (offset == 8)
{
@ -77,7 +77,7 @@ READ8_MEMBER( xtide_device::read )
}
else
{
result = m_ata->read16_cs1(space, offset & 7, 0xff);
result = m_ata->read16_cs1(offset & 7, 0xff);
}
// logerror("%s xtide_device::read: offset=%d, result=%2X\n",device->machine().describe_context(),offset,result);
@ -93,11 +93,11 @@ WRITE8_MEMBER( xtide_device::write )
{
// Data register transfer low byte and latched high
uint16_t data16 = (m_d8_d15_latch << 8) | data;
m_ata->write16_cs0(space, offset & 7, data16, 0xffff);
m_ata->write16_cs0(offset & 7, data16);
}
else if (offset < 8)
{
m_ata->write16_cs0(space, offset & 7, data, 0xff);
m_ata->write16_cs0(offset & 7, data, 0xff);
}
else if (offset == 8)
{
@ -105,7 +105,7 @@ WRITE8_MEMBER( xtide_device::write )
}
else
{
m_ata->write16_cs1(space, offset & 7, data, 0xff);
m_ata->write16_cs1(offset & 7, data, 0xff);
}
}

8
src/devices/bus/kc/d004.cpp
View File

@ -433,11 +433,11 @@ READ8_MEMBER(kc_d004_gide_device::gide_r)
{
if (ide_cs == 0 )
{
m_ata_data = m_ata->read16_cs0(space, io_addr & 0x07, 0xffff);
m_ata_data = m_ata->read16_cs0(io_addr & 0x07);
}
else
{
m_ata_data = m_ata->read16_cs1(space, io_addr & 0x07, 0xffff);
m_ata_data = m_ata->read16_cs1(io_addr & 0x07);
}
}
@ -482,11 +482,11 @@ WRITE8_MEMBER(kc_d004_gide_device::gide_w)
{
if (ide_cs == 0)
{
m_ata->write16_cs0(space, io_addr & 0x07, m_ata_data, 0xffff);
m_ata->write16_cs0(io_addr & 0x07, m_ata_data);
}
else
{
m_ata->write16_cs1(space, io_addr & 0x07, m_ata_data, 0xffff);
m_ata->write16_cs1(io_addr & 0x07, m_ata_data);
}
}
}

8
src/devices/bus/lpci/southbridge.cpp
View File

@ -136,22 +136,22 @@ southbridge_device::southbridge_device(const machine_config &mconfig, device_typ
/// HACK: the memory system cannot cope with mixing the 8 bit device map from the fdc with a 32 bit handler
READ8_MEMBER(southbridge_device::ide_read_cs1_r)
{
return m_ide->read32_cs1(space, 1, (uint32_t) 0xff0000) >> 16;
return m_ide->read32_cs1(1, 0xff0000) >> 16;
}
WRITE8_MEMBER(southbridge_device::ide_write_cs1_w)
{
m_ide->write32_cs1(space, 1, (uint32_t) data << 16, (uint32_t) 0xff0000);
m_ide->write32_cs1(1, data << 16, 0xff0000);
}
READ8_MEMBER(southbridge_device::ide2_read_cs1_r)
{
return m_ide2->read32_cs1(space, 1, (uint32_t) 0xff0000) >> 16;
return m_ide2->read32_cs1(1, 0xff0000) >> 16;
}
WRITE8_MEMBER(southbridge_device::ide2_write_cs1_w)
{
m_ide2->write32_cs1(space, 1, (uint32_t) data << 16, (uint32_t) 0xff0000);
m_ide2->write32_cs1(1, data << 16, 0xff0000);
}
//-------------------------------------------------

14
src/devices/bus/ql/qubide.cpp
View File

@ -210,15 +210,15 @@ uint8_t qubide_device::read(address_space &space, offs_t offset, uint8_t data)
switch (offset & 0x0f)
{
case 0:
data = m_ata->read16_cs1(space, 0x07, 0xff);
data = m_ata->read16_cs1(0x07, 0xff);
break;
default:
data = m_ata->read16_cs0(space, offset & 0x07, 0xff);
data = m_ata->read16_cs0(offset & 0x07, 0xff);
break;
case 0x08: case 0x0a: case 0x0c:
m_ata_data = m_ata->read16_cs0(space, 0x00, 0xffff);
m_ata_data = m_ata->read16_cs0(0);
data = m_ata_data >> 8;
break;
@ -228,7 +228,7 @@ uint8_t qubide_device::read(address_space &space, offs_t offset, uint8_t data)
break;
case 0x0e: case 0x0f:
data = m_ata->read16_cs1(space, 0x05, 0xff);
data = m_ata->read16_cs1(0x05, 0xff);
break;
}
}
@ -255,7 +255,7 @@ void qubide_device::write(address_space &space, offs_t offset, uint8_t data)
switch (offset & 0x0f)
{
case 0: case 0x0e: case 0x0f:
m_ata->write16_cs1(space, 0x05, data, 0xff);
m_ata->write16_cs1(0x05, data, 0xff);
break;
case 0x08: case 0x0a: case 0x0c:
@ -265,11 +265,11 @@ void qubide_device::write(address_space &space, offs_t offset, uint8_t data)
case 0x09: case 0x0b: case 0x0d:
m_ata_data = (m_ata_data & 0xff00) | data;
m_ata->write16_cs0(space, 0x00, m_ata_data, 0xffff);
m_ata->write16_cs0(0, m_ata_data);
break;
default:
m_ata->write16_cs0(space, offset & 0x07, data, 0xff);
m_ata->write16_cs0(offset & 0x07, data, 0xff);
break;
}
}

8
src/devices/bus/ti99/peb/tn_ide.cpp
View File

@ -160,7 +160,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
case 2: /* IDE registers set 1 (CS1Fx) */
if (m_tms9995_mode ? (!(addr & 1)) : (addr & 1))
{ /* first read triggers 16-bit read cycle */
m_input_latch = (! (addr & 0x10)) ? m_ata->read16_cs0(space, (addr >> 1) & 0x7, 0xffff) : 0;
m_input_latch = (! (addr & 0x10)) ? m_ata->read16_cs0((addr >> 1) & 0x7) : 0;
}
/* return latched input */
@ -171,7 +171,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
case 3: /* IDE registers set 2 (CS3Fx) */
if (m_tms9995_mode ? (!(addr & 1)) : (addr & 1))
{ /* first read triggers 16-bit read cycle */
m_input_latch = (! (addr & 0x10)) ? m_ata->read16_cs1(space, (addr >> 1) & 0x7, 0xffff) : 0;
m_input_latch = (! (addr & 0x10)) ? m_ata->read16_cs1((addr >> 1) & 0x7) : 0;
}
/* return latched input */
@ -243,7 +243,7 @@ WRITE8_MEMBER(nouspikel_ide_interface_device::write)
if (m_tms9995_mode ? (addr & 1) : (!(addr & 1)))
{ /* second write triggers 16-bit write cycle */
m_ata->write16_cs0(space, (addr >> 1) & 0x7, m_output_latch, 0xffff);
m_ata->write16_cs0((addr >> 1) & 0x7, m_output_latch);
}
break;
case 3: /* IDE registers set 2 (CS3Fx) */
@ -261,7 +261,7 @@ WRITE8_MEMBER(nouspikel_ide_interface_device::write)
if (m_tms9995_mode ? (addr & 1) : (!(addr & 1)))
{ /* second write triggers 16-bit write cycle */
m_ata->write16_cs1(space, (addr >> 1) & 0x7, m_output_latch, 0xffff);
m_ata->write16_cs1((addr >> 1) & 0x7, m_output_latch);
}
break;
}

21
src/devices/machine/atadev.cpp
View File

@ -21,3 +21,24 @@ device_ata_interface::device_ata_interface(const machine_config &mconfig, device
m_pdiag_handler(device)
{
}
READ16_MEMBER( device_ata_interface::read16_cs0 )
{
return read16_cs0(offset, mem_mask);
}
READ16_MEMBER( device_ata_interface::read16_cs1 )
{
return read16_cs1(offset, mem_mask);
}
WRITE16_MEMBER( device_ata_interface::write16_cs0 )
{
write16_cs0(offset, data, mem_mask);
}
WRITE16_MEMBER( device_ata_interface::write16_cs1 )
{
write16_cs1(offset, data, mem_mask);
}

14
src/devices/machine/atadev.h
View File

@ -24,13 +24,19 @@ class device_ata_interface : public device_slot_card_interface
public:
device_ata_interface(const machine_config &mconfig, device_t &device);
DECLARE_READ16_MEMBER(read16_cs0);
DECLARE_READ16_MEMBER(read16_cs1);
DECLARE_WRITE16_MEMBER(write16_cs0);
DECLARE_WRITE16_MEMBER(write16_cs1);
virtual uint16_t read_dma() = 0;
virtual DECLARE_READ16_MEMBER(read16_cs0) = 0;
virtual DECLARE_READ16_MEMBER(read16_cs1) = 0;
virtual u16 read16_cs0(offs_t offset, u16 mem_mask = 0xffff) = 0;
virtual u16 read16_cs1(offs_t offset, u16 mem_mask = 0xffff) = 0;
virtual void write_dma(uint16_t data) = 0;
virtual DECLARE_WRITE16_MEMBER(write16_cs0) = 0;
virtual DECLARE_WRITE16_MEMBER(write16_cs1) = 0;
virtual void write16_cs0(offs_t offset, u16 data, u16 mem_mask = 0xffff) = 0;
virtual void write16_cs1(offs_t offset, u16 data, u16 mem_mask = 0xffff) = 0;
virtual DECLARE_WRITE_LINE_MEMBER(write_dmack) = 0;
virtual DECLARE_WRITE_LINE_MEMBER(write_csel) = 0;
virtual DECLARE_WRITE_LINE_MEMBER(write_dasp) = 0;

8
src/devices/machine/ataflash.cpp
View File

@ -37,11 +37,11 @@ READ16_MEMBER( ata_flash_pccard_device::read_memory )
if(offset <= 7)
{
m_8bit_data_transfers = !ACCESSING_BITS_8_15; // HACK
return read16_cs0(space, offset, mem_mask);
return read16_cs0(offset, mem_mask);
}
else if(offset <= 15)
{
return read16_cs1(space, offset & 7, mem_mask);
return read16_cs1(offset & 7, mem_mask);
}
else
{
@ -54,11 +54,11 @@ WRITE16_MEMBER( ata_flash_pccard_device::write_memory )
if(offset <= 7)
{
m_8bit_data_transfers = !ACCESSING_BITS_8_15; // HACK
write16_cs0(space, offset, data, mem_mask);
write16_cs0(offset, data, mem_mask);
}
else if( offset <= 15)
{
write16_cs1(space, offset & 7, data, mem_mask);
write16_cs1(offset & 7, data, mem_mask);
}
}

48
src/devices/machine/atahle.cpp
View File

@ -584,11 +584,11 @@ uint16_t ata_hle_device::read_dma()
return result;
}
READ16_MEMBER( ata_hle_device::read16_cs0 )
u16 ata_hle_device::read16_cs0(offs_t offset, u16)
{
/* logit */
// if (offset != IDE_CS0_DATA_RW && offset != IDE_CS0_STATUS_R)
LOG(("%s:IDE cs0 read at %X, mem_mask=%d\n", machine().describe_context(), offset, mem_mask));
LOG(("%s:IDE cs0 read at %X\n", machine().describe_context(), offset));
uint16_t result = 0xffff;
@ -596,7 +596,7 @@ READ16_MEMBER( ata_hle_device::read16_cs0 )
{
if (m_dmack)
{
logerror( "%s: %s dev %d read_cs0 %04x %04x ignored (DMACK)\n", machine().describe_context(), tag(), dev(), offset, mem_mask );
logerror( "%s: %s dev %d read_cs0 %04x %04x ignored (DMACK)\n", machine().describe_context(), tag(), dev(), offset );
}
else if ((m_status & IDE_STATUS_BSY) && offset != IDE_CS0_STATUS_R)
{
@ -607,7 +607,7 @@ READ16_MEMBER( ata_hle_device::read16_cs0 )
switch (offset)
{
case IDE_CS0_DATA_RW:
logerror( "%s: %s dev %d read_cs0 %04x %04x ignored (BSY)\n", machine().describe_context(), tag(), dev(), offset, mem_mask );
logerror( "%s: %s dev %d read_cs0 %04x %04x ignored (BSY)\n", machine().describe_context(), tag(), dev(), offset );
break;
default:
@ -692,7 +692,7 @@ READ16_MEMBER( ata_hle_device::read16_cs0 )
/* log anything else */
default:
logerror("%s:unknown IDE cs0 read at %03X, mem_mask=%d\n", machine().describe_context(), offset, mem_mask);
logerror("%s:unknown IDE cs0 read at %03X\n", machine().describe_context(), offset);
break;
}
}
@ -702,11 +702,12 @@ READ16_MEMBER( ata_hle_device::read16_cs0 )
return result;
}
READ16_MEMBER( ata_hle_device::read16_cs1 )
u16 ata_hle_device::read16_cs1(offs_t offset, u16)
{
/* logit */
// if (offset != IDE_CS1_ALTERNATE_STATUS_R)
LOG(("%s:IDE cs1 read at %X, mem_mask=%d\n", machine().describe_context(), offset, mem_mask));
LOG(("%s:IDE cs1 read at %X\n", machine().describe_context(), offset));
uint16_t result = 0xffff;
@ -714,7 +715,7 @@ READ16_MEMBER( ata_hle_device::read16_cs1 )
{
if (m_dmack)
{
logerror( "%s: %s dev %d read_cs1 %04x %04x ignored (DMACK)\n", machine().describe_context(), tag(), dev(), offset, mem_mask );
logerror( "%s: %s dev %d read_cs1 %04x ignored (DMACK)\n", machine().describe_context(), tag(), dev(), offset );
}
else
{
@ -758,7 +759,7 @@ READ16_MEMBER( ata_hle_device::read16_cs1 )
/* log anything else */
default:
logerror("%s:unknown IDE cs1 read at %03X, mem_mask=%d\n", machine().describe_context(), offset, mem_mask);
logerror("%s:unknown IDE cs1 read at %03X\n", machine().describe_context(), offset);
break;
}
}
@ -806,24 +807,23 @@ void ata_hle_device::write_dma( uint16_t data )
}
}
WRITE16_MEMBER( ata_hle_device::write16_cs0 )
void ata_hle_device::write16_cs0(offs_t offset, u16 data, u16)
{
/* logit */
if (offset != IDE_CS0_DATA_RW)
LOG(("%s:IDE cs0 write to %X = %08X, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask));
// fprintf(stderr, "ide write %03x %02x mem_mask=%d\n", offset, data, size);
LOG(("%s:IDE cs0 write to %X = %08X\n", machine().describe_context(), offset, data));
if (m_dmack)
{
logerror( "%s: %s dev %d write_cs0 %04x %04x %04x ignored (DMACK)\n", machine().describe_context(), tag(), dev(), offset, data, mem_mask );
logerror( "%s: %s dev %d write_cs0 %04x %04x ignored (DMACK)\n", machine().describe_context(), tag(), dev(), offset, data );
}
else if ((m_status & IDE_STATUS_BSY) && offset != IDE_CS0_COMMAND_W)
{
logerror( "%s: %s dev %d write_cs0 %04x %04x %04x ignored (BSY) command %02x\n", machine().describe_context(), tag(), dev(), offset, data, mem_mask, m_command );
logerror( "%s: %s dev %d write_cs0 %04x %04x ignored (BSY) command %02x\n", machine().describe_context(), tag(), dev(), offset, data, m_command );
}
else if ((m_status & IDE_STATUS_DRQ) && offset != IDE_CS0_DATA_RW && offset != IDE_CS0_COMMAND_W)
{
logerror( "%s: %s dev %d write_cs0 %04x %04x %04x ignored (DRQ) command %02x\n", machine().describe_context(), tag(), dev(), offset, data, mem_mask, m_command );
logerror( "%s: %s dev %d write_cs0 %04x %04x ignored (DRQ) command %02x\n", machine().describe_context(), tag(), dev(), offset, data, m_command );
}
else
{
@ -837,7 +837,7 @@ WRITE16_MEMBER( ata_hle_device::write16_cs0 )
{
if (!(m_status & IDE_STATUS_DRQ))
{
logerror( "%s: %s dev %d write_cs0 %04x %04x %04x ignored (!DRQ)\n", machine().describe_context(), tag(), dev(), offset, data, mem_mask );
logerror( "%s: %s dev %d write_cs0 %04x %04x ignored (!DRQ)\n", machine().describe_context(), tag(), dev(), offset, data );
}
else
{
@ -884,11 +884,11 @@ WRITE16_MEMBER( ata_hle_device::write16_cs0 )
// Packet devices can accept DEVICE RESET when BSY or DRQ is set.
if (m_status & IDE_STATUS_BSY)
{
logerror( "%s: %s dev %d write_cs0 %04x %04x %04x ignored (BSY) command %02x\n", machine().describe_context(), tag(), dev(), offset, data, mem_mask, m_command );
logerror( "%s: %s dev %d write_cs0 %04x %04x ignored (BSY) command %02x\n", machine().describe_context(), tag(), dev(), offset, data, m_command );
}
else if (m_status & IDE_STATUS_DRQ)
{
logerror( "%s: %s dev %d write_cs0 %04x %04x %04x ignored (DRQ) command %02x\n", machine().describe_context(), tag(), dev(), offset, data, mem_mask, m_command );
logerror( "%s: %s dev %d write_cs0 %04x %04x ignored (DRQ) command %02x\n", machine().describe_context(), tag(), dev(), offset, data, m_command );
}
else if (device_selected() || m_command == IDE_COMMAND_DIAGNOSTIC)
{
@ -909,20 +909,20 @@ WRITE16_MEMBER( ata_hle_device::write16_cs0 )
break;
default:
logerror("%s:unknown IDE cs0 write at %03X = %04x, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask);
logerror("%s:unknown IDE cs0 write at %03X = %04x\n", machine().describe_context(), offset, data);
break;
}
}
}
WRITE16_MEMBER( ata_hle_device::write16_cs1 )
void ata_hle_device::write16_cs1(offs_t offset, u16 data, u16)
{
/* logit */
LOG(("%s:IDE cs1 write to %X = %08X, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask));
LOG(("%s:IDE cs1 write to %X = %08X\n", machine().describe_context(), offset, data));
if (m_dmack)
{
logerror( "%s: %s dev %d write_cs1 %04x %04x %04x ignored (DMACK)\n", machine().describe_context(), tag(), dev(), offset, data, mem_mask );
logerror( "%s: %s dev %d write_cs1 %04x %04x ignored (DMACK)\n", machine().describe_context(), tag(), dev(), offset, data );
}
else
{
@ -944,7 +944,7 @@ WRITE16_MEMBER( ata_hle_device::write16_cs1 )
{
if (m_resetting)
{
logerror( "%s: %s dev %d write_cs1 %04x %04x %04x ignored (RESET)\n", machine().describe_context(), tag(), dev(), offset, data, mem_mask );
logerror( "%s: %s dev %d write_cs1 %04x %04x ignored (RESET)\n", machine().describe_context(), tag(), dev(), offset, data );
}
else
{
@ -964,7 +964,7 @@ WRITE16_MEMBER( ata_hle_device::write16_cs1 )
break;
default:
logerror("%s:unknown IDE cs1 write at %03X = %04x, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask);
logerror("%s:unknown IDE cs1 write at %03X = %04x\n", machine().describe_context(), offset, data);
break;
}
}

13
src/devices/machine/atahle.h
View File

@ -19,17 +19,22 @@ class ata_hle_device : public device_t, public device_ata_interface
{
public:
virtual uint16_t read_dma() override;
virtual DECLARE_READ16_MEMBER(read16_cs0) override;
virtual DECLARE_READ16_MEMBER(read16_cs1) override;
virtual u16 read16_cs0(offs_t offset, u16 mem_mask = 0xffff) override;
virtual u16 read16_cs1(offs_t offset, u16 mem_mask = 0xffff) override;
virtual void write_dma(uint16_t data) override;
virtual DECLARE_WRITE16_MEMBER(write16_cs0) override;
virtual DECLARE_WRITE16_MEMBER(write16_cs1) override;
virtual void write16_cs0(offs_t offset, u16 data, u16 mem_mask = 0xffff) override;
virtual void write16_cs1(offs_t offset, u16 data, u16 mem_mask = 0xffff) override;
virtual DECLARE_WRITE_LINE_MEMBER(write_csel) override;
virtual DECLARE_WRITE_LINE_MEMBER(write_dasp) override;
virtual DECLARE_WRITE_LINE_MEMBER(write_dmack) override;
virtual DECLARE_WRITE_LINE_MEMBER(write_pdiag) override;
using device_ata_interface::read16_cs0;
using device_ata_interface::read16_cs1;
using device_ata_interface::write16_cs0;
using device_ata_interface::write16_cs1;
protected:
ata_hle_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);

35
src/devices/machine/ataintf.cpp
View File

@ -136,12 +136,12 @@ uint16_t ata_interface_device::read_dma()
return result;
}
READ16_MEMBER( ata_interface_device::read16_cs0 )
u16 ata_interface_device::read16_cs0(offs_t offset, u16 mem_mask)
{
uint16_t result = mem_mask;
for (auto & elem : m_slot)
if (elem->dev() != nullptr)
result &= elem->dev()->read16_cs0(space, offset, mem_mask);
result &= elem->dev()->read16_cs0(offset, mem_mask);
// { static int last_status = -1; if (offset == 7 ) { if( result == last_status ) return last_status; last_status = result; } else last_status = -1; }
@ -150,18 +150,27 @@ READ16_MEMBER( ata_interface_device::read16_cs0 )
return result;
}
READ16_MEMBER( ata_interface_device::read16_cs1 )
u16 ata_interface_device::read16_cs1(offs_t offset, u16 mem_mask)
{
uint16_t result = mem_mask;
for (auto & elem : m_slot)
if (elem->dev() != nullptr)
result &= elem->dev()->read16_cs1(space, offset, mem_mask);
result &= elem->dev()->read16_cs1(offset, mem_mask);
// logerror( "%s: read cs1 %04x %04x %04x\n", machine().describe_context(), offset, result, mem_mask );
return result;
}
READ16_MEMBER( ata_interface_device::read16_cs0 )
{
return read16_cs0(offset, mem_mask);
}
READ16_MEMBER( ata_interface_device::read16_cs1 )
{
return read16_cs1(offset, mem_mask);
}
/*************************************
*
@ -178,22 +187,32 @@ void ata_interface_device::write_dma( uint16_t data )
elem->dev()->write_dma(data);
}
WRITE16_MEMBER( ata_interface_device::write16_cs0 )
void ata_interface_device::write16_cs0(offs_t offset, u16 data, u16 mem_mask)
{
// logerror( "%s: write cs0 %04x %04x %04x\n", machine().describe_context(), offset, data, mem_mask );
for (auto & elem : m_slot)
if (elem->dev() != nullptr)
elem->dev()->write16_cs0(space, offset, data, mem_mask);
elem->dev()->write16_cs0(offset, data, mem_mask);
}
WRITE16_MEMBER( ata_interface_device::write16_cs1 )
void ata_interface_device::write16_cs1(offs_t offset, u16 data, u16 mem_mask)
{
// logerror( "%s: write cs1 %04x %04x %04x\n", machine().describe_context(), offset, data, mem_mask );
for (auto & elem : m_slot)
if (elem->dev() != nullptr)
elem->dev()->write16_cs1(space, offset, data, mem_mask);
elem->dev()->write16_cs1(offset, data, mem_mask);
}
WRITE16_MEMBER( ata_interface_device::write16_cs0 )
{
write16_cs0(offset, data, mem_mask);
}
WRITE16_MEMBER( ata_interface_device::write16_cs1 )
{
write16_cs1(offset, data, mem_mask);
}
WRITE_LINE_MEMBER( ata_interface_device::write_dmack )

13
src/devices/machine/ataintf.h
View File

@ -85,13 +85,18 @@ public:
template <class Object> static devcb_base &set_dmarq_handler(device_t &device, Object &&cb) { return downcast<ata_interface_device &>(device).m_dmarq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_dasp_handler(device_t &device, Object &&cb) { return downcast<ata_interface_device &>(device).m_dasp_handler.set_callback(std::forward<Object>(cb)); }
DECLARE_READ16_MEMBER(read16_cs0);
DECLARE_READ16_MEMBER(read16_cs1);
DECLARE_WRITE16_MEMBER(write16_cs0);
DECLARE_WRITE16_MEMBER(write16_cs1);
uint16_t read_dma();
virtual DECLARE_READ16_MEMBER(read16_cs0);
virtual DECLARE_READ16_MEMBER(read16_cs1);
virtual u16 read16_cs0(offs_t offset, u16 mem_mask = 0xffff);
virtual u16 read16_cs1(offs_t offset, u16 mem_mask = 0xffff);
void write_dma(uint16_t data);
virtual DECLARE_WRITE16_MEMBER(write16_cs0);
virtual DECLARE_WRITE16_MEMBER(write16_cs1);
virtual void write16_cs0(offs_t offset, u16 data, u16 mem_mask = 0xffff);
virtual void write16_cs1(offs_t offset, u16 data, u16 mem_mask = 0xffff);
DECLARE_WRITE_LINE_MEMBER(write_dmack);
protected:

64
src/devices/machine/idectrl.cpp
View File

@ -36,7 +36,7 @@ ide_controller_device::ide_controller_device(const machine_config &mconfig, devi
{
}
READ16_MEMBER( ide_controller_device::read16_cs0 )
u16 ide_controller_device::read16_cs0(offs_t offset, u16 mem_mask)
{
if (mem_mask == 0xffff && offset == 1)
{
@ -45,48 +45,48 @@ READ16_MEMBER( ide_controller_device::read16_cs0 )
}
if (mem_mask == 0xff00)
{
return ata_interface_device::read16_cs0(space, (offset * 2) + 1, 0xff) << 8;
return ata_interface_device::read16_cs0((offset * 2) + 1, 0xff) << 8;
}
else
{
return ata_interface_device::read16_cs0(space, offset * 2, mem_mask);
return ata_interface_device::read16_cs0(offset * 2, mem_mask);
}
}
READ16_MEMBER( ide_controller_device::read16_cs1 )
u16 ide_controller_device::read16_cs1(offs_t offset, u16 mem_mask)
{
if (mem_mask == 0xff00)
{
return ata_interface_device::read16_cs1(space, (offset * 2) + 1, 0xff) << 8;
return ata_interface_device::read16_cs1((offset * 2) + 1, 0xff) << 8;
}
else
{
return ata_interface_device::read16_cs1(space, offset * 2, mem_mask);
return ata_interface_device::read16_cs1(offset * 2, mem_mask);
}
}
WRITE16_MEMBER( ide_controller_device::write16_cs0 )
void ide_controller_device::write16_cs0(offs_t offset, u16 data, u16 mem_mask)
{
if (mem_mask == 0xffff && offset == 1 ){ offset = 0; popmessage( "requires ide_controller_32_device" ); }
if (mem_mask == 0xff00)
{
return ata_interface_device::write16_cs0(space, (offset * 2) + 1, data >> 8, 0xff);
return ata_interface_device::write16_cs0((offset * 2) + 1, data >> 8, 0xff);
}
else
{
return ata_interface_device::write16_cs0(space, offset * 2, data, mem_mask);
return ata_interface_device::write16_cs0(offset * 2, data, mem_mask);
}
}
WRITE16_MEMBER( ide_controller_device::write16_cs1 )
void ide_controller_device::write16_cs1(offs_t offset, u16 data, u16 mem_mask)
{
if (mem_mask == 0xff00)
{
return ata_interface_device::write16_cs1(space, (offset * 2) + 1, data >> 8, 0xff);
return ata_interface_device::write16_cs1((offset * 2) + 1, data >> 8, 0xff);
}
else
{
return ata_interface_device::write16_cs1(space, offset * 2, data, mem_mask);
return ata_interface_device::write16_cs1(offset * 2, data, mem_mask);
}
}
@ -104,64 +104,84 @@ ide_controller_32_device::ide_controller_32_device(const machine_config &mconfig
}
READ32_MEMBER(ide_controller_32_device::read32_cs0)
{
return read32_cs0(offset, mem_mask);
}
u32 ide_controller_32_device::read32_cs0(offs_t offset, u32 mem_mask)
{
uint32_t data = 0;
if (ACCESSING_BITS_0_15)
{
data = ide_controller_device::read16_cs0(space, (offset * 2), mem_mask);
data = ide_controller_device::read16_cs0((offset * 2), mem_mask);
if (offset == 0 && ACCESSING_BITS_16_31)
data |= ide_controller_device::read16_cs0(space, (offset * 2), mem_mask >> 16) << 16;
data |= ide_controller_device::read16_cs0((offset * 2), mem_mask >> 16) << 16;
}
else if (ACCESSING_BITS_16_31)
{
data = ide_controller_device::read16_cs0(space, (offset * 2) + 1, mem_mask >> 16) << 16;
data = ide_controller_device::read16_cs0((offset * 2) + 1, mem_mask >> 16) << 16;
}
return data;
}
READ32_MEMBER(ide_controller_32_device::read32_cs1)
{
return read32_cs1(offset, mem_mask);
}
u32 ide_controller_32_device::read32_cs1(offs_t offset, u32 mem_mask)
{
uint32_t data = 0;
if (ACCESSING_BITS_0_15)
{
data = ide_controller_device::read16_cs1(space, (offset * 2), mem_mask);
data = ide_controller_device::read16_cs1((offset * 2), mem_mask);
}
else if (ACCESSING_BITS_16_23)
{
data = ide_controller_device::read16_cs1(space, (offset * 2) + 1, mem_mask >> 16) << 16;
data = ide_controller_device::read16_cs1((offset * 2) + 1, mem_mask >> 16) << 16;
}
return data;
}
WRITE32_MEMBER(ide_controller_32_device::write32_cs0)
{
write32_cs0(offset, data, mem_mask);
}
void ide_controller_32_device::write32_cs0(offs_t offset, u32 data, u32 mem_mask)
{
if (ACCESSING_BITS_0_15)
{
ide_controller_device::write16_cs0(space, (offset * 2), data, mem_mask);
ide_controller_device::write16_cs0((offset * 2), data, mem_mask);
if (offset == 0 && ACCESSING_BITS_16_31)
ata_interface_device::write16_cs0(space, (offset * 2), data >> 16, mem_mask >> 16);
ata_interface_device::write16_cs0((offset * 2), data >> 16, mem_mask >> 16);
}
else if (ACCESSING_BITS_16_31)
{
ide_controller_device::write16_cs0(space, (offset * 2) + 1, data >> 16, mem_mask >> 16);
ide_controller_device::write16_cs0((offset * 2) + 1, data >> 16, mem_mask >> 16);
}
}
WRITE32_MEMBER(ide_controller_32_device::write32_cs1)
{
write32_cs1(offset, data, mem_mask);
}
void ide_controller_32_device::write32_cs1(offs_t offset, u32 data, u32 mem_mask)
{
if (ACCESSING_BITS_0_15)
{
ide_controller_device::write16_cs1(space, (offset * 2), data, mem_mask);
ide_controller_device::write16_cs1((offset * 2), data, mem_mask);
}
else if (ACCESSING_BITS_16_31)
{
ide_controller_device::write16_cs1(space, (offset * 2) + 1, data >> 16, mem_mask >> 16);
ide_controller_device::write16_cs1((offset * 2) + 1, data >> 16, mem_mask >> 16);
}
}

26
src/devices/machine/idectrl.h
View File

@ -32,10 +32,15 @@ class ide_controller_device : public ata_interface_device
public:
ide_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_READ16_MEMBER(read16_cs0) override;
virtual DECLARE_READ16_MEMBER(read16_cs1) override;
virtual DECLARE_WRITE16_MEMBER(write16_cs0) override;
virtual DECLARE_WRITE16_MEMBER(write16_cs1) override;
virtual u16 read16_cs0(offs_t offset, u16 mem_mask = 0xffff) override;
virtual u16 read16_cs1(offs_t offset, u16 mem_mask = 0xffff) override;
virtual void write16_cs0(offs_t offset, u16 data, u16 mem_mask = 0xffff) override;
virtual void write16_cs1(offs_t offset, u16 data, u16 mem_mask = 0xffff) override;
using ata_interface_device::read16_cs0;
using ata_interface_device::read16_cs1;
using ata_interface_device::write16_cs0;
using ata_interface_device::write16_cs1;
protected:
ide_controller_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@ -57,10 +62,15 @@ class ide_controller_32_device : public ide_controller_device
public:
ide_controller_32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual DECLARE_READ32_MEMBER(read32_cs0);
virtual DECLARE_READ32_MEMBER(read32_cs1);
virtual DECLARE_WRITE32_MEMBER(write32_cs0);
virtual DECLARE_WRITE32_MEMBER(write32_cs1);
u32 read32_cs0(offs_t offset, u32 mem_mask = 0xffffffff);
u32 read32_cs1(offs_t offset, u32 mem_mask = 0xffffffff);
void write32_cs0(offs_t offset, u32 data, u32 mem_mask = 0xffffffff);
void write32_cs1(offs_t offset, u32 data, u32 mem_mask = 0xffffffff);
DECLARE_READ32_MEMBER(read32_cs0);
DECLARE_READ32_MEMBER(read32_cs1);
DECLARE_WRITE32_MEMBER(write32_cs0);
DECLARE_WRITE32_MEMBER(write32_cs1);
protected:
ide_controller_32_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);

8
src/devices/machine/pci-ide.cpp
View File

@ -117,7 +117,7 @@ READ32_MEMBER(ide_pci_device::ide_read_cs1)
{
// PCI offset starts at 0x3f4, idectrl expects 0x3f0
uint32_t data;
data = m_ide->read32_cs1(space, 1, mem_mask);
data = m_ide->read32_cs1(1, mem_mask);
if (0)
logerror("%s:ide_read_cs1 offset=%08X data=%08X mask=%08X\n", machine().describe_context(), offset, data, mem_mask);
return data;
@ -126,21 +126,21 @@ READ32_MEMBER(ide_pci_device::ide_read_cs1)
WRITE32_MEMBER(ide_pci_device::ide_write_cs1)
{
// PCI offset starts at 0x3f4, idectrl expects 0x3f0
m_ide->write32_cs1(space, 1, data, mem_mask);
m_ide->write32_cs1(1, data, mem_mask);
}
READ32_MEMBER(ide_pci_device::ide2_read_cs1)
{
// PCI offset starts at 0x374, idectrl expects 0x370
uint32_t data;
data = m_ide2->read32_cs1(space, 1, mem_mask);
data = m_ide2->read32_cs1(1, mem_mask);
return data;
}
WRITE32_MEMBER(ide_pci_device::ide2_write_cs1)
{
// PCI offset starts at 0x374, idectrl expects 0x370
m_ide2->write32_cs1(space, 1, data, mem_mask);
m_ide2->write32_cs1(1, data, mem_mask);
}
WRITE_LINE_MEMBER(ide_pci_device::ide_interrupt)

19
src/devices/machine/vt83c461.cpp
View File

@ -36,11 +36,16 @@ void vt83c461_device::device_start()
}
READ32_MEMBER( vt83c461_device::read_config )
{
return read_config(offset);
}
uint32_t vt83c461_device::read_config(offs_t offset)
{
uint32_t result = 0;
/* logit */
LOG("%s:IDE via config read at %X, mem_mask=%d\n", machine().describe_context(), offset, mem_mask);
LOG("%s:IDE via config read at %X\n", machine().describe_context(), offset);
switch(offset)
{
@ -61,20 +66,22 @@ READ32_MEMBER( vt83c461_device::read_config )
break;
default:
logerror("%s:unknown IDE via config read at %03X, mem_mask=%d\n", machine().describe_context(), offset, mem_mask);
logerror("%s:unknown IDE via config read at %03X\n", machine().describe_context(), offset);
break;
}
// printf( "vt83c461 read config %04x %08x %04x\n", offset, result, mem_mask );
return result;
}
WRITE32_MEMBER( vt83c461_device::write_config )
{
// printf( "vt83c461 write config %04x %08x %04x\n", offset, data, mem_mask );
write_config(offset, data);
}
void vt83c461_device::write_config(offs_t offset, uint32_t data)
{
/* logit */
LOG("%s:IDE via config write to %X = %08X, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask);
LOG("%s:IDE via config write to %X = %08X\n", machine().describe_context(), offset, data);
switch (offset)
{
@ -95,7 +102,7 @@ WRITE32_MEMBER( vt83c461_device::write_config )
break;
default:
logerror("%s:unknown IDE via config write at %03X = %08x, mem_mask=%d\n", machine().describe_context(), offset, data, mem_mask);
logerror("%s:unknown IDE via config write at %03X = %08x\n", machine().describe_context(), offset, data);
break;
}
}

3
src/devices/machine/vt83c461.h
View File

@ -32,6 +32,9 @@ class vt83c461_device : public ide_controller_32_device
public:
vt83c461_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
uint32_t read_config(offs_t offset);
void write_config(offs_t offset, u32 data);
DECLARE_READ32_MEMBER(read_config);
DECLARE_WRITE32_MEMBER(write_config);

8
src/mame/drivers/amiga.cpp
View File

@ -755,9 +755,9 @@ READ16_MEMBER( a4000_state::ide_r )
// this very likely doesn't respond to all the addresses, figure out which ones
if (BIT(offset, 12))
data = m_ata->read16_cs1(space, (offset >> 1) & 0x07, mem_mask);
data = m_ata->read16_cs1((offset >> 1) & 0x07, mem_mask);
else
data = m_ata->read16_cs0(space, (offset >> 1) & 0x07, mem_mask);
data = m_ata->read16_cs0((offset >> 1) & 0x07, mem_mask);
// swap
data = (data << 8) | (data >> 8);
@ -777,9 +777,9 @@ WRITE16_MEMBER( a4000_state::ide_w )
// this very likely doesn't respond to all the addresses, figure out which ones
if (BIT(offset, 12))
m_ata->write16_cs1(space, (offset >> 1) & 0x07, data, mem_mask);
m_ata->write16_cs1((offset >> 1) & 0x07, data, mem_mask);
else
m_ata->write16_cs0(space, (offset >> 1) & 0x07, data, mem_mask);
m_ata->write16_cs0((offset >> 1) & 0x07, data, mem_mask);
}
WRITE_LINE_MEMBER( a4000_state::ide_interrupt_w )

8
src/mame/drivers/cobra.cpp
View File

@ -1947,7 +1947,7 @@ READ16_MEMBER(cobra_state::sub_ata0_r)
{
mem_mask = ( mem_mask << 8 ) | ( mem_mask >> 8 );
uint32_t data = m_ata->read16_cs0(space, offset, mem_mask);
uint32_t data = m_ata->read16_cs0(offset, mem_mask);
data = ( data << 8 ) | ( data >> 8 );
return data;
@ -1958,14 +1958,14 @@ WRITE16_MEMBER(cobra_state::sub_ata0_w)
mem_mask = ( mem_mask << 8 ) | ( mem_mask >> 8 );
data = ( data << 8 ) | ( data >> 8 );
m_ata->write16_cs0(space, offset, data, mem_mask);
m_ata->write16_cs0(offset, data, mem_mask);
}
READ16_MEMBER(cobra_state::sub_ata1_r)
{
mem_mask = ( mem_mask << 8 ) | ( mem_mask >> 8 );
uint32_t data = m_ata->read16_cs1(space, offset, mem_mask);
uint32_t data = m_ata->read16_cs1(offset, mem_mask);
return ( data << 8 ) | ( data >> 8 );
}
@ -1975,7 +1975,7 @@ WRITE16_MEMBER(cobra_state::sub_ata1_w)
mem_mask = ( mem_mask << 8 ) | ( mem_mask >> 8 );
data = ( data << 8 ) | ( data >> 8 );
m_ata->write16_cs1(space, offset, data, mem_mask);
m_ata->write16_cs1(offset, data, mem_mask);
}
READ32_MEMBER(cobra_state::sub_comram_r)

16
src/mame/drivers/firebeat.cpp
View File

@ -448,12 +448,12 @@ READ32_MEMBER(firebeat_state::ata_command_r )
// printf("ata_command_r: %08X, %08X\n", offset, mem_mask);
if (ACCESSING_BITS_16_31)
{
r = m_ata->read16_cs0(space, offset*2, BYTESWAP16((mem_mask >> 16) & 0xffff));
r = m_ata->read16_cs0(offset*2, BYTESWAP16((mem_mask >> 16) & 0xffff));
return BYTESWAP16(r) << 16;
}
else
{
r = m_ata->read16_cs0(space, (offset*2) + 1, BYTESWAP16((mem_mask >> 0) & 0xffff));
r = m_ata->read16_cs0((offset*2) + 1, BYTESWAP16((mem_mask >> 0) & 0xffff));
return BYTESWAP16(r) << 0;
}
}
@ -464,11 +464,11 @@ WRITE32_MEMBER(firebeat_state::ata_command_w )
if (ACCESSING_BITS_16_31)
{
m_ata->write16_cs0(space, offset*2, BYTESWAP16((data >> 16) & 0xffff), BYTESWAP16((mem_mask >> 16) & 0xffff));
m_ata->write16_cs0(offset*2, BYTESWAP16((data >> 16) & 0xffff), BYTESWAP16((mem_mask >> 16) & 0xffff));
}
else
{
m_ata->write16_cs0(space, (offset*2) + 1, BYTESWAP16((data >> 0) & 0xffff), BYTESWAP16((mem_mask >> 0) & 0xffff));
m_ata->write16_cs0((offset*2) + 1, BYTESWAP16((data >> 0) & 0xffff), BYTESWAP16((mem_mask >> 0) & 0xffff));
}
}
@ -480,12 +480,12 @@ READ32_MEMBER(firebeat_state::ata_control_r )
if (ACCESSING_BITS_16_31)
{
r = m_ata->read16_cs1(space, offset*2, BYTESWAP16((mem_mask >> 16) & 0xffff));
r = m_ata->read16_cs1(offset*2, BYTESWAP16((mem_mask >> 16) & 0xffff));
return BYTESWAP16(r) << 16;
}
else
{
r = m_ata->read16_cs1(space, (offset*2) + 1, BYTESWAP16((mem_mask >> 0) & 0xffff));
r = m_ata->read16_cs1((offset*2) + 1, BYTESWAP16((mem_mask >> 0) & 0xffff));
return BYTESWAP16(r) << 0;
}
}
@ -494,11 +494,11 @@ WRITE32_MEMBER(firebeat_state::ata_control_w )
{
if (ACCESSING_BITS_16_31)
{
m_ata->write16_cs1(space, offset*2, BYTESWAP16(data >> 16) & 0xffff, BYTESWAP16((mem_mask >> 16) & 0xffff));
m_ata->write16_cs1(offset*2, BYTESWAP16(data >> 16) & 0xffff, BYTESWAP16((mem_mask >> 16) & 0xffff));
}
else
{
m_ata->write16_cs1(space, (offset*2) + 1, BYTESWAP16(data >> 0) & 0xffff, BYTESWAP16((mem_mask >> 0) & 0xffff));
m_ata->write16_cs1((offset*2) + 1, BYTESWAP16(data >> 0) & 0xffff, BYTESWAP16((mem_mask >> 0) & 0xffff));
}
}

4
src/mame/drivers/jaguar.cpp
View File

@ -382,7 +382,7 @@ public:
{
}
virtual DECLARE_WRITE16_MEMBER(write16_cs0) override
virtual void write16_cs0(offs_t offset, u16 data, u16 mem_mask) override
{
// the first write is to the device head register
if( offset == 6 && (m_status & IDE_STATUS_DRQ))
@ -390,7 +390,7 @@ public:
m_status &= ~IDE_STATUS_DRQ;
}
ide_hdd_device::write16_cs0(space, offset, data, mem_mask);
ide_hdd_device::write16_cs0(offset, data, mem_mask);
}
};

8
src/mame/drivers/kinst.cpp
View File

@ -342,25 +342,25 @@ INTERRUPT_GEN_MEMBER(kinst_state::irq0_start)
READ32_MEMBER(kinst_state::ide_r)
{
return m_ata->read16_cs0(space, offset / 2, mem_mask);
return m_ata->read16_cs0(offset / 2, mem_mask);
}
WRITE32_MEMBER(kinst_state::ide_w)
{
m_ata->write16_cs0(space, offset / 2, data, mem_mask);
m_ata->write16_cs0(offset / 2, data, mem_mask);
}
READ32_MEMBER(kinst_state::ide_extra_r)
{
return m_ata->read16_cs1(space, 6, 0xff);
return m_ata->read16_cs1(6, 0xff);
}
WRITE32_MEMBER(kinst_state::ide_extra_w)
{
m_ata->write16_cs1(space, 6, data, 0xff);
m_ata->write16_cs1(6, data, 0xff);
}

8
src/mame/drivers/ksys573.cpp
View File

@ -625,19 +625,17 @@ TIMER_CALLBACK_MEMBER( ksys573_state::atapi_xfer_end )
m_atapi_timer->adjust( attotime::never );
address_space &space = m_maincpu->space( AS_PROGRAM );
for( int i = 0; i < m_atapi_xfersize; i++ )
{
uint32_t d = m_ata->read16_cs0( space, (uint32_t) 0, (uint32_t) 0xffff ) << 0;
d |= m_ata->read16_cs0( space, (uint32_t) 0, (uint32_t) 0xffff ) << 16;
uint32_t d = m_ata->read16_cs0(0) << 0;
d |= m_ata->read16_cs0(0) << 16;
m_p_n_psxram[ m_atapi_xferbase / 4 ] = d;
m_atapi_xferbase += 4;
}
/// HACK: konami80s only works if you dma more data than requested
if( ( m_ata->read16_cs1( space, (uint32_t) 6, (uint32_t) 0xffff ) & 8 ) != 0 )
if( ( m_ata->read16_cs1(6) & 8 ) != 0 )
{
m_atapi_timer->adjust( m_maincpu->cycles_to_attotime( ( ATAPI_CYCLES_PER_SECTOR * ( m_atapi_xfersize / 64 ) ) ) );
}

8
src/mame/drivers/pc9801.cpp
View File

@ -511,22 +511,22 @@ WRITE8_MEMBER(pc9801_state::ide_ctrl_w)
READ16_MEMBER(pc9801_state::ide_cs0_r)
{
return (m_ide_sel ? m_ide2 : m_ide1)->read16_cs0(space, offset, mem_mask);
return (m_ide_sel ? m_ide2 : m_ide1)->read16_cs0(offset, mem_mask);
}
WRITE16_MEMBER(pc9801_state::ide_cs0_w)
{
(m_ide_sel ? m_ide2 : m_ide1)->write16_cs0(space, offset, data, mem_mask);
(m_ide_sel ? m_ide2 : m_ide1)->write16_cs0(offset, data, mem_mask);
}
READ16_MEMBER(pc9801_state::ide_cs1_r)
{
return (m_ide_sel ? m_ide2 : m_ide1)->read16_cs1(space, offset, mem_mask);
return (m_ide_sel ? m_ide2 : m_ide1)->read16_cs1(offset, mem_mask);
}
WRITE16_MEMBER(pc9801_state::ide_cs1_w)
{
(m_ide_sel ? m_ide2 : m_ide1)->write16_cs1(space, offset, data, mem_mask);
(m_ide_sel ? m_ide2 : m_ide1)->write16_cs1(offset, data, mem_mask);
}
WRITE_LINE_MEMBER(pc9801_state::ide1_irq_w)

2
src/mame/drivers/qdrmfgp.cpp
View File

@ -224,7 +224,7 @@ READ16_MEMBER(qdrmfgp_state::gp2_ide_std_r)
break;
}
}
return m_ata->read16_cs0(space, offset, mem_mask);
return m_ata->read16_cs0(offset, mem_mask);
}

4
src/mame/drivers/taitotz.cpp
View File

@ -2176,7 +2176,7 @@ WRITE8_MEMBER(taitotz_state::tlcs_rtc_w)
READ16_MEMBER(taitotz_state::tlcs_ide0_r)
{
uint16_t d = m_ata->read16_cs0(space, offset, mem_mask);
uint16_t d = m_ata->read16_cs0(offset, mem_mask);
if (offset == 7)
d &= ~0x2; // Type Zero doesn't like the index bit. It's defined as vendor-specific, so it probably shouldn't be up...
// The status check explicitly checks for 0x50 (drive ready, seek complete).
@ -2185,7 +2185,7 @@ READ16_MEMBER(taitotz_state::tlcs_ide0_r)
READ16_MEMBER(taitotz_state::tlcs_ide1_r)
{
uint16_t d = m_ata->read16_cs1(space, offset, mem_mask);
uint16_t d = m_ata->read16_cs1(offset, mem_mask);
if (offset == 6)
d &= ~0x2; // Type Zero doesn't like the index bit. It's defined as vendor-specific, so it probably shouldn't be up...
// The status check explicitly checks for 0x50 (drive ready, seek complete).

24
src/mame/drivers/viper.cpp
View File

@ -1370,7 +1370,7 @@ READ64_MEMBER(viper_state::cf_card_data_r)
{
case 0x8: // Duplicate Even RD Data
{
r |= m_ata->read16_cs0(space, 0, mem_mask >> 16) << 16;
r |= m_ata->read16_cs0(0, mem_mask >> 16) << 16;
break;
}
@ -1391,7 +1391,7 @@ WRITE64_MEMBER(viper_state::cf_card_data_w)
{
case 0x8: // Duplicate Even RD Data
{
m_ata->write16_cs0(space, 0, data >> 16, mem_mask >> 16);
m_ata->write16_cs0(0, data >> 16, mem_mask >> 16);
break;
}
@ -1422,7 +1422,7 @@ READ64_MEMBER(viper_state::cf_card_r)
case 0x6: // Select Card/Head
case 0x7: // Status
{
r |= m_ata->read16_cs0(space, offset & 7, mem_mask >> 16) << 16;
r |= m_ata->read16_cs0(offset & 7, mem_mask >> 16) << 16;
break;
}
@ -1431,13 +1431,13 @@ READ64_MEMBER(viper_state::cf_card_r)
case 0xd: // Duplicate Error
{
r |= m_ata->read16_cs0(space, 1, mem_mask >> 16) << 16;
r |= m_ata->read16_cs0(1, mem_mask >> 16) << 16;
break;
}
case 0xe: // Alt Status
case 0xf: // Drive Address
{
r |= m_ata->read16_cs1(space, offset & 7, mem_mask >> 16) << 16;
r |= m_ata->read16_cs1(offset & 7, mem_mask >> 16) << 16;
break;
}
@ -1487,7 +1487,7 @@ WRITE64_MEMBER(viper_state::cf_card_w)
case 0x6: // Select Card/Head
case 0x7: // Command
{
m_ata->write16_cs0(space, offset & 7, data >> 16, mem_mask >> 16);
m_ata->write16_cs0(offset & 7, data >> 16, mem_mask >> 16);
break;
}
@ -1496,13 +1496,13 @@ WRITE64_MEMBER(viper_state::cf_card_w)
case 0xd: // Duplicate Features
{
m_ata->write16_cs0(space, 1, data >> 16, mem_mask >> 16);
m_ata->write16_cs0(1, data >> 16, mem_mask >> 16);
break;
}
case 0xe: // Device Ctl
case 0xf: // Reserved
{
m_ata->write16_cs1(space, offset & 7, data >> 16, mem_mask >> 16);
m_ata->write16_cs1(offset & 7, data >> 16, mem_mask >> 16);
break;
}
@ -1557,10 +1557,10 @@ READ64_MEMBER(viper_state::ata_r)
switch(offset & 0x80)
{
case 0x00:
r |= m_ata->read16_cs0(space, reg, mem_mask >> 16) << 16;
r |= m_ata->read16_cs0(reg, mem_mask >> 16) << 16;
break;
case 0x80:
r |= m_ata->read16_cs1(space, reg, mem_mask >> 16) << 16;
r |= m_ata->read16_cs1(reg, mem_mask >> 16) << 16;
break;
}
}
@ -1577,10 +1577,10 @@ WRITE64_MEMBER(viper_state::ata_w)
switch(offset & 0x80)
{
case 0x00:
m_ata->write16_cs0(space, reg, data >> 16, mem_mask >> 16);
m_ata->write16_cs0(reg, data >> 16, mem_mask >> 16);
break;
case 0x80:
m_ata->write16_cs1(space, reg, data >> 16, mem_mask >> 16);
m_ata->write16_cs1(reg, data >> 16, mem_mask >> 16);
break;
}
}

18
src/mame/drivers/zn.cpp
View File

@ -1272,13 +1272,11 @@ void zn_state::atpsx_dma_read( uint32_t *p_n_psxram, uint32_t n_address, int32_t
return;
}
address_space &space = m_maincpu->space(AS_PROGRAM);
/* dma size is in 32-bit words, convert to words */
n_size <<= 1;
while( n_size > 0 )
{
psxwriteword( p_n_psxram, n_address, m_vt83c461->read32_cs0(space, (uint32_t) 0, (uint32_t) 0xffff) );
psxwriteword( p_n_psxram, n_address, m_vt83c461->read32_cs0(0, 0xffff) );
n_address += 2;
n_size--;
}
@ -1295,15 +1293,15 @@ READ16_MEMBER(zn_state::vt83c461_16_r)
if( offset >= 0x30 / 2 && offset < 0x40 / 2 )
{
return m_vt83c461->read_config( space, ( offset / 2 ) & 3, mem_mask << shift ) >> shift;
return m_vt83c461->read_config( ( offset / 2 ) & 3 ) >> shift;
}
else if( offset >= 0x1f0 / 2 && offset < 0x1f8 / 2 )
{
return m_vt83c461->read32_cs0( space, ( offset / 2 ) & 1, (uint32_t) mem_mask << shift ) >> shift;
return m_vt83c461->read32_cs0( ( offset / 2 ) & 1, mem_mask << shift ) >> shift;
}
else if( offset >= 0x3f0 / 2 && offset < 0x3f8 / 2 )
{
return m_vt83c461->read32_cs1( space, ( offset / 2 ) & 1, (uint32_t) mem_mask << shift ) >> shift;
return m_vt83c461->read32_cs1( ( offset / 2 ) & 1, mem_mask << shift ) >> shift;
}
else
{
@ -1318,15 +1316,15 @@ WRITE16_MEMBER(zn_state::vt83c461_16_w)
if( offset >= 0x30 / 2 && offset < 0x40 / 2 )
{
m_vt83c461->write_config( space, ( offset / 2 ) & 3, data << shift, mem_mask << shift );
m_vt83c461->write_config( ( offset / 2 ) & 3, data << shift );
}
else if( offset >= 0x1f0 / 2 && offset < 0x1f8 / 2 )
{
m_vt83c461->write32_cs0( space, ( offset / 2 ) & 1, (uint32_t) data << shift, (uint32_t) mem_mask << shift );
m_vt83c461->write32_cs0( ( offset / 2 ) & 1, data << shift, mem_mask << shift );
}
else if( offset >= 0x3f0 / 2 && offset < 0x3f8 / 2 )
{
m_vt83c461->write32_cs1( space, ( offset / 2 ) & 1, (uint32_t) data << shift, (uint32_t) mem_mask << shift );
m_vt83c461->write32_cs1( ( offset / 2 ) & 1, data << shift, mem_mask << shift );
}
else
{
@ -1338,7 +1336,7 @@ READ16_MEMBER(zn_state::vt83c461_32_r)
{
if( offset == 0x1f0/2 )
{
uint32_t data = m_vt83c461->read32_cs0(space, 0, 0xffffffff);
uint32_t data = m_vt83c461->read32_cs0(0);
m_vt83c461_latch = data >> 16;
return data & 0xffff;
}

8
src/mame/machine/swtpc09.cpp
View File

@ -420,13 +420,13 @@ WRITE8_MEMBER( swtpc09_state::piaide_b_w )
{
if (!(data & 0x02)) //rd line bit 1
{
tempidedata = m_ide->read16_cs0(space, (data&0x1c)>>2, 0xffff);
tempidedata = m_ide->read16_cs0((data&0x1c)>>2);
LOG(("swtpc09_ide_bus_r: offset $%02X data %04X\n", (data&0x1c)>>2, tempidedata));
m_piaide_porta = tempidedata & 0x00ff;
}
else if (!(data & 0x01)) //wr line bit 0
{
m_ide->write16_cs0(space, (data&0x1c)>>2, m_piaide_porta, 0xffff);
m_ide->write16_cs0((data&0x1c)>>2, m_piaide_porta);
LOG(("swtpc09_ide_bus_w: offset $%02X data %04X\n", (data&0x1c)>>2, m_piaide_porta));
}
}
@ -434,13 +434,13 @@ WRITE8_MEMBER( swtpc09_state::piaide_b_w )
{
if (!(data & 0x02)) //rd line bit 1
{
tempidedata = m_ide->read16_cs1(space, (data&0x1c)>>2, 0xffff);
tempidedata = m_ide->read16_cs1((data&0x1c)>>2);
LOG(("swtpc09_ide_bus_r: offset $%02X data %04X\n", (data&0x1c)>>2, tempidedata));
m_piaide_porta = tempidedata & 0x00ff;
}
else if (!(data & 0x01)) //wr line bit 0
{
m_ide->write16_cs1(space, (data&0x1c)>>2, m_piaide_porta, 0xffff);
m_ide->write16_cs1((data&0x1c)>>2, m_piaide_porta);
LOG(("swtpc09_ide_bus_w: offset $%02X data %04X\n", (data&0x1c)>>2, m_piaide_porta));
}
}

4
src/mame/video/turrett.cpp
View File

@ -312,7 +312,7 @@ WRITE32_MEMBER( turrett_state::dma_w )
while (words--)
{
ram[addr & DIMM_BANK_MASK] = m_ata->read16_cs0(space, 0, 0xffff);
ram[addr & DIMM_BANK_MASK] = m_ata->read16_cs0(0);
++addr;
}
@ -324,7 +324,7 @@ WRITE32_MEMBER( turrett_state::dma_w )
{
while (words--)
{
uint16_t data = m_ata->read16_cs0(space, 0, 0xffff);
uint16_t data = m_ata->read16_cs0(0);
// TODO: Verify if this is correct
if ((data & 0xc400) == 0xc400)