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Memory handler cleanup 3. Add mem_mask parameter

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to 8-bit handlers to match the others. To ease
pain, added DECLARE_READ/WRITE_HANDLER macros that
set up a default parameter. Also updated devcb so
that the handlers can be called with or without the
mem_mask. [Aaron Giles]
This commit is contained in:
Aaron Giles 2012-09-17 09:16:44 +00:00
parent 3cce7e019e
commit 0dc663e2e9
194 changed files with 1518 additions and 1464 deletions
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8
src/emu/cpu/dsp56k/dsp56mem.h
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@ -235,10 +235,10 @@ void PCDDR_set(dsp56k_core* cpustate, UINT16 value);
/* Port C Dtaa Register (PCD) */
void PCD_set(dsp56k_core* cpustate, UINT16 value);
READ16_HANDLER( peripheral_register_r );
WRITE16_HANDLER( peripheral_register_w );
READ16_HANDLER( program_r );
WRITE16_HANDLER( program_w );
DECLARE_READ16_HANDLER( peripheral_register_r );
DECLARE_WRITE16_HANDLER( peripheral_register_w );
DECLARE_READ16_HANDLER( program_r );
DECLARE_WRITE16_HANDLER( program_w );
} // namespace DSP56K

2
src/emu/cpu/g65816/g65816op.h
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@ -85,7 +85,7 @@ INLINE uint g65816i_read_8_direct(g65816i_cpu_struct *cpustate, uint address)
INLINE uint g65816i_read_8_vector(g65816i_cpu_struct *cpustate, uint address)
{
if (READ_VECTOR)
return READ_VECTOR(*cpustate->program, address);
return READ_VECTOR(*cpustate->program, address, 0xff);
else
return g65816i_read_8_normal(cpustate, address);
}

8
src/emu/cpu/h6280/h6280.h
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@ -75,11 +75,11 @@ struct h6280_Regs
DECLARE_LEGACY_CPU_DEVICE(H6280, h6280);
READ8_HANDLER( h6280_irq_status_r );
WRITE8_HANDLER( h6280_irq_status_w );
DECLARE_READ8_HANDLER( h6280_irq_status_r );
DECLARE_WRITE8_HANDLER( h6280_irq_status_w );
READ8_HANDLER( h6280_timer_r );
WRITE8_HANDLER( h6280_timer_w );
DECLARE_READ8_HANDLER( h6280_timer_r );
DECLARE_WRITE8_HANDLER( h6280_timer_w );
/* functions for use by the PSG and joypad port only! */
UINT8 h6280io_get_buffer(device_t*);

4
src/emu/cpu/m6800/m6800.h
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@ -63,8 +63,8 @@ DECLARE_LEGACY_CPU_DEVICE(HD6303R, hd6303r);
DECLARE_LEGACY_CPU_DEVICE(HD6303Y, hd6303y);
READ8_HANDLER( m6801_io_r );
WRITE8_HANDLER( m6801_io_w );
DECLARE_READ8_HANDLER( m6801_io_r );
DECLARE_WRITE8_HANDLER( m6801_io_w );
CPU_DISASSEMBLE( m6800 );
CPU_DISASSEMBLE( m6801 );

4
src/emu/cpu/m68000/68307bus.h
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@ -4,8 +4,8 @@
#define m68307BUS_MBSR (0x07)
#define m68307BUS_MBDR (0x09)
READ8_HANDLER( m68307_internal_mbus_r );
WRITE8_HANDLER( m68307_internal_mbus_w );
DECLARE_READ8_HANDLER( m68307_internal_mbus_r );
DECLARE_WRITE8_HANDLER( m68307_internal_mbus_w );
class m68307_mbus
{

4
src/emu/cpu/m68000/68307ser.h
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@ -18,8 +18,8 @@
#define m68307SER_UOP0 (0x1f)
READ8_HANDLER( m68307_internal_serial_r );
WRITE8_HANDLER( m68307_internal_serial_w );
DECLARE_READ8_HANDLER( m68307_internal_serial_r );
DECLARE_WRITE8_HANDLER( m68307_internal_serial_w );
class m68307_serial
{

4
src/emu/cpu/m68000/68307sim.h
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@ -1,7 +1,7 @@
/* 68307 SIM module */
READ16_HANDLER( m68307_internal_sim_r );
WRITE16_HANDLER( m68307_internal_sim_w );
DECLARE_READ16_HANDLER( m68307_internal_sim_r );
DECLARE_WRITE16_HANDLER( m68307_internal_sim_w );
/* ports */
#define m68307SIM_PACNT (0x10)

4
src/emu/cpu/m68000/68307tmu.h
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@ -1,6 +1,6 @@
READ16_HANDLER( m68307_internal_timer_r );
WRITE16_HANDLER( m68307_internal_timer_w );
DECLARE_READ16_HANDLER( m68307_internal_timer_r );
DECLARE_WRITE16_HANDLER( m68307_internal_timer_w );
#define m68307TIMER_TMR (0x0)
#define m68307TIMER_TRR (0x1)

4
src/emu/cpu/m68000/68340dma.h
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@ -1,6 +1,6 @@
READ32_HANDLER( m68340_internal_dma_r );
WRITE32_HANDLER( m68340_internal_dma_w );
DECLARE_READ32_HANDLER( m68340_internal_dma_r );
DECLARE_WRITE32_HANDLER( m68340_internal_dma_w );
class m68340_dma
{

4
src/emu/cpu/m68000/68340ser.h
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@ -1,6 +1,6 @@
READ32_HANDLER( m68340_internal_serial_r );
WRITE32_HANDLER( m68340_internal_serial_w );
DECLARE_READ32_HANDLER( m68340_internal_serial_r );
DECLARE_WRITE32_HANDLER( m68340_internal_serial_w );
class m68340_serial
{

12
src/emu/cpu/m68000/68340sim.h
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@ -41,12 +41,12 @@
READ16_HANDLER( m68340_internal_sim_r );
WRITE16_HANDLER( m68340_internal_sim_w );
READ32_HANDLER( m68340_internal_sim_cs_r );
WRITE32_HANDLER( m68340_internal_sim_cs_w );
READ8_HANDLER( m68340_internal_sim_ports_r );
WRITE8_HANDLER( m68340_internal_sim_ports_w );
DECLARE_READ16_HANDLER( m68340_internal_sim_r );
DECLARE_WRITE16_HANDLER( m68340_internal_sim_w );
DECLARE_READ32_HANDLER( m68340_internal_sim_cs_r );
DECLARE_WRITE32_HANDLER( m68340_internal_sim_cs_w );
DECLARE_READ8_HANDLER( m68340_internal_sim_ports_r );
DECLARE_WRITE8_HANDLER( m68340_internal_sim_ports_w );

4
src/emu/cpu/m68000/68340tmu.h
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@ -1,6 +1,6 @@
READ32_HANDLER( m68340_internal_timer_r );
WRITE32_HANDLER( m68340_internal_timer_w );
DECLARE_READ32_HANDLER( m68340_internal_timer_r );
DECLARE_WRITE32_HANDLER( m68340_internal_timer_w );
class m68340_timer
{

4
src/emu/cpu/psx/sio.h
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@ -87,7 +87,7 @@ private:
psx_sio port[2];
};
WRITE32_HANDLER( psx_sio_w );
READ32_HANDLER( psx_sio_r );
DECLARE_WRITE32_HANDLER( psx_sio_w );
DECLARE_READ32_HANDLER( psx_sio_r );
#endif

4
src/emu/cpu/sh2/sh2.h
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@ -67,8 +67,8 @@ struct sh2_cpu_core
DECLARE_LEGACY_CPU_DEVICE(SH1, sh1);
DECLARE_LEGACY_CPU_DEVICE(SH2, sh2);
WRITE32_HANDLER( sh2_internal_w );
READ32_HANDLER( sh2_internal_r );
DECLARE_WRITE32_HANDLER( sh2_internal_w );
DECLARE_READ32_HANDLER( sh2_internal_r );
void sh2_set_ftcsr_read_callback(device_t *device, void (*callback)(UINT32));
void sh2_set_frt_input(device_t *device, int state);

12
src/emu/cpu/sh4/sh4.h
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@ -152,14 +152,14 @@ DECLARE_LEGACY_CPU_DEVICE(SH3BE, sh3be);
DECLARE_LEGACY_CPU_DEVICE(SH4LE, sh4);
DECLARE_LEGACY_CPU_DEVICE(SH4BE, sh4be);
WRITE32_HANDLER( sh4_internal_w );
READ32_HANDLER( sh4_internal_r );
DECLARE_WRITE32_HANDLER( sh4_internal_w );
DECLARE_READ32_HANDLER( sh4_internal_r );
WRITE32_HANDLER( sh3_internal_w );
READ32_HANDLER( sh3_internal_r );
DECLARE_WRITE32_HANDLER( sh3_internal_w );
DECLARE_READ32_HANDLER( sh3_internal_r );
WRITE32_HANDLER( sh3_internal_high_w );
READ32_HANDLER( sh3_internal_high_r );
DECLARE_WRITE32_HANDLER( sh3_internal_high_w );
DECLARE_READ32_HANDLER( sh3_internal_high_r );
void sh4_set_frt_input(device_t *device, int state);

4
src/emu/cpu/sh4/sh4comn.h
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@ -320,8 +320,8 @@ void sh4_common_init(device_t *device);
UINT32 sh4_getsqremap(sh4_state *sh4, UINT32 address);
void sh4_handler_ipra_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask);
READ64_HANDLER( sh4_tlb_r );
WRITE64_HANDLER( sh4_tlb_w );
DECLARE_READ64_HANDLER( sh4_tlb_r );
DECLARE_WRITE64_HANDLER( sh4_tlb_w );
INLINE void sh4_check_pending_irq(sh4_state *sh4, const char *message) // look for highest priority active exception and handle it

8
src/emu/cpu/tms34010/tms34010.h
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@ -222,12 +222,12 @@ int tms34010_host_r(device_t *cpu, int reg);
/* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */
WRITE16_HANDLER( tms34010_io_register_w );
READ16_HANDLER( tms34010_io_register_r );
DECLARE_WRITE16_HANDLER( tms34010_io_register_w );
DECLARE_READ16_HANDLER( tms34010_io_register_r );
/* Reads & writes to the 34020 I/O registers; place at 0xc0000000 */
WRITE16_HANDLER( tms34020_io_register_w );
READ16_HANDLER( tms34020_io_register_r );
DECLARE_WRITE16_HANDLER( tms34020_io_register_w );
DECLARE_READ16_HANDLER( tms34020_io_register_r );
/* Use this macro in the memory definitions to specify bit-based addresses */

8
src/emu/cpu/tms7000/tms7000.c
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@ -126,10 +126,10 @@ INLINE tms7000_state *get_safe_token(device_t *device)
#define SETZ pSR |= SR_Z
#define SETN pSR |= SR_N
static READ8_HANDLER( tms7000_internal_r );
static WRITE8_HANDLER( tms7000_internal_w );
static READ8_HANDLER( tms70x0_pf_r );
static WRITE8_HANDLER( tms70x0_pf_w );
static DECLARE_READ8_HANDLER( tms7000_internal_r );
static DECLARE_WRITE8_HANDLER( tms7000_internal_w );
static DECLARE_READ8_HANDLER( tms70x0_pf_r );
static DECLARE_WRITE8_HANDLER( tms70x0_pf_w );
static ADDRESS_MAP_START(tms7000_mem, AS_PROGRAM, 8, legacy_cpu_device )
AM_RANGE(0x0000, 0x007f) AM_READWRITE_LEGACY(tms7000_internal_r, tms7000_internal_w) /* tms7000 internal RAM */

18
src/emu/cpu/tms9900/tms9900l.h
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@ -71,14 +71,14 @@ struct ti990_10reset_param
};
/* accessor for the internal ROM */
extern READ16_HANDLER(ti990_10_internal_r);
extern DECLARE_READ16_HANDLER(ti990_10_internal_r);
/* CRU accessor for the mapper registers (R12 base 0x1fa0) */
extern READ8_HANDLER(ti990_10_mapper_cru_r);
extern WRITE8_HANDLER(ti990_10_mapper_cru_w);
extern DECLARE_READ8_HANDLER(ti990_10_mapper_cru_r);
extern DECLARE_WRITE8_HANDLER(ti990_10_mapper_cru_w);
/* CRU accessor for the error interrupt register (R12 base 0x1fc0) */
extern READ8_HANDLER(ti990_10_eir_cru_r);
extern WRITE8_HANDLER(ti990_10_eir_cru_w);
extern DECLARE_READ8_HANDLER(ti990_10_eir_cru_r);
extern DECLARE_WRITE8_HANDLER(ti990_10_eir_cru_w);
@ -162,11 +162,11 @@ struct tms9995reset_param
};
/* accessor for the first 252 bytes of internal RAM */
extern READ8_HANDLER(tms9995_internal1_r);
extern WRITE8_HANDLER(tms9995_internal1_w);
extern DECLARE_READ8_HANDLER(tms9995_internal1_r);
extern DECLARE_WRITE8_HANDLER(tms9995_internal1_w);
/* accessors for the last 4 bytes of internal RAM */
extern READ8_HANDLER(tms9995_internal2_r);
extern WRITE8_HANDLER(tms9995_internal2_w);
extern DECLARE_READ8_HANDLER(tms9995_internal2_r);
extern DECLARE_WRITE8_HANDLER(tms9995_internal2_w);

74
src/emu/devcb.c
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@ -393,7 +393,7 @@ void devcb_resolved_read8::resolve(const devcb_read8 &desc, device_t &device)
if (desc.readdevice != NULL)
{
m_helper.read8_device = desc.readdevice;
*static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(&devcb_resolved_read8::from_read8, desc.name, this);
*static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(&devcb_resolved_read8::from_read8device, desc.name, this);
}
else
{
@ -404,7 +404,8 @@ void devcb_resolved_read8::resolve(const devcb_read8 &desc, device_t &device)
case DEVCB_TYPE_LEGACY_SPACE:
m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
*static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(desc.readspace, desc.name, m_object.space);
m_helper.read8_space = desc.readspace;
*static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(&devcb_resolved_read8::from_read8space, desc.name, this);
break;
case DEVCB_TYPE_CONSTANT:
@ -420,29 +421,40 @@ void devcb_resolved_read8::resolve(const devcb_read8 &desc, device_t &device)
// value to an 8-bit value
//-------------------------------------------------
UINT8 devcb_resolved_read8::from_port(offs_t offset)
UINT8 devcb_resolved_read8::from_port(offs_t offset, UINT8 mem_mask)
{
return m_object.port->read();
}
//-------------------------------------------------
// from_read8 - helper to convert from a device
// from_read8space - helper to convert from a device
// line read value to an 8-bit value
//-------------------------------------------------
UINT8 devcb_resolved_read8::from_read8(offs_t offset)
UINT8 devcb_resolved_read8::from_read8space(offs_t offset, UINT8 mem_mask)
{
return (*m_helper.read8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, 0xff);
}
//-------------------------------------------------
// from_read8device - helper to convert from a device
// line read value to an 8-bit value
//-------------------------------------------------
UINT8 devcb_resolved_read8::from_read8device(offs_t offset, UINT8 mem_mask)
{
return (*m_helper.read8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, mem_mask);
}
//-------------------------------------------------
// from_readline - helper to convert from a device
// line read value to an 8-bit value
//-------------------------------------------------
UINT8 devcb_resolved_read8::from_readline(offs_t offset)
UINT8 devcb_resolved_read8::from_readline(offs_t offset, UINT8 mem_mask)
{
return (*m_helper.read_line)(m_object.device);
}
@ -453,7 +465,7 @@ UINT8 devcb_resolved_read8::from_readline(offs_t offset)
// constant value to an 8-bit value
//-------------------------------------------------
UINT8 devcb_resolved_read8::from_constant(offs_t offset)
UINT8 devcb_resolved_read8::from_constant(offs_t offset, UINT8 mem_mask)
{
return m_object.constant;
}
@ -500,7 +512,7 @@ void devcb_resolved_write8::resolve(const devcb_write8 &desc, device_t &device)
if (desc.writedevice != NULL)
{
m_helper.write8_device = desc.writedevice;
*static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(&devcb_resolved_write8::to_write8, desc.name, this);
*static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(&devcb_resolved_write8::to_write8device, desc.name, this);
}
else
{
@ -511,7 +523,8 @@ void devcb_resolved_write8::resolve(const devcb_write8 &desc, device_t &device)
case DEVCB_TYPE_LEGACY_SPACE:
m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
*static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(desc.writespace, desc.name, m_object.space);
m_helper.write8_space = desc.writespace;
*static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(&devcb_resolved_write8::to_write8space, desc.name, this);
break;
case DEVCB_TYPE_INPUT_LINE:
@ -527,7 +540,7 @@ void devcb_resolved_write8::resolve(const devcb_write8 &desc, device_t &device)
// to_null - helper to handle a NULL write
//-------------------------------------------------
void devcb_resolved_write8::to_null(offs_t offset, UINT8 data)
void devcb_resolved_write8::to_null(offs_t offset, UINT8 data, UINT8 mem_mask)
{
}
@ -537,9 +550,31 @@ void devcb_resolved_write8::to_null(offs_t offset, UINT8 data)
// value from a line value
//-------------------------------------------------
void devcb_resolved_write8::to_port(offs_t offset, UINT8 data)
void devcb_resolved_write8::to_port(offs_t offset, UINT8 data, UINT8 mem_mask)
{
m_object.port->write(data, 0xff);
m_object.port->write(data, mem_mask);
}
//-------------------------------------------------
// to_write8space - helper to convert to an 8-bit
// memory read value from a line value
//-------------------------------------------------
void devcb_resolved_write8::to_write8space(offs_t offset, UINT8 data, UINT8 mem_mask)
{
(*m_helper.write8_space)(*m_object.space, offset, data, mem_mask);
}
//-------------------------------------------------
// to_write8device - helper to convert to an 8-bit
// memory read value from a line value
//-------------------------------------------------
void devcb_resolved_write8::to_write8device(offs_t offset, UINT8 data, UINT8 mem_mask)
{
(*m_helper.write8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, data, mem_mask);
}
@ -548,18 +583,7 @@ void devcb_resolved_write8::to_port(offs_t offset, UINT8 data)
// memory read value from a line value
//-------------------------------------------------
void devcb_resolved_write8::to_write8(offs_t offset, UINT8 data)
{
(*m_helper.write8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, data, 0xff);
}
//-------------------------------------------------
// to_write8 - helper to convert to an 8-bit
// memory read value from a line value
//-------------------------------------------------
void devcb_resolved_write8::to_writeline(offs_t offset, UINT8 data)
void devcb_resolved_write8::to_writeline(offs_t offset, UINT8 data, UINT8 mem_mask)
{
(*m_helper.write_line)(m_object.device, (data & 1) ? ASSERT_LINE : CLEAR_LINE);
}
@ -570,7 +594,7 @@ void devcb_resolved_write8::to_writeline(offs_t offset, UINT8 data)
// value from a line value
//-------------------------------------------------
void devcb_resolved_write8::to_input(offs_t offset, UINT8 data)
void devcb_resolved_write8::to_input(offs_t offset, UINT8 data, UINT8 mem_mask)
{
m_object.execute->set_input_line(m_helper.input_line, (data & 1) ? ASSERT_LINE : CLEAR_LINE);
}

36
src/emu/devcb.h
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@ -353,7 +353,7 @@ struct devcb_read8
// ======================> devcb_resolved_read8
// base delegate type for a read8
typedef delegate<UINT8 (offs_t)> devcb_read8_delegate;
typedef delegate<UINT8 (offs_t, UINT8)> devcb_read8_delegate;
// class which wraps resolving a devcb_read8 into a delegate
class devcb_resolved_read8 : public devcb_read8_delegate
@ -371,12 +371,16 @@ public:
// override parent class' notion of NULL
bool isnull() const { return m_helper.null_indicator == &s_null; }
// provide default for mem_mask
UINT8 operator()(offs_t offset, UINT8 mem_mask = 0xff) const { return devcb_read8_delegate::operator()(offset, mem_mask); }
private:
// internal helpers
UINT8 from_port(offs_t offset);
UINT8 from_read8(offs_t offset);
UINT8 from_readline(offs_t offset);
UINT8 from_constant(offs_t offset);
UINT8 from_port(offs_t offset, UINT8 mem_mask);
UINT8 from_read8space(offs_t offset, UINT8 mem_mask);
UINT8 from_read8device(offs_t offset, UINT8 mem_mask);
UINT8 from_readline(offs_t offset, UINT8 mem_mask);
UINT8 from_constant(offs_t offset, UINT8 mem_mask);
// internal state
devcb_resolved_objects m_object;
@ -403,7 +407,7 @@ struct devcb_write8
// ======================> devcb_resolved_write8
// base delegate type for a write8
typedef delegate<void (offs_t, UINT8)> devcb_write8_delegate;
typedef delegate<void (offs_t, UINT8, UINT8)> devcb_write8_delegate;
// class which wraps resolving a devcb_write8 into a delegate
class devcb_resolved_write8 : public devcb_write8_delegate
@ -421,13 +425,17 @@ public:
// override parent class' notion of NULL
bool isnull() const { return m_helper.null_indicator == &s_null; }
// provide default for mem_mask
void operator()(offs_t offset, UINT8 data, UINT8 mem_mask = 0xff) const { devcb_write8_delegate::operator()(offset, data, mem_mask); }
private:
// internal helpers
void to_null(offs_t offset, UINT8 data);
void to_port(offs_t offset, UINT8 data);
void to_write8(offs_t offset, UINT8 data);
void to_writeline(offs_t offset, UINT8 data);
void to_input(offs_t offset, UINT8 data);
void to_null(offs_t offset, UINT8 data, UINT8 mem_mask);
void to_port(offs_t offset, UINT8 data, UINT8 mem_mask);
void to_write8space(offs_t offset, UINT8 data, UINT8 mem_mask);
void to_write8device(offs_t offset, UINT8 data, UINT8 mem_mask);
void to_writeline(offs_t offset, UINT8 data, UINT8 mem_mask);
void to_input(offs_t offset, UINT8 data, UINT8 mem_mask);
// internal state
devcb_resolved_objects m_object;
@ -472,6 +480,9 @@ public:
// override parent class' notion of NULL
bool isnull() const { return m_helper.null_indicator == &s_null; }
// provide default for mem_mask
UINT16 operator()(offs_t offset, UINT16 mem_mask = 0xffff) const { return devcb_read16_delegate::operator()(offset, mem_mask); }
private:
// internal helpers
UINT16 from_port(offs_t offset, UINT16 mask);
@ -522,6 +533,9 @@ public:
// override parent class' notion of NULL
bool isnull() const { return m_helper.null_indicator == &s_null; }
// provide default for mem_mask
void operator()(offs_t offset, UINT16 data, UINT16 mem_mask = 0xffff) const { devcb_write16_delegate::operator()(offset, data, mem_mask); }
private:
// internal helpers
void to_null(offs_t offset, UINT16 data, UINT16 mask);

8
src/emu/machine/8042kbdc.h
View File

@ -34,10 +34,10 @@ struct kbdc8042_interface
void kbdc8042_init(running_machine &machine, const struct kbdc8042_interface *intf);
READ8_HANDLER(kbdc8042_8_r);
WRITE8_HANDLER(kbdc8042_8_w);
READ64_HANDLER(kbdc8042_64be_r);
WRITE64_HANDLER(kbdc8042_64be_w);
DECLARE_READ8_HANDLER(kbdc8042_8_r);
DECLARE_WRITE8_HANDLER(kbdc8042_8_w);
DECLARE_READ64_HANDLER(kbdc8042_64be_r);
DECLARE_WRITE64_HANDLER(kbdc8042_64be_w);
#endif /* KBDC8042_H */

2
src/emu/machine/latch8.c
View File

@ -88,7 +88,7 @@ READ8_DEVICE_HANDLER( latch8_r )
if (latch8->intf->devread[i].read_handler != NULL)
{
res &= ~( 1 << i);
res |= ((latch8->intf->devread[i].read_handler(space, 0) >> latch8->intf->devread[i].from_bit) & 0x01) << i;
res |= ((latch8->intf->devread[i].read_handler(space, 0, 0xff) >> latch8->intf->devread[i].from_bit) & 0x01) << i;
}
}
}

8
src/emu/machine/pc16552d.h
View File

@ -4,9 +4,9 @@
void pc16552d_init(running_machine &machine, int chip, int frequency, void (* irq_handler)(running_machine &machine, int channel, int value), void (* tx_callback)(running_machine &machine, int channel, int count, UINT8* data));
void pc16552d_rx_data(running_machine &machine, int chip, int channel, UINT8 data);
READ8_HANDLER(pc16552d_0_r);
WRITE8_HANDLER(pc16552d_0_w);
READ8_HANDLER(pc16552d_1_r);
WRITE8_HANDLER(pc16552d_1_w);
DECLARE_READ8_HANDLER(pc16552d_0_r);
DECLARE_WRITE8_HANDLER(pc16552d_0_w);
DECLARE_READ8_HANDLER(pc16552d_1_r);
DECLARE_WRITE8_HANDLER(pc16552d_1_w);
#endif

2
src/emu/machine/s3c2400.c
View File

@ -62,7 +62,7 @@ DEVICE_START( s3c2400 )
space.install_legacy_readwrite_handler( *device, 0x15800000, 0x15800007, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
space.install_legacy_readwrite_handler( *device, 0x15900000, 0x15900017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space.install_legacy_readwrite_handler( *device, 0x15a00000, 0x15a0003f, FUNC(s3c24xx_mmc_r), FUNC(s3c24xx_mmc_w));
s3c24xx_video_start( device, device->machine());
}

2
src/emu/machine/s3c2410.c
View File

@ -65,7 +65,7 @@ DEVICE_START( s3c2410 )
space.install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space.install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
space.install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
s3c24xx_video_start( device, device->machine());
}

4
src/emu/machine/tmp68301.h
View File

@ -6,8 +6,8 @@ MACHINE_START( tmp68301 );
MACHINE_RESET( tmp68301 );
// Hardware Registers
READ16_HANDLER( tmp68301_regs_r );
WRITE16_HANDLER( tmp68301_regs_w );
DECLARE_READ16_HANDLER( tmp68301_regs_r );
DECLARE_WRITE16_HANDLER( tmp68301_regs_w );
// Interrupts
void tmp68301_external_interrupt_0(running_machine &machine);

16
src/emu/memconv.h
View File

@ -89,9 +89,9 @@ INLINE UINT16 read16be_with_read8_handler(read8_space_func handler, address_spac
{
UINT16 result = 0;
if (ACCESSING_BITS_8_15)
result |= ((UINT16)(*handler)(space, offset * 2 + 0)) << 8;
result |= ((UINT16)(*handler)(space, offset * 2 + 0, mem_mask >> 8)) << 8;
if (ACCESSING_BITS_0_7)
result |= ((UINT16)(*handler)(space, offset * 2 + 1)) << 0;
result |= ((UINT16)(*handler)(space, offset * 2 + 1, mem_mask >> 0)) << 0;
return result;
}
@ -99,9 +99,9 @@ INLINE UINT16 read16be_with_read8_handler(read8_space_func handler, address_spac
INLINE void write16be_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
{
if (ACCESSING_BITS_8_15)
(*handler)(space, offset * 2 + 0, data >> 8);
(*handler)(space, offset * 2 + 0, data >> 8, mem_mask >> 8);
if (ACCESSING_BITS_0_7)
(*handler)(space, offset * 2 + 1, data >> 0);
(*handler)(space, offset * 2 + 1, data >> 0, mem_mask >> 0);
}
@ -115,9 +115,9 @@ INLINE UINT16 read16le_with_read8_handler(read8_space_func handler, address_spac
{
UINT16 result = 0;
if (ACCESSING_BITS_0_7)
result |= ((UINT16) (*handler)(space, offset * 2 + 0)) << 0;
result |= ((UINT16) (*handler)(space, offset * 2 + 0, mem_mask >> 0)) << 0;
if (ACCESSING_BITS_8_15)
result |= ((UINT16) (*handler)(space, offset * 2 + 1)) << 8;
result |= ((UINT16) (*handler)(space, offset * 2 + 1, mem_mask >> 8)) << 8;
return result;
}
@ -125,9 +125,9 @@ INLINE UINT16 read16le_with_read8_handler(read8_space_func handler, address_spac
INLINE void write16le_with_write8_handler(write8_space_func handler, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
{
if (ACCESSING_BITS_0_7)
(*handler)(space, offset * 2 + 0, data >> 0);
(*handler)(space, offset * 2 + 0, data >> 0, mem_mask >> 0);
if (ACCESSING_BITS_8_15)
(*handler)(space, offset * 2 + 1, data >> 8);
(*handler)(space, offset * 2 + 1, data >> 8, mem_mask >> 8);
}

16
src/emu/memory.c
View File

@ -4984,7 +4984,7 @@ UINT16 handler_entry_read::read_stub_16(address_space &space, offs_t offset, UIN
offs_t aoffset = offset * si.m_multiplier + si.m_offset;
UINT8 val;
if (m_sub_is_legacy[index])
val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, submask);
else
val = m_subread[index].r8(space, aoffset, submask);
result |= val << si.m_shift;
@ -5015,7 +5015,7 @@ UINT32 handler_entry_read::read_stub_32(address_space &space, offs_t offset, UIN
switch (si.m_size)
{
case 8:
val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, submask);
break;
case 16:
val = m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, submask);
@ -5062,7 +5062,7 @@ UINT64 handler_entry_read::read_stub_64(address_space &space, offs_t offset, UIN
switch (si.m_size)
{
case 8:
val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset);
val = m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, submask);
break;
case 16:
val = m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, submask);
@ -5101,7 +5101,7 @@ UINT64 handler_entry_read::read_stub_64(address_space &space, offs_t offset, UIN
UINT8 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT8 mask)
{
return m_legacy_info.handler.space8(*m_legacy_info.object.space, offset);
return m_legacy_info.handler.space8(*m_legacy_info.object.space, offset, mask);
}
UINT16 handler_entry_read::read_stub_legacy(address_space &space, offs_t offset, UINT16 mask)
@ -5438,7 +5438,7 @@ void handler_entry_write::write_stub_16(address_space &space, offs_t offset, UIN
offs_t aoffset = offset * si.m_multiplier + si.m_offset;
UINT8 adata = data >> si.m_shift;
if (m_sub_is_legacy[index])
m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
else
m_subwrite[index].w8(space, aoffset, adata, submask);
}
@ -5466,7 +5466,7 @@ void handler_entry_write::write_stub_32(address_space &space, offs_t offset, UIN
switch (si.m_size)
{
case 8:
m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
break;
case 16:
m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
@ -5510,7 +5510,7 @@ void handler_entry_write::write_stub_64(address_space &space, offs_t offset, UIN
switch (si.m_size)
{
case 8:
m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata);
m_sublegacy_info[index].handler.space8(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
break;
case 16:
m_sublegacy_info[index].handler.space16(*m_sublegacy_info[index].object.space, aoffset, adata, submask);
@ -5547,7 +5547,7 @@ void handler_entry_write::write_stub_64(address_space &space, offs_t offset, UIN
void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT8 data, UINT8 mask)
{
m_legacy_info.handler.space8(*m_legacy_info.object.space, offset, data);
m_legacy_info.handler.space8(*m_legacy_info.object.space, offset, data, mask);
}
void handler_entry_write::write_stub_legacy(address_space &space, offs_t offset, UINT16 data, UINT16 mask)

17
src/emu/memory.h
View File

@ -112,8 +112,8 @@ typedef delegate<void (address_map &, const device_t &)> address_map_delegate;
// legacy space read/write handlers
typedef UINT8 (*read8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset);
typedef void (*write8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data);
typedef UINT8 (*read8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask);
typedef void (*write8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask);
typedef UINT16 (*read16_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
typedef void (*write16_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
typedef UINT32 (*read32_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
@ -876,8 +876,8 @@ private:
// space read/write handler function macros
#define READ8_HANDLER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset)
#define WRITE8_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data)
#define READ8_HANDLER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
#define WRITE8_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
#define READ16_HANDLER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
#define WRITE16_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
#define READ32_HANDLER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
@ -885,6 +885,15 @@ private:
#define READ64_HANDLER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
#define WRITE64_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
#define DECLARE_READ8_HANDLER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
#define DECLARE_WRITE8_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
#define DECLARE_READ16_HANDLER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
#define DECLARE_WRITE16_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
#define DECLARE_READ32_HANDLER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
#define DECLARE_WRITE32_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
#define DECLARE_READ64_HANDLER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
#define DECLARE_WRITE64_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
// device read/write handler function macros
#define READ8_DEVICE_HANDLER(name) UINT8 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)

4
src/emu/sound/pokey.h
View File

@ -347,8 +347,8 @@ extern const device_type POKEY;
/* fix me: eventually this should be a single device with pokey subdevices */
READ8_HANDLER( quad_pokeyn_r );
WRITE8_HANDLER( quad_pokeyn_w );
DECLARE_READ8_HANDLER( quad_pokeyn_r );
DECLARE_WRITE8_HANDLER( quad_pokeyn_w );
#endif /* __POKEY_H__ */

4
src/emu/sound/spu.h
View File

@ -248,7 +248,7 @@ extern reverb_params *spu_reverb_cfg;
extern const device_type SPU;
// MAME old-style interface
READ16_HANDLER( spu_r );
WRITE16_HANDLER( spu_w );
DECLARE_READ16_HANDLER( spu_r );
DECLARE_WRITE16_HANDLER( spu_w );
#endif

4
src/emu/video/pc_cga.c
View File

@ -168,8 +168,8 @@ INPUT_PORTS_END
#define CGA_CHIPSET_PARADISE 0x80 /* Paradise (used in PC1640) */
static READ8_HANDLER( pc_cga8_r );
static WRITE8_HANDLER( pc_cga8_w );
static DECLARE_READ8_HANDLER( pc_cga8_r );
static DECLARE_WRITE8_HANDLER( pc_cga8_w );
static MC6845_UPDATE_ROW( cga_update_row );
static WRITE_LINE_DEVICE_HANDLER( cga_hsync_changed );
static WRITE_LINE_DEVICE_HANDLER( cga_vsync_changed );

6
src/emu/video/pc_cga.h
View File

@ -20,9 +20,9 @@ INPUT_PORTS_EXTERN( pcvideo_pc1512 );
/* Used in machine/pc.c */
READ16_HANDLER( pc1512_16le_r );
WRITE16_HANDLER( pc1512_16le_w );
WRITE16_HANDLER( pc1512_videoram16le_w );
DECLARE_READ16_HANDLER( pc1512_16le_r );
DECLARE_WRITE16_HANDLER( pc1512_16le_w );
DECLARE_WRITE16_HANDLER( pc1512_videoram16le_w );
MACHINE_CONFIG_EXTERN( pcvideo_poisk2 );

16
src/emu/video/pc_vga.c
View File

@ -1533,7 +1533,7 @@ READ8_HANDLER( vga_port_03b0_r )
{
UINT8 data = 0xff;
if (CRTC_PORT_ADDR==0x3b0)
data=vga_crtc_r(space, offset);
data=vga_crtc_r(space, offset, mem_mask);
return data;
}
@ -1607,19 +1607,19 @@ READ8_HANDLER( vga_port_03c0_r )
switch ((vga.miscellaneous_output>>2)&3)
{
case 3:
if (vga.read_dipswitch && vga.read_dipswitch(space, 0) & 0x01)
if (vga.read_dipswitch && vga.read_dipswitch(space, 0, mem_mask) & 0x01)
data |= 0x10;
break;
case 2:
if (vga.read_dipswitch && vga.read_dipswitch(space, 0) & 0x02)
if (vga.read_dipswitch && vga.read_dipswitch(space, 0, mem_mask) & 0x02)
data |= 0x10;
break;
case 1:
if (vga.read_dipswitch && vga.read_dipswitch(space, 0) & 0x04)
if (vga.read_dipswitch && vga.read_dipswitch(space, 0, mem_mask) & 0x04)
data |= 0x10;
break;
case 0:
if (vga.read_dipswitch && vga.read_dipswitch(space, 0) & 0x08)
if (vga.read_dipswitch && vga.read_dipswitch(space, 0, mem_mask) & 0x08)
data |= 0x10;
break;
}
@ -1697,7 +1697,7 @@ READ8_HANDLER(vga_port_03d0_r)
{
UINT8 data = 0xff;
if (CRTC_PORT_ADDR == 0x3d0)
data = vga_crtc_r(space, offset);
data = vga_crtc_r(space, offset, mem_mask);
if(offset == 8)
{
logerror("VGA: 0x3d8 read at %08x\n",space.device().safe_pc());
@ -1713,7 +1713,7 @@ WRITE8_HANDLER( vga_port_03b0_w )
logerror("vga_port_03b0_w(): port=0x%04x data=0x%02x\n", offset + 0x3b0, data);
if (CRTC_PORT_ADDR == 0x3b0)
vga_crtc_w(space, offset, data);
vga_crtc_w(space, offset, data, mem_mask);
}
static void attribute_reg_write(UINT8 index, UINT8 data)
@ -1876,7 +1876,7 @@ WRITE8_HANDLER(vga_port_03d0_w)
logerror("vga_port_03d0_w(): port=0x%04x data=0x%02x\n", offset + 0x3d0, data);
if (CRTC_PORT_ADDR == 0x3d0)
vga_crtc_w(space, offset, data);
vga_crtc_w(space, offset, data, mem_mask);
}
void pc_vga_reset(running_machine &machine)

188
src/emu/video/pc_vga.h
View File

@ -35,107 +35,107 @@ size_t pc_vga_memory_size(void);
void pc_video_start(running_machine &machine);
void s3_video_start(running_machine &machine);
READ8_HANDLER(vga_port_03b0_r);
READ8_HANDLER(vga_port_03c0_r);
READ8_HANDLER(vga_port_03d0_r);
READ8_HANDLER(vga_mem_r);
WRITE8_HANDLER(vga_port_03b0_w);
WRITE8_HANDLER(vga_port_03c0_w);
WRITE8_HANDLER(vga_port_03d0_w);
WRITE8_HANDLER(vga_mem_w);
DECLARE_READ8_HANDLER(vga_port_03b0_r);
DECLARE_READ8_HANDLER(vga_port_03c0_r);
DECLARE_READ8_HANDLER(vga_port_03d0_r);
DECLARE_READ8_HANDLER(vga_mem_r);
DECLARE_WRITE8_HANDLER(vga_port_03b0_w);
DECLARE_WRITE8_HANDLER(vga_port_03c0_w);
DECLARE_WRITE8_HANDLER(vga_port_03d0_w);
DECLARE_WRITE8_HANDLER(vga_mem_w);
/* per-device implementations */
READ8_HANDLER(tseng_et4k_03b0_r);
WRITE8_HANDLER(tseng_et4k_03b0_w);
READ8_HANDLER(tseng_et4k_03c0_r);
WRITE8_HANDLER(tseng_et4k_03c0_w);
READ8_HANDLER(tseng_et4k_03d0_r);
WRITE8_HANDLER(tseng_et4k_03d0_w);
READ8_HANDLER(tseng_mem_r);
WRITE8_HANDLER(tseng_mem_w);
DECLARE_READ8_HANDLER(tseng_et4k_03b0_r);
DECLARE_WRITE8_HANDLER(tseng_et4k_03b0_w);
DECLARE_READ8_HANDLER(tseng_et4k_03c0_r);
DECLARE_WRITE8_HANDLER(tseng_et4k_03c0_w);
DECLARE_READ8_HANDLER(tseng_et4k_03d0_r);
DECLARE_WRITE8_HANDLER(tseng_et4k_03d0_w);
DECLARE_READ8_HANDLER(tseng_mem_r);
DECLARE_WRITE8_HANDLER(tseng_mem_w);
READ8_HANDLER(trident_03c0_r);
WRITE8_HANDLER(trident_03c0_w);
READ8_HANDLER(trident_03d0_r);
WRITE8_HANDLER(trident_03d0_w);
READ8_HANDLER(trident_mem_r);
WRITE8_HANDLER(trident_mem_w);
DECLARE_READ8_HANDLER(trident_03c0_r);
DECLARE_WRITE8_HANDLER(trident_03c0_w);
DECLARE_READ8_HANDLER(trident_03d0_r);
DECLARE_WRITE8_HANDLER(trident_03d0_w);
DECLARE_READ8_HANDLER(trident_mem_r);
DECLARE_WRITE8_HANDLER(trident_mem_w);
READ8_HANDLER(s3_port_03b0_r);
WRITE8_HANDLER(s3_port_03b0_w);
READ8_HANDLER(s3_port_03c0_r);
WRITE8_HANDLER(s3_port_03c0_w);
READ8_HANDLER(s3_port_03d0_r);
WRITE8_HANDLER(s3_port_03d0_w);
READ16_HANDLER(s3_gpstatus_r);
WRITE16_HANDLER(s3_cmd_w);
READ16_HANDLER(ibm8514_ssv_r);
WRITE16_HANDLER(ibm8514_ssv_w);
READ16_HANDLER(s3_8ae8_r);
WRITE16_HANDLER(s3_8ae8_w);
READ16_HANDLER(s3_8ee8_r);
WRITE16_HANDLER(s3_8ee8_w);
READ16_HANDLER(s3_currentx_r);
WRITE16_HANDLER(s3_currentx_w);
READ16_HANDLER(s3_currenty_r);
WRITE16_HANDLER(s3_currenty_w);
READ16_HANDLER(s3_line_error_r);
WRITE16_HANDLER(s3_line_error_w);
READ16_HANDLER(s3_width_r);
WRITE16_HANDLER(s3_width_w);
READ16_HANDLER(s3_multifunc_r);
WRITE16_HANDLER(s3_multifunc_w);
READ16_HANDLER(s3_fgcolour_r);
WRITE16_HANDLER(s3_fgcolour_w);
READ16_HANDLER(s3_bgcolour_r);
WRITE16_HANDLER(s3_bgcolour_w);
READ16_HANDLER(s3_backmix_r);
WRITE16_HANDLER(s3_backmix_w);
READ16_HANDLER(s3_foremix_r);
WRITE16_HANDLER(s3_foremix_w);
READ16_HANDLER(s3_pixel_xfer_r);
WRITE16_HANDLER(s3_pixel_xfer_w);
READ8_HANDLER(s3_mem_r);
WRITE8_HANDLER(s3_mem_w);
DECLARE_READ8_HANDLER(s3_port_03b0_r);
DECLARE_WRITE8_HANDLER(s3_port_03b0_w);
DECLARE_READ8_HANDLER(s3_port_03c0_r);
DECLARE_WRITE8_HANDLER(s3_port_03c0_w);
DECLARE_READ8_HANDLER(s3_port_03d0_r);
DECLARE_WRITE8_HANDLER(s3_port_03d0_w);
DECLARE_READ16_HANDLER(s3_gpstatus_r);
DECLARE_WRITE16_HANDLER(s3_cmd_w);
DECLARE_READ16_HANDLER(ibm8514_ssv_r);
DECLARE_WRITE16_HANDLER(ibm8514_ssv_w);
DECLARE_READ16_HANDLER(s3_8ae8_r);
DECLARE_WRITE16_HANDLER(s3_8ae8_w);
DECLARE_READ16_HANDLER(s3_8ee8_r);
DECLARE_WRITE16_HANDLER(s3_8ee8_w);
DECLARE_READ16_HANDLER(s3_currentx_r);
DECLARE_WRITE16_HANDLER(s3_currentx_w);
DECLARE_READ16_HANDLER(s3_currenty_r);
DECLARE_WRITE16_HANDLER(s3_currenty_w);
DECLARE_READ16_HANDLER(s3_line_error_r);
DECLARE_WRITE16_HANDLER(s3_line_error_w);
DECLARE_READ16_HANDLER(s3_width_r);
DECLARE_WRITE16_HANDLER(s3_width_w);
DECLARE_READ16_HANDLER(s3_multifunc_r);
DECLARE_WRITE16_HANDLER(s3_multifunc_w);
DECLARE_READ16_HANDLER(s3_fgcolour_r);
DECLARE_WRITE16_HANDLER(s3_fgcolour_w);
DECLARE_READ16_HANDLER(s3_bgcolour_r);
DECLARE_WRITE16_HANDLER(s3_bgcolour_w);
DECLARE_READ16_HANDLER(s3_backmix_r);
DECLARE_WRITE16_HANDLER(s3_backmix_w);
DECLARE_READ16_HANDLER(s3_foremix_r);
DECLARE_WRITE16_HANDLER(s3_foremix_w);
DECLARE_READ16_HANDLER(s3_pixel_xfer_r);
DECLARE_WRITE16_HANDLER(s3_pixel_xfer_w);
DECLARE_READ8_HANDLER(s3_mem_r);
DECLARE_WRITE8_HANDLER(s3_mem_w);
READ8_HANDLER( ati_port_03c0_r );
DECLARE_READ8_HANDLER( ati_port_03c0_r );
DECLARE_READ8_DEVICE_HANDLER(ati_port_ext_r);
DECLARE_WRITE8_DEVICE_HANDLER(ati_port_ext_w);
READ16_HANDLER(ibm8514_gpstatus_r);
WRITE16_HANDLER(ibm8514_cmd_w);
READ16_HANDLER(mach8_ext_fifo_r);
WRITE16_HANDLER(mach8_linedraw_index_w);
READ16_HANDLER(mach8_bresenham_count_r);
WRITE16_HANDLER(mach8_bresenham_count_w);
READ16_HANDLER(mach8_scratch0_r);
WRITE16_HANDLER(mach8_scratch0_w);
READ16_HANDLER(mach8_scratch1_r);
WRITE16_HANDLER(mach8_scratch1_w);
READ16_HANDLER(mach8_config1_r);
READ16_HANDLER(mach8_config2_r);
READ16_HANDLER(mach8_status_r);
READ16_HANDLER(mach8_substatus_r);
WRITE16_HANDLER(mach8_subcontrol_w);
READ16_HANDLER(mach8_subcontrol_r);
READ16_HANDLER(mach8_htotal_r);
WRITE16_HANDLER(mach8_htotal_w);
READ16_HANDLER(mach8_vtotal_r);
WRITE16_HANDLER(mach8_vtotal_w);
READ16_HANDLER(mach8_vdisp_r);
WRITE16_HANDLER(mach8_vdisp_w);
READ16_HANDLER(mach8_vsync_r);
WRITE16_HANDLER(mach8_vsync_w);
WRITE16_HANDLER(mach8_linedraw_w);
READ16_HANDLER(mach8_ec0_r);
WRITE16_HANDLER(mach8_ec0_w);
READ16_HANDLER(mach8_ec1_r);
WRITE16_HANDLER(mach8_ec1_w);
READ16_HANDLER(mach8_ec2_r);
WRITE16_HANDLER(mach8_ec2_w);
READ16_HANDLER(mach8_ec3_r);
WRITE16_HANDLER(mach8_ec3_w);
READ8_HANDLER(ati_mem_r);
WRITE8_HANDLER(ati_mem_w);
DECLARE_READ16_HANDLER(ibm8514_gpstatus_r);
DECLARE_WRITE16_HANDLER(ibm8514_cmd_w);
DECLARE_READ16_HANDLER(mach8_ext_fifo_r);
DECLARE_WRITE16_HANDLER(mach8_linedraw_index_w);
DECLARE_READ16_HANDLER(mach8_bresenham_count_r);
DECLARE_WRITE16_HANDLER(mach8_bresenham_count_w);
DECLARE_READ16_HANDLER(mach8_scratch0_r);
DECLARE_WRITE16_HANDLER(mach8_scratch0_w);
DECLARE_READ16_HANDLER(mach8_scratch1_r);
DECLARE_WRITE16_HANDLER(mach8_scratch1_w);
DECLARE_READ16_HANDLER(mach8_config1_r);
DECLARE_READ16_HANDLER(mach8_config2_r);
DECLARE_READ16_HANDLER(mach8_status_r);
DECLARE_READ16_HANDLER(mach8_substatus_r);
DECLARE_WRITE16_HANDLER(mach8_subcontrol_w);
DECLARE_READ16_HANDLER(mach8_subcontrol_r);
DECLARE_READ16_HANDLER(mach8_htotal_r);
DECLARE_WRITE16_HANDLER(mach8_htotal_w);
DECLARE_READ16_HANDLER(mach8_vtotal_r);
DECLARE_WRITE16_HANDLER(mach8_vtotal_w);
DECLARE_READ16_HANDLER(mach8_vdisp_r);
DECLARE_WRITE16_HANDLER(mach8_vdisp_w);
DECLARE_READ16_HANDLER(mach8_vsync_r);
DECLARE_WRITE16_HANDLER(mach8_vsync_w);
DECLARE_WRITE16_HANDLER(mach8_linedraw_w);
DECLARE_READ16_HANDLER(mach8_ec0_r);
DECLARE_WRITE16_HANDLER(mach8_ec0_w);
DECLARE_READ16_HANDLER(mach8_ec1_r);
DECLARE_WRITE16_HANDLER(mach8_ec1_w);
DECLARE_READ16_HANDLER(mach8_ec2_r);
DECLARE_WRITE16_HANDLER(mach8_ec2_w);
DECLARE_READ16_HANDLER(mach8_ec3_r);
DECLARE_WRITE16_HANDLER(mach8_ec3_w);
DECLARE_READ8_HANDLER(ati_mem_r);
DECLARE_WRITE8_HANDLER(ati_mem_w);
/*

4
src/emu/video/tms34061.h
View File

@ -66,8 +66,8 @@ UINT8 tms34061_r(address_space &space, int col, int row, int func);
void tms34061_w(address_space &space, int col, int row, int func, UINT8 data);
/* latch settings */
READ8_HANDLER( tms34061_latch_r );
WRITE8_HANDLER( tms34061_latch_w );
DECLARE_READ8_HANDLER( tms34061_latch_r );
DECLARE_WRITE8_HANDLER( tms34061_latch_w );
/* video update handling */
void tms34061_get_display_state(struct tms34061_display *state);

12
src/mame/audio/atarijsa.c
View File

@ -73,12 +73,12 @@ static UINT8 ym2151_ct2;
static void update_all_volumes(running_machine &machine);
static READ8_HANDLER( jsa1_io_r );
static WRITE8_HANDLER( jsa1_io_w );
static READ8_HANDLER( jsa2_io_r );
static WRITE8_HANDLER( jsa2_io_w );
static READ8_HANDLER( jsa3_io_r );
static WRITE8_HANDLER( jsa3_io_w );
static DECLARE_READ8_HANDLER( jsa1_io_r );
static DECLARE_WRITE8_HANDLER( jsa1_io_w );
static DECLARE_READ8_HANDLER( jsa2_io_r );
static DECLARE_WRITE8_HANDLER( jsa2_io_w );
static DECLARE_READ8_HANDLER( jsa3_io_r );
static DECLARE_WRITE8_HANDLER( jsa3_io_w );
/*************************************

2
src/mame/audio/cage.c
View File

@ -147,7 +147,7 @@ static const char *const register_names[] =
static TIMER_DEVICE_CALLBACK( dma_timer_callback );
static TIMER_DEVICE_CALLBACK( cage_timer_callback );
static void update_timer(int which);
static WRITE32_HANDLER( speedup_w );
static DECLARE_WRITE32_HANDLER( speedup_w );

6
src/mame/audio/cclimber.h
View File

@ -3,6 +3,6 @@
extern const ay8910_interface cclimber_ay8910_interface;
extern const samples_interface cclimber_samples_interface;
WRITE8_HANDLER( cclimber_sample_trigger_w );
WRITE8_HANDLER( cclimber_sample_rate_w );
WRITE8_HANDLER( cclimber_sample_volume_w );
DECLARE_WRITE8_HANDLER( cclimber_sample_trigger_w );
DECLARE_WRITE8_HANDLER( cclimber_sample_rate_w );
DECLARE_WRITE8_HANDLER( cclimber_sample_volume_w );

40
src/mame/audio/dcs.c
View File

@ -376,32 +376,32 @@ static dcs_state dcs;
*
*************************************/
static READ16_HANDLER( dcs_dataram_r );
static WRITE16_HANDLER( dcs_dataram_w );
static WRITE16_HANDLER( dcs_data_bank_select_w );
static DECLARE_READ16_HANDLER( dcs_dataram_r );
static DECLARE_WRITE16_HANDLER( dcs_dataram_w );
static DECLARE_WRITE16_HANDLER( dcs_data_bank_select_w );
static void sdrc_reset(running_machine &machine);
static READ16_HANDLER( sdrc_r );
static WRITE16_HANDLER( sdrc_w );
static DECLARE_READ16_HANDLER( sdrc_r );
static DECLARE_WRITE16_HANDLER( sdrc_w );
static void dsio_reset(running_machine &machine);
static READ16_HANDLER( dsio_r );
static WRITE16_HANDLER( dsio_w );
static DECLARE_READ16_HANDLER( dsio_r );
static DECLARE_WRITE16_HANDLER( dsio_w );
static void denver_reset(running_machine &machine);
static READ16_HANDLER( denver_r );
static WRITE16_HANDLER( denver_w );
static DECLARE_READ16_HANDLER( denver_r );
static DECLARE_WRITE16_HANDLER( denver_w );
static READ16_HANDLER( adsp_control_r );
static WRITE16_HANDLER( adsp_control_w );
static DECLARE_READ16_HANDLER( adsp_control_r );
static DECLARE_WRITE16_HANDLER( adsp_control_w );
static READ16_HANDLER( latch_status_r );
static READ16_HANDLER( fifo_input_r );
static READ16_HANDLER( input_latch_r );
static WRITE16_HANDLER( input_latch_ack_w );
static WRITE16_HANDLER( output_latch_w );
static READ16_HANDLER( output_control_r );
static WRITE16_HANDLER( output_control_w );
static DECLARE_READ16_HANDLER( latch_status_r );
static DECLARE_READ16_HANDLER( fifo_input_r );
static DECLARE_READ16_HANDLER( input_latch_r );
static DECLARE_WRITE16_HANDLER( input_latch_ack_w );
static DECLARE_WRITE16_HANDLER( output_latch_w );
static DECLARE_READ16_HANDLER( output_control_r );
static DECLARE_WRITE16_HANDLER( output_control_w );
static void timer_enable_callback(adsp21xx_device &device, int enable);
static TIMER_DEVICE_CALLBACK( internal_timer_callback );
@ -410,8 +410,8 @@ static TIMER_DEVICE_CALLBACK( sport0_irq );
static void recompute_sample_rate(running_machine &machine);
static void sound_tx_callback(adsp21xx_device &device, int port, INT32 data);
static READ16_HANDLER( dcs_polling_r );
static WRITE16_HANDLER( dcs_polling_w );
static DECLARE_READ16_HANDLER( dcs_polling_r );
static DECLARE_WRITE16_HANDLER( dcs_polling_w );
static TIMER_DEVICE_CALLBACK( transfer_watchdog_callback );
static int preprocess_write(running_machine &machine, UINT16 data);

11
src/mame/audio/dcs.h
View File

@ -4,6 +4,9 @@
****************************************************************************/
#ifndef __DCS_H__
#define __DCS_H__
MACHINE_CONFIG_EXTERN( dcs_audio_2k );
MACHINE_CONFIG_EXTERN( dcs_audio_2k_uart );
MACHINE_CONFIG_EXTERN( dcs_audio_8k );
@ -29,6 +32,8 @@ void dcs_reset_w(running_machine &machine, int state);
void dcs_fifo_notify(running_machine &machine, int count, int max);
WRITE32_HANDLER( dsio_idma_addr_w );
WRITE32_HANDLER( dsio_idma_data_w );
READ32_HANDLER( dsio_idma_data_r );
DECLARE_WRITE32_HANDLER( dsio_idma_addr_w );
DECLARE_WRITE32_HANDLER( dsio_idma_data_w );
DECLARE_READ32_HANDLER( dsio_idma_data_r );
#endif

2
src/mame/audio/irem.h
View File

@ -1,4 +1,4 @@
WRITE8_HANDLER( irem_sound_cmd_w );
DECLARE_WRITE8_HANDLER( irem_sound_cmd_w );
MACHINE_CONFIG_EXTERN( m52_sound_c_audio );
MACHINE_CONFIG_EXTERN( m52_large_audio );

26
src/mame/audio/seibu.h
View File

@ -38,24 +38,24 @@ ADDRESS_MAP_EXTERN(seibu_newzeroteam_sound_map, 8);
ADDRESS_MAP_EXTERN(seibu3_sound_map, 8);
ADDRESS_MAP_EXTERN(seibu3_adpcm_sound_map, 8);
READ16_HANDLER( seibu_main_word_r );
READ8_HANDLER( seibu_main_v30_r );
WRITE16_HANDLER( seibu_main_word_w );
WRITE8_HANDLER( seibu_main_v30_w );
DECLARE_READ16_HANDLER( seibu_main_word_r );
DECLARE_READ8_HANDLER( seibu_main_v30_r );
DECLARE_WRITE16_HANDLER( seibu_main_word_w );
DECLARE_WRITE8_HANDLER( seibu_main_v30_w );
WRITE16_HANDLER( seibu_main_mustb_w );
DECLARE_WRITE16_HANDLER( seibu_main_mustb_w );
WRITE8_HANDLER( seibu_irq_clear_w );
WRITE8_HANDLER( seibu_rst10_ack_w );
WRITE8_HANDLER( seibu_rst18_ack_w );
WRITE8_HANDLER( seibu_bank_w );
WRITE8_HANDLER( seibu_coin_w );
DECLARE_WRITE8_HANDLER( seibu_irq_clear_w );
DECLARE_WRITE8_HANDLER( seibu_rst10_ack_w );
DECLARE_WRITE8_HANDLER( seibu_rst18_ack_w );
DECLARE_WRITE8_HANDLER( seibu_bank_w );
DECLARE_WRITE8_HANDLER( seibu_coin_w );
void seibu_ym3812_irqhandler(device_t *device, int linestate);
void seibu_ym2151_irqhandler(device_t *device, int linestate);
void seibu_ym2203_irqhandler(device_t *device, int linestate);
READ8_HANDLER( seibu_soundlatch_r );
READ8_HANDLER( seibu_main_data_pending_r );
WRITE8_HANDLER( seibu_main_data_w );
DECLARE_READ8_HANDLER( seibu_soundlatch_r );
DECLARE_READ8_HANDLER( seibu_main_data_pending_r );
DECLARE_WRITE8_HANDLER( seibu_main_data_w );
MACHINE_RESET( seibu_sound );
void seibu_sound_decrypt(running_machine &machine,const char *cpu,int length);

12
src/mame/audio/t5182.h
View File

@ -10,12 +10,12 @@ void t5182_init(running_machine &machine);
ADDRESS_MAP_EXTERN( t5182_map, 8 );
ADDRESS_MAP_EXTERN( t5182_io, 8 );
WRITE8_HANDLER( t5182_sound_irq_w );
READ8_HANDLER(t5182_sharedram_semaphore_snd_r);
WRITE8_HANDLER(t5182_sharedram_semaphore_main_acquire_w);
WRITE8_HANDLER(t5182_sharedram_semaphore_main_release_w);
DECLARE_WRITE8_HANDLER( t5182_sound_irq_w );
DECLARE_READ8_HANDLER(t5182_sharedram_semaphore_snd_r);
DECLARE_WRITE8_HANDLER(t5182_sharedram_semaphore_main_acquire_w);
DECLARE_WRITE8_HANDLER(t5182_sharedram_semaphore_main_release_w);
READ8_HANDLER( t5182_sharedram_r );
WRITE8_HANDLER( t5182_sharedram_w );
DECLARE_READ8_HANDLER( t5182_sharedram_r );
DECLARE_WRITE8_HANDLER( t5182_sharedram_w );
extern const ym2151_interface t5182_ym2151_interface;

2
src/mame/audio/timeplt.h
View File

@ -1,4 +1,4 @@
WRITE8_HANDLER( timeplt_sh_irqtrigger_w );
DECLARE_WRITE8_HANDLER( timeplt_sh_irqtrigger_w );
MACHINE_CONFIG_EXTERN( timeplt_sound );
MACHINE_CONFIG_EXTERN( locomotn_sound );

8
src/mame/audio/trackfld.h
View File

@ -1,10 +1,10 @@
WRITE8_HANDLER( konami_sh_irqtrigger_w );
READ8_HANDLER( trackfld_sh_timer_r );
DECLARE_WRITE8_HANDLER( konami_sh_irqtrigger_w );
DECLARE_READ8_HANDLER( trackfld_sh_timer_r );
DECLARE_READ8_DEVICE_HANDLER( trackfld_speech_r );
DECLARE_WRITE8_DEVICE_HANDLER( trackfld_sound_w );
READ8_HANDLER( hyperspt_sh_timer_r );
DECLARE_READ8_HANDLER( hyperspt_sh_timer_r );
DECLARE_WRITE8_DEVICE_HANDLER( hyperspt_sound_w );
WRITE8_HANDLER( konami_SN76496_latch_w );
DECLARE_WRITE8_HANDLER( konami_SN76496_latch_w );
DECLARE_WRITE8_DEVICE_HANDLER( konami_SN76496_w );
class trackfld_audio_device : public device_t,

4
src/mame/drivers/bfm_sc4h.c
View File

@ -235,7 +235,7 @@ READ16_MEMBER(sc4_state::sc4_mem_r)
return 0x0000;
}
static WRITE8_HANDLER( bfm_sc4_reel4_w );
static DECLARE_WRITE8_HANDLER( bfm_sc4_reel4_w );
WRITE8_MEMBER(sc4_state::mux_output_w)
{
@ -561,7 +561,7 @@ void bfm_sc4_68307_portb_w(address_space &space, bool dedicated, UINT16 data, UI
bfm_sc4_write_serial_vfd(space.machine(), (data & 0x4000)?1:0, (data & 0x1000)?1:0, !(data & 0x2000)?1:0);
bfm_sc4_reel3_w(space, 0, (data&0x0f00)>>8);
bfm_sc4_reel3_w(space, 0, (data&0x0f00)>>8, 0xff);
}
}

4
src/mame/drivers/decocass.c
View File

@ -97,8 +97,8 @@ static WRITE8_HANDLER( objectram_w )
decocass_objectram_w(space, offset, data);
}
static WRITE8_HANDLER( mirrorvideoram_w ) { offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5); fgvideoram_w(space, offset, data); }
static WRITE8_HANDLER( mirrorcolorram_w ) { offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5); fgcolorram_w(space, offset, data); }
static WRITE8_HANDLER( mirrorvideoram_w ) { offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5); fgvideoram_w(space, offset, data, mem_mask); }
static WRITE8_HANDLER( mirrorcolorram_w ) { offset = ((offset >> 5) & 0x1f) | ((offset & 0x1f) << 5); fgcolorram_w(space, offset, data, mem_mask); }
static READ8_HANDLER( mirrorvideoram_r )
{

4
src/mame/drivers/dkong.c
View File

@ -347,8 +347,8 @@ Donkey Kong Junior Notes
*
*************************************/
static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
static Z80DMA_INTERFACE( dk3_dma )
{

4
src/mame/drivers/mario.c
View File

@ -101,8 +101,8 @@ write:
*
*************************************/
static UINT8 memory_read_byte(address_space &space, offs_t address) { return space.read_byte(address); }
static void memory_write_byte(address_space &space, offs_t address, UINT8 data) { space.write_byte(address, data); }
static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
static Z80DMA_INTERFACE( mario_dma )
{

8
src/mame/drivers/mpu4vid.c
View File

@ -273,11 +273,11 @@ public:
static READ16_HANDLER( characteriser16_r );
static WRITE16_HANDLER( characteriser16_w );
static DECLARE_READ16_HANDLER( characteriser16_r );
static DECLARE_WRITE16_HANDLER( characteriser16_w );
static READ16_HANDLER( bwb_characteriser16_r );
static WRITE16_HANDLER( bwb_characteriser16_w );
static DECLARE_READ16_HANDLER( bwb_characteriser16_r );
static DECLARE_WRITE16_HANDLER( bwb_characteriser16_w );
/*************************************
*

12
src/mame/includes/actfancr.h
View File

@ -38,12 +38,12 @@ public:
/*----------- defined in video/actfancr.c -----------*/
WRITE8_HANDLER( actfancr_pf1_data_w );
READ8_HANDLER( actfancr_pf1_data_r );
WRITE8_HANDLER( actfancr_pf1_control_w );
WRITE8_HANDLER( actfancr_pf2_data_w );
READ8_HANDLER( actfancr_pf2_data_r );
WRITE8_HANDLER( actfancr_pf2_control_w );
DECLARE_WRITE8_HANDLER( actfancr_pf1_data_w );
DECLARE_READ8_HANDLER( actfancr_pf1_data_r );
DECLARE_WRITE8_HANDLER( actfancr_pf1_control_w );
DECLARE_WRITE8_HANDLER( actfancr_pf2_data_w );
DECLARE_READ8_HANDLER( actfancr_pf2_data_r );
DECLARE_WRITE8_HANDLER( actfancr_pf2_control_w );
SCREEN_UPDATE_IND16( actfancr );

12
src/mame/includes/amiga.h
View File

@ -447,18 +447,18 @@ void amiga_machine_config(running_machine &machine, const amiga_machine_interfac
READ16_HANDLER( amiga_cia_r );
WRITE16_HANDLER( amiga_cia_w );
DECLARE_READ16_HANDLER( amiga_cia_r );
DECLARE_WRITE16_HANDLER( amiga_cia_w );
READ16_HANDLER( amiga_custom_r );
WRITE16_HANDLER( amiga_custom_w );
DECLARE_READ16_HANDLER( amiga_custom_r );
DECLARE_WRITE16_HANDLER( amiga_custom_w );
void amiga_serial_in_w(running_machine &machine, UINT16 data);
attotime amiga_get_serial_char_period(running_machine &machine);
void amiga_add_autoconfig(running_machine &machine, const amiga_autoconfig_device *device);
READ16_HANDLER( amiga_autoconfig_r );
WRITE16_HANDLER( amiga_autoconfig_w );
DECLARE_READ16_HANDLER( amiga_autoconfig_r );
DECLARE_WRITE16_HANDLER( amiga_autoconfig_w );
void amiga_cia_0_irq(device_t *device, int state);
void amiga_cia_1_irq(device_t *device, int state);

20
src/mame/includes/archimds.h
View File

@ -47,16 +47,16 @@ void archimedes_clear_irq_a(running_machine &machine, int mask);
void archimedes_clear_irq_b(running_machine &machine, int mask);
void archimedes_clear_fiq(running_machine &machine, int mask);
extern READ32_HANDLER(aristmk5_drame_memc_logical_r);
extern READ32_HANDLER(archimedes_memc_logical_r);
extern WRITE32_HANDLER(archimedes_memc_logical_w);
extern READ32_HANDLER(archimedes_memc_r);
extern WRITE32_HANDLER(archimedes_memc_w);
extern WRITE32_HANDLER(archimedes_memc_page_w);
extern READ32_HANDLER(archimedes_ioc_r);
extern WRITE32_HANDLER(archimedes_ioc_w);
extern READ32_HANDLER(archimedes_vidc_r);
extern WRITE32_HANDLER(archimedes_vidc_w);
extern DECLARE_READ32_HANDLER(aristmk5_drame_memc_logical_r);
extern DECLARE_READ32_HANDLER(archimedes_memc_logical_r);
extern DECLARE_WRITE32_HANDLER(archimedes_memc_logical_w);
extern DECLARE_READ32_HANDLER(archimedes_memc_r);
extern DECLARE_WRITE32_HANDLER(archimedes_memc_w);
extern DECLARE_WRITE32_HANDLER(archimedes_memc_page_w);
extern DECLARE_READ32_HANDLER(archimedes_ioc_r);
extern DECLARE_WRITE32_HANDLER(archimedes_ioc_w);
extern DECLARE_READ32_HANDLER(archimedes_vidc_r);
extern DECLARE_WRITE32_HANDLER(archimedes_vidc_w);
extern UINT8 i2c_clk;
extern INT16 memc_pages[0x2000]; // the logical RAM area is 32 megs, and the smallest page size is 4k

4
src/mame/includes/astrocde.h
View File

@ -141,7 +141,7 @@ SCREEN_UPDATE_IND16( profpac );
extern const char *const wow_sample_names[];
READ8_HANDLER( wow_speech_r );
DECLARE_READ8_HANDLER( wow_speech_r );
CUSTOM_INPUT( wow_speech_status_r );
@ -149,5 +149,5 @@ CUSTOM_INPUT( wow_speech_status_r );
extern const char *const gorf_sample_names[];
READ8_HANDLER( gorf_speech_r );
DECLARE_READ8_HANDLER( gorf_speech_r );
CUSTOM_INPUT( gorf_speech_status_r );

10
src/mame/includes/asuka.h
View File

@ -53,11 +53,11 @@ public:
/*----------- defined in machine/bonzeadv.c -----------*/
READ16_HANDLER( bonzeadv_cchip_ctrl_r );
READ16_HANDLER( bonzeadv_cchip_ram_r );
WRITE16_HANDLER( bonzeadv_cchip_ctrl_w );
WRITE16_HANDLER( bonzeadv_cchip_bank_w );
WRITE16_HANDLER( bonzeadv_cchip_ram_w );
DECLARE_READ16_HANDLER( bonzeadv_cchip_ctrl_r );
DECLARE_READ16_HANDLER( bonzeadv_cchip_ram_r );
DECLARE_WRITE16_HANDLER( bonzeadv_cchip_ctrl_w );
DECLARE_WRITE16_HANDLER( bonzeadv_cchip_bank_w );
DECLARE_WRITE16_HANDLER( bonzeadv_cchip_ram_w );
/*----------- defined in video/asuka.c -----------*/

4
src/mame/includes/atari.h
View File

@ -535,8 +535,8 @@ extern ANTIC antic;
void antic_reset(void);
READ8_HANDLER ( atari_antic_r );
WRITE8_HANDLER ( atari_antic_w );
DECLARE_READ8_HANDLER ( atari_antic_r );
DECLARE_WRITE8_HANDLER ( atari_antic_w );
#define ANTIC_RENDERER(name) void name(address_space &space, VIDEO *video)

2
src/mame/includes/atarig42.h
View File

@ -61,7 +61,7 @@ public:
SCREEN_VBLANK( atarig42 );
SCREEN_UPDATE_IND16( atarig42 );
WRITE16_HANDLER( atarig42_mo_control_w );
DECLARE_WRITE16_HANDLER( atarig42_mo_control_w );
void atarig42_scanline_update(screen_device &screen, int scanline);

2
src/mame/includes/atarigx2.h
View File

@ -55,6 +55,6 @@ public:
SCREEN_VBLANK( atarigx2 );
SCREEN_UPDATE_IND16( atarigx2 );
WRITE16_HANDLER( atarigx2_mo_control_w );
DECLARE_WRITE16_HANDLER( atarigx2_mo_control_w );
void atarigx2_scanline_update(screen_device &screen, int scanline);

12
src/mame/includes/atarisy1.h
View File

@ -73,13 +73,13 @@ TIMER_DEVICE_CALLBACK( atarisy1_int3_callback );
TIMER_DEVICE_CALLBACK( atarisy1_int3off_callback );
TIMER_DEVICE_CALLBACK( atarisy1_reset_yscroll_callback );
READ16_HANDLER( atarisy1_int3state_r );
DECLARE_READ16_HANDLER( atarisy1_int3state_r );
WRITE16_HANDLER( atarisy1_spriteram_w );
WRITE16_HANDLER( atarisy1_bankselect_w );
WRITE16_HANDLER( atarisy1_xscroll_w );
WRITE16_HANDLER( atarisy1_yscroll_w );
WRITE16_HANDLER( atarisy1_priority_w );
DECLARE_WRITE16_HANDLER( atarisy1_spriteram_w );
DECLARE_WRITE16_HANDLER( atarisy1_bankselect_w );
DECLARE_WRITE16_HANDLER( atarisy1_xscroll_w );
DECLARE_WRITE16_HANDLER( atarisy1_yscroll_w );
DECLARE_WRITE16_HANDLER( atarisy1_priority_w );
SCREEN_UPDATE_IND16( atarisy1 );

14
src/mame/includes/atarisy2.h
View File

@ -83,14 +83,14 @@ public:
/*----------- defined in video/atarisy2.c -----------*/
READ16_HANDLER( atarisy2_slapstic_r );
READ16_HANDLER( atarisy2_videoram_r );
DECLARE_READ16_HANDLER( atarisy2_slapstic_r );
DECLARE_READ16_HANDLER( atarisy2_videoram_r );
WRITE16_HANDLER( atarisy2_slapstic_w );
WRITE16_HANDLER( atarisy2_yscroll_w );
WRITE16_HANDLER( atarisy2_xscroll_w );
WRITE16_HANDLER( atarisy2_videoram_w );
WRITE16_HANDLER( atarisy2_paletteram_w );
DECLARE_WRITE16_HANDLER( atarisy2_slapstic_w );
DECLARE_WRITE16_HANDLER( atarisy2_yscroll_w );
DECLARE_WRITE16_HANDLER( atarisy2_xscroll_w );
DECLARE_WRITE16_HANDLER( atarisy2_videoram_w );
DECLARE_WRITE16_HANDLER( atarisy2_paletteram_w );
SCREEN_UPDATE_IND16( atarisy2 );

2
src/mame/includes/avalnche.h
View File

@ -34,4 +34,4 @@ DECLARE_WRITE8_DEVICE_HANDLER( avalnche_noise_amplitude_w );
DECLARE_WRITE8_DEVICE_HANDLER( avalnche_attract_enable_w );
DECLARE_WRITE8_DEVICE_HANDLER( avalnche_audio_w );
WRITE8_HANDLER( catch_audio_w );
DECLARE_WRITE8_HANDLER( catch_audio_w );

2
src/mame/includes/badlands.h
View File

@ -35,7 +35,7 @@ public:
/*----------- defined in video/badlands.c -----------*/
WRITE16_HANDLER( badlands_pf_bank_w );
DECLARE_WRITE16_HANDLER( badlands_pf_bank_w );
SCREEN_UPDATE_IND16( badlands );

10
src/mame/includes/cchip.h
View File

@ -1,9 +1,9 @@
/*----------- defined in machine/cchip.c -----------*/
MACHINE_RESET( cchip1 );
READ16_HANDLER( cchip1_ctrl_r );
READ16_HANDLER( cchip1_ram_r );
WRITE16_HANDLER( cchip1_ctrl_w );
WRITE16_HANDLER( cchip1_bank_w );
WRITE16_HANDLER( cchip1_ram_w );
DECLARE_READ16_HANDLER( cchip1_ctrl_r );
DECLARE_READ16_HANDLER( cchip1_ram_r );
DECLARE_WRITE16_HANDLER( cchip1_ctrl_w );
DECLARE_WRITE16_HANDLER( cchip1_bank_w );
DECLARE_WRITE16_HANDLER( cchip1_ram_w );

2
src/mame/includes/copsnrob.h
View File

@ -41,7 +41,7 @@ public:
/*----------- defined in machine/copsnrob.c -----------*/
READ8_HANDLER( copsnrob_gun_position_r );
DECLARE_READ8_HANDLER( copsnrob_gun_position_r );
/*----------- defined in video/copsnrob.c -----------*/

8
src/mame/includes/cyberbal.h
View File

@ -68,10 +68,10 @@ INTERRUPT_GEN( cyberbal_sound_68k_irq_gen );
/*----------- defined in video/cyberbal.c -----------*/
READ16_HANDLER( cyberbal_paletteram_0_r );
READ16_HANDLER( cyberbal_paletteram_1_r );
WRITE16_HANDLER( cyberbal_paletteram_0_w );
WRITE16_HANDLER( cyberbal_paletteram_1_w );
DECLARE_READ16_HANDLER( cyberbal_paletteram_0_r );
DECLARE_READ16_HANDLER( cyberbal_paletteram_1_r );
DECLARE_WRITE16_HANDLER( cyberbal_paletteram_0_w );
DECLARE_WRITE16_HANDLER( cyberbal_paletteram_1_w );

48
src/mame/includes/dc.h
View File

@ -100,21 +100,21 @@ class dc_state : public driver_device
/*----------- defined in machine/dc.c -----------*/
READ64_HANDLER( pvr_ctrl_r );
WRITE64_HANDLER( pvr_ctrl_w );
DECLARE_READ64_HANDLER( pvr_ctrl_r );
DECLARE_WRITE64_HANDLER( pvr_ctrl_w );
READ64_HANDLER( dc_sysctrl_r );
WRITE64_HANDLER( dc_sysctrl_w );
READ64_HANDLER( dc_gdrom_r );
WRITE64_HANDLER( dc_gdrom_w );
READ64_HANDLER( dc_g1_ctrl_r );
WRITE64_HANDLER( dc_g1_ctrl_w );
READ64_HANDLER( dc_g2_ctrl_r );
WRITE64_HANDLER( dc_g2_ctrl_w );
READ64_HANDLER( dc_modem_r );
WRITE64_HANDLER( dc_modem_w );
READ64_HANDLER( dc_rtc_r );
WRITE64_HANDLER( dc_rtc_w );
DECLARE_READ64_HANDLER( dc_sysctrl_r );
DECLARE_WRITE64_HANDLER( dc_sysctrl_w );
DECLARE_READ64_HANDLER( dc_gdrom_r );
DECLARE_WRITE64_HANDLER( dc_gdrom_w );
DECLARE_READ64_HANDLER( dc_g1_ctrl_r );
DECLARE_WRITE64_HANDLER( dc_g1_ctrl_w );
DECLARE_READ64_HANDLER( dc_g2_ctrl_r );
DECLARE_WRITE64_HANDLER( dc_g2_ctrl_w );
DECLARE_READ64_HANDLER( dc_modem_r );
DECLARE_WRITE64_HANDLER( dc_modem_w );
DECLARE_READ64_HANDLER( dc_rtc_r );
DECLARE_WRITE64_HANDLER( dc_rtc_w );
DECLARE_READ64_DEVICE_HANDLER( dc_aica_reg_r );
DECLARE_WRITE64_DEVICE_HANDLER( dc_aica_reg_w );
@ -296,16 +296,16 @@ extern UINT64 *pvr2_texture_ram;
extern UINT64 *pvr2_framebuffer_ram;
extern UINT64 *elan_ram;
READ64_HANDLER( pvr_ta_r );
WRITE64_HANDLER( pvr_ta_w );
READ64_HANDLER( pvr2_ta_r );
WRITE64_HANDLER( pvr2_ta_w );
READ64_HANDLER( pvrs_ta_r );
WRITE64_HANDLER( pvrs_ta_w );
READ32_HANDLER( elan_regs_r );
WRITE32_HANDLER( elan_regs_w );
WRITE64_HANDLER( ta_fifo_poly_w );
WRITE64_HANDLER( ta_fifo_yuv_w );
DECLARE_READ64_HANDLER( pvr_ta_r );
DECLARE_WRITE64_HANDLER( pvr_ta_w );
DECLARE_READ64_HANDLER( pvr2_ta_r );
DECLARE_WRITE64_HANDLER( pvr2_ta_w );
DECLARE_READ64_HANDLER( pvrs_ta_r );
DECLARE_WRITE64_HANDLER( pvrs_ta_w );
DECLARE_READ32_HANDLER( elan_regs_r );
DECLARE_WRITE32_HANDLER( elan_regs_w );
DECLARE_WRITE64_HANDLER( ta_fifo_poly_w );
DECLARE_WRITE64_HANDLER( ta_fifo_yuv_w );
SCREEN_UPDATE_RGB32(dc);

2
src/mame/includes/dec0.h
View File

@ -119,7 +119,7 @@ SCREEN_UPDATE_IND16( secretab );
/*----------- defined in machine/dec0.c -----------*/
READ16_HANDLER( slyspy_controls_r );
DECLARE_READ16_HANDLER( slyspy_controls_r );
extern void dec0_i8751_write(running_machine &machine, int data);

8
src/mame/includes/dec8.h
View File

@ -144,7 +144,7 @@ SCREEN_UPDATE_IND16( oscar );
WRITE8_HANDLER( dec8_bac06_0_w );
WRITE8_HANDLER( dec8_bac06_1_w );
WRITE8_HANDLER( dec8_pf1_data_w );
READ8_HANDLER( dec8_pf1_data_r );
DECLARE_WRITE8_HANDLER( dec8_bac06_0_w );
DECLARE_WRITE8_HANDLER( dec8_bac06_1_w );
DECLARE_WRITE8_HANDLER( dec8_pf1_data_w );
DECLARE_READ8_HANDLER( dec8_pf1_data_r );

8
src/mame/includes/deco32.h
View File

@ -152,9 +152,9 @@ SCREEN_UPDATE_RGB32( dragngun );
SCREEN_UPDATE_RGB32( nslasher );
WRITE32_HANDLER( deco32_pf1_data_w );
WRITE32_HANDLER( deco32_pf2_data_w );
WRITE32_HANDLER( deco32_pf3_data_w );
WRITE32_HANDLER( deco32_pf4_data_w );
DECLARE_WRITE32_HANDLER( deco32_pf1_data_w );
DECLARE_WRITE32_HANDLER( deco32_pf2_data_w );
DECLARE_WRITE32_HANDLER( deco32_pf3_data_w );
DECLARE_WRITE32_HANDLER( deco32_pf4_data_w );

40
src/mame/includes/decoprot.h
View File

@ -1,26 +1,26 @@
/*----------- defined in machine/decoprot.c -----------*/
READ16_HANDLER( deco16_60_prot_r );
READ16_HANDLER( deco16_66_prot_r );
READ16_HANDLER( deco16_104_prot_r );
READ16_HANDLER( deco16_104_cninja_prot_r );
READ16_HANDLER( deco16_104_rohga_prot_r );
READ16_HANDLER( deco16_146_funkyjet_prot_r );
READ16_HANDLER( deco16_146_nitroball_prot_r );
READ16_HANDLER( deco16_104_pktgaldx_prot_r );
READ32_HANDLER( deco16_146_fghthist_prot_r );
DECLARE_READ16_HANDLER( deco16_60_prot_r );
DECLARE_READ16_HANDLER( deco16_66_prot_r );
DECLARE_READ16_HANDLER( deco16_104_prot_r );
DECLARE_READ16_HANDLER( deco16_104_cninja_prot_r );
DECLARE_READ16_HANDLER( deco16_104_rohga_prot_r );
DECLARE_READ16_HANDLER( deco16_146_funkyjet_prot_r );
DECLARE_READ16_HANDLER( deco16_146_nitroball_prot_r );
DECLARE_READ16_HANDLER( deco16_104_pktgaldx_prot_r );
DECLARE_READ32_HANDLER( deco16_146_fghthist_prot_r );
WRITE16_HANDLER( deco16_60_prot_w );
WRITE16_HANDLER( deco16_66_prot_w );
WRITE16_HANDLER( deco16_104_prot_w );
WRITE16_HANDLER( deco16_104_cninja_prot_w );
WRITE16_HANDLER( deco16_104_rohga_prot_w );
WRITE16_HANDLER( deco16_146_funkyjet_prot_w );
WRITE16_HANDLER( deco16_146_nitroball_prot_w );
WRITE16_HANDLER( deco16_104_pktgaldx_prot_w );
WRITE32_HANDLER( deco16_146_fghthist_prot_w );
DECLARE_WRITE16_HANDLER( deco16_60_prot_w );
DECLARE_WRITE16_HANDLER( deco16_66_prot_w );
DECLARE_WRITE16_HANDLER( deco16_104_prot_w );
DECLARE_WRITE16_HANDLER( deco16_104_cninja_prot_w );
DECLARE_WRITE16_HANDLER( deco16_104_rohga_prot_w );
DECLARE_WRITE16_HANDLER( deco16_146_funkyjet_prot_w );
DECLARE_WRITE16_HANDLER( deco16_146_nitroball_prot_w );
DECLARE_WRITE16_HANDLER( deco16_104_pktgaldx_prot_w );
DECLARE_WRITE32_HANDLER( deco16_146_fghthist_prot_w );
void decoprot_reset(running_machine &machine);
READ16_HANDLER( dietgo_104_prot_r );
WRITE16_HANDLER( dietgo_104_prot_w );
DECLARE_READ16_HANDLER( dietgo_104_prot_r );
DECLARE_WRITE16_HANDLER( dietgo_104_prot_w );

20
src/mame/includes/fastfred.h
View File

@ -68,17 +68,17 @@ public:
WRITE8_HANDLER( fastfred_videoram_w );
WRITE8_HANDLER( fastfred_attributes_w );
WRITE8_HANDLER( fastfred_charbank1_w );
WRITE8_HANDLER( fastfred_charbank2_w );
WRITE8_HANDLER( fastfred_colorbank1_w );
WRITE8_HANDLER( fastfred_colorbank2_w );
WRITE8_HANDLER( fastfred_flip_screen_x_w );
WRITE8_HANDLER( fastfred_flip_screen_y_w );
DECLARE_WRITE8_HANDLER( fastfred_videoram_w );
DECLARE_WRITE8_HANDLER( fastfred_attributes_w );
DECLARE_WRITE8_HANDLER( fastfred_charbank1_w );
DECLARE_WRITE8_HANDLER( fastfred_charbank2_w );
DECLARE_WRITE8_HANDLER( fastfred_colorbank1_w );
DECLARE_WRITE8_HANDLER( fastfred_colorbank2_w );
DECLARE_WRITE8_HANDLER( fastfred_flip_screen_x_w );
DECLARE_WRITE8_HANDLER( fastfred_flip_screen_y_w );
SCREEN_UPDATE_IND16( fastfred );
SCREEN_UPDATE_IND16( imago );
WRITE8_HANDLER( imago_fg_videoram_w );
WRITE8_HANDLER( imago_charbank_w );
DECLARE_WRITE8_HANDLER( imago_fg_videoram_w );
DECLARE_WRITE8_HANDLER( imago_charbank_w );

48
src/mame/includes/galaga.h
View File

@ -150,10 +150,10 @@ public:
/*----------- defined in video/bosco.c -----------*/
WRITE8_HANDLER( bosco_videoram_w );
WRITE8_HANDLER( bosco_scrollx_w );
WRITE8_HANDLER( bosco_scrolly_w );
WRITE8_HANDLER( bosco_starclr_w );
DECLARE_WRITE8_HANDLER( bosco_videoram_w );
DECLARE_WRITE8_HANDLER( bosco_scrollx_w );
DECLARE_WRITE8_HANDLER( bosco_scrolly_w );
DECLARE_WRITE8_HANDLER( bosco_starclr_w );
SCREEN_UPDATE_IND16( bosco );
@ -182,13 +182,13 @@ SCREEN_VBLANK( galaga ); /* update starfield */
/*----------- defined in video/xevious.c -----------*/
WRITE8_HANDLER( xevious_fg_videoram_w );
WRITE8_HANDLER( xevious_fg_colorram_w );
WRITE8_HANDLER( xevious_bg_videoram_w );
WRITE8_HANDLER( xevious_bg_colorram_w );
WRITE8_HANDLER( xevious_vh_latch_w );
WRITE8_HANDLER( xevious_bs_w );
READ8_HANDLER( xevious_bb_r );
DECLARE_WRITE8_HANDLER( xevious_fg_videoram_w );
DECLARE_WRITE8_HANDLER( xevious_fg_colorram_w );
DECLARE_WRITE8_HANDLER( xevious_bg_videoram_w );
DECLARE_WRITE8_HANDLER( xevious_bg_colorram_w );
DECLARE_WRITE8_HANDLER( xevious_vh_latch_w );
DECLARE_WRITE8_HANDLER( xevious_bs_w );
DECLARE_READ8_HANDLER( xevious_bb_r );
SCREEN_UPDATE_IND16( xevious );
@ -200,25 +200,25 @@ SCREEN_UPDATE_IND16( xevious );
void battles_customio_init(running_machine &machine);
TIMER_DEVICE_CALLBACK( battles_nmi_generate );
READ8_HANDLER( battles_customio0_r );
READ8_HANDLER( battles_customio_data0_r );
READ8_HANDLER( battles_customio3_r );
READ8_HANDLER( battles_customio_data3_r );
READ8_HANDLER( battles_input_port_r );
DECLARE_READ8_HANDLER( battles_customio0_r );
DECLARE_READ8_HANDLER( battles_customio_data0_r );
DECLARE_READ8_HANDLER( battles_customio3_r );
DECLARE_READ8_HANDLER( battles_customio_data3_r );
DECLARE_READ8_HANDLER( battles_input_port_r );
WRITE8_HANDLER( battles_customio0_w );
WRITE8_HANDLER( battles_customio_data0_w );
WRITE8_HANDLER( battles_customio3_w );
WRITE8_HANDLER( battles_customio_data3_w );
WRITE8_HANDLER( battles_CPU4_coin_w );
WRITE8_HANDLER( battles_noise_sound_w );
DECLARE_WRITE8_HANDLER( battles_customio0_w );
DECLARE_WRITE8_HANDLER( battles_customio_data0_w );
DECLARE_WRITE8_HANDLER( battles_customio3_w );
DECLARE_WRITE8_HANDLER( battles_customio_data3_w );
DECLARE_WRITE8_HANDLER( battles_CPU4_coin_w );
DECLARE_WRITE8_HANDLER( battles_noise_sound_w );
INTERRUPT_GEN( battles_interrupt_4 );
/*----------- defined in video/digdug.c -----------*/
WRITE8_HANDLER( digdug_videoram_w );
WRITE8_HANDLER( digdug_PORT_w );
DECLARE_WRITE8_HANDLER( digdug_videoram_w );
DECLARE_WRITE8_HANDLER( digdug_PORT_w );
SCREEN_UPDATE_IND16( digdug );

4
src/mame/includes/galivan.h
View File

@ -62,8 +62,8 @@ public:
/*----------- defined in video/galivan.c -----------*/
WRITE8_HANDLER( ninjemak_scrollx_w );
WRITE8_HANDLER( ninjemak_scrolly_w );
DECLARE_WRITE8_HANDLER( ninjemak_scrollx_w );
DECLARE_WRITE8_HANDLER( ninjemak_scrolly_w );

10
src/mame/includes/galpani2.h
View File

@ -59,10 +59,10 @@ public:
SCREEN_UPDATE_IND16( galpani2 );
WRITE16_HANDLER( galpani2_palette_0_w );
WRITE16_HANDLER( galpani2_palette_1_w );
DECLARE_WRITE16_HANDLER( galpani2_palette_0_w );
DECLARE_WRITE16_HANDLER( galpani2_palette_1_w );
WRITE16_HANDLER( galpani2_bg8_0_w );
WRITE16_HANDLER( galpani2_bg8_1_w );
DECLARE_WRITE16_HANDLER( galpani2_bg8_0_w );
DECLARE_WRITE16_HANDLER( galpani2_bg8_1_w );
WRITE16_HANDLER( galpani2_bg15_w );
DECLARE_WRITE16_HANDLER( galpani2_bg15_w );

4
src/mame/includes/galpanic.h
View File

@ -30,8 +30,8 @@ public:
/*----------- defined in video/galpanic.c -----------*/
WRITE16_HANDLER( galpanic_bgvideoram_w );
WRITE16_HANDLER( galpanic_paletteram_w );
DECLARE_WRITE16_HANDLER( galpanic_bgvideoram_w );
DECLARE_WRITE16_HANDLER( galpanic_paletteram_w );
SCREEN_UPDATE_IND16( galpanic );
SCREEN_UPDATE_IND16( comad );

4
src/mame/includes/gauntlet.h
View File

@ -35,8 +35,8 @@ public:
/*----------- defined in video/gauntlet.c -----------*/
WRITE16_HANDLER( gauntlet_xscroll_w );
WRITE16_HANDLER( gauntlet_yscroll_w );
DECLARE_WRITE16_HANDLER( gauntlet_xscroll_w );
DECLARE_WRITE16_HANDLER( gauntlet_yscroll_w );
SCREEN_UPDATE_IND16( gauntlet );

170
src/mame/includes/harddriv.h
View File

@ -227,116 +227,116 @@ public:
INTERRUPT_GEN( hd68k_irq_gen );
WRITE16_HANDLER( hd68k_irq_ack_w );
DECLARE_WRITE16_HANDLER( hd68k_irq_ack_w );
void hdgsp_irq_gen(device_t *device, int state);
void hdmsp_irq_gen(device_t *device, int state);
READ16_HANDLER( hd68k_gsp_io_r );
WRITE16_HANDLER( hd68k_gsp_io_w );
DECLARE_READ16_HANDLER( hd68k_gsp_io_r );
DECLARE_WRITE16_HANDLER( hd68k_gsp_io_w );
READ16_HANDLER( hd68k_msp_io_r );
WRITE16_HANDLER( hd68k_msp_io_w );
DECLARE_READ16_HANDLER( hd68k_msp_io_r );
DECLARE_WRITE16_HANDLER( hd68k_msp_io_w );
READ16_HANDLER( hd68k_port0_r );
READ16_HANDLER( hd68k_adc8_r );
READ16_HANDLER( hd68k_adc12_r );
READ16_HANDLER( hdc68k_port1_r );
READ16_HANDLER( hda68k_port1_r );
READ16_HANDLER( hdc68k_wheel_r );
READ16_HANDLER( hd68k_sound_reset_r );
DECLARE_READ16_HANDLER( hd68k_port0_r );
DECLARE_READ16_HANDLER( hd68k_adc8_r );
DECLARE_READ16_HANDLER( hd68k_adc12_r );
DECLARE_READ16_HANDLER( hdc68k_port1_r );
DECLARE_READ16_HANDLER( hda68k_port1_r );
DECLARE_READ16_HANDLER( hdc68k_wheel_r );
DECLARE_READ16_HANDLER( hd68k_sound_reset_r );
WRITE16_HANDLER( hd68k_adc_control_w );
WRITE16_HANDLER( hd68k_wr0_write );
WRITE16_HANDLER( hd68k_wr1_write );
WRITE16_HANDLER( hd68k_wr2_write );
WRITE16_HANDLER( hd68k_nwr_w );
WRITE16_HANDLER( hdc68k_wheel_edge_reset_w );
DECLARE_WRITE16_HANDLER( hd68k_adc_control_w );
DECLARE_WRITE16_HANDLER( hd68k_wr0_write );
DECLARE_WRITE16_HANDLER( hd68k_wr1_write );
DECLARE_WRITE16_HANDLER( hd68k_wr2_write );
DECLARE_WRITE16_HANDLER( hd68k_nwr_w );
DECLARE_WRITE16_HANDLER( hdc68k_wheel_edge_reset_w );
READ16_HANDLER( hd68k_zram_r );
WRITE16_HANDLER( hd68k_zram_w );
DECLARE_READ16_HANDLER( hd68k_zram_r );
DECLARE_WRITE16_HANDLER( hd68k_zram_w );
void harddriv_duart_irq_handler(device_t *device, int state, UINT8 vector);
WRITE16_HANDLER( hdgsp_io_w );
DECLARE_WRITE16_HANDLER( hdgsp_io_w );
WRITE16_HANDLER( hdgsp_protection_w );
DECLARE_WRITE16_HANDLER( hdgsp_protection_w );
/* ADSP board */
READ16_HANDLER( hd68k_adsp_program_r );
WRITE16_HANDLER( hd68k_adsp_program_w );
DECLARE_READ16_HANDLER( hd68k_adsp_program_r );
DECLARE_WRITE16_HANDLER( hd68k_adsp_program_w );
READ16_HANDLER( hd68k_adsp_data_r );
WRITE16_HANDLER( hd68k_adsp_data_w );
DECLARE_READ16_HANDLER( hd68k_adsp_data_r );
DECLARE_WRITE16_HANDLER( hd68k_adsp_data_w );
READ16_HANDLER( hd68k_adsp_buffer_r );
WRITE16_HANDLER( hd68k_adsp_buffer_w );
DECLARE_READ16_HANDLER( hd68k_adsp_buffer_r );
DECLARE_WRITE16_HANDLER( hd68k_adsp_buffer_w );
WRITE16_HANDLER( hd68k_adsp_control_w );
WRITE16_HANDLER( hd68k_adsp_irq_clear_w );
READ16_HANDLER( hd68k_adsp_irq_state_r );
DECLARE_WRITE16_HANDLER( hd68k_adsp_control_w );
DECLARE_WRITE16_HANDLER( hd68k_adsp_irq_clear_w );
DECLARE_READ16_HANDLER( hd68k_adsp_irq_state_r );
READ16_HANDLER( hdadsp_special_r );
WRITE16_HANDLER( hdadsp_special_w );
DECLARE_READ16_HANDLER( hdadsp_special_r );
DECLARE_WRITE16_HANDLER( hdadsp_special_w );
/* DS III board */
WRITE16_HANDLER( hd68k_ds3_control_w );
READ16_HANDLER( hd68k_ds3_girq_state_r );
READ16_HANDLER( hd68k_ds3_sirq_state_r );
READ16_HANDLER( hd68k_ds3_gdata_r );
WRITE16_HANDLER( hd68k_ds3_gdata_w );
READ16_HANDLER( hd68k_ds3_sdata_r );
WRITE16_HANDLER( hd68k_ds3_sdata_w );
DECLARE_WRITE16_HANDLER( hd68k_ds3_control_w );
DECLARE_READ16_HANDLER( hd68k_ds3_girq_state_r );
DECLARE_READ16_HANDLER( hd68k_ds3_sirq_state_r );
DECLARE_READ16_HANDLER( hd68k_ds3_gdata_r );
DECLARE_WRITE16_HANDLER( hd68k_ds3_gdata_w );
DECLARE_READ16_HANDLER( hd68k_ds3_sdata_r );
DECLARE_WRITE16_HANDLER( hd68k_ds3_sdata_w );
READ16_HANDLER( hdds3_special_r );
WRITE16_HANDLER( hdds3_special_w );
READ16_HANDLER( hdds3_control_r );
WRITE16_HANDLER( hdds3_control_w );
DECLARE_READ16_HANDLER( hdds3_special_r );
DECLARE_WRITE16_HANDLER( hdds3_special_w );
DECLARE_READ16_HANDLER( hdds3_control_r );
DECLARE_WRITE16_HANDLER( hdds3_control_w );
READ16_HANDLER( hd68k_ds3_program_r );
WRITE16_HANDLER( hd68k_ds3_program_w );
DECLARE_READ16_HANDLER( hd68k_ds3_program_r );
DECLARE_WRITE16_HANDLER( hd68k_ds3_program_w );
/* DSK board */
void hddsk_update_pif(dsp32c_device &device, UINT32 pins);
WRITE16_HANDLER( hd68k_dsk_control_w );
READ16_HANDLER( hd68k_dsk_ram_r );
WRITE16_HANDLER( hd68k_dsk_ram_w );
READ16_HANDLER( hd68k_dsk_zram_r );
WRITE16_HANDLER( hd68k_dsk_zram_w );
READ16_HANDLER( hd68k_dsk_small_rom_r );
READ16_HANDLER( hd68k_dsk_rom_r );
WRITE16_HANDLER( hd68k_dsk_dsp32_w );
READ16_HANDLER( hd68k_dsk_dsp32_r );
WRITE32_HANDLER( rddsp32_sync0_w );
WRITE32_HANDLER( rddsp32_sync1_w );
DECLARE_WRITE16_HANDLER( hd68k_dsk_control_w );
DECLARE_READ16_HANDLER( hd68k_dsk_ram_r );
DECLARE_WRITE16_HANDLER( hd68k_dsk_ram_w );
DECLARE_READ16_HANDLER( hd68k_dsk_zram_r );
DECLARE_WRITE16_HANDLER( hd68k_dsk_zram_w );
DECLARE_READ16_HANDLER( hd68k_dsk_small_rom_r );
DECLARE_READ16_HANDLER( hd68k_dsk_rom_r );
DECLARE_WRITE16_HANDLER( hd68k_dsk_dsp32_w );
DECLARE_READ16_HANDLER( hd68k_dsk_dsp32_r );
DECLARE_WRITE32_HANDLER( rddsp32_sync0_w );
DECLARE_WRITE32_HANDLER( rddsp32_sync1_w );
/* DSPCOM board */
WRITE16_HANDLER( hddspcom_control_w );
DECLARE_WRITE16_HANDLER( hddspcom_control_w );
WRITE16_HANDLER( rd68k_slapstic_w );
READ16_HANDLER( rd68k_slapstic_r );
DECLARE_WRITE16_HANDLER( rd68k_slapstic_w );
DECLARE_READ16_HANDLER( rd68k_slapstic_r );
/* Game-specific protection */
WRITE16_HANDLER( st68k_sloop_w );
READ16_HANDLER( st68k_sloop_r );
READ16_HANDLER( st68k_sloop_alt_r );
WRITE16_HANDLER( st68k_protosloop_w );
READ16_HANDLER( st68k_protosloop_r );
DECLARE_WRITE16_HANDLER( st68k_sloop_w );
DECLARE_READ16_HANDLER( st68k_sloop_r );
DECLARE_READ16_HANDLER( st68k_sloop_alt_r );
DECLARE_WRITE16_HANDLER( st68k_protosloop_w );
DECLARE_READ16_HANDLER( st68k_protosloop_r );
/* GSP optimizations */
READ16_HANDLER( hdgsp_speedup_r );
WRITE16_HANDLER( hdgsp_speedup1_w );
WRITE16_HANDLER( hdgsp_speedup2_w );
READ16_HANDLER( rdgsp_speedup1_r );
WRITE16_HANDLER( rdgsp_speedup1_w );
DECLARE_READ16_HANDLER( hdgsp_speedup_r );
DECLARE_WRITE16_HANDLER( hdgsp_speedup1_w );
DECLARE_WRITE16_HANDLER( hdgsp_speedup2_w );
DECLARE_READ16_HANDLER( rdgsp_speedup1_r );
DECLARE_WRITE16_HANDLER( rdgsp_speedup1_w );
/* MSP optimizations */
READ16_HANDLER( hdmsp_speedup_r );
WRITE16_HANDLER( hdmsp_speedup_w );
DECLARE_READ16_HANDLER( hdmsp_speedup_r );
DECLARE_WRITE16_HANDLER( hdmsp_speedup_w );
/* ADSP optimizations */
READ16_HANDLER( hdadsp_speedup_r );
READ16_HANDLER( hdds3_speedup_r );
DECLARE_READ16_HANDLER( hdadsp_speedup_r );
DECLARE_READ16_HANDLER( hdds3_speedup_r );
/*----------- defined in audio/harddriv.c -----------*/
@ -359,19 +359,19 @@ DECLARE_WRITE16_DEVICE_HANDLER( hdsnddsp_dac_w );
void hdgsp_write_to_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
void hdgsp_read_from_shiftreg(address_space &space, UINT32 address, UINT16 *shiftreg);
READ16_HANDLER( hdgsp_control_lo_r );
WRITE16_HANDLER( hdgsp_control_lo_w );
READ16_HANDLER( hdgsp_control_hi_r );
WRITE16_HANDLER( hdgsp_control_hi_w );
DECLARE_READ16_HANDLER( hdgsp_control_lo_r );
DECLARE_WRITE16_HANDLER( hdgsp_control_lo_w );
DECLARE_READ16_HANDLER( hdgsp_control_hi_r );
DECLARE_WRITE16_HANDLER( hdgsp_control_hi_w );
READ16_HANDLER( hdgsp_vram_2bpp_r );
WRITE16_HANDLER( hdgsp_vram_1bpp_w );
WRITE16_HANDLER( hdgsp_vram_2bpp_w );
DECLARE_READ16_HANDLER( hdgsp_vram_2bpp_r );
DECLARE_WRITE16_HANDLER( hdgsp_vram_1bpp_w );
DECLARE_WRITE16_HANDLER( hdgsp_vram_2bpp_w );
READ16_HANDLER( hdgsp_paletteram_lo_r );
WRITE16_HANDLER( hdgsp_paletteram_lo_w );
READ16_HANDLER( hdgsp_paletteram_hi_r );
WRITE16_HANDLER( hdgsp_paletteram_hi_w );
DECLARE_READ16_HANDLER( hdgsp_paletteram_lo_r );
DECLARE_WRITE16_HANDLER( hdgsp_paletteram_lo_w );
DECLARE_READ16_HANDLER( hdgsp_paletteram_hi_r );
DECLARE_WRITE16_HANDLER( hdgsp_paletteram_hi_w );
void harddriv_scanline_driver(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params);
void harddriv_scanline_multisync(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params);

10
src/mame/includes/itech8.h
View File

@ -99,12 +99,12 @@ void itech8_update_interrupts(running_machine &machine, int periodic, int tms340
/*----------- defined in machine/slikshot.c -----------*/
READ8_HANDLER( slikz80_port_r );
WRITE8_HANDLER( slikz80_port_w );
DECLARE_READ8_HANDLER( slikz80_port_r );
DECLARE_WRITE8_HANDLER( slikz80_port_w );
READ8_HANDLER( slikshot_z80_r );
READ8_HANDLER( slikshot_z80_control_r );
WRITE8_HANDLER( slikshot_z80_control_w );
DECLARE_READ8_HANDLER( slikshot_z80_r );
DECLARE_READ8_HANDLER( slikshot_z80_control_r );
DECLARE_WRITE8_HANDLER( slikshot_z80_control_w );
SCREEN_UPDATE_RGB32( slikshot );

2
src/mame/includes/klax.h
View File

@ -21,7 +21,7 @@ public:
/*----------- defined in video/klax.c -----------*/
WRITE16_HANDLER( klax_latch_w );
DECLARE_WRITE16_HANDLER( klax_latch_w );
SCREEN_UPDATE_IND16( klax );

14
src/mame/includes/ladybug.h
View File

@ -93,14 +93,14 @@ SCREEN_VBLANK( sraider );
/*----------- defined in video/redclash.c -----------*/
WRITE8_HANDLER( redclash_videoram_w );
WRITE8_HANDLER( redclash_gfxbank_w );
WRITE8_HANDLER( redclash_flipscreen_w );
DECLARE_WRITE8_HANDLER( redclash_videoram_w );
DECLARE_WRITE8_HANDLER( redclash_gfxbank_w );
DECLARE_WRITE8_HANDLER( redclash_flipscreen_w );
WRITE8_HANDLER( redclash_star0_w );
WRITE8_HANDLER( redclash_star1_w );
WRITE8_HANDLER( redclash_star2_w );
WRITE8_HANDLER( redclash_star_reset_w );
DECLARE_WRITE8_HANDLER( redclash_star0_w );
DECLARE_WRITE8_HANDLER( redclash_star1_w );
DECLARE_WRITE8_HANDLER( redclash_star2_w );
DECLARE_WRITE8_HANDLER( redclash_star_reset_w );

24
src/mame/includes/matmania.h
View File

@ -63,18 +63,18 @@ public:
/*----------- defined in machine/maniach.c -----------*/
READ8_HANDLER( maniach_68705_port_a_r );
WRITE8_HANDLER( maniach_68705_port_a_w );
READ8_HANDLER( maniach_68705_port_b_r );
WRITE8_HANDLER( maniach_68705_port_b_w );
READ8_HANDLER( maniach_68705_port_c_r );
WRITE8_HANDLER( maniach_68705_port_c_w );
WRITE8_HANDLER( maniach_68705_ddr_a_w );
WRITE8_HANDLER( maniach_68705_ddr_b_w );
WRITE8_HANDLER( maniach_68705_ddr_c_w );
WRITE8_HANDLER( maniach_mcu_w );
READ8_HANDLER( maniach_mcu_r );
READ8_HANDLER( maniach_mcu_status_r );
DECLARE_READ8_HANDLER( maniach_68705_port_a_r );
DECLARE_WRITE8_HANDLER( maniach_68705_port_a_w );
DECLARE_READ8_HANDLER( maniach_68705_port_b_r );
DECLARE_WRITE8_HANDLER( maniach_68705_port_b_w );
DECLARE_READ8_HANDLER( maniach_68705_port_c_r );
DECLARE_WRITE8_HANDLER( maniach_68705_port_c_w );
DECLARE_WRITE8_HANDLER( maniach_68705_ddr_a_w );
DECLARE_WRITE8_HANDLER( maniach_68705_ddr_b_w );
DECLARE_WRITE8_HANDLER( maniach_68705_ddr_c_w );
DECLARE_WRITE8_HANDLER( maniach_mcu_w );
DECLARE_READ8_HANDLER( maniach_mcu_r );
DECLARE_READ8_HANDLER( maniach_mcu_status_r );
/*----------- defined in video/matmania.c -----------*/

8
src/mame/includes/megadriv.h
View File

@ -69,8 +69,8 @@ void megatech_set_megadrive_z80_as_megadrive_z80(running_machine &machine, const
/* These handlers are needed by megaplay.c */
extern READ16_HANDLER( megadriv_68k_io_read );
extern WRITE16_HANDLER( megadriv_68k_io_write );
extern DECLARE_READ16_HANDLER( megadriv_68k_io_read );
extern DECLARE_WRITE16_HANDLER( megadriv_68k_io_write );
/* These handlers are needed by puckpkmn.c for his memory map */
extern DECLARE_READ8_DEVICE_HANDLER( megadriv_68k_YM2612_read);
@ -472,8 +472,8 @@ MACHINE_START( md_sram );
/*----------- defined in drivers/megadriv.c -----------*/
/* These are needed to handle J-Cart inputs */
extern WRITE16_HANDLER( jcart_ctrl_w );
extern READ16_HANDLER( jcart_ctrl_r );
extern DECLARE_WRITE16_HANDLER( jcart_ctrl_w );
extern DECLARE_READ16_HANDLER( jcart_ctrl_r );
/* machine/megavdp.c */
extern UINT16 (*vdp_get_word_from_68k_mem)(running_machine &machine, UINT32 source, address_space* space);

4
src/mame/includes/midzeus.h
View File

@ -70,6 +70,6 @@ SCREEN_UPDATE_IND16( midzeus );
SCREEN_UPDATE_RGB32( midzeus2 );
READ32_HANDLER( zeus2_r );
WRITE32_HANDLER( zeus2_w );
DECLARE_READ32_HANDLER( zeus2_r );
DECLARE_WRITE32_HANDLER( zeus2_w );

24
src/mame/includes/namcoic.h
View File

@ -160,20 +160,20 @@ extern const device_type NAMCO_C45_ROAD;
void namco_tilemap_draw( bitmap_ind16 &bitmap, const rectangle &cliprect, int pri );
void namco_tilemap_invalidate( void );
WRITE16_HANDLER( namco_tilemapvideoram16_w );
READ16_HANDLER( namco_tilemapvideoram16_r );
WRITE16_HANDLER( namco_tilemapcontrol16_w );
READ16_HANDLER( namco_tilemapcontrol16_r );
DECLARE_WRITE16_HANDLER( namco_tilemapvideoram16_w );
DECLARE_READ16_HANDLER( namco_tilemapvideoram16_r );
DECLARE_WRITE16_HANDLER( namco_tilemapcontrol16_w );
DECLARE_READ16_HANDLER( namco_tilemapcontrol16_r );
READ32_HANDLER( namco_tilemapvideoram32_r );
WRITE32_HANDLER( namco_tilemapvideoram32_w );
READ32_HANDLER( namco_tilemapcontrol32_r );
WRITE32_HANDLER( namco_tilemapcontrol32_w );
DECLARE_READ32_HANDLER( namco_tilemapvideoram32_r );
DECLARE_WRITE32_HANDLER( namco_tilemapvideoram32_w );
DECLARE_READ32_HANDLER( namco_tilemapcontrol32_r );
DECLARE_WRITE32_HANDLER( namco_tilemapcontrol32_w );
READ32_HANDLER( namco_tilemapvideoram32_le_r );
WRITE32_HANDLER( namco_tilemapvideoram32_le_w );
READ32_HANDLER( namco_tilemapcontrol32_le_r );
WRITE32_HANDLER( namco_tilemapcontrol32_le_w );
DECLARE_READ32_HANDLER( namco_tilemapvideoram32_le_r );
DECLARE_WRITE32_HANDLER( namco_tilemapvideoram32_le_w );
DECLARE_READ32_HANDLER( namco_tilemapcontrol32_le_r );
DECLARE_WRITE32_HANDLER( namco_tilemapcontrol32_le_w );
/***********************************************************************************/

10
src/mame/includes/namcos1.h
View File

@ -111,11 +111,11 @@ void namcos1_init_DACs(running_machine &machine);
/*----------- defined in video/namcos1.c -----------*/
READ8_HANDLER( namcos1_videoram_r );
WRITE8_HANDLER( namcos1_videoram_w );
WRITE8_HANDLER( namcos1_paletteram_w );
READ8_HANDLER( namcos1_spriteram_r );
WRITE8_HANDLER( namcos1_spriteram_w );
DECLARE_READ8_HANDLER( namcos1_videoram_r );
DECLARE_WRITE8_HANDLER( namcos1_videoram_w );
DECLARE_WRITE8_HANDLER( namcos1_paletteram_w );
DECLARE_READ8_HANDLER( namcos1_spriteram_r );
DECLARE_WRITE8_HANDLER( namcos1_spriteram_w );
SCREEN_UPDATE_IND16( namcos1 );

44
src/mame/includes/namcos2.h
View File

@ -297,26 +297,26 @@ public:
extern void (*namcos2_kickstart)(running_machine &machine, int internal);
READ16_HANDLER( namcos2_flap_prot_r );
DECLARE_READ16_HANDLER( namcos2_flap_prot_r );
/**************************************************************/
/* EEPROM memory function handlers */
/**************************************************************/
#define NAMCOS2_68K_eeprom_W namcos2_68k_eeprom_w
#define NAMCOS2_68K_eeprom_R namcos2_68k_eeprom_r
WRITE16_HANDLER( namcos2_68k_eeprom_w );
READ16_HANDLER( namcos2_68k_eeprom_r );
DECLARE_WRITE16_HANDLER( namcos2_68k_eeprom_w );
DECLARE_READ16_HANDLER( namcos2_68k_eeprom_r );
/**************************************************************/
/* Shared data ROM memory handlerhandlers */
/**************************************************************/
READ16_HANDLER( namcos2_68k_data_rom_r );
DECLARE_READ16_HANDLER( namcos2_68k_data_rom_r );
/**************************************************************/
/* Shared protection/random number generator */
/**************************************************************/
READ16_HANDLER( namcos2_68k_key_r );
WRITE16_HANDLER( namcos2_68k_key_w );
DECLARE_READ16_HANDLER( namcos2_68k_key_r );
DECLARE_WRITE16_HANDLER( namcos2_68k_key_w );
/**************************************************************/
/* Non-shared memory custom IO device - IRQ/Inputs/Outputs */
@ -331,16 +331,16 @@ WRITE16_HANDLER( namcos2_68k_key_w );
#define NAMCOS2_C148_SERIRQ 6 /* 0x1cc000 */
#define NAMCOS2_C148_VBLANKIRQ 7 /* 0x1ce000 */
WRITE16_HANDLER( namcos2_68k_master_C148_w );
READ16_HANDLER( namcos2_68k_master_C148_r );
DECLARE_WRITE16_HANDLER( namcos2_68k_master_C148_w );
DECLARE_READ16_HANDLER( namcos2_68k_master_C148_r );
INTERRUPT_GEN( namcos2_68k_master_vblank );
WRITE16_HANDLER( namcos2_68k_slave_C148_w );
READ16_HANDLER( namcos2_68k_slave_C148_r );
DECLARE_WRITE16_HANDLER( namcos2_68k_slave_C148_w );
DECLARE_READ16_HANDLER( namcos2_68k_slave_C148_r );
INTERRUPT_GEN( namcos2_68k_slave_vblank );
WRITE16_HANDLER( namcos2_68k_gpu_C148_w );
READ16_HANDLER( namcos2_68k_gpu_C148_r );
DECLARE_WRITE16_HANDLER( namcos2_68k_gpu_C148_w );
DECLARE_READ16_HANDLER( namcos2_68k_gpu_C148_r );
INTERRUPT_GEN( namcos2_68k_gpu_vblank );
void namcos2_adjust_posirq_timer( running_machine &machine, int scanline );
@ -366,22 +366,22 @@ void namcos2_adjust_posirq_timer( running_machine &machine, int scanline );
/* Sound CPU support handlers - 6809 */
/**************************************************************/
WRITE8_HANDLER( namcos2_sound_bankselect_w );
DECLARE_WRITE8_HANDLER( namcos2_sound_bankselect_w );
/**************************************************************/
/* MCU Specific support handlers - HD63705 */
/**************************************************************/
WRITE8_HANDLER( namcos2_mcu_analog_ctrl_w );
READ8_HANDLER( namcos2_mcu_analog_ctrl_r );
DECLARE_WRITE8_HANDLER( namcos2_mcu_analog_ctrl_w );
DECLARE_READ8_HANDLER( namcos2_mcu_analog_ctrl_r );
WRITE8_HANDLER( namcos2_mcu_analog_port_w );
READ8_HANDLER( namcos2_mcu_analog_port_r );
DECLARE_WRITE8_HANDLER( namcos2_mcu_analog_port_w );
DECLARE_READ8_HANDLER( namcos2_mcu_analog_port_r );
WRITE8_HANDLER( namcos2_mcu_port_d_w );
READ8_HANDLER( namcos2_mcu_port_d_r );
DECLARE_WRITE8_HANDLER( namcos2_mcu_port_d_w );
DECLARE_READ8_HANDLER( namcos2_mcu_port_d_r );
READ8_HANDLER( namcos2_input_port_0_r );
READ8_HANDLER( namcos2_input_port_10_r );
READ8_HANDLER( namcos2_input_port_12_r );
DECLARE_READ8_HANDLER( namcos2_input_port_0_r );
DECLARE_READ8_HANDLER( namcos2_input_port_10_r );
DECLARE_READ8_HANDLER( namcos2_input_port_12_r );

38
src/mame/includes/nb1413m3.h
View File

@ -122,26 +122,26 @@ enum {
/*----------- defined in machine/nb1413m3.c -----------*/
MACHINE_RESET( nb1413m3 );
WRITE8_HANDLER( nb1413m3_nmi_clock_w );
DECLARE_WRITE8_HANDLER( nb1413m3_nmi_clock_w );
INTERRUPT_GEN( nb1413m3_interrupt );
READ8_HANDLER( nb1413m3_sndrom_r );
WRITE8_HANDLER( nb1413m3_sndrombank1_w );
WRITE8_HANDLER( nb1413m3_sndrombank2_w );
READ8_HANDLER( nb1413m3_gfxrom_r );
WRITE8_HANDLER( nb1413m3_gfxrombank_w );
WRITE8_HANDLER( nb1413m3_gfxradr_l_w );
WRITE8_HANDLER( nb1413m3_gfxradr_h_w );
WRITE8_HANDLER( nb1413m3_inputportsel_w );
READ8_HANDLER( nb1413m3_inputport0_r );
READ8_HANDLER( nb1413m3_inputport1_r );
READ8_HANDLER( nb1413m3_inputport2_r );
READ8_HANDLER( nb1413m3_inputport3_r );
READ8_HANDLER( nb1413m3_dipsw1_r );
READ8_HANDLER( nb1413m3_dipsw2_r );
READ8_HANDLER( nb1413m3_dipsw3_l_r );
READ8_HANDLER( nb1413m3_dipsw3_h_r );
WRITE8_HANDLER( nb1413m3_outcoin_w );
WRITE8_HANDLER( nb1413m3_vcrctrl_w );
DECLARE_READ8_HANDLER( nb1413m3_sndrom_r );
DECLARE_WRITE8_HANDLER( nb1413m3_sndrombank1_w );
DECLARE_WRITE8_HANDLER( nb1413m3_sndrombank2_w );
DECLARE_READ8_HANDLER( nb1413m3_gfxrom_r );
DECLARE_WRITE8_HANDLER( nb1413m3_gfxrombank_w );
DECLARE_WRITE8_HANDLER( nb1413m3_gfxradr_l_w );
DECLARE_WRITE8_HANDLER( nb1413m3_gfxradr_h_w );
DECLARE_WRITE8_HANDLER( nb1413m3_inputportsel_w );
DECLARE_READ8_HANDLER( nb1413m3_inputport0_r );
DECLARE_READ8_HANDLER( nb1413m3_inputport1_r );
DECLARE_READ8_HANDLER( nb1413m3_inputport2_r );
DECLARE_READ8_HANDLER( nb1413m3_inputport3_r );
DECLARE_READ8_HANDLER( nb1413m3_dipsw1_r );
DECLARE_READ8_HANDLER( nb1413m3_dipsw2_r );
DECLARE_READ8_HANDLER( nb1413m3_dipsw3_l_r );
DECLARE_READ8_HANDLER( nb1413m3_dipsw3_h_r );
DECLARE_WRITE8_HANDLER( nb1413m3_outcoin_w );
DECLARE_WRITE8_HANDLER( nb1413m3_vcrctrl_w );
CUSTOM_INPUT( nb1413m3_busyflag_r );
CUSTOM_INPUT( nb1413m3_outcoin_flag_r );

4
src/mame/includes/pacman.h
View File

@ -167,11 +167,11 @@ void jumpshot_decode(running_machine &machine);
READ8_HANDLER( theglobp_decrypt_rom );
DECLARE_READ8_HANDLER( theglobp_decrypt_rom );
/*----------- defined in machine/acitya.c -------------*/
READ8_HANDLER( acitya_decrypt_rom );
DECLARE_READ8_HANDLER( acitya_decrypt_rom );

24
src/mame/includes/pk8000.h
View File

@ -1,17 +1,17 @@
/*----------- defined in video/pk8000.c -----------*/
READ8_HANDLER(pk8000_video_color_r);
WRITE8_HANDLER(pk8000_video_color_w);
READ8_HANDLER(pk8000_text_start_r);
WRITE8_HANDLER(pk8000_text_start_w);
READ8_HANDLER(pk8000_chargen_start_r);
WRITE8_HANDLER(pk8000_chargen_start_w);
READ8_HANDLER(pk8000_video_start_r);
WRITE8_HANDLER(pk8000_video_start_w);
READ8_HANDLER(pk8000_color_start_r);
WRITE8_HANDLER(pk8000_color_start_w);
READ8_HANDLER(pk8000_color_r);
WRITE8_HANDLER(pk8000_color_w);
DECLARE_READ8_HANDLER(pk8000_video_color_r);
DECLARE_WRITE8_HANDLER(pk8000_video_color_w);
DECLARE_READ8_HANDLER(pk8000_text_start_r);
DECLARE_WRITE8_HANDLER(pk8000_text_start_w);
DECLARE_READ8_HANDLER(pk8000_chargen_start_r);
DECLARE_WRITE8_HANDLER(pk8000_chargen_start_w);
DECLARE_READ8_HANDLER(pk8000_video_start_r);
DECLARE_WRITE8_HANDLER(pk8000_video_start_w);
DECLARE_READ8_HANDLER(pk8000_color_start_r);
DECLARE_WRITE8_HANDLER(pk8000_color_start_w);
DECLARE_READ8_HANDLER(pk8000_color_r);
DECLARE_WRITE8_HANDLER(pk8000_color_w);
extern UINT8 pk8000_video_mode;
extern UINT8 pk8000_video_enable;

8
src/mame/includes/psx.h
View File

@ -25,14 +25,14 @@ public:
// mame/machine/psx.c
extern void psx_driver_init( running_machine &machine );
WRITE32_HANDLER( psx_com_delay_w );
READ32_HANDLER( psx_com_delay_r );
DECLARE_WRITE32_HANDLER( psx_com_delay_w );
DECLARE_READ32_HANDLER( psx_com_delay_r );
extern void psx_irq_set( running_machine &, UINT32 );
extern void psx_sio_install_handler( running_machine &, int, psx_sio_handler );
extern void psx_sio_input( running_machine &, int, int, int );
READ32_HANDLER( psx_gpu_r );
WRITE32_HANDLER( psx_gpu_w );
DECLARE_READ32_HANDLER( psx_gpu_r );
DECLARE_WRITE32_HANDLER( psx_gpu_w );
extern void psx_lightgun_set( running_machine &, int, int );
// emu/video/psx.c

8
src/mame/includes/scramble.h
View File

@ -66,11 +66,11 @@ extern const i8255_interface(stratgyx_ppi_1_intf);
READ8_HANDLER( triplep_pip_r );
READ8_HANDLER( triplep_pap_r );
DECLARE_READ8_HANDLER( triplep_pip_r );
DECLARE_READ8_HANDLER( triplep_pap_r );
READ8_HANDLER( hunchbks_mirror_r );
WRITE8_HANDLER( hunchbks_mirror_w );
DECLARE_READ8_HANDLER( hunchbks_mirror_r );
DECLARE_WRITE8_HANDLER( hunchbks_mirror_w );
DECLARE_READ8_DEVICE_HANDLER( scramble_protection_r );
DECLARE_WRITE8_DEVICE_HANDLER( scramble_protection_w );

38
src/mame/includes/segamsys.h
View File

@ -18,28 +18,28 @@ extern MACHINE_RESET(megatech_md_sms);
extern SCREEN_VBLANK(megatech_bios);
extern SCREEN_VBLANK(megatech_md_sms);
extern READ8_HANDLER( sms_vcounter_r );
extern READ8_HANDLER( sms_vdp_data_r );
extern WRITE8_HANDLER( sms_vdp_data_w );
extern READ8_HANDLER( sms_vdp_ctrl_r );
extern WRITE8_HANDLER( sms_vdp_ctrl_w );
extern DECLARE_READ8_HANDLER( sms_vcounter_r );
extern DECLARE_READ8_HANDLER( sms_vdp_data_r );
extern DECLARE_WRITE8_HANDLER( sms_vdp_data_w );
extern DECLARE_READ8_HANDLER( sms_vdp_ctrl_r );
extern DECLARE_WRITE8_HANDLER( sms_vdp_ctrl_w );
extern void init_for_megadrive(running_machine &machine);
extern void segae_md_sms_stop_scanline_timer(void);
extern READ8_HANDLER( md_sms_vdp_vcounter_r );
extern READ8_HANDLER( md_sms_vdp_data_r );
extern WRITE8_HANDLER( md_sms_vdp_data_w );
extern READ8_HANDLER( md_sms_vdp_ctrl_r );
extern WRITE8_HANDLER( md_sms_vdp_ctrl_w );
extern DECLARE_READ8_HANDLER( md_sms_vdp_vcounter_r );
extern DECLARE_READ8_HANDLER( md_sms_vdp_data_r );
extern DECLARE_WRITE8_HANDLER( md_sms_vdp_data_w );
extern DECLARE_READ8_HANDLER( md_sms_vdp_ctrl_r );
extern DECLARE_WRITE8_HANDLER( md_sms_vdp_ctrl_w );
extern VIDEO_START(sms);
extern SCREEN_VBLANK(sms);
extern READ8_HANDLER( sms_vdp_2_data_r );
extern WRITE8_HANDLER( sms_vdp_2_data_w );
extern READ8_HANDLER( sms_vdp_2_ctrl_r );
extern WRITE8_HANDLER( sms_vdp_2_ctrl_w );
extern DECLARE_READ8_HANDLER( sms_vdp_2_data_r );
extern DECLARE_WRITE8_HANDLER( sms_vdp_2_data_w );
extern DECLARE_READ8_HANDLER( sms_vdp_2_ctrl_r );
extern DECLARE_WRITE8_HANDLER( sms_vdp_2_ctrl_w );
extern SCREEN_VBLANK(systeme);
extern SCREEN_UPDATE_RGB32(systeme);
extern MACHINE_RESET(systeme);
@ -49,12 +49,12 @@ extern UINT8* vdp2_vram_bank1;
extern UINT8* vdp1_vram_bank0;
extern UINT8* vdp1_vram_bank1;
extern void segae_set_vram_banks(UINT8 data);
READ8_HANDLER( sms_ioport_gg00_r );
DECLARE_READ8_HANDLER( sms_ioport_gg00_r );
void init_extra_gg_ports(running_machine* machine, const char* tag);
READ8_HANDLER (megatech_sms_ioport_dc_r);
READ8_HANDLER (megatech_sms_ioport_dd_r);
READ8_HANDLER( smsgg_backupram_r );
WRITE8_HANDLER( smsgg_backupram_w );
DECLARE_READ8_HANDLER (megatech_sms_ioport_dc_r);
DECLARE_READ8_HANDLER (megatech_sms_ioport_dd_r);
DECLARE_READ8_HANDLER( smsgg_backupram_r );
DECLARE_WRITE8_HANDLER( smsgg_backupram_w );
extern void megatech_set_genz80_as_sms_standard_map(running_machine &machine, const char* tag, int mapper);
MACHINE_CONFIG_EXTERN(sms);
extern void init_sms(running_machine &machine);

10
src/mame/includes/sei_crtc.h
View File

@ -2,11 +2,11 @@
extern UINT16 seibucrtc_sc0bank;
WRITE16_HANDLER( seibucrtc_sc0vram_w );
WRITE16_HANDLER( seibucrtc_sc1vram_w );
WRITE16_HANDLER( seibucrtc_sc2vram_w );
WRITE16_HANDLER( seibucrtc_sc3vram_w );
WRITE16_HANDLER( seibucrtc_vregs_w );
DECLARE_WRITE16_HANDLER( seibucrtc_sc0vram_w );
DECLARE_WRITE16_HANDLER( seibucrtc_sc1vram_w );
DECLARE_WRITE16_HANDLER( seibucrtc_sc2vram_w );
DECLARE_WRITE16_HANDLER( seibucrtc_sc3vram_w );
DECLARE_WRITE16_HANDLER( seibucrtc_vregs_w );
void seibucrtc_sc0bank_w(UINT16 data);
VIDEO_START( seibu_crtc );
SCREEN_UPDATE_IND16( seibu_crtc );

8
src/mame/includes/skullxbo.h
View File

@ -25,10 +25,10 @@ public:
/*----------- defined in video/skullxbo.c -----------*/
WRITE16_HANDLER( skullxbo_playfieldlatch_w );
WRITE16_HANDLER( skullxbo_xscroll_w );
WRITE16_HANDLER( skullxbo_yscroll_w );
WRITE16_HANDLER( skullxbo_mobmsb_w );
DECLARE_WRITE16_HANDLER( skullxbo_playfieldlatch_w );
DECLARE_WRITE16_HANDLER( skullxbo_xscroll_w );
DECLARE_WRITE16_HANDLER( skullxbo_yscroll_w );
DECLARE_WRITE16_HANDLER( skullxbo_mobmsb_w );
SCREEN_UPDATE_IND16( skullxbo );

48
src/mame/includes/snes.h
View File

@ -595,31 +595,31 @@ enum
extern MACHINE_START( snes );
extern MACHINE_RESET( snes );
READ8_HANDLER( snes_open_bus_r );
DECLARE_READ8_HANDLER( snes_open_bus_r );
extern READ8_HANDLER( snes_r_io );
extern WRITE8_HANDLER( snes_w_io );
extern DECLARE_READ8_HANDLER( snes_r_io );
extern DECLARE_WRITE8_HANDLER( snes_w_io );
extern READ8_HANDLER( snes_r_bank1 );
extern READ8_HANDLER( snes_r_bank2 );
extern READ8_HANDLER( snes_r_bank3 );
extern READ8_HANDLER( snes_r_bank4 );
extern READ8_HANDLER( snes_r_bank5 );
extern READ8_HANDLER( snes_r_bank6 );
extern READ8_HANDLER( snes_r_bank7 );
extern WRITE8_HANDLER( snes_w_bank1 );
extern WRITE8_HANDLER( snes_w_bank2 );
extern WRITE8_HANDLER( snes_w_bank4 );
extern WRITE8_HANDLER( snes_w_bank5 );
extern WRITE8_HANDLER( snes_w_bank6 );
extern WRITE8_HANDLER( snes_w_bank7 );
extern DECLARE_READ8_HANDLER( snes_r_bank1 );
extern DECLARE_READ8_HANDLER( snes_r_bank2 );
extern DECLARE_READ8_HANDLER( snes_r_bank3 );
extern DECLARE_READ8_HANDLER( snes_r_bank4 );
extern DECLARE_READ8_HANDLER( snes_r_bank5 );
extern DECLARE_READ8_HANDLER( snes_r_bank6 );
extern DECLARE_READ8_HANDLER( snes_r_bank7 );
extern DECLARE_WRITE8_HANDLER( snes_w_bank1 );
extern DECLARE_WRITE8_HANDLER( snes_w_bank2 );
extern DECLARE_WRITE8_HANDLER( snes_w_bank4 );
extern DECLARE_WRITE8_HANDLER( snes_w_bank5 );
extern DECLARE_WRITE8_HANDLER( snes_w_bank6 );
extern DECLARE_WRITE8_HANDLER( snes_w_bank7 );
extern READ8_HANDLER( superfx_r_bank1 );
extern READ8_HANDLER( superfx_r_bank2 );
extern READ8_HANDLER( superfx_r_bank3 );
extern WRITE8_HANDLER( superfx_w_bank1 );
extern WRITE8_HANDLER( superfx_w_bank2 );
extern WRITE8_HANDLER( superfx_w_bank3 );
extern DECLARE_READ8_HANDLER( superfx_r_bank1 );
extern DECLARE_READ8_HANDLER( superfx_r_bank2 );
extern DECLARE_READ8_HANDLER( superfx_r_bank3 );
extern DECLARE_WRITE8_HANDLER( superfx_w_bank1 );
extern DECLARE_WRITE8_HANDLER( superfx_w_bank2 );
extern DECLARE_WRITE8_HANDLER( superfx_w_bank3 );
WRITE_LINE_DEVICE_HANDLER( snes_extern_irq_w );
@ -745,7 +745,7 @@ extern void snes_latch_counters(running_machine &machine);
extern VIDEO_START( snes );
extern SCREEN_UPDATE_RGB32( snes );
extern READ8_HANDLER( snes_ppu_read );
extern WRITE8_HANDLER( snes_ppu_write );
extern DECLARE_READ8_HANDLER( snes_ppu_read );
extern DECLARE_WRITE8_HANDLER( snes_ppu_write );
#endif /* _SNES_H_ */

12
src/mame/includes/snk6502.h
View File

@ -76,12 +76,12 @@ extern const sn76477_interface vanguard_sn76477_intf_1;
extern const sn76477_interface vanguard_sn76477_intf_2;
extern const sn76477_interface fantasy_sn76477_intf;
extern WRITE8_HANDLER( sasuke_sound_w );
extern WRITE8_HANDLER( satansat_sound_w );
extern WRITE8_HANDLER( vanguard_sound_w );
extern WRITE8_HANDLER( vanguard_speech_w );
extern WRITE8_HANDLER( fantasy_sound_w );
extern WRITE8_HANDLER( fantasy_speech_w );
extern DECLARE_WRITE8_HANDLER( sasuke_sound_w );
extern DECLARE_WRITE8_HANDLER( satansat_sound_w );
extern DECLARE_WRITE8_HANDLER( vanguard_sound_w );
extern DECLARE_WRITE8_HANDLER( vanguard_speech_w );
extern DECLARE_WRITE8_HANDLER( fantasy_sound_w );
extern DECLARE_WRITE8_HANDLER( fantasy_speech_w );
class snk6502_sound_device : public device_t,
public device_sound_interface

24
src/mame/includes/stv.h
View File

@ -243,23 +243,23 @@ int stv_vdp1_start ( running_machine &machine );
void video_update_vdp1(running_machine &machine);
void stv_vdp2_dynamic_res_change(running_machine &machine);
READ16_HANDLER ( saturn_vdp1_regs_r );
READ32_HANDLER ( saturn_vdp1_vram_r );
READ32_HANDLER ( saturn_vdp1_framebuffer0_r );
DECLARE_READ16_HANDLER ( saturn_vdp1_regs_r );
DECLARE_READ32_HANDLER ( saturn_vdp1_vram_r );
DECLARE_READ32_HANDLER ( saturn_vdp1_framebuffer0_r );
WRITE16_HANDLER ( saturn_vdp1_regs_w );
WRITE32_HANDLER ( saturn_vdp1_vram_w );
WRITE32_HANDLER ( saturn_vdp1_framebuffer0_w );
DECLARE_WRITE16_HANDLER ( saturn_vdp1_regs_w );
DECLARE_WRITE32_HANDLER ( saturn_vdp1_vram_w );
DECLARE_WRITE32_HANDLER ( saturn_vdp1_framebuffer0_w );
/*----------- defined in video/stvvdp2.c -----------*/
READ32_HANDLER ( saturn_vdp2_vram_r );
READ32_HANDLER ( saturn_vdp2_cram_r );
READ16_HANDLER ( saturn_vdp2_regs_r );
DECLARE_READ32_HANDLER ( saturn_vdp2_vram_r );
DECLARE_READ32_HANDLER ( saturn_vdp2_cram_r );
DECLARE_READ16_HANDLER ( saturn_vdp2_regs_r );
WRITE32_HANDLER ( saturn_vdp2_vram_w );
WRITE32_HANDLER ( saturn_vdp2_cram_w );
WRITE16_HANDLER ( saturn_vdp2_regs_w );
DECLARE_WRITE32_HANDLER ( saturn_vdp2_vram_w );
DECLARE_WRITE32_HANDLER ( saturn_vdp2_cram_w );
DECLARE_WRITE16_HANDLER ( saturn_vdp2_regs_w );
SCREEN_UPDATE_RGB32( stv_vdp2 );

6
src/mame/includes/targ.h
View File

@ -7,9 +7,9 @@
/*----------- defined in audio/targ.c -----------*/
WRITE8_HANDLER( targ_audio_1_w );
WRITE8_HANDLER( targ_audio_2_w );
WRITE8_HANDLER( spectar_audio_2_w );
DECLARE_WRITE8_HANDLER( targ_audio_1_w );
DECLARE_WRITE8_HANDLER( targ_audio_2_w );
DECLARE_WRITE8_HANDLER( spectar_audio_2_w );
MACHINE_CONFIG_EXTERN( spectar_audio );
MACHINE_CONFIG_EXTERN( targ_audio );

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