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Remove memory_read/write_byte/word/dword/qword* variants. Again, this is mostly

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bulk search & replace:

S: memory_read_([bytewordq]+)_[0-9lbe_maskd]+( *)\(( *)([^,]+)( *),( *)
R: \4->read_\1\2\(\3

S: memory_read_([bytewordq]+)( *)\(( *)([^,]+)( *),( *)
R: \4->read_\1\2\(\3

S: memory_write_([bytewordq]+)_[0-9lbe_maskd]+( *)\(( *)([^,]+)( *),( *)
R: \4->write_\1\2\(\3

S: memory_write_([bytewordq]+)( *)\(( *)([^,]+)( *),( *)
R: \4->write_\1\2\(\3

Gets 99% of the cases.
This commit is contained in:
Aaron Giles 2010-08-19 08:27:05 +00:00
parent 3598b772bc
commit 0edda6dda2
218 changed files with 2064 additions and 2214 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/emu/cpu/adsp2100/adsp2100.c
View File

@ -318,32 +318,32 @@ INLINE adsp2100_state *get_safe_token(running_device *device)
INLINE UINT16 RWORD_DATA(adsp2100_state *adsp, UINT32 addr)
{
return memory_read_word_16le(adsp->data, addr << 1);
return adsp->data->read_word(addr << 1);
}
INLINE void WWORD_DATA(adsp2100_state *adsp, UINT32 addr, UINT16 data)
{
memory_write_word_16le(adsp->data, addr << 1, data);
adsp->data->write_word(addr << 1, data);
}
INLINE UINT16 RWORD_IO(adsp2100_state *adsp, UINT32 addr)
{
return memory_read_word_16le(adsp->io, addr << 1);
return adsp->io->read_word(addr << 1);
}
INLINE void WWORD_IO(adsp2100_state *adsp, UINT32 addr, UINT16 data)
{
memory_write_word_16le(adsp->io, addr << 1, data);
adsp->io->write_word(addr << 1, data);
}
INLINE UINT32 RWORD_PGM(adsp2100_state *adsp, UINT32 addr)
{
return memory_read_dword_32le(adsp->program, addr << 2);
return adsp->program->read_dword(addr << 2);
}
INLINE void WWORD_PGM(adsp2100_state *adsp, UINT32 addr, UINT32 data)
{
memory_write_dword_32le(adsp->program, addr << 2, data & 0xffffff);
adsp->program->write_dword(addr << 2, data & 0xffffff);
}
#define ROPCODE(a) memory_decrypted_read_dword((a)->program, (a)->pc << 2)

4
src/emu/cpu/alph8201/alph8201.c
View File

@ -165,8 +165,8 @@ Timming
/* MAME is unnecessary */
#define HANDLE_HALT_LINE 0
#define M_RDMEM(A) memory_read_byte_8le(cpustate->program, A)
#define M_WRMEM(A,V) memory_write_byte_8le(cpustate->program, A, V)
#define M_RDMEM(A) cpustate->program->read_byte(A)
#define M_WRMEM(A,V) cpustate->program->write_byte(A, V)
#define M_RDOP(A) memory_decrypted_read_byte(cpustate->program, A)
#define M_RDOP_ARG(A) memory_raw_read_byte(cpustate->program, A)

10
src/emu/cpu/am29000/am29ops.h
View File

@ -956,7 +956,7 @@ static void LOAD(am29000_state *am29000)
return;
}
r = memory_read_dword_32be(am29000->data, addr);
r = am29000->data->read_dword(addr);
}
}
@ -1020,7 +1020,7 @@ static void LOADM(am29000_state *am29000)
return;
}
r = memory_read_dword_32be(am29000->data, addr);
r = am29000->data->read_dword(addr);
}
}
@ -1045,7 +1045,7 @@ static void LOADM(am29000_state *am29000)
int cnt;
for (cnt = 0; cnt <= GET_CHC_CR; ++cnt)
{
am29000->r[r] = memory_read_dword_32be(am29000->data, addr);
am29000->r[r] = am29000->data->read_dword(addr);
// SET_CHC_CR(cnt - 1);
addr += 4;
@ -1086,7 +1086,7 @@ static void STORE(am29000_state *am29000)
}
}
memory_write_dword_32be(am29000->data, addr, am29000->r[RA]);
am29000->data->write_dword(addr, am29000->r[RA]);
if (!FREEZE_MODE)
{
@ -1159,7 +1159,7 @@ static void STOREM(am29000_state *am29000)
int cnt;
for (cnt = 0; cnt <= GET_CHC_CR; ++cnt)
{
memory_write_dword_32be(am29000->data, addr, am29000->r[r]);
am29000->data->write_dword(addr, am29000->r[r]);
// SET_CHC_CR(cnt - 1);
addr += 4;

8
src/emu/cpu/apexc/apexc.c
View File

@ -328,8 +328,8 @@ field: X address D Function Y address D (part 2)
#include "apexc.h"
#ifndef SUPPORT_ODD_WORD_SIZES
#define apexc_readmem(address) memory_read_dword_32be(cpustate->program, (address)<<2)
#define apexc_writemem(address, data) memory_write_dword_32be(cpustate->program, (address)<<2, (data))
#define apexc_readmem(address) cpustate->program->read_dword((address)<<2)
#define apexc_writemem(address, data) cpustate->program->write_dword((address)<<2, (data))
/* eewww ! - Fortunately, there is no memory mapped I/O, so we can simulate masked write
without danger */
#define apexc_writemem_masked(address, data, mask) \
@ -474,12 +474,12 @@ static void word_write(apexc_state *cpustate, int address, UINT32 data, UINT32 m
static int papertape_read(apexc_state *cpustate)
{
return memory_read_byte_8be(cpustate->io, 0) & 0x1f;
return cpustate->io->read_byte(0) & 0x1f;
}
static void papertape_punch(apexc_state *cpustate, int data)
{
memory_write_byte_8be(cpustate->io, 0, data);
cpustate->io->write_byte(0, data);
}
/*

16
src/emu/cpu/arm/arm.c
View File

@ -263,18 +263,18 @@ INLINE void cpu_write32( ARM_REGS* cpustate, int addr, UINT32 data )
{
/* Unaligned writes are treated as normal writes */
if ( cpustate->endian == ENDIANNESS_BIG )
memory_write_dword_32be(cpustate->program, addr&ADDRESS_MASK,data);
cpustate->program->write_dword(addr&ADDRESS_MASK,data);
else
memory_write_dword_32le(cpustate->program, addr&ADDRESS_MASK,data);
cpustate->program->write_dword(addr&ADDRESS_MASK,data);
if (ARM_DEBUG_CORE && addr&3) logerror("%08x: Unaligned write %08x\n",R15,addr);
}
INLINE void cpu_write8( ARM_REGS* cpustate, int addr, UINT8 data )
{
if ( cpustate->endian == ENDIANNESS_BIG )
memory_write_byte_32be(cpustate->program,addr,data);
cpustate->program->write_byte(addr,data);
else
memory_write_byte_32le(cpustate->program,addr,data);
cpustate->program->write_byte(addr,data);
}
INLINE UINT32 cpu_read32( ARM_REGS* cpustate, int addr )
@ -282,9 +282,9 @@ INLINE UINT32 cpu_read32( ARM_REGS* cpustate, int addr )
UINT32 result;
if ( cpustate->endian == ENDIANNESS_BIG )
result = memory_read_dword_32be(cpustate->program,addr&ADDRESS_MASK);
result = cpustate->program->read_dword(addr&ADDRESS_MASK);
else
result = memory_read_dword_32le(cpustate->program,addr&ADDRESS_MASK);
result = cpustate->program->read_dword(addr&ADDRESS_MASK);
/* Unaligned reads rotate the word, they never combine words */
if (addr&3) {
@ -305,9 +305,9 @@ INLINE UINT32 cpu_read32( ARM_REGS* cpustate, int addr )
INLINE UINT8 cpu_read8( ARM_REGS* cpustate, int addr )
{
if ( cpustate->endian == ENDIANNESS_BIG )
return memory_read_byte_32be(cpustate->program, addr);
return cpustate->program->read_byte(addr);
else
return memory_read_byte_32le(cpustate->program, addr);
return cpustate->program->read_byte(addr);
}
INLINE UINT32 GetRegister( ARM_REGS* cpustate, int rIndex )

4
src/emu/cpu/arm7/arm7.c
View File

@ -104,7 +104,7 @@ enum
INLINE UINT32 arm7_tlb_get_first_level_descriptor( arm_state *cpustate, UINT32 vaddr )
{
UINT32 entry_paddr = ( COPRO_TLB_BASE & COPRO_TLB_BASE_MASK ) | ( ( vaddr & COPRO_TLB_VADDR_FLTI_MASK ) >> COPRO_TLB_VADDR_FLTI_MASK_SHIFT );
return memory_read_dword_32le( cpustate->program, entry_paddr );
return cpustate->program->read_dword( entry_paddr );
}
INLINE UINT32 arm7_tlb_get_second_level_descriptor( arm_state *cpustate, UINT32 granularity, UINT32 first_desc, UINT32 vaddr )
@ -125,7 +125,7 @@ INLINE UINT32 arm7_tlb_get_second_level_descriptor( arm_state *cpustate, UINT32
break;
}
return memory_read_dword_32le( cpustate->program, desc_lvl2 );
return cpustate->program->read_dword( desc_lvl2 );
}
INLINE UINT32 arm7_tlb_translate(arm_state *cpustate, UINT32 vaddr)

28
src/emu/cpu/arm7/arm7core.c
View File

@ -136,9 +136,9 @@ INLINE void arm7_cpu_write32(arm_state *cpustate, UINT32 addr, UINT32 data)
addr &= ~3;
if ( cpustate->endian == ENDIANNESS_BIG )
memory_write_dword_32be(cpustate->program, addr, data);
cpustate->program->write_dword(addr, data);
else
memory_write_dword_32le(cpustate->program, addr, data);
cpustate->program->write_dword(addr, data);
}
@ -151,9 +151,9 @@ INLINE void arm7_cpu_write16(arm_state *cpustate, UINT32 addr, UINT16 data)
addr &= ~1;
if ( cpustate->endian == ENDIANNESS_BIG )
memory_write_word_32be(cpustate->program, addr, data);
cpustate->program->write_word(addr, data);
else
memory_write_word_32le(cpustate->program, addr, data);
cpustate->program->write_word(addr, data);
}
INLINE void arm7_cpu_write8(arm_state *cpustate, UINT32 addr, UINT8 data)
@ -164,9 +164,9 @@ INLINE void arm7_cpu_write8(arm_state *cpustate, UINT32 addr, UINT8 data)
}
if ( cpustate->endian == ENDIANNESS_BIG )
memory_write_byte_32be(cpustate->program, addr, data);
cpustate->program->write_byte(addr, data);
else
memory_write_byte_32le(cpustate->program, addr, data);
cpustate->program->write_byte(addr, data);
}
INLINE UINT32 arm7_cpu_read32(arm_state *cpustate, offs_t addr)
@ -181,17 +181,17 @@ INLINE UINT32 arm7_cpu_read32(arm_state *cpustate, offs_t addr)
if (addr & 3)
{
if ( cpustate->endian == ENDIANNESS_BIG )
result = memory_read_dword_32be(cpustate->program, addr & ~3);
result = cpustate->program->read_dword(addr & ~3);
else
result = memory_read_dword_32le(cpustate->program, addr & ~3);
result = cpustate->program->read_dword(addr & ~3);
result = (result >> (8 * (addr & 3))) | (result << (32 - (8 * (addr & 3))));
}
else
{
if ( cpustate->endian == ENDIANNESS_BIG )
result = memory_read_dword_32be(cpustate->program, addr);
result = cpustate->program->read_dword(addr);
else
result = memory_read_dword_32le(cpustate->program, addr);
result = cpustate->program->read_dword(addr);
}
return result;
@ -207,9 +207,9 @@ INLINE UINT16 arm7_cpu_read16(arm_state *cpustate, offs_t addr)
}
if ( cpustate->endian == ENDIANNESS_BIG )
result = memory_read_word_32be(cpustate->program, addr & ~1);
result = cpustate->program->read_word(addr & ~1);
else
result = memory_read_word_32le(cpustate->program, addr & ~1);
result = cpustate->program->read_word(addr & ~1);
if (addr & 1)
{
@ -228,9 +228,9 @@ INLINE UINT8 arm7_cpu_read8(arm_state *cpustate, offs_t addr)
// Handle through normal 8 bit handler (for 32 bit cpu)
if ( cpustate->endian == ENDIANNESS_BIG )
return memory_read_byte_32be(cpustate->program, addr);
return cpustate->program->read_byte(addr);
else
return memory_read_byte_32le(cpustate->program, addr);
return cpustate->program->read_byte(addr);
}
/***************

30
src/emu/cpu/asap/asap.c
View File

@ -287,33 +287,33 @@ INLINE asap_state *get_safe_token(running_device *device)
INLINE UINT8 READBYTE(asap_state *asap, offs_t address)
{
/* no alignment issues with bytes */
return memory_read_byte_32le(asap->program, address);
return asap->program->read_byte(address);
}
INLINE UINT16 READWORD(asap_state *asap, offs_t address)
{
/* aligned reads are easy */
if (!(address & 1))
return memory_read_word_32le(asap->program, address);
return asap->program->read_word(address);
/* misaligned reads are tricky */
return memory_read_dword_32le(asap->program, address & ~3) >> (address & 3);
return asap->program->read_dword(address & ~3) >> (address & 3);
}
INLINE UINT32 READLONG(asap_state *asap, offs_t address)
{
/* aligned reads are easy */
if (!(address & 3))
return memory_read_dword_32le(asap->program, address);
return asap->program->read_dword(address);
/* misaligned reads are tricky */
return memory_read_dword_32le(asap->program, address & ~3) >> (address & 3);
return asap->program->read_dword(address & ~3) >> (address & 3);
}
INLINE void WRITEBYTE(asap_state *asap, offs_t address, UINT8 data)
{
/* no alignment issues with bytes */
memory_write_byte_32le(asap->program, address, data);
asap->program->write_byte(address, data);
}
INLINE void WRITEWORD(asap_state *asap, offs_t address, UINT16 data)
@ -321,18 +321,18 @@ INLINE void WRITEWORD(asap_state *asap, offs_t address, UINT16 data)
/* aligned writes are easy */
if (!(address & 1))
{
memory_write_word_32le(asap->program, address, data);
asap->program->write_word(address, data);
return;
}
/* misaligned writes are tricky */
if (!(address & 2))
{
memory_write_byte_32le(asap->program, address + 1, data);
memory_write_byte_32le(asap->program, address + 2, data >> 8);
asap->program->write_byte(address + 1, data);
asap->program->write_byte(address + 2, data >> 8);
}
else
memory_write_byte_32le(asap->program, address + 1, data);
asap->program->write_byte(address + 1, data);
}
INLINE void WRITELONG(asap_state *asap, offs_t address, UINT32 data)
@ -340,7 +340,7 @@ INLINE void WRITELONG(asap_state *asap, offs_t address, UINT32 data)
/* aligned writes are easy */
if (!(address & 3))
{
memory_write_dword_32le(asap->program, address, data);
asap->program->write_dword(address, data);
return;
}
@ -348,14 +348,14 @@ INLINE void WRITELONG(asap_state *asap, offs_t address, UINT32 data)
switch (address & 3)
{
case 1:
memory_write_byte_32le(asap->program, address, data);
memory_write_word_32le(asap->program, address + 1, data >> 8);
asap->program->write_byte(address, data);
asap->program->write_word(address + 1, data >> 8);
break;
case 2:
memory_write_word_32le(asap->program, address, data);
asap->program->write_word(address, data);
break;
case 3:
memory_write_byte_32le(asap->program, address, data);
asap->program->write_byte(address, data);
break;
}
}

12
src/emu/cpu/avr8/avr8.c
View File

@ -115,32 +115,32 @@ INLINE bool avr8_is_long_opcode(UINT16 op)
INLINE UINT8 READ_PRG_8(avr8_state *cpustate, UINT32 address)
{
return memory_read_byte_16le(cpustate->program, address);
return cpustate->program->read_byte(address);
}
INLINE UINT16 READ_PRG_16(avr8_state *cpustate, UINT32 address)
{
return memory_read_word_16le(cpustate->program, address << 1);
return cpustate->program->read_word(address << 1);
}
INLINE void WRITE_PRG_8(avr8_state *cpustate, UINT32 address, UINT8 data)
{
memory_write_byte_16le(cpustate->program, address, data);
cpustate->program->write_byte(address, data);
}
INLINE void WRITE_PRG_16(avr8_state *cpustate, UINT32 address, UINT16 data)
{
memory_write_word_16le(cpustate->program, address, data);
cpustate->program->write_word(address, data);
}
INLINE UINT8 READ_IO_8(avr8_state *cpustate, UINT16 address)
{
return memory_read_byte(cpustate->io, address);
return cpustate->io->read_byte(address);
}
INLINE void WRITE_IO_8(avr8_state *cpustate, UINT16 address, UINT8 data)
{
memory_write_byte(cpustate->io, address, data);
cpustate->io->write_byte(address, data);
}
INLINE void PUSH(avr8_state *cpustate, UINT8 val)

8
src/emu/cpu/ccpu/ccpu.c
View File

@ -64,11 +64,11 @@ INLINE ccpu_state *get_safe_token(running_device *device)
#define READOP(C,a) (memory_decrypted_read_byte((C)->program, a))
#define RDMEM(C,a) (memory_read_word_16be((C)->data, (a) * 2) & 0xfff)
#define WRMEM(C,a,v) (memory_write_word_16be((C)->data, (a) * 2, (v)))
#define RDMEM(C,a) ((C)->data->read_word((a) * 2) & 0xfff)
#define WRMEM(C,a,v) ((C)->data->write_word((a) * 2, (v)))
#define READPORT(C,a) (memory_read_byte_8be((C)->io, a))
#define WRITEPORT(C,a,v) (memory_write_byte_8be((C)->io, (a), (v)))
#define READPORT(C,a) ((C)->io->read_byte(a))
#define WRITEPORT(C,a,v) ((C)->io->write_byte((a), (v)))
#define SET_A0(C) do { (C)->a0flag = (C)->A; } while (0)
#define SET_CMP_VAL(C,x) do { (C)->cmpacc = *(C)->acc; (C)->cmpval = (x) & 0xfff; } while (0)

8
src/emu/cpu/cdp1802/cdp1802.c
View File

@ -75,10 +75,10 @@ INLINE cdp1802_state *get_safe_token(running_device *device)
}
#define OPCODE_R(addr) memory_decrypted_read_byte(cpustate->program, addr)
#define RAM_R(addr) memory_read_byte_8be(cpustate->program, addr)
#define RAM_W(addr, data) memory_write_byte_8be(cpustate->program, addr, data)
#define IO_R(addr) memory_read_byte_8be(cpustate->io, addr)
#define IO_W(addr, data) memory_write_byte_8be(cpustate->io, addr, data)
#define RAM_R(addr) cpustate->program->read_byte(addr)
#define RAM_W(addr, data) cpustate->program->write_byte(addr, data)
#define IO_R(addr) cpustate->io->read_byte(addr)
#define IO_W(addr, data) cpustate->io->write_byte(addr, data)
#define P cpustate->p
#define X cpustate->x

8
src/emu/cpu/cop400/cop400.c
View File

@ -161,10 +161,10 @@ struct _cop400_opcode_map {
***************************************************************************/
#define ROM(a) memory_decrypted_read_byte(cpustate->program, a)
#define RAM_R(a) memory_read_byte_8le(cpustate->data, a)
#define RAM_W(a, v) memory_write_byte_8le(cpustate->data, a, v)
#define IN(a) memory_read_byte_8le(cpustate->io, a)
#define OUT(a, v) memory_write_byte_8le(cpustate->io, a, v)
#define RAM_R(a) cpustate->data->read_byte(a)
#define RAM_W(a, v) cpustate->data->write_byte(a, v)
#define IN(a) cpustate->io->read_byte(a)
#define OUT(a, v) cpustate->io->write_byte(a, v)
#define IN_G() (IN(COP400_PORT_G) & cpustate->g_mask)
#define IN_L() IN(COP400_PORT_L)

6
src/emu/cpu/cp1610/cp1610.c
View File

@ -58,9 +58,9 @@ INLINE cp1610_state *get_safe_token(running_device *device)
return (cp1610_state *)downcast<legacy_cpu_device *>(device)->token();
}
#define cp1610_readop(A) memory_read_word_16be(cpustate->program, (A)<<1)
#define cp1610_readmem16(A) memory_read_word_16be(cpustate->program, (A)<<1)
#define cp1610_writemem16(A,B) memory_write_word_16be(cpustate->program, (A)<<1,B)
#define cp1610_readop(A) cpustate->program->read_word((A)<<1)
#define cp1610_readmem16(A) cpustate->program->read_word((A)<<1)
#define cp1610_writemem16(A,B) cpustate->program->write_word((A)<<1,B)
/* clear all flags */
#define CLR_SZOC \

56
src/emu/cpu/drcbec.c
View File

@ -903,43 +903,43 @@ static int drcbec_execute(drcbe_state *drcbe, drcuml_codehandle *entry)
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READ1, 4, 0): /* READ dst,src1,space_BYTE */
PARAM0 = memory_read_byte(drcbe->space[PARAM2 / 16], PARAM1);
PARAM0 = drcbe->space[PARAM2 / 16]->read_byte(PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READ2, 4, 0): /* READ dst,src1,space_WORD */
PARAM0 = memory_read_word(drcbe->space[PARAM2 / 16], PARAM1);
PARAM0 = drcbe->space[PARAM2 / 16]->read_word(PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READ4, 4, 0): /* READ dst,src1,space_DWORD */
PARAM0 = memory_read_dword(drcbe->space[PARAM2 / 16], PARAM1);
PARAM0 = drcbe->space[PARAM2 / 16]->read_dword(PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READM2, 4, 0): /* READM dst,src1,mask,space_WORD */
PARAM0 = memory_read_word_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
PARAM0 = drcbe->space[PARAM3 / 16]->read_word(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READM4, 4, 0): /* READM dst,src1,mask,space_DWORD */
PARAM0 = memory_read_dword_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
PARAM0 = drcbe->space[PARAM3 / 16]->read_dword(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE1, 4, 0): /* WRITE dst,src1,space_BYTE */
memory_write_byte(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
drcbe->space[PARAM2 / 16]->write_byte(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE2, 4, 0): /* WRITE dst,src1,space_WORD */
memory_write_word(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
drcbe->space[PARAM2 / 16]->write_word(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE4, 4, 0): /* WRITE dst,src1,space_DWORD */
memory_write_dword(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
drcbe->space[PARAM2 / 16]->write_dword(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM2, 4, 0): /* WRITEM dst,src1,mask,space_WORD */
memory_write_word_masked(drcbe->space[PARAM3 / 16], PARAM0, PARAM1, PARAM2);
drcbe->space[PARAM3 / 16]->write_word(PARAM0, PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM4, 4, 0): /* WRITEM dst,src1,mask,space_DWORD */
memory_write_dword_masked(drcbe->space[PARAM3 / 16], PARAM0, PARAM1, PARAM2);
drcbe->space[PARAM3 / 16]->write_dword(PARAM0, PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_CARRY, 4, 1): /* CARRY src,bitnum */
@ -1482,59 +1482,59 @@ static int drcbec_execute(drcbe_state *drcbe, drcuml_codehandle *entry)
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READ1, 8, 0): /* DREAD dst,src1,space_BYTE */
DPARAM0 = memory_read_byte(drcbe->space[PARAM2 / 16], PARAM1);
DPARAM0 = drcbe->space[PARAM2 / 16]->read_byte(PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READ2, 8, 0): /* DREAD dst,src1,space_WORD */
DPARAM0 = memory_read_word(drcbe->space[PARAM2 / 16], PARAM1);
DPARAM0 = drcbe->space[PARAM2 / 16]->read_word(PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READ4, 8, 0): /* DREAD dst,src1,space_DWORD */
DPARAM0 = memory_read_dword(drcbe->space[PARAM2 / 16], PARAM1);
DPARAM0 = drcbe->space[PARAM2 / 16]->read_dword(PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READ8, 8, 0): /* DREAD dst,src1,space_QOWRD */
DPARAM0 = memory_read_qword(drcbe->space[PARAM2 / 16], PARAM1);
DPARAM0 = drcbe->space[PARAM2 / 16]->read_qword(PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READM2, 8, 0): /* DREADM dst,src1,mask,space_WORD */
DPARAM0 = memory_read_word_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
DPARAM0 = drcbe->space[PARAM3 / 16]->read_word(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READM4, 8, 0): /* DREADM dst,src1,mask,space_DWORD */
DPARAM0 = memory_read_dword_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
DPARAM0 = drcbe->space[PARAM3 / 16]->read_dword(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_READM8, 8, 0): /* DREADM dst,src1,mask,space_QWORD */
DPARAM0 = memory_read_qword_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
DPARAM0 = drcbe->space[PARAM3 / 16]->read_qword(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE1, 8, 0): /* DWRITE dst,src1,space_BYTE */
memory_write_byte(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
drcbe->space[PARAM2 / 16]->write_byte(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE2, 8, 0): /* DWRITE dst,src1,space_WORD */
memory_write_word(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
drcbe->space[PARAM2 / 16]->write_word(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE4, 8, 0): /* DWRITE dst,src1,space_DWORD */
memory_write_dword(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
drcbe->space[PARAM2 / 16]->write_dword(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE8, 8, 0): /* DWRITE dst,src1,space_QWORD */
memory_write_qword(drcbe->space[PARAM2 / 16], PARAM0, DPARAM1);
drcbe->space[PARAM2 / 16]->write_qword(PARAM0, DPARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM2, 8, 0): /* DWRITEM dst,src1,mask,space_WORD */
memory_write_word_masked(drcbe->space[PARAM3 / 16], PARAM0, DPARAM1, DPARAM2);
drcbe->space[PARAM3 / 16]->write_word(PARAM0, DPARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM4, 8, 0): /* DWRITEM dst,src1,mask,space_DWORD */
memory_write_dword_masked(drcbe->space[PARAM3 / 16], PARAM0, DPARAM1, DPARAM2);
drcbe->space[PARAM3 / 16]->write_dword(PARAM0, DPARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM8, 8, 0): /* DWRITEM dst,src1,mask,space_QWORD */
memory_write_qword_masked(drcbe->space[PARAM3 / 16], PARAM0, DPARAM1, DPARAM2);
drcbe->space[PARAM3 / 16]->write_qword(PARAM0, DPARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_CARRY, 8, 0): /* DCARRY src,bitnum */
@ -1895,11 +1895,11 @@ static int drcbec_execute(drcbe_state *drcbe, drcuml_codehandle *entry)
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_FREAD, 4, 0): /* FSREAD dst,src1,space */
PARAM0 = memory_read_dword(drcbe->space[PARAM2], PARAM1);
PARAM0 = drcbe->space[PARAM2]->read_dword(PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_FWRITE, 4, 0): /* FSWRITE dst,src1,space */
memory_write_dword(drcbe->space[PARAM2], PARAM0, PARAM1);
drcbe->space[PARAM2]->write_dword(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_FMOV, 4, 1): /* FSMOV dst,src[,c] */
@ -2030,11 +2030,11 @@ static int drcbec_execute(drcbe_state *drcbe, drcuml_codehandle *entry)
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_FREAD, 8, 0): /* FDREAD dst,src1,space */
DPARAM0 = memory_read_qword(drcbe->space[PARAM2], PARAM1);
DPARAM0 = drcbe->space[PARAM2]->read_qword(PARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_FWRITE, 8, 0): /* FDWRITE dst,src1,space */
memory_write_qword(drcbe->space[PARAM2], PARAM0, DPARAM1);
drcbe->space[PARAM2]->write_qword(PARAM0, DPARAM1);
break;
case MAKE_OPCODE_SHORT(DRCUML_OP_FMOV, 8, 1): /* FDMOV dst,src[,c] */

20
src/emu/cpu/dsp32/dsp32.c
View File

@ -217,15 +217,15 @@ INLINE dsp32_state *get_safe_token(running_device *device)
#define ROPCODE(cs,pc) memory_decrypted_read_dword((cs)->program, pc)
#define RBYTE(cs,addr) memory_read_byte_32le((cs)->program, addr)
#define WBYTE(cs,addr,data) memory_write_byte_32le((cs)->program, (addr), data)
#define RBYTE(cs,addr) (cs)->program->read_byte(addr)
#define WBYTE(cs,addr,data) (cs)->program->write_byte((addr), data)
#if (!DETECT_MISALIGNED_MEMORY)
#define RWORD(cs,addr) memory_read_word_32le((cs)->program, addr)
#define WWORD(cs,addr,data) memory_write_word_32le((cs)->program, (addr), data)
#define RLONG(cs,addr) memory_read_dword_32le((cs)->program, addr)
#define WLONG(cs,addr,data) memory_write_dword_32le((cs)->program, (addr), data)
#define RWORD(cs,addr) (cs)->program->read_word(addr)
#define WWORD(cs,addr,data) (cs)->program->write_word((addr), data)
#define RLONG(cs,addr) (cs)->program->read_dword(addr)
#define WLONG(cs,addr,data) (cs)->program->write_dword((addr), data)
#else
@ -233,7 +233,7 @@ INLINE UINT16 RWORD(dsp32_state *cpustate, offs_t addr)
{
UINT16 data;
if (addr & 1) fprintf(stderr, "Unaligned word read @ %06X, PC=%06X\n", addr, cpustate->PC);
data = memory_read_word_32le(cpustate->program, addr);
data = cpustate->program->read_word(addr);
return data;
}
@ -241,20 +241,20 @@ INLINE UINT32 RLONG(dsp32_state *cpustate, offs_t addr)
{
UINT32 data;
if (addr & 3) fprintf(stderr, "Unaligned long read @ %06X, PC=%06X\n", addr, cpustate->PC);
data = memory_write_word_32le(cpustate->program, addr);
data = cpustate->program->write_word(addr);
return data;
}
INLINE void WWORD(dsp32_state *cpustate, offs_t addr, UINT16 data)
{
if (addr & 1) fprintf(stderr, "Unaligned word write @ %06X, PC=%06X\n", addr, cpustate->PC);
memory_read_dword_32le(cpustate->program, (addr), data);
cpustate->program->read_dword((addr), data);
}
INLINE void WLONG(dsp32_state *cpustate, offs_t addr, UINT32 data)
{
if (addr & 3) fprintf(stderr, "Unaligned long write @ %06X, PC=%06X\n", addr, cpustate->PC);
memory_write_dword_32le(cpustate->program, (addr), data);
cpustate->program->write_dword((addr), data);
}
#endif

2
src/emu/cpu/dsp56k/dsp56k.c
View File

@ -290,7 +290,7 @@ static CPU_RESET( dsp56k )
alu_reset(cpustate);
/* HACK - Put a jump to 0x0000 at 0x0000 - this keeps the CPU locked to the instruction at address 0x0000 */
memory_write_word_16le(cpustate->program, 0x0000, 0x0124);
cpustate->program->write_word(0x0000, 0x0124);
}

46
src/emu/cpu/dsp56k/dsp56ops.c
View File

@ -2306,7 +2306,7 @@ static size_t dsp56k_op_bfop(dsp56k_core* cpustate, const UINT16 op, const UINT1
decode_BBB_bitmask(cpustate, BITS(op2,0xe000), &iVal);
workAddr = assemble_address_from_Pppppp_table(cpustate, BITS(op,0x0020), BITS(op,0x001f));
previousValue = memory_read_word_16le(cpustate->data, ADDRESS(workAddr));
previousValue = cpustate->data->read_word(ADDRESS(workAddr));
workingWord = previousValue;
switch(BITS(op2, 0x1f00))
@ -2372,7 +2372,7 @@ static size_t dsp56k_op_bfop_1(dsp56k_core* cpustate, const UINT16 op, const UIN
decode_RR_table(cpustate, BITS(op,0x0003), &R);
workAddr = *((UINT16*)R.addr);
previousValue = memory_read_word_16le(cpustate->data, ADDRESS(workAddr));
previousValue = cpustate->data->read_word(ADDRESS(workAddr));
workingWord = previousValue;
switch(BITS(op2, 0x1f00))
@ -3280,7 +3280,7 @@ static size_t dsp56k_op_movec(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
if (W)
{
/* Write D */
UINT16 value = memory_read_word_16le(cpustate->data, ADDRESS(*((UINT16*)R.addr))) ;
UINT16 value = cpustate->data->read_word(ADDRESS(*((UINT16*)R.addr))) ;
typed_pointer temp_src = { &value, DT_WORD };
SetDestinationValue(temp_src, SD);
}
@ -3322,7 +3322,7 @@ static size_t dsp56k_op_movec_1(dsp56k_core* cpustate, const UINT16 op, UINT8* c
if (W)
{
/* Write D */
UINT16 tempData = memory_read_word_16le(cpustate->data, ADDRESS(memOffset));
UINT16 tempData = cpustate->data->read_word(ADDRESS(memOffset));
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDestinationValue(temp_src, SD);
}
@ -3366,7 +3366,7 @@ static size_t dsp56k_op_movec_2(dsp56k_core* cpustate, const UINT16 op, UINT8* c
if (W)
{
/* Write D */
UINT16 tempData = memory_read_word_16le(cpustate->data, ADDRESS(memOffset));
UINT16 tempData = cpustate->data->read_word(ADDRESS(memOffset));
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDestinationValue(temp_src, SD);
}
@ -3417,7 +3417,7 @@ static size_t dsp56k_op_movec_3(dsp56k_core* cpustate, const UINT16 op, const UI
else
{
/* 16-bit long address */
UINT16 tempD = memory_read_word_16le(cpustate->data, ADDRESS(op2));
UINT16 tempD = cpustate->data->read_word(ADDRESS(op2));
typed_pointer tempTP = {&tempD, DT_WORD};
SetDestinationValue(tempTP, SD);
}
@ -3495,7 +3495,7 @@ static size_t dsp56k_op_movec_5(dsp56k_core* cpustate, const UINT16 op, const UI
if (W)
{
/* Write D */
UINT16 tempData = memory_read_word_16le(cpustate->data, ADDRESS(memOffset));
UINT16 tempData = cpustate->data->read_word(ADDRESS(memOffset));
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDestinationValue(temp_src, SD);
}
@ -3558,7 +3558,7 @@ static size_t dsp56k_op_movem(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
{
/* Read from Program Memory */
typed_pointer data;
UINT16 ldata = memory_read_word_16le(cpustate->program, ADDRESS(*((UINT16*)R.addr)));
UINT16 ldata = cpustate->program->read_word(ADDRESS(*((UINT16*)R.addr)));
data.addr = &ldata;
data.data_type = DT_WORD;
@ -3612,7 +3612,7 @@ static size_t dsp56k_op_movep(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
if (W)
{
UINT16 data = memory_read_word_16le(cpustate->data, ADDRESS(pp));
UINT16 data = cpustate->data->read_word(ADDRESS(pp));
typed_pointer tempTP;
tempTP.addr = &data;
@ -3651,7 +3651,7 @@ static size_t dsp56k_op_movep_1(dsp56k_core* cpustate, const UINT16 op, UINT8* c
/* A little different than most W if's - opposite read and write */
if (W)
{
UINT16 data = memory_read_word_16le(cpustate->data, ADDRESS(*((UINT16*)SD.addr)));
UINT16 data = cpustate->data->read_word(ADDRESS(*((UINT16*)SD.addr)));
typed_pointer tempTP;
tempTP.addr = &data;
@ -4681,7 +4681,7 @@ static void execute_x_memory_data_move(dsp56k_core* cpustate, const UINT16 op, t
if (W)
{
/* From X:<ea> to SD */
UINT16 data = memory_read_word_16le(cpustate->data, ADDRESS(*((UINT16*)R.addr)));
UINT16 data = cpustate->data->read_word(ADDRESS(*((UINT16*)R.addr)));
typed_pointer tempTP;
tempTP.addr = &data;
@ -4729,7 +4729,7 @@ static void execute_x_memory_data_move2(dsp56k_core* cpustate, const UINT16 op,
if (W)
{
/* Write D */
UINT16 value = memory_read_word_16le(cpustate->data, ADDRESS(*mem_offset));
UINT16 value = cpustate->data->read_word(ADDRESS(*mem_offset));
typed_pointer tempV = {&value, DT_WORD};
SetDestinationValue(tempV, SD);
}
@ -4757,7 +4757,7 @@ static void execute_x_memory_data_move_with_short_displacement(dsp56k_core* cpus
if (W)
{
/* Write D */
UINT16 tempData = memory_read_word_16le(cpustate->data, ADDRESS(memOffset));
UINT16 tempData = cpustate->data->read_word(ADDRESS(memOffset));
typed_pointer temp_src = { (void*)&tempData, DT_WORD };
SetDestinationValue(temp_src, SD);
}
@ -4793,13 +4793,13 @@ static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const UINT16
fatalerror("Dsp56k: Unimplemented access to external X Data Memory >= 0xffc0 in Dual X Memory Data Read.");
/* First memmove */
srcVal1 = memory_read_word_16le(cpustate->data, ADDRESS(*((UINT16*)R.addr)));
srcVal1 = cpustate->data->read_word(ADDRESS(*((UINT16*)R.addr)));
tempV.addr = &srcVal1;
tempV.data_type = DT_WORD;
SetDestinationValue(tempV, D1);
/* Second memmove */
srcVal2 = memory_read_word_16le(cpustate->data, ADDRESS(R3));
srcVal2 = cpustate->data->read_word(ADDRESS(R3));
tempV.addr = &srcVal2;
tempV.data_type = DT_WORD;
SetDestinationValue(tempV, D2);
@ -4895,13 +4895,13 @@ static void SetDataMemoryValue(dsp56k_core* cpustate, typed_pointer source, UINT
{
switch(source.data_type)
{
case DT_BYTE: memory_write_word_16le(cpustate->data, destinationAddr, (UINT16)( (*((UINT8*) source.addr) & 0xff) ) ) ; break ;
case DT_WORD: memory_write_word_16le(cpustate->data, destinationAddr, (UINT16)( (*((UINT16*)source.addr) & 0xffff) ) ) ; break ;
case DT_DOUBLE_WORD: memory_write_word_16le(cpustate->data, destinationAddr, (UINT16)( (*((UINT32*)source.addr) & 0x0000ffff) ) ) ; break ;
case DT_BYTE: cpustate->data->write_word(destinationAddr, (UINT16)( (*((UINT8*) source.addr) & 0xff) ) ) ; break ;
case DT_WORD: cpustate->data->write_word(destinationAddr, (UINT16)( (*((UINT16*)source.addr) & 0xffff) ) ) ; break ;
case DT_DOUBLE_WORD: cpustate->data->write_word(destinationAddr, (UINT16)( (*((UINT32*)source.addr) & 0x0000ffff) ) ) ; break ;
/* !!! Is this universal ??? */
/* !!! Forget not, yon shift-limiter !!! */
case DT_LONG_WORD: memory_write_word_16le(cpustate->data, destinationAddr, (UINT16)( ((*((UINT64*)source.addr)) & U64(0x00000000ffff0000)) >> 16) ) ; break ;
case DT_LONG_WORD: cpustate->data->write_word(destinationAddr, (UINT16)( ((*((UINT64*)source.addr)) & U64(0x00000000ffff0000)) >> 16) ) ; break ;
}
}
@ -4910,13 +4910,13 @@ static void SetProgramMemoryValue(dsp56k_core* cpustate, typed_pointer source, U
{
switch(source.data_type)
{
case DT_BYTE: memory_write_word_16le(cpustate->program, destinationAddr, (UINT16)( (*((UINT8*) source.addr) & 0xff) ) ) ; break ;
case DT_WORD: memory_write_word_16le(cpustate->program, destinationAddr, (UINT16)( (*((UINT16*)source.addr) & 0xffff) ) ) ; break ;
case DT_DOUBLE_WORD: memory_write_word_16le(cpustate->program, destinationAddr, (UINT16)( (*((UINT32*)source.addr) & 0x0000ffff) ) ) ; break ;
case DT_BYTE: cpustate->program->write_word(destinationAddr, (UINT16)( (*((UINT8*) source.addr) & 0xff) ) ) ; break ;
case DT_WORD: cpustate->program->write_word(destinationAddr, (UINT16)( (*((UINT16*)source.addr) & 0xffff) ) ) ; break ;
case DT_DOUBLE_WORD: cpustate->program->write_word(destinationAddr, (UINT16)( (*((UINT32*)source.addr) & 0x0000ffff) ) ) ; break ;
/* !!! Is this universal ??? */
/* !!! Forget not, yon shift-limiter !!! */
case DT_LONG_WORD: memory_write_word_16le(cpustate->program, destinationAddr, (UINT16)( ((*((UINT64*)source.addr)) & U64(0x00000000ffff0000)) >> 16) ) ; break ;
case DT_LONG_WORD: cpustate->program->write_word(destinationAddr, (UINT16)( ((*((UINT64*)source.addr)) & U64(0x00000000ffff0000)) >> 16) ) ; break ;
}
}

6
src/emu/cpu/dsp56k/dsp56pcu.c
View File

@ -144,8 +144,8 @@ void pcu_reset(dsp56k_core* cpustate)
/* ... */
/* P:$cffe -> Internal P:$07ff low byte */
/* P:$cfff -> Internal P:$07ff high byte */
UINT8 mem_value_low = memory_read_byte_16le(cpustate->program, mem_offset); /* TODO: IS THIS READING RIGHT? */
UINT8 mem_value_high = memory_read_byte_16be(cpustate->program, mem_offset);
UINT8 mem_value_low = cpustate->program->read_byte(mem_offset); /* TODO: IS THIS READING RIGHT? */
UINT8 mem_value_high = cpustate->program->read_byte(mem_offset);
cpustate->program_ram[i] = (mem_value_high << 8) || mem_value_low;
}
@ -166,7 +166,7 @@ void pcu_reset(dsp56k_core* cpustate)
/* they need. Once they've had their fill, they turn bootstrap mode off */
/* and the CPU begins execution at 0x0000; */
/* HACK - Read bit 15 at 0xc000 to see if we're working with the SSIO or host interface. */
if (memory_read_word_16le(cpustate->program, 0xc000<<1) & 0x8000)
if (cpustate->program->read_word(0xc000<<1) & 0x8000)
{
cpustate->bootstrap_mode = BOOTSTRAP_SSIX;
logerror("DSP56k : Currently in (hacked) bootstrap mode - reading from SSIx.\n");

16
src/emu/cpu/e132xs/e132xs.h
View File

@ -42,25 +42,25 @@ extern unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, u
/* Memory access */
/* read byte */
#define READ_B(H,addr) memory_read_byte((H)->program, (addr))
#define READ_B(H,addr) (H)->program->read_byte((addr))
/* read half-word */
#define READ_HW(H,addr) memory_read_word((H)->program, (addr) & ~1)
#define READ_HW(H,addr) (H)->program->read_word((addr) & ~1)
/* read word */
#define READ_W(H,addr) memory_read_dword((H)->program, (addr) & ~3)
#define READ_W(H,addr) (H)->program->read_dword((addr) & ~3)
/* write byte */
#define WRITE_B(H,addr, data) memory_write_byte((H)->program, addr, data)
#define WRITE_B(H,addr, data) (H)->program->write_byte(addr, data)
/* write half-word */
#define WRITE_HW(H,addr, data) memory_write_word((H)->program, (addr) & ~1, data)
#define WRITE_HW(H,addr, data) (H)->program->write_word((addr) & ~1, data)
/* write word */
#define WRITE_W(H,addr, data) memory_write_dword((H)->program, (addr) & ~3, data)
#define WRITE_W(H,addr, data) (H)->program->write_dword((addr) & ~3, data)
/* I/O access */
/* read word */
#define IO_READ_W(H,addr) memory_read_dword((H)->io, ((addr) >> 11) & 0x7ffc)
#define IO_READ_W(H,addr) (H)->io->read_dword(((addr) >> 11) & 0x7ffc)
/* write word */
#define IO_WRITE_W(H,addr, data) memory_write_dword((H)->io, ((addr) >> 11) & 0x7ffc, data)
#define IO_WRITE_W(H,addr, data) (H)->io->write_dword(((addr) >> 11) & 0x7ffc, data)
#define READ_OP(H,addr) memory_decrypted_read_word((H)->program, (addr) ^ (H)->opcodexor)

12
src/emu/cpu/f8/f8.c
View File

@ -145,7 +145,7 @@ static void ROMC_02(f8_Regs *cpustate)
* the memory location addressed by DC0; then all devices increment
* DC0.
*/
cpustate->dbus = memory_read_byte_8be(cpustate->program, cpustate->dc0);
cpustate->dbus = cpustate->program->read_byte(cpustate->dc0);
cpustate->dc0 += 1;
cpustate->icount -= cL;
}
@ -176,7 +176,7 @@ static void ROMC_05(f8_Regs *cpustate)
* Store the data bus contents into the memory location pointed
* to by DC0; increment DC0.
*/
memory_write_byte_8be(cpustate->program, cpustate->dc0, cpustate->dbus);
cpustate->program->write_byte(cpustate->dc0, cpustate->dbus);
cpustate->dc0 += 1;
cpustate->icount -= cL;
}
@ -412,7 +412,7 @@ static void ROMC_1A(f8_Regs *cpustate)
* register was addressed; the device containing the addressed port
* must place the contents of the data bus into the address port.
*/
memory_write_byte_8be(cpustate->iospace, cpustate->io, cpustate->dbus);
cpustate->iospace->write_byte(cpustate->io, cpustate->dbus);
cpustate->icount -= cL;
}
@ -425,7 +425,7 @@ static void ROMC_1B(f8_Regs *cpustate)
* contents of timer and interrupt control registers cannot be read
* back onto the data bus).
*/
cpustate->dbus = memory_read_byte_8be(cpustate->iospace, cpustate->io);
cpustate->dbus = cpustate->iospace->read_byte(cpustate->io);
cpustate->icount -= cL;
}
@ -1267,7 +1267,7 @@ static void f8_ins_0(f8_Regs *cpustate, int n)
{
ROMC_1C(cpustate, cS);
CLR_OZCS;
cpustate->a = memory_read_byte_8be(cpustate->iospace, n);
cpustate->a = cpustate->iospace->read_byte(n);
SET_SZ(cpustate->a);
}
@ -1292,7 +1292,7 @@ static void f8_ins_1(f8_Regs *cpustate, int n)
static void f8_outs_0(f8_Regs *cpustate, int n)
{
ROMC_1C(cpustate, cS);
memory_write_byte_8be(cpustate->iospace, n, cpustate->a);
cpustate->iospace->write_byte(n, cpustate->a);
}
/***************************************************

6
src/emu/cpu/g65816/g65816cm.h
View File

@ -11,9 +11,9 @@
#undef G65816_CALL_DEBUGGER
#define G65816_CALL_DEBUGGER(x) debugger_instruction_hook(cpustate->device, x)
#define g65816_read_8(addr) memory_read_byte_8be(cpustate->program, addr)
#define g65816_write_8(addr,data) memory_write_byte_8be(cpustate->program, addr,data)
#define g65816_read_8_immediate(A) memory_read_byte_8be(cpustate->program, A)
#define g65816_read_8(addr) cpustate->program->read_byte(addr)
#define g65816_write_8(addr,data) cpustate->program->write_byte(addr,data)
#define g65816_read_8_immediate(A) cpustate->program->read_byte(A)
#define g65816_jumping(A)
#define g65816_branching(A)

30
src/emu/cpu/h6280/h6280ops.h
View File

@ -125,7 +125,7 @@
***************************************************************/
INLINE UINT8 RDMEM(h6280_Regs* cpustate, offs_t addr) {
CHECK_VDC_VCE_PENALTY(addr);
return memory_read_byte_8le(cpustate->program, TRANSLATED(addr));
return cpustate->program->read_byte(TRANSLATED(addr));
}
/***************************************************************
@ -133,48 +133,48 @@ INLINE UINT8 RDMEM(h6280_Regs* cpustate, offs_t addr) {
***************************************************************/
INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) {
CHECK_VDC_VCE_PENALTY(addr);
memory_write_byte_8le(cpustate->program, TRANSLATED(addr),data);
cpustate->program->write_byte(TRANSLATED(addr),data);
}
/***************************************************************
* RDMEMZ read memory - zero page
***************************************************************/
#define RDMEMZ(addr) \
memory_read_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | ((addr)&0x1fff));
cpustate->program->read_byte((cpustate->mmr[1] << 13) | ((addr)&0x1fff));
/***************************************************************
* WRMEMZ write memory - zero page
***************************************************************/
#define WRMEMZ(addr,data) \
memory_write_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | ((addr)&0x1fff),data);
cpustate->program->write_byte((cpustate->mmr[1] << 13) | ((addr)&0x1fff),data);
/***************************************************************
* RDMEMW read word from memory
***************************************************************/
#define RDMEMW(addr) \
memory_read_byte_8le(cpustate->program, TRANSLATED(addr)) \
| ( memory_read_byte_8le(cpustate->program, TRANSLATED(addr+1)) << 8 )
cpustate->program->read_byte(TRANSLATED(addr)) \
| ( cpustate->program->read_byte(TRANSLATED(addr+1)) << 8 )
/***************************************************************
* RDZPWORD read a word from a zero page address
***************************************************************/
#define RDZPWORD(addr) \
((addr&0xff)==0xff) ? \
memory_read_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | ((addr)&0x1fff)) \
+(memory_read_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | ((addr-0xff)&0x1fff))<<8) : \
memory_read_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | ((addr)&0x1fff)) \
+(memory_read_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | ((addr+1)&0x1fff))<<8)
cpustate->program->read_byte((cpustate->mmr[1] << 13) | ((addr)&0x1fff)) \
+(cpustate->program->read_byte((cpustate->mmr[1] << 13) | ((addr-0xff)&0x1fff))<<8) : \
cpustate->program->read_byte((cpustate->mmr[1] << 13) | ((addr)&0x1fff)) \
+(cpustate->program->read_byte((cpustate->mmr[1] << 13) | ((addr+1)&0x1fff))<<8)
/***************************************************************
* push a register onto the stack
***************************************************************/
#define PUSH(Rg) memory_write_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | cpustate->sp.d,Rg); S--
#define PUSH(Rg) cpustate->program->write_byte((cpustate->mmr[1] << 13) | cpustate->sp.d,Rg); S--
/***************************************************************
* pull a register from the stack
***************************************************************/
#define PULL(Rg) S++; Rg = memory_read_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | cpustate->sp.d)
#define PULL(Rg) S++; Rg = cpustate->program->read_byte((cpustate->mmr[1] << 13) | cpustate->sp.d)
/***************************************************************
* RDOP read an opcode
@ -1111,21 +1111,21 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) {
***************************************************************/
#define ST0 \
CLEAR_T; \
memory_write_byte_8le(cpustate->io,0x0000,tmp)
cpustate->io->write_byte(0x0000,tmp)
/* 6280 ********************************************************
* ST1 Store at hardware address 2
***************************************************************/
#define ST1 \
CLEAR_T; \
memory_write_byte_8le(cpustate->io,0x0002,tmp)
cpustate->io->write_byte(0x0002,tmp)
/* 6280 ********************************************************
* ST2 Store at hardware address 3
***************************************************************/
#define ST2 \
CLEAR_T; \
memory_write_byte_8le(cpustate->io,0x0003,tmp)
cpustate->io->write_byte(0x0003,tmp)
/* 6280 ********************************************************
* STA Store accumulator

16
src/emu/cpu/h83002/h8_16.c
View File

@ -23,10 +23,10 @@ CPU_DISASSEMBLE(h8_32);
#define H8_SP (7)
#define h8_mem_read8(x) memory_read_byte(h8->program, x)
#define h8_mem_read16(z, x) memory_read_word(h8->program, x)
#define h8_mem_write8(x, y) memory_write_byte(h8->program, x, y)
#define h8_mem_write16(z, x, y) memory_write_word(h8->program, x, y)
#define h8_mem_read8(x) h8->program->read_byte(x)
#define h8_mem_read16(z, x) h8->program->read_word(x)
#define h8_mem_write8(x, y) h8->program->write_byte(x, y)
#define h8_mem_write16(z, x, y) h8->program->write_word(x, y)
#define h8_readop16(x, y) memory_decrypted_read_word(x->program, y)
// timing macros
@ -41,14 +41,14 @@ CPU_DISASSEMBLE(h8_32);
INLINE UINT32 h8_mem_read32(h83xx_state *h8, offs_t address)
{
UINT32 result = memory_read_word_16be(h8->program, address) << 16;
return result | memory_read_word_16be(h8->program, address + 2);
UINT32 result = h8->program->read_word(address) << 16;
return result | h8->program->read_word(address + 2);
}
INLINE void h8_mem_write32(h83xx_state *h8, offs_t address, UINT32 data)
{
memory_write_word_16be(h8->program, address, data >> 16);
memory_write_word_16be(h8->program, address + 2, data);
h8->program->write_word(address, data >> 16);
h8->program->write_word(address + 2, data);
}
static void h8_check_irqs(h83xx_state *h8);

88
src/emu/cpu/h83002/h8_8.c
View File

@ -18,8 +18,8 @@ CPU_DISASSEMBLE(h8);
#define H8_SP (7)
#define h8_mem_read8(x) memory_read_byte(h8->program, x)
#define h8_mem_write8(x, y) memory_write_byte(h8->program, x, y)
#define h8_mem_read8(x) h8->program->read_byte(x)
#define h8_mem_write8(x, y) h8->program->write_byte(x, y)
// timing macros
#define H8_IFETCH_TIMING(x) h8->cyccnt -= (x) * 4;
@ -36,8 +36,8 @@ static TIMER_CALLBACK( h8_timer_3_cb );
INLINE UINT16 h8_mem_read16(h83xx_state *h8, offs_t address)
{
UINT16 result = memory_read_byte(h8->program, address)<<8;
return result | memory_read_byte(h8->program, address+1);
UINT16 result = h8->program->read_byte(address)<<8;
return result | h8->program->read_byte(address+1);
}
INLINE UINT16 h8_readop16(h83xx_state *h8, offs_t address)
@ -48,26 +48,26 @@ INLINE UINT16 h8_readop16(h83xx_state *h8, offs_t address)
INLINE void h8_mem_write16(h83xx_state *h8, offs_t address, UINT16 data)
{
memory_write_byte(h8->program, address, data >> 8);
memory_write_byte(h8->program, address+1, data);
h8->program->write_byte(address, data >> 8);
h8->program->write_byte(address+1, data);
}
INLINE UINT32 h8_mem_read32(h83xx_state *h8, offs_t address)
{
UINT32 result = memory_read_byte(h8->program, address) << 24;
result |= memory_read_byte(h8->program, address+1) << 16;
result |= memory_read_byte(h8->program, address+2) << 8;
result |= memory_read_byte(h8->program, address+3);
UINT32 result = h8->program->read_byte(address) << 24;
result |= h8->program->read_byte(address+1) << 16;
result |= h8->program->read_byte(address+2) << 8;
result |= h8->program->read_byte(address+3);
return result;
}
INLINE void h8_mem_write32(h83xx_state *h8, offs_t address, UINT32 data)
{
memory_write_byte(h8->program, address, data >> 24);
memory_write_byte(h8->program, address+1, data >> 16);
memory_write_byte(h8->program, address+2, data >> 8);
memory_write_byte(h8->program, address+3, data);
h8->program->write_byte(address, data >> 24);
h8->program->write_byte(address+1, data >> 16);
h8->program->write_byte(address+2, data >> 8);
h8->program->write_byte(address+3, data);
}
static void h8_check_irqs(h83xx_state *h8);
@ -522,7 +522,7 @@ static READ8_HANDLER( h8330_itu_r )
switch(reg)
{
case 0x8d: // serial Rx 1
val = memory_read_byte(h8->io, H8_SERIAL_1);
val = h8->io->read_byte(H8_SERIAL_1);
break;
case 0x92: // FRC H
frc = h8->device->total_cycles() / divider[h8->per_regs[0x96]];
@ -533,61 +533,61 @@ static READ8_HANDLER( h8330_itu_r )
frc %= 65536;
return frc&0xff;
case 0xb2: // port 1 data
val = memory_read_byte(h8->io, H8_PORT_1);
val = h8->io->read_byte(H8_PORT_1);
break;
case 0xb3: // port 2 data
val = memory_read_byte(h8->io, H8_PORT_2);
val = h8->io->read_byte(H8_PORT_2);
break;
case 0xb6: // port 3 data
val = memory_read_byte(h8->io, H8_PORT_3);
val = h8->io->read_byte(H8_PORT_3);
break;
case 0xb7: // port 4 data
val = memory_read_byte(h8->io, H8_PORT_4);
val = h8->io->read_byte(H8_PORT_4);
break;
case 0xba: // port 5 data
val = memory_read_byte(h8->io, H8_PORT_5);
val = h8->io->read_byte(H8_PORT_5);
break;
case 0xbb: // port 6 data
val = memory_read_byte(h8->io, H8_PORT_6);
val = h8->io->read_byte(H8_PORT_6);
break;
case 0xbe: // port 7 data
val = memory_read_byte(h8->io, H8_PORT_7);
val = h8->io->read_byte(H8_PORT_7);
break;
case 0xbf: // port 8 data
val = memory_read_byte(h8->io, H8_PORT_8);
val = h8->io->read_byte(H8_PORT_8);
break;
case 0xc1: // port 9 data
val = memory_read_byte(h8->io, H8_PORT_9);
val = h8->io->read_byte(H8_PORT_9);
break;
case 0xdc: // serial status
val = 0x87;
break;
case 0xdd: // serial Rx 0
val = memory_read_byte(h8->io, H8_SERIAL_0);
val = h8->io->read_byte(H8_SERIAL_0);
break;
case 0xe0: // ADC 0 low byte
val = memory_read_byte(h8->io, H8_ADC_0_L);
val = h8->io->read_byte(H8_ADC_0_L);
break;
case 0xe1: // ADC 0 high byte
val = memory_read_byte(h8->io, H8_ADC_0_H);
val = h8->io->read_byte(H8_ADC_0_H);
break;
case 0xe2: // ADC 1 low byte
val = memory_read_byte(h8->io, H8_ADC_1_L);
val = h8->io->read_byte(H8_ADC_1_L);
break;
case 0xe3: // ADC 1 high byte
val = memory_read_byte(h8->io, H8_ADC_1_H);
val = h8->io->read_byte(H8_ADC_1_H);
break;
case 0xe4: // ADC 2 low byte
val = memory_read_byte(h8->io, H8_ADC_2_L);
val = h8->io->read_byte(H8_ADC_2_L);
break;
case 0xe5: // ADC 2 high byte
val = memory_read_byte(h8->io, H8_ADC_2_H);
val = h8->io->read_byte(H8_ADC_2_H);
break;
case 0xe6: // ADC 3 low byte
val = memory_read_byte(h8->io, H8_ADC_3_L);
val = h8->io->read_byte(H8_ADC_3_L);
break;
case 0xe7: // ADC 3 high byte
val = memory_read_byte(h8->io, H8_ADC_3_H);
val = h8->io->read_byte(H8_ADC_3_H);
break;
case 0xe8: // ADCSR: A/D control/status
val = 0x80; // return conversion completed
@ -613,37 +613,37 @@ static WRITE8_HANDLER( h8330_itu_w )
printf("%02x to flash control or external\n", data);
break;
case 0x8b: // serial Tx 1
memory_write_byte(h8->io, H8_SERIAL_1, data);
h8->io->write_byte(H8_SERIAL_1, data);
break;
case 0xb2: // port 1 data
memory_write_byte(h8->io, H8_PORT_1, data);
h8->io->write_byte(H8_PORT_1, data);
break;
case 0xb3: // port 2 data
memory_write_byte(h8->io, H8_PORT_2, data);
h8->io->write_byte(H8_PORT_2, data);
break;
case 0xb6: // port 3 data
memory_write_byte(h8->io, H8_PORT_3, data);
h8->io->write_byte(H8_PORT_3, data);
break;
case 0xb7: // port 4 data
memory_write_byte(h8->io, H8_PORT_4, data);
h8->io->write_byte(H8_PORT_4, data);
break;
case 0xba: // port 5 data
memory_write_byte(h8->io, H8_PORT_5, data);
h8->io->write_byte(H8_PORT_5, data);
break;
case 0xbb: // port 6 data
memory_write_byte(h8->io, H8_PORT_6, data);
h8->io->write_byte(H8_PORT_6, data);
break;
case 0xbe: // port 7 data
memory_write_byte(h8->io, H8_PORT_7, data);
h8->io->write_byte(H8_PORT_7, data);
break;
case 0xbf: // port 8 data
memory_write_byte(h8->io, H8_PORT_8, data);
h8->io->write_byte(H8_PORT_8, data);
break;
case 0xc1: // port 9 data
memory_write_byte(h8->io, H8_PORT_9, data);
h8->io->write_byte(H8_PORT_9, data);
break;
case 0xdb: // serial Tx 0
memory_write_byte(h8->io, H8_SERIAL_0, data);
h8->io->write_byte(H8_SERIAL_0, data);
break;
case 0xd8:

104
src/emu/cpu/h83002/h8periph.c
View File

@ -328,62 +328,62 @@ UINT8 h8_register_read8(h83xx_state *h8, UINT32 address)
val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xb5: // serial port A receive
val = memory_read_byte(h8->io, H8_SERIAL_0);
val = h8->io->read_byte(H8_SERIAL_0);
break;
case 0xbc: // serial port B status
val = h8->per_regs[reg];
val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xbd: // serial port B receive
val = memory_read_byte(h8->io, H8_SERIAL_1);
val = h8->io->read_byte(H8_SERIAL_1);
break;
case 0xe0:
val = memory_read_byte(h8->io, H8_ADC_0_H);
val = h8->io->read_byte(H8_ADC_0_H);
break;
case 0xe1:
val = memory_read_byte(h8->io, H8_ADC_0_L);
val = h8->io->read_byte(H8_ADC_0_L);
break;
case 0xe2:
val = memory_read_byte(h8->io, H8_ADC_1_H);
val = h8->io->read_byte(H8_ADC_1_H);
break;
case 0xe3:
val = memory_read_byte(h8->io, H8_ADC_1_L);
val = h8->io->read_byte(H8_ADC_1_L);
break;
case 0xe4:
val = memory_read_byte(h8->io, H8_ADC_2_H);
val = h8->io->read_byte(H8_ADC_2_H);
break;
case 0xe5:
val = memory_read_byte(h8->io, H8_ADC_2_L);
val = h8->io->read_byte(H8_ADC_2_L);
break;
case 0xe6:
val = memory_read_byte(h8->io, H8_ADC_3_H);
val = h8->io->read_byte(H8_ADC_3_H);
break;
case 0xe7:
val = memory_read_byte(h8->io, H8_ADC_3_L);
val = h8->io->read_byte(H8_ADC_3_L);
break;
case 0xe8: // adc status
val = 0x80;
break;
case 0xc7: // port 4 data
val = memory_read_byte(h8->io, H8_PORT_4);
val = h8->io->read_byte(H8_PORT_4);
break;
case 0xcb: // port 6 data
val = memory_read_byte(h8->io, H8_PORT_6);
val = h8->io->read_byte(H8_PORT_6);
break;
case 0xce: // port 7 data
val = memory_read_byte(h8->io, H8_PORT_7);
val = h8->io->read_byte(H8_PORT_7);
break;
case 0xcf: // port 8 data
val = memory_read_byte(h8->io, H8_PORT_8);
val = h8->io->read_byte(H8_PORT_8);
break;
case 0xd2: // port 9 data
val = memory_read_byte(h8->io, H8_PORT_9);
val = h8->io->read_byte(H8_PORT_9);
break;
case 0xd3: // port a data
val = memory_read_byte(h8->io, H8_PORT_A);
val = h8->io->read_byte(H8_PORT_A);
break;
case 0xd6: // port b data
val = memory_read_byte(h8->io, H8_PORT_B);
val = h8->io->read_byte(H8_PORT_B);
break;
case 0xf6:
val = h8_ISR_r(h8);
@ -414,35 +414,35 @@ void h8_register_write8(h83xx_state *h8, UINT32 address, UINT8 val)
switch (reg)
{
case 0xb3: // serial 0 send
memory_write_byte(h8->io, H8_SERIAL_0, val);
h8->io->write_byte(H8_SERIAL_0, val);
h8_3002_InterruptRequest(h8, 54, 1);
h8_3002_InterruptRequest(h8, 55, 1);
break;
case 0xbb: // serial 1 send
memory_write_byte(h8->io, H8_SERIAL_1, val);
h8->io->write_byte(H8_SERIAL_1, val);
h8_3002_InterruptRequest(h8, 58, 1);
h8_3002_InterruptRequest(h8, 59, 1);
break;
case 0xc7:
memory_write_byte(h8->io, H8_PORT_4, val);
h8->io->write_byte(H8_PORT_4, val);
break;
case 0xcb: // port 6 data
memory_write_byte(h8->io, H8_PORT_6, val);
h8->io->write_byte(H8_PORT_6, val);
break;
case 0xce: // port 7 data
memory_write_byte(h8->io, H8_PORT_7, val);
h8->io->write_byte(H8_PORT_7, val);
break;
case 0xcf: // port 8 data
memory_write_byte(h8->io, H8_PORT_8, val);
h8->io->write_byte(H8_PORT_8, val);
break;
case 0xd2: // port 9 data
memory_write_byte(h8->io, H8_PORT_9, val);
h8->io->write_byte(H8_PORT_9, val);
break;
case 0xd3: // port a data
memory_write_byte(h8->io, H8_PORT_A, val);
h8->io->write_byte(H8_PORT_A, val);
break;
case 0xd6: // port b data
memory_write_byte(h8->io, H8_PORT_B, val);
h8->io->write_byte(H8_PORT_B, val);
break;
case 0xf6:
h8_ISR_w(h8, val);
@ -624,63 +624,63 @@ UINT8 h8_3007_register_read8(h83xx_state *h8, UINT32 address)
val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xb5: // serial port A receive
val = memory_read_byte(h8->io, H8_SERIAL_0);
val = h8->io->read_byte(H8_SERIAL_0);
break;
case 0xbc: // serial port B status
val = h8->per_regs[reg];
val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xbd: // serial port B receive
val = memory_read_byte(h8->io, H8_SERIAL_1);
val = h8->io->read_byte(H8_SERIAL_1);
break;
case 0xe0:
val = memory_read_byte(h8->io, H8_ADC_0_H);
val = h8->io->read_byte(H8_ADC_0_H);
break;
case 0xe1:
val = memory_read_byte(h8->io, H8_ADC_0_L);
val = h8->io->read_byte(H8_ADC_0_L);
break;
case 0xe2:
val = memory_read_byte(h8->io, H8_ADC_1_H);
val = h8->io->read_byte(H8_ADC_1_H);
break;
case 0xe3:
val = memory_read_byte(h8->io, H8_ADC_1_L);
val = h8->io->read_byte(H8_ADC_1_L);
break;
case 0xe4:
val = memory_read_byte(h8->io, H8_ADC_2_H);
val = h8->io->read_byte(H8_ADC_2_H);
break;
case 0xe5:
val = memory_read_byte(h8->io, H8_ADC_2_L);
val = h8->io->read_byte(H8_ADC_2_L);
break;
case 0xe6:
val = memory_read_byte(h8->io, H8_ADC_3_H);
val = h8->io->read_byte(H8_ADC_3_H);
break;
case 0xe7:
val = memory_read_byte(h8->io, H8_ADC_3_L);
val = h8->io->read_byte(H8_ADC_3_L);
break;
case 0xe8: // adc status
val = 0x80;
break;
case 0xd3: // port 4 data
val = memory_read_byte(h8->io, H8_PORT_4);
val = h8->io->read_byte(H8_PORT_4);
break;
case 0xd5: // port 6 data
val = memory_read_byte(h8->io, H8_PORT_6);
val = h8->io->read_byte(H8_PORT_6);
break;
case 0xd6: // port 7 data
val = memory_read_byte(h8->io, H8_PORT_7);
val = h8->io->read_byte(H8_PORT_7);
break;
case 0xd7: // port 8 data
val = memory_read_byte(h8->io, H8_PORT_8);
val = h8->io->read_byte(H8_PORT_8);
break;
case 0xd8: // port 9 data
val = memory_read_byte(h8->io, H8_PORT_9);
val = h8->io->read_byte(H8_PORT_9);
break;
case 0xd9: // port a data
val = memory_read_byte(h8->io, H8_PORT_A);
val = h8->io->read_byte(H8_PORT_A);
break;
case 0xda: // port b data
val = memory_read_byte(h8->io, H8_PORT_B);
val = h8->io->read_byte(H8_PORT_B);
break;
default:
val = h8->per_regs[reg];
@ -710,31 +710,31 @@ void h8_3007_register_write8(h83xx_state *h8, UINT32 address, UINT8 val)
switch (reg)
{
case 0xb3:
memory_write_byte(h8->io, H8_SERIAL_0, val);
h8->io->write_byte(H8_SERIAL_0, val);
break;
case 0xbb:
memory_write_byte(h8->io, H8_SERIAL_1, val);
h8->io->write_byte(H8_SERIAL_1, val);
break;
case 0xd3:
memory_write_byte(h8->io, H8_PORT_4, val);
h8->io->write_byte(H8_PORT_4, val);
break;
case 0xd5: // port 6 data
memory_write_byte(h8->io, H8_PORT_6, val);
h8->io->write_byte(H8_PORT_6, val);
break;
case 0xd6: // port 7 data
memory_write_byte(h8->io, H8_PORT_7, val);
h8->io->write_byte(H8_PORT_7, val);
break;
case 0xd7: // port 8 data
memory_write_byte(h8->io, H8_PORT_8, val);
h8->io->write_byte(H8_PORT_8, val);
break;
case 0xd8: // port 9 data
memory_write_byte(h8->io, H8_PORT_9, val);
h8->io->write_byte(H8_PORT_9, val);
break;
case 0xd9: // port a data
memory_write_byte(h8->io, H8_PORT_A, val);
h8->io->write_byte(H8_PORT_A, val);
break;
case 0xda: // port b data
memory_write_byte(h8->io, H8_PORT_B, val);
h8->io->write_byte(H8_PORT_B, val);
break;
}
}

4
src/emu/cpu/hd6309/hd6309.c
View File

@ -229,12 +229,12 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
/****************************************************************************/
/* Read a byte from given memory location */
/****************************************************************************/
#define RM(Addr) ((unsigned)memory_read_byte_8be(m68_state->program, Addr))
#define RM(Addr) ((unsigned)m68_state->program->read_byte(Addr))
/****************************************************************************/
/* Write a byte to given memory location */
/****************************************************************************/
#define WM(Addr,Value) (memory_write_byte_8be(m68_state->program, Addr,Value))
#define WM(Addr,Value) (m68_state->program->write_byte(Addr,Value))
/****************************************************************************/
/* Z80_RDOP() is identical to Z80_RDMEM() except it is used for reading */

38
src/emu/cpu/i386/i386priv.h
View File

@ -349,15 +349,15 @@ INLINE int translate_address(i386_state *cpustate, UINT32 *address)
UINT32 page_entry;
// TODO: 4MB pages
UINT32 page_dir = memory_read_dword_32le(cpustate->program, pdbr + directory * 4);
UINT32 page_dir = cpustate->program->read_dword(pdbr + directory * 4);
if (!(cpustate->cr[4] & 0x10)) {
page_entry = memory_read_dword_32le(cpustate->program, (page_dir & 0xfffff000) + (table * 4));
page_entry = cpustate->program->read_dword((page_dir & 0xfffff000) + (table * 4));
*address = (page_entry & 0xfffff000) | offset;
} else {
if (page_dir & 0x80)
*address = (page_dir & 0xffc00000) | (a & 0x003fffff);
else {
page_entry = memory_read_dword_32le(cpustate->program, (page_dir & 0xfffff000) + (table * 4));
page_entry = cpustate->program->read_dword((page_dir & 0xfffff000) + (table * 4));
*address = (page_entry & 0xfffff000) | offset;
}
}
@ -461,7 +461,7 @@ INLINE UINT8 READ8(i386_state *cpustate,UINT32 ea)
}
address &= cpustate->a20_mask;
return memory_read_byte_32le(cpustate->program, address);
return cpustate->program->read_byte(address);
}
INLINE UINT16 READ16(i386_state *cpustate,UINT32 ea)
{
@ -478,7 +478,7 @@ INLINE UINT16 READ16(i386_state *cpustate,UINT32 ea)
}
address &= cpustate->a20_mask;
value = memory_read_word_32le( cpustate->program, address );
value = cpustate->program->read_word( address );
}
return value;
}
@ -499,7 +499,7 @@ INLINE UINT32 READ32(i386_state *cpustate,UINT32 ea)
}
address &= cpustate->a20_mask;
value = memory_read_dword_32le( cpustate->program, address );
value = cpustate->program->read_dword( address );
}
return value;
}
@ -525,8 +525,8 @@ INLINE UINT64 READ64(i386_state *cpustate,UINT32 ea)
}
address &= cpustate->a20_mask;
value = (((UINT64) memory_read_dword_32le( cpustate->program, address+0 )) << 0) |
(((UINT64) memory_read_dword_32le( cpustate->program, address+4 )) << 32);
value = (((UINT64) cpustate->program->read_dword( address+0 )) << 0) |
(((UINT64) cpustate->program->read_dword( address+4 )) << 32);
}
return value;
}
@ -541,7 +541,7 @@ INLINE void WRITE8(i386_state *cpustate,UINT32 ea, UINT8 value)
}
address &= cpustate->a20_mask;
memory_write_byte_32le(cpustate->program, address, value);
cpustate->program->write_byte(address, value);
}
INLINE void WRITE16(i386_state *cpustate,UINT32 ea, UINT16 value)
{
@ -557,7 +557,7 @@ INLINE void WRITE16(i386_state *cpustate,UINT32 ea, UINT16 value)
}
address &= cpustate->a20_mask;
memory_write_word_32le(cpustate->program, address, value);
cpustate->program->write_word(address, value);
}
}
INLINE void WRITE32(i386_state *cpustate,UINT32 ea, UINT32 value)
@ -576,7 +576,7 @@ INLINE void WRITE32(i386_state *cpustate,UINT32 ea, UINT32 value)
}
ea &= cpustate->a20_mask;
memory_write_dword_32le(cpustate->program, address, value);
cpustate->program->write_dword(address, value);
}
}
@ -600,8 +600,8 @@ INLINE void WRITE64(i386_state *cpustate,UINT32 ea, UINT64 value)
}
ea &= cpustate->a20_mask;
memory_write_dword_32le(cpustate->program, address+0, value & 0xffffffff);
memory_write_dword_32le(cpustate->program, address+4, (value >> 32) & 0xffffffff);
cpustate->program->write_dword(address+0, value & 0xffffffff);
cpustate->program->write_dword(address+4, (value >> 32) & 0xffffffff);
}
}
@ -892,11 +892,11 @@ INLINE void BUMP_DI(i386_state *cpustate,int adjustment)
/***********************************************************************************/
#define READPORT8(port) (memory_read_byte_32le(cpustate->io, port))
#define READPORT16(port) (memory_read_word_32le(cpustate->io, port))
#define READPORT32(port) (memory_read_dword_32le(cpustate->io, port))
#define WRITEPORT8(port, value) (memory_write_byte_32le(cpustate->io, port, value))
#define WRITEPORT16(port, value) (memory_write_word_32le(cpustate->io, port, value))
#define WRITEPORT32(port, value) (memory_write_dword_32le(cpustate->io, port, value))
#define READPORT8(port) (cpustate->io->read_byte(port))
#define READPORT16(port) (cpustate->io->read_word(port))
#define READPORT32(port) (cpustate->io->read_dword(port))
#define WRITEPORT8(port, value) (cpustate->io->write_byte(port, value))
#define WRITEPORT16(port, value) (cpustate->io->write_word(port, value))
#define WRITEPORT32(port, value) (cpustate->io->write_dword(port, value))
#endif /* __I386_H__ */

22
src/emu/cpu/i4004/i4004.c
View File

@ -73,8 +73,8 @@ INLINE UINT8 READ_ROM(i4004_state *cpustate)
INLINE void WPM(i4004_state *cpustate)
{
UINT8 t = (memory_read_byte_8le(cpustate->program, cpustate->RAM.d) << 4) | cpustate->A;
memory_write_byte_8le(cpustate->program, (GET_PC.w.l & 0x0f00) | cpustate->RAM.d, t);
UINT8 t = (cpustate->program->read_byte(cpustate->RAM.d) << 4) | cpustate->A;
cpustate->program->write_byte((GET_PC.w.l & 0x0f00) | cpustate->RAM.d, t);
}
@ -88,40 +88,40 @@ INLINE UINT8 ARG(i4004_state *cpustate)
INLINE UINT8 RM(i4004_state *cpustate)
{
return memory_read_byte_8le(cpustate->data, cpustate->RAM.d) & 0x0f;
return cpustate->data->read_byte(cpustate->RAM.d) & 0x0f;
}
INLINE UINT8 RMS(i4004_state *cpustate, UINT32 a)
{
return memory_read_byte_8le(cpustate->data, (cpustate->RAM.d & 0xff0) + a) >> 4;
return cpustate->data->read_byte((cpustate->RAM.d & 0xff0) + a) >> 4;
}
INLINE void WM(i4004_state *cpustate, UINT8 v)
{
UINT8 t = memory_read_byte_8le(cpustate->data, cpustate->RAM.d);
memory_write_byte_8le(cpustate->data, cpustate->RAM.d, (t & 0xf0) | v);
UINT8 t = cpustate->data->read_byte(cpustate->RAM.d);
cpustate->data->write_byte(cpustate->RAM.d, (t & 0xf0) | v);
}
INLINE void WMP(i4004_state *cpustate, UINT8 v)
{
memory_write_byte_8le(cpustate->io, (cpustate->RAM.d >> 6) | 0x10, v & 0x0f);
cpustate->io->write_byte((cpustate->RAM.d >> 6) | 0x10, v & 0x0f);
}
INLINE void WMS(i4004_state *cpustate, UINT32 a, UINT8 v)
{
UINT8 t = memory_read_byte_8le(cpustate->data, (cpustate->RAM.d & 0xff0) + a);
memory_write_byte_8le(cpustate->data,(cpustate->RAM.d & 0xff0) + a, (t & 0x0f) | (v<<4));
UINT8 t = cpustate->data->read_byte((cpustate->RAM.d & 0xff0) + a);
cpustate->data->write_byte((cpustate->RAM.d & 0xff0) + a, (t & 0x0f) | (v<<4));
}
INLINE UINT8 RIO(i4004_state *cpustate)
{
return memory_read_byte_8le(cpustate->io, cpustate->RAM.b.l >> 4) & 0x0f;
return cpustate->io->read_byte(cpustate->RAM.b.l >> 4) & 0x0f;
}
INLINE void WIO(i4004_state *cpustate, UINT8 v)
{
memory_write_byte_8le(cpustate->io, cpustate->RAM.b.l >> 4, v & 0x0f);
cpustate->io->write_byte(cpustate->RAM.b.l >> 4, v & 0x0f);
}
INLINE UINT8 GET_REG(i4004_state *cpustate, UINT8 num)

8
src/emu/cpu/i8008/i8008.c
View File

@ -91,7 +91,7 @@ INLINE UINT8 GET_REG(i8008_state *cpustate,UINT8 reg)
case 4 : retVal = cpustate->E; break;
case 5 : retVal = cpustate->H; break;
case 6 : retVal = cpustate->L; break;
default: retVal = memory_read_byte_8le(cpustate->program, (cpustate->H << 8) + cpustate->L); break;
default: retVal = cpustate->program->read_byte((cpustate->H << 8) + cpustate->L); break;
}
return retVal;
}
@ -106,7 +106,7 @@ INLINE void SET_REG(i8008_state *cpustate,UINT8 reg, UINT8 val)
case 4 : cpustate->E = val; break;
case 5 : cpustate->H = val; break;
case 6 : cpustate->L = val; break;
default: memory_write_byte_8le(cpustate->program, (cpustate->H << 8) + cpustate->L, val); break;
default: cpustate->program->write_byte((cpustate->H << 8) + cpustate->L, val); break;
}
}
@ -391,11 +391,11 @@ static void execute_one(i8008_state *cpustate, int opcode)
if (((opcode>>4)&3)==0) {
// INP
cpustate->icount -= 8;
cpustate->A = memory_read_byte_8le(cpustate->io, (opcode >> 1) & 0x1f);
cpustate->A = cpustate->io->read_byte((opcode >> 1) & 0x1f);
} else {
// OUT
cpustate->icount -= 6;
memory_write_byte_8le(cpustate->io, (opcode >> 1) & 0x1f, cpustate->A);
cpustate->io->write_byte((opcode >> 1) & 0x1f, cpustate->A);
}
break;
}

4
src/emu/cpu/i8085/i8085.c
View File

@ -374,13 +374,13 @@ INLINE UINT16 ARG16(i8085_state *cpustate)
INLINE UINT8 RM(i8085_state *cpustate, UINT32 a)
{
set_status(cpustate, 0x82); // memory read
return memory_read_byte_8le(cpustate->program, a);
return cpustate->program->read_byte(a);
}
INLINE void WM(i8085_state *cpustate, UINT32 a, UINT8 v)
{
set_status(cpustate, 0x00); // memory write
memory_write_byte_8le(cpustate->program, a, v);
cpustate->program->write_byte(a, v);
}

12
src/emu/cpu/i8085/i8085cpu.h
View File

@ -125,24 +125,24 @@
#define M_IN \
cpustate->STATUS = 0x42; \
cpustate->WZ.d=ARG(cpustate); \
cpustate->AF.b.h=memory_read_byte_8le(cpustate->io, cpustate->WZ.d);
cpustate->AF.b.h=cpustate->io->read_byte(cpustate->WZ.d);
#define M_OUT \
cpustate->STATUS = 0x10; \
cpustate->WZ.d=ARG(cpustate); \
memory_write_byte_8le(cpustate->io, cpustate->WZ.d,cpustate->AF.b.h)
cpustate->io->write_byte(cpustate->WZ.d,cpustate->AF.b.h)
/* stack */
#define M_PUSH(R) { \
cpustate->STATUS = 0x04; \
memory_write_byte_8le(cpustate->program, --cpustate->SP.w.l, cpustate->R.b.h); \
memory_write_byte_8le(cpustate->program, --cpustate->SP.w.l, cpustate->R.b.l); \
cpustate->program->write_byte(--cpustate->SP.w.l, cpustate->R.b.h); \
cpustate->program->write_byte(--cpustate->SP.w.l, cpustate->R.b.l); \
}
#define M_POP(R) { \
cpustate->STATUS = 0x86; \
cpustate->R.b.l = memory_read_byte_8le(cpustate->program, cpustate->SP.w.l++); \
cpustate->R.b.h = memory_read_byte_8le(cpustate->program, cpustate->SP.w.l++); \
cpustate->R.b.l = cpustate->program->read_byte(cpustate->SP.w.l++); \
cpustate->R.b.h = cpustate->program->read_byte(cpustate->SP.w.l++); \
}
/* jumps */

31
src/emu/cpu/i86/i86mem.c
View File

@ -2,15 +2,22 @@
8-bit memory accessors
*****************************************************************************/
static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
#ifdef I8086
static UINT16 memory_read_word(address_space *space, offs_t address) { return space->read_word(address); }
static void memory_write_word(address_space *space, offs_t address, UINT16 data) { space->write_word(address, data); }
static void configure_memory_8bit(i8086_state *cpustate)
{
cpustate->mem.fetch_xor = 0;
cpustate->mem.rbyte = memory_read_byte_8le;
cpustate->mem.rword = memory_read_word_8le;
cpustate->mem.wbyte = memory_write_byte_8le;
cpustate->mem.wword = memory_write_word_8le;
cpustate->mem.rbyte = memory_read_byte;
cpustate->mem.rword = memory_read_word;
cpustate->mem.wbyte = memory_write_byte;
cpustate->mem.wword = memory_write_word;
}
#endif
@ -22,22 +29,22 @@ static void configure_memory_8bit(i8086_state *cpustate)
static UINT16 read_word_16le(address_space *space, offs_t addr)
{
if (!(addr & 1))
return memory_read_word_16le(space, addr);
return space->read_word(addr);
else
{
UINT16 result = memory_read_byte_16le(space, addr);
return result | (memory_read_byte_16le(space, addr + 1) << 8);
UINT16 result = space->read_byte(addr);
return result | (space->read_byte(addr + 1) << 8);
}
}
static void write_word_16le(address_space *space, offs_t addr, UINT16 data)
{
if (!(addr & 1))
memory_write_word_16le(space, addr, data);
space->write_word(addr, data);
else
{
memory_write_byte_16le(space, addr, data);
memory_write_byte_16le(space, addr + 1, data >> 8);
space->write_byte(addr, data);
space->write_byte(addr + 1, data >> 8);
}
}
@ -45,8 +52,8 @@ static void configure_memory_16bit(i8086_state *cpustate)
{
cpustate->mem.fetch_xor = BYTE_XOR_LE(0);
cpustate->mem.rbyte = memory_read_byte_16le;
cpustate->mem.rbyte = memory_read_byte;
cpustate->mem.rword = read_word_16le;
cpustate->mem.wbyte = memory_write_byte_16le;
cpustate->mem.wbyte = memory_write_byte;
cpustate->mem.wword = write_word_16le;
}

26
src/emu/cpu/i86/i86priv.h
View File

@ -84,10 +84,10 @@ typedef enum {
/************************************************************************/
#define read_byte(a) (*cpustate->mem.rbyte)(cpustate->program, a)
#define read_word(a) (*cpustate->mem.rword)(cpustate->program, a)
#define write_byte(a,d) (*cpustate->mem.wbyte)(cpustate->program, (a),(d))
#define write_word(a,d) (*cpustate->mem.wword)(cpustate->program, (a),(d))
#define read_mem_byte(a) (*cpustate->mem.rbyte)(cpustate->program, a)
#define read_mem_word(a) (*cpustate->mem.rword)(cpustate->program, a)
#define write_mem_byte(a,d) (*cpustate->mem.wbyte)(cpustate->program, (a),(d))
#define write_mem_word(a,d) (*cpustate->mem.wword)(cpustate->program, (a),(d))
#define read_port_byte(a) (*cpustate->mem.rbyte)(cpustate->io, a)
#define read_port_word(a) (*cpustate->mem.rword)(cpustate->io, a)
@ -100,16 +100,16 @@ typedef enum {
#define DefaultBase(Seg) ((cpustate->seg_prefix && (Seg == DS || Seg == SS)) ? cpustate->prefix_base : cpustate->base[Seg])
#define GetMemB(Seg,Off) (read_byte((DefaultBase(Seg) + (Off)) & AMASK))
#define GetMemW(Seg,Off) (read_word((DefaultBase(Seg) + (Off)) & AMASK))
#define PutMemB(Seg,Off,x) write_byte((DefaultBase(Seg) + (Off)) & AMASK, (x))
#define PutMemW(Seg,Off,x) write_word((DefaultBase(Seg) + (Off)) & AMASK, (x))
#define GetMemB(Seg,Off) (read_mem_byte((DefaultBase(Seg) + (Off)) & AMASK))
#define GetMemW(Seg,Off) (read_mem_word((DefaultBase(Seg) + (Off)) & AMASK))
#define PutMemB(Seg,Off,x) write_mem_byte((DefaultBase(Seg) + (Off)) & AMASK, (x))
#define PutMemW(Seg,Off,x) write_mem_word((DefaultBase(Seg) + (Off)) & AMASK, (x))
#define PEEKBYTE(ea) (read_byte((ea) & AMASK))
#define ReadByte(ea) (read_byte((ea) & AMASK))
#define ReadWord(ea) (read_word((ea) & AMASK))
#define WriteByte(ea,val) write_byte((ea) & AMASK, val);
#define WriteWord(ea,val) write_word((ea) & AMASK, val);
#define PEEKBYTE(ea) (read_mem_byte((ea) & AMASK))
#define ReadByte(ea) (read_mem_byte((ea) & AMASK))
#define ReadWord(ea) (read_mem_word((ea) & AMASK))
#define WriteByte(ea,val) write_mem_byte((ea) & AMASK, val);
#define WriteWord(ea,val) write_mem_word((ea) & AMASK, val);
#define FETCH_XOR(a) ((a) ^ cpustate->mem.fetch_xor)
#define FETCH (memory_raw_read_byte(cpustate->program, FETCH_XOR(cpustate->pc++)))

96
src/emu/cpu/i860/i860dec.c
View File

@ -369,7 +369,7 @@ static UINT32 ifetch (i860s *cpustate, UINT32 pc)
/* Since i860 instructions are always stored LSB first (regardless of
the BE bit), we need to adjust the instruction below on MSB hosts. */
w1 = memory_read_dword_64le(cpustate->program, phys_pc);
w1 = cpustate->program->read_dword(phys_pc);
#ifdef HOST_MSB
BYTE_REV32 (w1);
#endif /* HOST_MSB. */
@ -407,7 +407,7 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
/* Get page directory entry at DTB:DIR:00. */
pg_dir_entry_a = dtb | (vdir << 2);
pg_dir_entry = memory_read_dword_64le(cpustate->program, pg_dir_entry_a);
pg_dir_entry = cpustate->program->read_dword(pg_dir_entry_a);
#ifdef HOST_MSB
BYTE_REV32 (pg_dir_entry);
#endif
@ -455,7 +455,7 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
/* Get page table entry at PFA1:PAGE:00. */
pfa1 = pg_dir_entry & 0xfffff000;
pg_tbl_entry_a = pfa1 | (vpage << 2);
pg_tbl_entry = memory_read_dword_64le(cpustate->program, pg_tbl_entry_a);
pg_tbl_entry = cpustate->program->read_dword(pg_tbl_entry_a);
#ifdef HOST_MSB
BYTE_REV32 (pg_tbl_entry);
#endif
@ -505,8 +505,8 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
BYTE_REV32 (ttpde);
BYTE_REV32 (ttpte);
#endif
memory_write_dword_64le(cpustate->program, pg_dir_entry_a, ttpde);
memory_write_dword_64le(cpustate->program, pg_tbl_entry_a, ttpte);
cpustate->program->write_dword(pg_dir_entry_a, ttpde);
cpustate->program->write_dword(pg_tbl_entry_a, ttpte);
if (is_write && is_dataref && (pg_tbl_entry & 0x40) == 0)
{
@ -567,12 +567,12 @@ static UINT32 readmemi_emu (i860s *cpustate, UINT32 addr, int size)
/* Now do the actual read. */
if (size == 1)
{
UINT32 ret = memory_read_byte_64le(cpustate->program, addr);
UINT32 ret = cpustate->program->read_byte(addr);
return ret & 0xff;
}
else if (size == 2)
{
UINT32 ret = memory_read_word_64le(cpustate->program, addr);
UINT32 ret = cpustate->program->read_word(addr);
#ifdef HOST_MSB
BYTE_REV16 (ret);
#endif
@ -580,7 +580,7 @@ static UINT32 readmemi_emu (i860s *cpustate, UINT32 addr, int size)
}
else if (size == 4)
{
UINT32 ret = memory_read_dword_64le(cpustate->program, addr);
UINT32 ret = cpustate->program->read_dword(addr);
#ifdef HOST_MSB
BYTE_REV32 (ret);
#endif
@ -630,20 +630,20 @@ static void writememi_emu (i860s *cpustate, UINT32 addr, int size, UINT32 data)
/* Now do the actual write. */
if (size == 1)
memory_write_byte_64le(cpustate->program, addr, data);
cpustate->program->write_byte(addr, data);
else if (size == 2)
{
#ifdef HOST_MSB
BYTE_REV16 (data);
#endif
memory_write_word_64le(cpustate->program, addr, data);
cpustate->program->write_word(addr, data);
}
else if (size == 4)
{
#ifdef HOST_MSB
BYTE_REV32 (data);
#endif
memory_write_dword_64le(cpustate->program, addr, data);
cpustate->program->write_dword(addr, data);
}
else
assert (0);
@ -689,28 +689,28 @@ static void fp_readmem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *dest)
if (size == 4)
{
dest[0] = memory_read_byte_64le(cpustate->program, addr+3);
dest[1] = memory_read_byte_64le(cpustate->program, addr+2);
dest[2] = memory_read_byte_64le(cpustate->program, addr+1);
dest[3] = memory_read_byte_64le(cpustate->program, addr+0);
dest[0] = cpustate->program->read_byte(addr+3);
dest[1] = cpustate->program->read_byte(addr+2);
dest[2] = cpustate->program->read_byte(addr+1);
dest[3] = cpustate->program->read_byte(addr+0);
}
else if (size == 8)
{
dest[0] = memory_read_byte_64le(cpustate->program, addr+7);
dest[1] = memory_read_byte_64le(cpustate->program, addr+6);
dest[2] = memory_read_byte_64le(cpustate->program, addr+5);
dest[3] = memory_read_byte_64le(cpustate->program, addr+4);
dest[4] = memory_read_byte_64le(cpustate->program, addr+3);
dest[5] = memory_read_byte_64le(cpustate->program, addr+2);
dest[6] = memory_read_byte_64le(cpustate->program, addr+1);
dest[7] = memory_read_byte_64le(cpustate->program, addr+0);
dest[0] = cpustate->program->read_byte(addr+7);
dest[1] = cpustate->program->read_byte(addr+6);
dest[2] = cpustate->program->read_byte(addr+5);
dest[3] = cpustate->program->read_byte(addr+4);
dest[4] = cpustate->program->read_byte(addr+3);
dest[5] = cpustate->program->read_byte(addr+2);
dest[6] = cpustate->program->read_byte(addr+1);
dest[7] = cpustate->program->read_byte(addr+0);
}
else if (size == 16)
{
int i;
for (i = 0; i < 16; i++)
{
dest[i] = memory_read_byte_64le(cpustate->program, addr+15-i);
dest[i] = cpustate->program->read_byte(addr+15-i);
}
}
}
@ -757,13 +757,13 @@ static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data
if (size == 4)
{
#if 1
memory_write_byte_64le(cpustate->program, addr+3, data[0]);
memory_write_byte_64le(cpustate->program, addr+2, data[1]);
memory_write_byte_64le(cpustate->program, addr+1, data[2]);
memory_write_byte_64le(cpustate->program, addr+0, data[3]);
cpustate->program->write_byte(addr+3, data[0]);
cpustate->program->write_byte(addr+2, data[1]);
cpustate->program->write_byte(addr+1, data[2]);
cpustate->program->write_byte(addr+0, data[3]);
#else
UINT32 ddd = (data[3]) | (data[2] << 8) | (data[1] << 16) |(data[0] << 24);
memory_write_dword_64le(cpustate->program, addr+0, ddd);
cpustate->program->write_dword(addr+0, ddd);
#endif
}
else if (size == 8)
@ -771,25 +771,25 @@ static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data
/* Special: watch for wmask != 0xff, which means we're doing pst.d. */
if (wmask == 0xff)
{
memory_write_byte_64le(cpustate->program, addr+7, data[0]);
memory_write_byte_64le(cpustate->program, addr+6, data[1]);
memory_write_byte_64le(cpustate->program, addr+5, data[2]);
memory_write_byte_64le(cpustate->program, addr+4, data[3]);
memory_write_byte_64le(cpustate->program, addr+3, data[4]);
memory_write_byte_64le(cpustate->program, addr+2, data[5]);
memory_write_byte_64le(cpustate->program, addr+1, data[6]);
memory_write_byte_64le(cpustate->program, addr+0, data[7]);
cpustate->program->write_byte(addr+7, data[0]);
cpustate->program->write_byte(addr+6, data[1]);
cpustate->program->write_byte(addr+5, data[2]);
cpustate->program->write_byte(addr+4, data[3]);
cpustate->program->write_byte(addr+3, data[4]);
cpustate->program->write_byte(addr+2, data[5]);
cpustate->program->write_byte(addr+1, data[6]);
cpustate->program->write_byte(addr+0, data[7]);
}
else
{
if (wmask & 0x80) memory_write_byte_64le(cpustate->program, addr+7, data[0]);
if (wmask & 0x40) memory_write_byte_64le(cpustate->program, addr+6, data[1]);
if (wmask & 0x20) memory_write_byte_64le(cpustate->program, addr+5, data[2]);
if (wmask & 0x10) memory_write_byte_64le(cpustate->program, addr+4, data[3]);
if (wmask & 0x08) memory_write_byte_64le(cpustate->program, addr+3, data[4]);
if (wmask & 0x04) memory_write_byte_64le(cpustate->program, addr+2, data[5]);
if (wmask & 0x02) memory_write_byte_64le(cpustate->program, addr+1, data[6]);
if (wmask & 0x01) memory_write_byte_64le(cpustate->program, addr+0, data[7]);
if (wmask & 0x80) cpustate->program->write_byte(addr+7, data[0]);
if (wmask & 0x40) cpustate->program->write_byte(addr+6, data[1]);
if (wmask & 0x20) cpustate->program->write_byte(addr+5, data[2]);
if (wmask & 0x10) cpustate->program->write_byte(addr+4, data[3]);
if (wmask & 0x08) cpustate->program->write_byte(addr+3, data[4]);
if (wmask & 0x04) cpustate->program->write_byte(addr+2, data[5]);
if (wmask & 0x02) cpustate->program->write_byte(addr+1, data[6]);
if (wmask & 0x01) cpustate->program->write_byte(addr+0, data[7]);
}
}
else if (size == 16)
@ -797,7 +797,7 @@ static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data
int i;
for (i = 0; i < 16; i++)
{
memory_write_byte_64le(cpustate->program, addr+15-i, data[i]);
cpustate->program->write_byte(addr+15-i, data[i]);
}
}
@ -4552,7 +4552,7 @@ static void disasm (i860s *cpustate, UINT32 addr, int len)
/* Note that we print the incoming (possibly virtual) address as the
PC rather than the translated address. */
fprintf (stderr, " (%s) 0x%08x: ", cpustate->device->tag(), addr);
insn = memory_read_dword_64le(cpustate->program, phys_addr);
insn = cpustate->program->read_dword(phys_addr);
#ifdef HOST_MSB
BYTE_REV32 (insn);
#endif /* HOST_MSB. */
@ -4584,7 +4584,7 @@ static void dbg_db (i860s *cpustate, UINT32 addr, int len)
if (GET_DIRBASE_ATE ())
phys_addr = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
b[i] = memory_read_byte_64le(cpustate->program, phys_addr);
b[i] = cpustate->program->read_byte(phys_addr);
fprintf (stderr, "%02x ", b[i]);
addr++;
}

104
src/emu/cpu/i960/i960.c
View File

@ -52,31 +52,31 @@ static void do_call(i960_state_t *i960, UINT32 adr, int type, UINT32 stack);
INLINE UINT32 i960_read_dword_unaligned(i960_state_t *i960, UINT32 address)
{
if (address & 3)
return memory_read_byte_32le(i960->program, address) | memory_read_byte_32le(i960->program, address+1)<<8 | memory_read_byte_32le(i960->program, address+2)<<16 | memory_read_byte_32le(i960->program, address+3)<<24;
return i960->program->read_byte(address) | i960->program->read_byte(address+1)<<8 | i960->program->read_byte(address+2)<<16 | i960->program->read_byte(address+3)<<24;
else
return memory_read_dword_32le(i960->program, address);
return i960->program->read_dword(address);
}
INLINE UINT16 i960_read_word_unaligned(i960_state_t *i960, UINT32 address)
{
if (address & 1)
return memory_read_byte_32le(i960->program, address) | memory_read_byte_32le(i960->program, address+1)<<8;
return i960->program->read_byte(address) | i960->program->read_byte(address+1)<<8;
else
return memory_read_word_32le(i960->program, address);
return i960->program->read_word(address);
}
INLINE void i960_write_dword_unaligned(i960_state_t *i960, UINT32 address, UINT32 data)
{
if (address & 3)
{
memory_write_byte_32le(i960->program, address, data & 0xff);
memory_write_byte_32le(i960->program, address+1, (data>>8)&0xff);
memory_write_byte_32le(i960->program, address+2, (data>>16)&0xff);
memory_write_byte_32le(i960->program, address+3, (data>>24)&0xff);
i960->program->write_byte(address, data & 0xff);
i960->program->write_byte(address+1, (data>>8)&0xff);
i960->program->write_byte(address+2, (data>>16)&0xff);
i960->program->write_byte(address+3, (data>>24)&0xff);
}
else
{
memory_write_dword_32le(i960->program, address, data);
i960->program->write_dword(address, data);
}
}
@ -84,22 +84,22 @@ INLINE void i960_write_word_unaligned(i960_state_t *i960, UINT32 address, UINT16
{
if (address & 1)
{
memory_write_byte_32le(i960->program, address, data & 0xff);
memory_write_byte_32le(i960->program, address+1, (data>>8)&0xff);
i960->program->write_byte(address, data & 0xff);
i960->program->write_byte(address+1, (data>>8)&0xff);
}
else
{
memory_write_word_32le(i960->program, address, data);
i960->program->write_word(address, data);
}
}
INLINE void send_iac(i960_state_t *i960, UINT32 adr)
{
UINT32 iac[4];
iac[0] = memory_read_dword_32le(i960->program, adr);
iac[1] = memory_read_dword_32le(i960->program, adr+4);
iac[2] = memory_read_dword_32le(i960->program, adr+8);
iac[3] = memory_read_dword_32le(i960->program, adr+12);
iac[0] = i960->program->read_dword(adr);
iac[1] = i960->program->read_dword(adr+4);
iac[2] = i960->program->read_dword(adr+8);
iac[3] = i960->program->read_dword(adr+12);
switch(iac[0]>>24) {
case 0x93: // reinit
@ -415,12 +415,12 @@ INLINE const char *i960_get_strflags(i960_state_t *i960)
// interrupt dispatch
static void take_interrupt(i960_state_t *i960, int vector, int lvl)
{
int int_tab = memory_read_dword_32le(i960->program, i960->PRCB+20); // interrupt table
int int_SP = memory_read_dword_32le(i960->program, i960->PRCB+24); // interrupt stack
int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
int int_SP = i960->program->read_dword(i960->PRCB+24); // interrupt stack
int SP;
UINT32 IRQV;
IRQV = memory_read_dword_32le(i960->program, int_tab + 36 + (vector-8)*4);
IRQV = i960->program->read_dword(int_tab + 36 + (vector-8)*4);
// start the process
if(!(i960->PC & 0x2000)) // if this is a nested interrupt, don't re-get int_SP
@ -438,10 +438,10 @@ static void take_interrupt(i960_state_t *i960, int vector, int lvl)
do_call(i960, IRQV, 7, SP);
// save the processor state
memory_write_dword_32le(i960->program, i960->r[I960_FP]-16, i960->PC);
memory_write_dword_32le(i960->program, i960->r[I960_FP]-12, i960->AC);
i960->program->write_dword(i960->r[I960_FP]-16, i960->PC);
i960->program->write_dword(i960->r[I960_FP]-12, i960->AC);
// store the vector
memory_write_dword_32le(i960->program, i960->r[I960_FP]-8, vector-8);
i960->program->write_dword(i960->r[I960_FP]-8, vector-8);
i960->PC &= ~0x1f00; // clear priority, state, trace-fault pending, and trace enable
i960->PC |= (lvl<<16); // set CPU level to current IRQ level
@ -450,14 +450,14 @@ static void take_interrupt(i960_state_t *i960, int vector, int lvl)
static void check_irqs(i960_state_t *i960)
{
int int_tab = memory_read_dword_32le(i960->program, i960->PRCB+20); // interrupt table
int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
int cpu_pri = (i960->PC>>16)&0x1f;
int pending_pri;
int lvl, irq, take = -1;
int vword;
static const UINT32 lvlmask[4] = { 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 };
pending_pri = memory_read_dword_32le(i960->program, int_tab); // read pending priorities
pending_pri = i960->program->read_dword(int_tab); // read pending priorities
if ((i960->immediate_irq) && ((cpu_pri < i960->immediate_pri) || (i960->immediate_pri == 31)))
{
@ -475,14 +475,14 @@ static void check_irqs(i960_state_t *i960)
wordl = (lvl % 4) * 8;
wordh = (wordl + 8) - 1;
vword = memory_read_dword_32le(i960->program, int_tab + word);
vword = i960->program->read_dword(int_tab + word);
// take the first vector we find for this level
for (irq = wordh; irq >= wordl; irq--) {
if(vword & (1 << irq)) {
// clear pending bit
vword &= ~(1 << irq);
memory_write_dword_32le(i960->program, int_tab + word, vword);
i960->program->write_dword(int_tab + word, vword);
take = irq;
break;
}
@ -494,14 +494,14 @@ static void check_irqs(i960_state_t *i960)
// try to recover...
pending_pri &= ~(1 << lvl);
memory_write_dword_32le(i960->program, int_tab, pending_pri);
i960->program->write_dword(int_tab, pending_pri);
return;
}
// if no vectors are waiting for this level, clear the level bit
if(!(vword & lvlmask[lvl % 4])) {
pending_pri &= ~(1 << lvl);
memory_write_dword_32le(i960->program, int_tab, pending_pri);
i960->program->write_dword(int_tab, pending_pri);
}
take += ((lvl/4) * 32);
@ -530,7 +530,7 @@ static void do_call(i960_state_t *i960, UINT32 adr, int type, UINT32 stack)
// flush the current register set to the current frame
FP = i960->r[I960_FP] & ~0x3f;
for (i = 0; i < 16; i++) {
memory_write_dword_32le(i960->program, FP + (i*4), i960->r[i]);
i960->program->write_dword(FP + (i*4), i960->r[i]);
}
}
else // a cache entry is available, use it
@ -569,7 +569,7 @@ static void do_ret_0(i960_state_t *i960)
{
int i;
for(i=0; i<0x10; i++)
i960->r[i] = memory_read_dword_32le(i960->program, i960->r[I960_FP]+4*i);
i960->r[i] = i960->program->read_dword(i960->r[I960_FP]+4*i);
if (i960->rcache_pos < 0)
{
@ -595,8 +595,8 @@ static void do_ret(i960_state_t *i960)
break;
case 7:
x = memory_read_dword(i960->program, i960->r[I960_FP]-16);
y = memory_read_dword(i960->program, i960->r[I960_FP]-12);
x = i960->program->read_dword(i960->r[I960_FP]-16);
y = i960->program->read_dword(i960->r[I960_FP]-12);
do_ret_0(i960);
i960->AC = y;
// #### test supervisor
@ -1235,9 +1235,9 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
t2 = get_2_ri(i960, opcode);
// interrupt control register
if(t1 == 0xff000004)
i960->ICR = memory_read_dword_32le(i960->program, t2);
i960->ICR = i960->program->read_dword(t2);
else
memory_write_dword_32le(i960->program, t1, memory_read_dword_32le(i960->program, t2));
i960->program->write_dword(t1, i960->program->read_dword(t2));
i960->AC = (i960->AC & ~7) | 2;
break;
@ -1248,10 +1248,10 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
if(t1 == 0xff000010)
send_iac(i960, t2);
else {
memory_write_dword_32le(i960->program, t1, memory_read_dword_32le(i960->program, t2));
memory_write_dword_32le(i960->program, t1+4, memory_read_dword_32le(i960->program, t2+4));
memory_write_dword_32le(i960->program, t1+8, memory_read_dword_32le(i960->program, t2+8));
memory_write_dword_32le(i960->program, t1+12, memory_read_dword_32le(i960->program, t2+12));
i960->program->write_dword(t1, i960->program->read_dword(t2));
i960->program->write_dword(t1+4, i960->program->read_dword(t2+4));
i960->program->write_dword(t1+8, i960->program->read_dword(t2+8));
i960->program->write_dword(t1+12, i960->program->read_dword(t2+12));
}
i960->AC = (i960->AC & ~7) | 2;
break;
@ -1352,7 +1352,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
for (i = 0; i < 0x10; i++)
{
memory_write_dword_32le(i960->program, i960->rcache_frame_addr[t1] + (i * sizeof(UINT32)), i960->rcache[t1][i]);
i960->program->write_dword(i960->rcache_frame_addr[t1] + (i * sizeof(UINT32)), i960->rcache[t1][i]);
}
}
i960->rcache_pos = 0;
@ -1792,12 +1792,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
case 0x80: // ldob
i960->icount -= 4;
i960->r[(opcode>>19)&0x1f] = memory_read_byte_32le(i960->program, get_ea(i960, opcode));
i960->r[(opcode>>19)&0x1f] = i960->program->read_byte(get_ea(i960, opcode));
break;
case 0x82: // stob
i960->icount -= 2;
memory_write_byte_32le(i960->program, get_ea(i960, opcode), i960->r[(opcode>>19)&0x1f]);
i960->program->write_byte(get_ea(i960, opcode), i960->r[(opcode>>19)&0x1f]);
break;
case 0x84: // bx
@ -1928,12 +1928,12 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
case 0xc0: // ldib
i960->icount -= 4;
i960->r[(opcode>>19)&0x1f] = (INT8)memory_read_byte_32le(i960->program, get_ea(i960, opcode));
i960->r[(opcode>>19)&0x1f] = (INT8)i960->program->read_byte(get_ea(i960, opcode));
break;
case 0xc2: // stib
i960->icount -= 2;
memory_write_byte_32le(i960->program, get_ea(i960, opcode), i960->r[(opcode>>19)&0x1f]);
i960->program->write_byte(get_ea(i960, opcode), i960->r[(opcode>>19)&0x1f]);
break;
case 0xc8: // ldis
@ -1973,7 +1973,7 @@ static CPU_EXECUTE( i960 )
static void set_irq_line(i960_state_t *i960, int irqline, int state)
{
int int_tab = memory_read_dword_32le(i960->program, i960->PRCB+20); // interrupt table
int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
int cpu_pri = (i960->PC>>16)&0x1f;
int vector =0;
int priority;
@ -2022,16 +2022,16 @@ static void set_irq_line(i960_state_t *i960, int irqline, int state)
else
{
// store the interrupt in the "pending" table
pend = memory_read_dword_32le(i960->program, int_tab);
pend = i960->program->read_dword(int_tab);
pend |= (1 << priority);
memory_write_dword_32le(i960->program, int_tab, pend);
i960->program->write_dword(int_tab, pend);
// now bitfield-ize the vector
word = ((vector / 32) * 4) + 4;
wordofs = vector % 32;
pend = memory_read_dword_32le(i960->program, int_tab + word);
pend = i960->program->read_dword(int_tab + word);
pend |= (1 << wordofs);
memory_write_dword_32le(i960->program, int_tab + word, pend);
i960->program->write_dword(int_tab + word, pend);
}
// and ack it to the core now that it's queued
@ -2085,9 +2085,9 @@ static CPU_RESET( i960 )
{
i960_state_t *i960 = get_safe_token(device);
i960->SAT = memory_read_dword_32le(i960->program, 0);
i960->PRCB = memory_read_dword_32le(i960->program, 4);
i960->IP = memory_read_dword_32le(i960->program, 12);
i960->SAT = i960->program->read_dword(0);
i960->PRCB = i960->program->read_dword(4);
i960->IP = i960->program->read_dword(12);
i960->PC = 0x001f2002;
i960->AC = 0;
i960->ICR = 0xff000000;
@ -2097,7 +2097,7 @@ static CPU_RESET( i960 )
memset(i960->r, 0, sizeof(i960->r));
memset(i960->rcache, 0, sizeof(i960->rcache));
i960->r[I960_FP] = memory_read_dword_32le(i960->program, i960->PRCB+24);
i960->r[I960_FP] = i960->program->read_dword(i960->PRCB+24);
i960->r[I960_SP] = i960->r[I960_FP] + 64;
i960->rcache_pos = 0;
}

12
src/emu/cpu/jaguar/jaguar.c
View File

@ -64,13 +64,13 @@ CPU_DISASSEMBLE( jaguardsp );
#define CONDITION(x) condition_table[(x) + ((jaguar->FLAGS & 7) << 5)]
#define READBYTE(J,a) memory_read_byte_32be((J)->program, a)
#define READWORD(J,a) memory_read_word_32be((J)->program, a)
#define READLONG(J,a) memory_read_dword_32be((J)->program, a)
#define READBYTE(J,a) (J)->program->read_byte(a)
#define READWORD(J,a) (J)->program->read_word(a)
#define READLONG(J,a) (J)->program->read_dword(a)
#define WRITEBYTE(J,a,v) memory_write_byte_32be((J)->program, a, v)
#define WRITEWORD(J,a,v) memory_write_word_32be((J)->program, a, v)
#define WRITELONG(J,a,v) memory_write_dword_32be((J)->program, a, v)
#define WRITEBYTE(J,a,v) (J)->program->write_byte(a, v)
#define WRITEWORD(J,a,v) (J)->program->write_word(a, v)
#define WRITELONG(J,a,v) (J)->program->write_dword(a, v)

4
src/emu/cpu/konami/konami.c
View File

@ -118,8 +118,8 @@ INLINE konami_state *get_safe_token(running_device *device)
#define KONAMI_SYNC 16 /* set when SYNC is waiting for an interrupt */
#define KONAMI_LDS 32 /* set when LDS occured at least once */
#define RM(cs,Addr) memory_read_byte_8be((cs)->program, Addr)
#define WM(cs,Addr,Value) memory_write_byte_8be((cs)->program, Addr,Value)
#define RM(cs,Addr) (cs)->program->read_byte(Addr)
#define WM(cs,Addr,Value) (cs)->program->write_byte(Addr,Value)
#define ROP(cs,Addr) memory_decrypted_read_byte((cs)->program, Addr)
#define ROP_ARG(cs,Addr) memory_raw_read_byte((cs)->program, Addr)

242
src/emu/cpu/lh5801/5801tbl.c
View File

@ -37,8 +37,8 @@ INLINE void lh5801_adc(lh5801_state *cpustate, UINT8 data)
INLINE void lh5801_add_mem(lh5801_state *cpustate, int addr, UINT8 data)
{
int v=lh5801_add_generic(cpustate,memory_read_byte(cpustate->program,addr),data,0);
memory_write_byte(cpustate->program,addr,v);
int v=lh5801_add_generic(cpustate,cpustate->program->read_byte(addr),data,0);
cpustate->program->write_byte(addr,v);
}
INLINE void lh5801_adr(lh5801_state *cpustate, PAIR *reg)
@ -97,10 +97,10 @@ INLINE void lh5801_and(lh5801_state *cpustate, UINT8 data)
INLINE void lh5801_and_mem(lh5801_state *cpustate, int addr, UINT8 data)
{
data&=memory_read_byte(cpustate->program,addr);
data&=cpustate->program->read_byte(addr);
cpustate->t&=~Z;
if (!data) cpustate->t|=Z;
memory_write_byte(cpustate->program,addr,data);
cpustate->program->write_byte(addr,data);
}
INLINE void lh5801_bit(lh5801_state *cpustate, UINT8 a, UINT8 b)
@ -125,10 +125,10 @@ INLINE void lh5801_ora(lh5801_state *cpustate, UINT8 data)
INLINE void lh5801_ora_mem(lh5801_state *cpustate, int addr, UINT8 data)
{
data|=memory_read_byte(cpustate->program,addr);
data|=cpustate->program->read_byte(addr);
cpustate->t&=~Z;
if (!data) cpustate->t|=Z;
memory_write_byte(cpustate->program,addr,data);
cpustate->program->write_byte(addr,data);
}
INLINE void lh5801_lda(lh5801_state *cpustate, UINT8 data)
@ -141,27 +141,27 @@ INLINE void lh5801_lda(lh5801_state *cpustate, UINT8 data)
INLINE void lh5801_lde(lh5801_state *cpustate, PAIR *reg)
{
// or z flag depends on reg
cpustate->a=memory_read_byte(cpustate->program,reg->w.l--);
cpustate->a=cpustate->program->read_byte(reg->w.l--);
cpustate->t&=~Z;
if (!cpustate->a) cpustate->t|=Z;
}
INLINE void lh5801_sde(lh5801_state *cpustate, PAIR *reg)
{
memory_write_byte(cpustate->program,reg->w.l--, cpustate->a);
cpustate->program->write_byte(reg->w.l--, cpustate->a);
}
INLINE void lh5801_lin(lh5801_state *cpustate, PAIR *reg)
{
// or z flag depends on reg
cpustate->a=memory_read_byte(cpustate->program,reg->w.l++);
cpustate->a=cpustate->program->read_byte(reg->w.l++);
cpustate->t&=~Z;
if (!cpustate->a) cpustate->t|=Z;
}
INLINE void lh5801_sin(lh5801_state *cpustate, PAIR *reg)
{
memory_write_byte(cpustate->program,reg->w.l++, cpustate->a);
cpustate->program->write_byte(reg->w.l++, cpustate->a);
}
INLINE void lh5801_dec(lh5801_state *cpustate, UINT8 *adr)
@ -176,40 +176,40 @@ INLINE void lh5801_inc(lh5801_state *cpustate, UINT8 *adr)
INLINE void lh5801_pop(lh5801_state *cpustate)
{
cpustate->a=memory_read_byte(cpustate->program,++S);
cpustate->a=cpustate->program->read_byte(++S);
cpustate->t&=~Z;
if (!cpustate->a) cpustate->t|=Z;
}
INLINE void lh5801_pop_word(lh5801_state *cpustate, PAIR *reg)
{
reg->b.h=memory_read_byte(cpustate->program,++S);
reg->b.l=memory_read_byte(cpustate->program,++S);
reg->b.h=cpustate->program->read_byte(++S);
reg->b.l=cpustate->program->read_byte(++S);
// z flag?
}
INLINE void lh5801_rtn(lh5801_state *cpustate)
{
P=memory_read_byte(cpustate->program,++S)<<8;
P|=memory_read_byte(cpustate->program,++S);
P=cpustate->program->read_byte(++S)<<8;
P|=cpustate->program->read_byte(++S);
}
INLINE void lh5801_rti(lh5801_state *cpustate)
{
P=memory_read_byte(cpustate->program,++S)<<8;
P|=memory_read_byte(cpustate->program,++S);
cpustate->t=memory_read_byte(cpustate->program,++S);
P=cpustate->program->read_byte(++S)<<8;
P|=cpustate->program->read_byte(++S);
cpustate->t=cpustate->program->read_byte(++S);
}
INLINE void lh5801_push(lh5801_state *cpustate, UINT8 data)
{
memory_write_byte(cpustate->program,S--, data);
cpustate->program->write_byte(S--, data);
}
INLINE void lh5801_push_word(lh5801_state *cpustate, UINT16 data)
{
memory_write_byte(cpustate->program,S--, data&0xff);
memory_write_byte(cpustate->program,S--, data>>8);
cpustate->program->write_byte(S--, data&0xff);
cpustate->program->write_byte(S--, data>>8);
}
INLINE void lh5801_jmp(lh5801_state *cpustate, UINT16 adr)
@ -256,8 +256,8 @@ INLINE void lh5801_vector(lh5801_state *cpustate, int doit, int nr)
{
if (doit) {
lh5801_push_word(cpustate,P);
P=memory_read_byte(cpustate->program,0xff00+nr)<<8;
P|=memory_read_byte(cpustate->program,0xff00+nr+1);
P=cpustate->program->read_byte(0xff00+nr)<<8;
P|=cpustate->program->read_byte(0xff00+nr+1);
cpustate->icount-=21-8;
}
cpustate->t&=~Z; // after the jump!?
@ -272,18 +272,18 @@ INLINE void lh5801_aex(lh5801_state *cpustate)
INLINE void lh5801_drl(lh5801_state *cpustate, int adr)
{
UINT16 t=cpustate->a|(memory_read_byte(cpustate->program,adr)<<8);
UINT16 t=cpustate->a|(cpustate->program->read_byte(adr)<<8);
cpustate->a=t>>8;
memory_write_byte(cpustate->program,adr,t>>4);
cpustate->program->write_byte(adr,t>>4);
}
INLINE void lh5801_drr(lh5801_state *cpustate, int adr)
{
UINT16 t=memory_read_byte(cpustate->program,adr)|(cpustate->a<<8);
UINT16 t=cpustate->program->read_byte(adr)|(cpustate->a<<8);
cpustate->a=t;
memory_write_byte(cpustate->program,adr,t>>4);
cpustate->program->write_byte(adr,t>>4);
}
INLINE void lh5801_rol(lh5801_state *cpustate)
@ -351,42 +351,42 @@ static void lh5801_instruction_fd(lh5801_state *cpustate)
oper=memory_decrypted_read_byte(cpustate->program,P++);
switch (oper) {
case 0x01: lh5801_sbc(cpustate,memory_read_byte(cpustate->program,0x10000|X)); cpustate->icount-=11;break;
case 0x03: lh5801_adc(cpustate,memory_read_byte(cpustate->program,0x10000|X)); cpustate->icount-=11;break;
case 0x05: lh5801_lda(cpustate,memory_read_byte(cpustate->program,0x10000|X)); cpustate->icount-=10;break;
case 0x07: lh5801_cpa(cpustate,cpustate->a, memory_read_byte(cpustate->program,0x10000|X)); cpustate->icount-=11;break;
case 0x01: lh5801_sbc(cpustate,cpustate->program->read_byte(0x10000|X)); cpustate->icount-=11;break;
case 0x03: lh5801_adc(cpustate,cpustate->program->read_byte(0x10000|X)); cpustate->icount-=11;break;
case 0x05: lh5801_lda(cpustate,cpustate->program->read_byte(0x10000|X)); cpustate->icount-=10;break;
case 0x07: lh5801_cpa(cpustate,cpustate->a, cpustate->program->read_byte(0x10000|X)); cpustate->icount-=11;break;
case 0x08: X=X;cpustate->icount-=11;break; //!!!
case 0x09: lh5801_and(cpustate,memory_read_byte(cpustate->program,0x10000|X)); cpustate->icount-=11;break;
case 0x09: lh5801_and(cpustate,cpustate->program->read_byte(0x10000|X)); cpustate->icount-=11;break;
case 0x0a: lh5801_pop_word(cpustate,&cpustate->x); cpustate->icount-=15;break;
case 0x0b: lh5801_ora(cpustate,memory_read_byte(cpustate->program,0x10000|X)); cpustate->icount-=11;break;
case 0x0c: lh5801_dcs(cpustate,memory_read_byte(cpustate->program,0x10000|X)); cpustate->icount-=17; break;
case 0x0d: lh5801_eor(cpustate,memory_read_byte(cpustate->program,0x10000|X)); cpustate->icount-=11;break;
case 0x0e: memory_write_byte(cpustate->program,0x10000|X,cpustate->a); cpustate->icount-=10;break;
case 0x0f: lh5801_bit(cpustate,memory_read_byte(cpustate->program,0x10000|X),cpustate->a); cpustate->icount-=11;break;
case 0x11: lh5801_sbc(cpustate,memory_read_byte(cpustate->program,0x10000|Y)); cpustate->icount-=11;break;
case 0x13: lh5801_adc(cpustate,memory_read_byte(cpustate->program,0x10000|Y)); cpustate->icount-=11;break;
case 0x15: lh5801_lda(cpustate,memory_read_byte(cpustate->program,0x10000|Y)); cpustate->icount-=10;break;
case 0x17: lh5801_cpa(cpustate,cpustate->a, memory_read_byte(cpustate->program,0x10000|Y)); cpustate->icount-=11;break;
case 0x0b: lh5801_ora(cpustate,cpustate->program->read_byte(0x10000|X)); cpustate->icount-=11;break;
case 0x0c: lh5801_dcs(cpustate,cpustate->program->read_byte(0x10000|X)); cpustate->icount-=17; break;
case 0x0d: lh5801_eor(cpustate,cpustate->program->read_byte(0x10000|X)); cpustate->icount-=11;break;
case 0x0e: cpustate->program->write_byte(0x10000|X,cpustate->a); cpustate->icount-=10;break;
case 0x0f: lh5801_bit(cpustate,cpustate->program->read_byte(0x10000|X),cpustate->a); cpustate->icount-=11;break;
case 0x11: lh5801_sbc(cpustate,cpustate->program->read_byte(0x10000|Y)); cpustate->icount-=11;break;
case 0x13: lh5801_adc(cpustate,cpustate->program->read_byte(0x10000|Y)); cpustate->icount-=11;break;
case 0x15: lh5801_lda(cpustate,cpustate->program->read_byte(0x10000|Y)); cpustate->icount-=10;break;
case 0x17: lh5801_cpa(cpustate,cpustate->a, cpustate->program->read_byte(0x10000|Y)); cpustate->icount-=11;break;
case 0x18: X=Y;cpustate->icount-=11;break;
case 0x19: lh5801_and(cpustate,memory_read_byte(cpustate->program,0x10000|Y)); cpustate->icount-=11;break;
case 0x19: lh5801_and(cpustate,cpustate->program->read_byte(0x10000|Y)); cpustate->icount-=11;break;
case 0x1a: lh5801_pop_word(cpustate,&cpustate->y); cpustate->icount-=15;break;
case 0x1b: lh5801_ora(cpustate,memory_read_byte(cpustate->program,0x10000|Y)); cpustate->icount-=11;break;
case 0x1c: lh5801_dcs(cpustate,memory_read_byte(cpustate->program,0x10000|Y)); cpustate->icount-=17; break;
case 0x1d: lh5801_eor(cpustate,memory_read_byte(cpustate->program,0x10000|Y)); cpustate->icount-=11;break;
case 0x1e: memory_write_byte(cpustate->program,0x10000|Y,cpustate->a); cpustate->icount-=10;break;
case 0x1f: lh5801_bit(cpustate,memory_read_byte(cpustate->program,0x10000|Y),cpustate->a); cpustate->icount-=11;break;
case 0x21: lh5801_sbc(cpustate,memory_read_byte(cpustate->program,0x10000|U)); cpustate->icount-=11;break;
case 0x23: lh5801_adc(cpustate,memory_read_byte(cpustate->program,0x10000|U)); cpustate->icount-=11;break;
case 0x25: lh5801_lda(cpustate,memory_read_byte(cpustate->program,0x10000|U)); cpustate->icount-=10;break;
case 0x27: lh5801_cpa(cpustate,cpustate->a, memory_read_byte(cpustate->program,0x10000|U)); cpustate->icount-=11;break;
case 0x1b: lh5801_ora(cpustate,cpustate->program->read_byte(0x10000|Y)); cpustate->icount-=11;break;
case 0x1c: lh5801_dcs(cpustate,cpustate->program->read_byte(0x10000|Y)); cpustate->icount-=17; break;
case 0x1d: lh5801_eor(cpustate,cpustate->program->read_byte(0x10000|Y)); cpustate->icount-=11;break;
case 0x1e: cpustate->program->write_byte(0x10000|Y,cpustate->a); cpustate->icount-=10;break;
case 0x1f: lh5801_bit(cpustate,cpustate->program->read_byte(0x10000|Y),cpustate->a); cpustate->icount-=11;break;
case 0x21: lh5801_sbc(cpustate,cpustate->program->read_byte(0x10000|U)); cpustate->icount-=11;break;
case 0x23: lh5801_adc(cpustate,cpustate->program->read_byte(0x10000|U)); cpustate->icount-=11;break;
case 0x25: lh5801_lda(cpustate,cpustate->program->read_byte(0x10000|U)); cpustate->icount-=10;break;
case 0x27: lh5801_cpa(cpustate,cpustate->a, cpustate->program->read_byte(0x10000|U)); cpustate->icount-=11;break;
case 0x28: X=U;cpustate->icount-=11;break;
case 0x29: lh5801_and(cpustate,memory_read_byte(cpustate->program,0x10000|U)); cpustate->icount-=11;break;
case 0x29: lh5801_and(cpustate,cpustate->program->read_byte(0x10000|U)); cpustate->icount-=11;break;
case 0x2a: lh5801_pop_word(cpustate,&cpustate->u); cpustate->icount-=15;break;
case 0x2b: lh5801_ora(cpustate,memory_read_byte(cpustate->program,0x10000|U)); cpustate->icount-=11;break;
case 0x2c: lh5801_dcs(cpustate,memory_read_byte(cpustate->program,0x10000|U)); cpustate->icount-=17; break;
case 0x2d: lh5801_eor(cpustate,memory_read_byte(cpustate->program,0x10000|U)); cpustate->icount-=11;break;
case 0x2e: memory_write_byte(cpustate->program,0x10000|U,cpustate->a); cpustate->icount-=10;break;
case 0x2f: lh5801_bit(cpustate,memory_read_byte(cpustate->program,0x10000|U),cpustate->a); cpustate->icount-=11;break;
case 0x2b: lh5801_ora(cpustate,cpustate->program->read_byte(0x10000|U)); cpustate->icount-=11;break;
case 0x2c: lh5801_dcs(cpustate,cpustate->program->read_byte(0x10000|U)); cpustate->icount-=17; break;
case 0x2d: lh5801_eor(cpustate,cpustate->program->read_byte(0x10000|U)); cpustate->icount-=11;break;
case 0x2e: cpustate->program->write_byte(0x10000|U,cpustate->a); cpustate->icount-=10;break;
case 0x2f: lh5801_bit(cpustate,cpustate->program->read_byte(0x10000|U),cpustate->a); cpustate->icount-=11;break;
case 0x40: lh5801_inc(cpustate,&XH);cpustate->icount-=9;break;
case 0x42: lh5801_dec(cpustate,&XH);cpustate->icount-=9;break;
case 0x48: X=S;cpustate->icount-=11;break;
@ -394,7 +394,7 @@ static void lh5801_instruction_fd(lh5801_state *cpustate)
case 0x4a: X=X;cpustate->icount-=11;break; //!!!
case 0x4b: lh5801_ora_mem(cpustate,0x10000|X, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=17;break;
case 0x4c: cpustate->bf=0;/*off !*/ cpustate->icount-=8;break;
case 0x4d: lh5801_bit(cpustate,memory_read_byte(cpustate->program,X|0x10000), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=14;break;
case 0x4d: lh5801_bit(cpustate,cpustate->program->read_byte(X|0x10000), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=14;break;
case 0x4e: S=X;cpustate->icount-=11;break;
case 0x4f: lh5801_add_mem(cpustate,0x10000|X, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=17;break;
case 0x50: lh5801_inc(cpustate,&YH);cpustate->icount-=9;break;
@ -403,7 +403,7 @@ static void lh5801_instruction_fd(lh5801_state *cpustate)
case 0x59: lh5801_and_mem(cpustate,0x10000|Y, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=17;break;
case 0x5a: Y=X;cpustate->icount-=11;break;
case 0x5b: lh5801_ora_mem(cpustate,0x10000|Y, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=17;break;
case 0x5d: lh5801_bit(cpustate,memory_read_byte(cpustate->program,Y|0x10000), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=14;break;
case 0x5d: lh5801_bit(cpustate,cpustate->program->read_byte(Y|0x10000), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=14;break;
case 0x5e: lh5801_jmp(cpustate,X);cpustate->icount-=11;break; // P=X
case 0x5f: lh5801_add_mem(cpustate,0x10000|Y, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=17;break;
case 0x60: lh5801_inc(cpustate,&UH);cpustate->icount-=9;break;
@ -411,27 +411,27 @@ static void lh5801_instruction_fd(lh5801_state *cpustate)
case 0x69: lh5801_and_mem(cpustate,0x10000|U, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=17;break;
case 0x6a: U=X;cpustate->icount-=11;break;
case 0x6b: lh5801_ora_mem(cpustate,0x10000|U, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=17;break;
case 0x6d: lh5801_bit(cpustate,memory_read_byte(cpustate->program,X|0x10000), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=14;break;
case 0x6d: lh5801_bit(cpustate,cpustate->program->read_byte(X|0x10000), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=14;break;
case 0x6f: lh5801_add_mem(cpustate,0x10000|U, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=17;break;
case 0x81: cpustate->t|=IE; /*sie !*/cpustate->icount-=8;break;
case 0x88: lh5801_push_word(cpustate,X); cpustate->icount-=14;break;
case 0x8a: lh5801_pop(cpustate); cpustate->icount-=12; break;
case 0x8c: lh5801_dca(cpustate,memory_read_byte(cpustate->program,0x10000|X)); cpustate->icount-=19; break;
case 0x8c: lh5801_dca(cpustate,cpustate->program->read_byte(0x10000|X)); cpustate->icount-=19; break;
case 0x8e: /*cdv clears internal devider*/cpustate->icount-=8;break;
case 0x98: lh5801_push_word(cpustate,Y); cpustate->icount-=14;break;
case 0x9c: lh5801_dca(cpustate,memory_read_byte(cpustate->program,0x10000|Y)); cpustate->icount-=19; break;
case 0xa1: lh5801_sbc(cpustate,memory_read_byte(cpustate->program,0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xa3: lh5801_adc(cpustate,memory_read_byte(cpustate->program,0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xa5: lh5801_lda(cpustate,memory_read_byte(cpustate->program,0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=16;break;
case 0xa7: lh5801_cpa(cpustate,cpustate->a, memory_read_byte(cpustate->program,0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0x9c: lh5801_dca(cpustate,cpustate->program->read_byte(0x10000|Y)); cpustate->icount-=19; break;
case 0xa1: lh5801_sbc(cpustate,cpustate->program->read_byte(0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xa3: lh5801_adc(cpustate,cpustate->program->read_byte(0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xa5: lh5801_lda(cpustate,cpustate->program->read_byte(0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=16;break;
case 0xa7: lh5801_cpa(cpustate,cpustate->a, cpustate->program->read_byte(0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xa8: lh5801_push_word(cpustate,U); cpustate->icount-=14;break;
case 0xa9: lh5801_and(cpustate,memory_read_byte(cpustate->program,0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xa9: lh5801_and(cpustate,cpustate->program->read_byte(0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xaa: lh5801_lda(cpustate,cpustate->t); cpustate->icount-=9;break;
case 0xab: lh5801_ora(cpustate,memory_read_byte(cpustate->program,0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xac: lh5801_dca(cpustate,memory_read_byte(cpustate->program,0x10000|U)); cpustate->icount-=19; break;
case 0xad: lh5801_eor(cpustate,memory_read_byte(cpustate->program,0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xae: memory_write_byte(cpustate->program,0x10000|lh5801_readop_word(cpustate),cpustate->a); cpustate->icount-=16;break;
case 0xaf: lh5801_bit(cpustate,memory_read_byte(cpustate->program,0x10000|lh5801_readop_word(cpustate)),cpustate->a); cpustate->icount-=17;break;
case 0xab: lh5801_ora(cpustate,cpustate->program->read_byte(0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xac: lh5801_dca(cpustate,cpustate->program->read_byte(0x10000|U)); cpustate->icount-=19; break;
case 0xad: lh5801_eor(cpustate,cpustate->program->read_byte(0x10000|lh5801_readop_word(cpustate))); cpustate->icount-=17;break;
case 0xae: cpustate->program->write_byte(0x10000|lh5801_readop_word(cpustate),cpustate->a); cpustate->icount-=16;break;
case 0xaf: lh5801_bit(cpustate,cpustate->program->read_byte(0x10000|lh5801_readop_word(cpustate)),cpustate->a); cpustate->icount-=17;break;
case 0xb1: /*hlt*/cpustate->icount-=8;break;
case 0xba: lh5801_ita(cpustate);cpustate->icount-=9;break;
case 0xbe: cpustate->t&=~IE; /*rie !*/cpustate->icount-=8;break;
@ -456,7 +456,7 @@ static void lh5801_instruction_fd(lh5801_state *cpustate)
break;
case 0xec: cpustate->t=cpustate->a; cpustate->icount-=9;break;
case 0xed:
adr=lh5801_readop_word(cpustate)|0x10000;lh5801_bit(cpustate,memory_read_byte(cpustate->program,adr), memory_decrypted_read_byte(cpustate->program,P++));
adr=lh5801_readop_word(cpustate)|0x10000;lh5801_bit(cpustate,cpustate->program->read_byte(adr), memory_decrypted_read_byte(cpustate->program,P++));
cpustate->icount-=20;break;
case 0xef:
adr=lh5801_readop_word(cpustate)|0x10000;
@ -476,53 +476,53 @@ static void lh5801_instruction(lh5801_state *cpustate)
oper=memory_decrypted_read_byte(cpustate->program,P++);
switch (oper) {
case 0x00: lh5801_sbc(cpustate,XL); cpustate->icount-=6;break;
case 0x01: lh5801_sbc(cpustate,memory_read_byte(cpustate->program,X)); cpustate->icount-=7;break;
case 0x01: lh5801_sbc(cpustate,cpustate->program->read_byte(X)); cpustate->icount-=7;break;
case 0x02: lh5801_adc(cpustate,XL); cpustate->icount-=6;break;
case 0x03: lh5801_adc(cpustate,memory_read_byte(cpustate->program,X)); cpustate->icount-=7;break;
case 0x03: lh5801_adc(cpustate,cpustate->program->read_byte(X)); cpustate->icount-=7;break;
case 0x04: lh5801_lda(cpustate,XL); cpustate->icount-=5;break;
case 0x05: lh5801_lda(cpustate,memory_read_byte(cpustate->program,X)); cpustate->icount-=6;break;
case 0x05: lh5801_lda(cpustate,cpustate->program->read_byte(X)); cpustate->icount-=6;break;
case 0x06: lh5801_cpa(cpustate,cpustate->a, XL); cpustate->icount-=6;break;
case 0x07: lh5801_cpa(cpustate,cpustate->a, memory_read_byte(cpustate->program,X)); cpustate->icount-=7;break;
case 0x07: lh5801_cpa(cpustate,cpustate->a, cpustate->program->read_byte(X)); cpustate->icount-=7;break;
case 0x08: XH=cpustate->a; cpustate->icount-=5; break;
case 0x09: lh5801_and(cpustate,memory_read_byte(cpustate->program,X)); cpustate->icount-=7;break;
case 0x09: lh5801_and(cpustate,cpustate->program->read_byte(X)); cpustate->icount-=7;break;
case 0x0a: XL=cpustate->a; cpustate->icount-=5; break;
case 0x0b: lh5801_ora(cpustate,memory_read_byte(cpustate->program,X)); cpustate->icount-=7;break;
case 0x0c: lh5801_dcs(cpustate,memory_read_byte(cpustate->program,X)); cpustate->icount-=13; break;
case 0x0d: lh5801_eor(cpustate,memory_read_byte(cpustate->program,X)); cpustate->icount-=7;break;
case 0x0e: memory_write_byte(cpustate->program,X,cpustate->a); cpustate->icount-=6;break;
case 0x0f: lh5801_bit(cpustate,memory_read_byte(cpustate->program,X),cpustate->a); cpustate->icount-=7;break;
case 0x0b: lh5801_ora(cpustate,cpustate->program->read_byte(X)); cpustate->icount-=7;break;
case 0x0c: lh5801_dcs(cpustate,cpustate->program->read_byte(X)); cpustate->icount-=13; break;
case 0x0d: lh5801_eor(cpustate,cpustate->program->read_byte(X)); cpustate->icount-=7;break;
case 0x0e: cpustate->program->write_byte(X,cpustate->a); cpustate->icount-=6;break;
case 0x0f: lh5801_bit(cpustate,cpustate->program->read_byte(X),cpustate->a); cpustate->icount-=7;break;
case 0x10: lh5801_sbc(cpustate,YL); cpustate->icount-=6;break;
case 0x11: lh5801_sbc(cpustate,memory_read_byte(cpustate->program,Y)); cpustate->icount-=7;break;
case 0x11: lh5801_sbc(cpustate,cpustate->program->read_byte(Y)); cpustate->icount-=7;break;
case 0x12: lh5801_adc(cpustate,YL); cpustate->icount-=6;break;
case 0x13: lh5801_adc(cpustate,memory_read_byte(cpustate->program,Y)); cpustate->icount-=7;break;
case 0x13: lh5801_adc(cpustate,cpustate->program->read_byte(Y)); cpustate->icount-=7;break;
case 0x14: lh5801_lda(cpustate,YL); cpustate->icount-=5;break;
case 0x15: lh5801_lda(cpustate,memory_read_byte(cpustate->program,Y)); cpustate->icount-=6;break;
case 0x15: lh5801_lda(cpustate,cpustate->program->read_byte(Y)); cpustate->icount-=6;break;
case 0x16: lh5801_cpa(cpustate,cpustate->a, YL); cpustate->icount-=6;break;
case 0x17: lh5801_cpa(cpustate,cpustate->a, memory_read_byte(cpustate->program,Y)); cpustate->icount-=7;break;
case 0x17: lh5801_cpa(cpustate,cpustate->a, cpustate->program->read_byte(Y)); cpustate->icount-=7;break;
case 0x18: YH=cpustate->a; cpustate->icount-=5; break;
case 0x19: lh5801_and(cpustate,memory_read_byte(cpustate->program,Y)); cpustate->icount-=7;break;
case 0x19: lh5801_and(cpustate,cpustate->program->read_byte(Y)); cpustate->icount-=7;break;
case 0x1a: YL=cpustate->a; cpustate->icount-=5; break;
case 0x1b: lh5801_ora(cpustate,memory_read_byte(cpustate->program,Y)); cpustate->icount-=7;break;
case 0x1c: lh5801_dcs(cpustate,memory_read_byte(cpustate->program,Y)); cpustate->icount-=13; break;
case 0x1d: lh5801_eor(cpustate,memory_read_byte(cpustate->program,Y)); cpustate->icount-=7;break;
case 0x1e: memory_write_byte(cpustate->program,Y,cpustate->a); cpustate->icount-=6;break;
case 0x1f: lh5801_bit(cpustate,memory_read_byte(cpustate->program,Y),cpustate->a); cpustate->icount-=7;break;
case 0x1b: lh5801_ora(cpustate,cpustate->program->read_byte(Y)); cpustate->icount-=7;break;
case 0x1c: lh5801_dcs(cpustate,cpustate->program->read_byte(Y)); cpustate->icount-=13; break;
case 0x1d: lh5801_eor(cpustate,cpustate->program->read_byte(Y)); cpustate->icount-=7;break;
case 0x1e: cpustate->program->write_byte(Y,cpustate->a); cpustate->icount-=6;break;
case 0x1f: lh5801_bit(cpustate,cpustate->program->read_byte(Y),cpustate->a); cpustate->icount-=7;break;
case 0x20: lh5801_sbc(cpustate,UL); cpustate->icount-=6;break;
case 0x21: lh5801_sbc(cpustate,memory_read_byte(cpustate->program,U)); cpustate->icount-=7;break;
case 0x21: lh5801_sbc(cpustate,cpustate->program->read_byte(U)); cpustate->icount-=7;break;
case 0x22: lh5801_adc(cpustate,UL); cpustate->icount-=6;break;
case 0x23: lh5801_adc(cpustate,memory_read_byte(cpustate->program,U)); cpustate->icount-=7;break;
case 0x23: lh5801_adc(cpustate,cpustate->program->read_byte(U)); cpustate->icount-=7;break;
case 0x24: lh5801_lda(cpustate,UL); cpustate->icount-=5;break;
case 0x25: lh5801_lda(cpustate,memory_read_byte(cpustate->program,U)); cpustate->icount-=6;break;
case 0x25: lh5801_lda(cpustate,cpustate->program->read_byte(U)); cpustate->icount-=6;break;
case 0x26: lh5801_cpa(cpustate,cpustate->a, UL); cpustate->icount-=6;break;
case 0x27: lh5801_cpa(cpustate,cpustate->a, memory_read_byte(cpustate->program,U)); cpustate->icount-=7;break;
case 0x27: lh5801_cpa(cpustate,cpustate->a, cpustate->program->read_byte(U)); cpustate->icount-=7;break;
case 0x28: UH=cpustate->a; cpustate->icount-=5; break;
case 0x29: lh5801_and(cpustate,memory_read_byte(cpustate->program,U)); cpustate->icount-=7;break;
case 0x29: lh5801_and(cpustate,cpustate->program->read_byte(U)); cpustate->icount-=7;break;
case 0x2a: UL=cpustate->a; cpustate->icount-=5; break;
case 0x2b: lh5801_ora(cpustate,memory_read_byte(cpustate->program,U)); cpustate->icount-=7;break;
case 0x2c: lh5801_dcs(cpustate,memory_read_byte(cpustate->program,U)); cpustate->icount-=13; break;
case 0x2d: lh5801_eor(cpustate,memory_read_byte(cpustate->program,U)); cpustate->icount-=7;break;
case 0x2e: memory_write_byte(cpustate->program,U,cpustate->a); cpustate->icount-=6;break;
case 0x2f: lh5801_bit(cpustate,memory_read_byte(cpustate->program,U),cpustate->a); cpustate->icount-=7;break;
case 0x2b: lh5801_ora(cpustate,cpustate->program->read_byte(U)); cpustate->icount-=7;break;
case 0x2c: lh5801_dcs(cpustate,cpustate->program->read_byte(U)); cpustate->icount-=13; break;
case 0x2d: lh5801_eor(cpustate,cpustate->program->read_byte(U)); cpustate->icount-=7;break;
case 0x2e: cpustate->program->write_byte(U,cpustate->a); cpustate->icount-=6;break;
case 0x2f: lh5801_bit(cpustate,cpustate->program->read_byte(U),cpustate->a); cpustate->icount-=7;break;
case 0x38: /*nop*/cpustate->icount-=5;break;
case 0x40: lh5801_inc(cpustate,&XL);cpustate->icount-=5;break;
case 0x41: lh5801_sin(cpustate,&cpustate->x); cpustate->icount-=6;break;
@ -537,7 +537,7 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0x4a: XL=memory_decrypted_read_byte(cpustate->program,P++);cpustate->icount-=6;break;
case 0x4b: lh5801_ora_mem(cpustate,X, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=13;break;
case 0x4c: lh5801_cpa(cpustate,XH, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=7;break;
case 0x4d: lh5801_bit(cpustate,memory_read_byte(cpustate->program,X), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=10;break;
case 0x4d: lh5801_bit(cpustate,cpustate->program->read_byte(X), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=10;break;
case 0x4e: lh5801_cpa(cpustate,XL, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=7;break;
case 0x4f: lh5801_add_mem(cpustate,X, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=13;break;
case 0x50: lh5801_inc(cpustate,&YL);cpustate->icount-=5;break;
@ -553,7 +553,7 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0x5a: YL=memory_decrypted_read_byte(cpustate->program,P++);cpustate->icount-=6;break;
case 0x5b: lh5801_ora_mem(cpustate,Y, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=13;break;
case 0x5c: lh5801_cpa(cpustate,YH, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=7;break;
case 0x5d: lh5801_bit(cpustate,memory_read_byte(cpustate->program,Y), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=10;break;
case 0x5d: lh5801_bit(cpustate,cpustate->program->read_byte(Y), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=10;break;
case 0x5e: lh5801_cpa(cpustate,YL, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=7;break;
case 0x5f: lh5801_add_mem(cpustate,Y, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=13;break;
case 0x60: lh5801_inc(cpustate,&UL);cpustate->icount-=5;break;
@ -569,7 +569,7 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0x6a: UL=memory_decrypted_read_byte(cpustate->program,P++);cpustate->icount-=6;break;
case 0x6b: lh5801_ora_mem(cpustate,U, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=13;break;
case 0x6c: lh5801_cpa(cpustate,UH, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=7;break;
case 0x6d: lh5801_bit(cpustate,memory_read_byte(cpustate->program,U), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=10;break;
case 0x6d: lh5801_bit(cpustate,cpustate->program->read_byte(U), memory_decrypted_read_byte(cpustate->program,P++));cpustate->icount-=10;break;
case 0x6e: lh5801_cpa(cpustate,UL, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=7;break;
case 0x6f: lh5801_add_mem(cpustate,U, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=13;break;
case 0x80: lh5801_sbc(cpustate,XH); cpustate->icount-=6;break;
@ -584,7 +584,7 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0x89: lh5801_branch_plus(cpustate,!(cpustate->t&Z)); cpustate->icount-=8; break;
case 0x8a: lh5801_rti(cpustate); cpustate->icount-=14; break;
case 0x8b: lh5801_branch_plus(cpustate,cpustate->t&Z); cpustate->icount-=8; break;
case 0x8c: lh5801_dca(cpustate,memory_read_byte(cpustate->program,X)); cpustate->icount-=15; break;
case 0x8c: lh5801_dca(cpustate,cpustate->program->read_byte(X)); cpustate->icount-=15; break;
case 0x8d: lh5801_branch_plus(cpustate,!(cpustate->t&V)); cpustate->icount-=8; break;
case 0x8e: lh5801_branch_plus(cpustate,1); cpustate->icount-=5; break;
case 0x8f: lh5801_branch_plus(cpustate,cpustate->t&V); cpustate->icount-=8; break;
@ -599,26 +599,26 @@ static void lh5801_instruction(lh5801_state *cpustate)
case 0x99: lh5801_branch_minus(cpustate,!(cpustate->t&Z)); cpustate->icount-=8; break;
case 0x9a: lh5801_rtn(cpustate); cpustate->icount-=11; break;
case 0x9b: lh5801_branch_minus(cpustate,cpustate->t&Z); cpustate->icount-=8; break;
case 0x9c: lh5801_dca(cpustate,memory_read_byte(cpustate->program,Y)); cpustate->icount-=15; break;
case 0x9c: lh5801_dca(cpustate,cpustate->program->read_byte(Y)); cpustate->icount-=15; break;
case 0x9d: lh5801_branch_minus(cpustate,!(cpustate->t&V)); cpustate->icount-=8; break;
case 0x9e: lh5801_branch_minus(cpustate,1); cpustate->icount-=6; break;
case 0x9f: lh5801_branch_minus(cpustate,cpustate->t&V); cpustate->icount-=8; break;
case 0xa0: lh5801_sbc(cpustate,UH); cpustate->icount-=6;break;
case 0xa2: lh5801_adc(cpustate,UH); cpustate->icount-=6;break;
case 0xa1: lh5801_sbc(cpustate,memory_read_byte(cpustate->program,lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xa3: lh5801_adc(cpustate,memory_read_byte(cpustate->program,lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xa1: lh5801_sbc(cpustate,cpustate->program->read_byte(lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xa3: lh5801_adc(cpustate,cpustate->program->read_byte(lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xa4: lh5801_lda(cpustate,UH); cpustate->icount-=5;break;
case 0xa5: lh5801_lda(cpustate,memory_read_byte(cpustate->program,lh5801_readop_word(cpustate))); cpustate->icount-=12;break;
case 0xa5: lh5801_lda(cpustate,cpustate->program->read_byte(lh5801_readop_word(cpustate))); cpustate->icount-=12;break;
case 0xa6: lh5801_cpa(cpustate,cpustate->a, UH); cpustate->icount-=6;break;
case 0xa7: lh5801_cpa(cpustate,cpustate->a, memory_read_byte(cpustate->program,lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xa7: lh5801_cpa(cpustate,cpustate->a, cpustate->program->read_byte(lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xa8: cpustate->pv=1;/*spv!*/ cpustate->icount-=4; break;
case 0xa9: lh5801_and(cpustate,memory_read_byte(cpustate->program,lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xa9: lh5801_and(cpustate,cpustate->program->read_byte(lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xaa: S=lh5801_readop_word(cpustate);cpustate->icount-=6;break;
case 0xab: lh5801_ora(cpustate,memory_read_byte(cpustate->program,lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xac: lh5801_dca(cpustate,memory_read_byte(cpustate->program,U)); cpustate->icount-=15; break;
case 0xad: lh5801_eor(cpustate,memory_read_byte(cpustate->program,lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xae: memory_write_byte(cpustate->program,lh5801_readop_word(cpustate),cpustate->a); cpustate->icount-=12;break;
case 0xaf: lh5801_bit(cpustate,memory_read_byte(cpustate->program,lh5801_readop_word(cpustate)),cpustate->a); cpustate->icount-=13;break;
case 0xab: lh5801_ora(cpustate,cpustate->program->read_byte(lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xac: lh5801_dca(cpustate,cpustate->program->read_byte(U)); cpustate->icount-=15; break;
case 0xad: lh5801_eor(cpustate,cpustate->program->read_byte(lh5801_readop_word(cpustate))); cpustate->icount-=13;break;
case 0xae: cpustate->program->write_byte(lh5801_readop_word(cpustate),cpustate->a); cpustate->icount-=12;break;
case 0xaf: lh5801_bit(cpustate,cpustate->program->read_byte(lh5801_readop_word(cpustate)),cpustate->a); cpustate->icount-=13;break;
case 0xb1: lh5801_sbc(cpustate,memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=7;break;
case 0xb3: lh5801_adc(cpustate,memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=7;break;
case 0xb5: lh5801_lda(cpustate,memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=6;break;
@ -655,15 +655,15 @@ static void lh5801_instruction(lh5801_state *cpustate)
adr=lh5801_readop_word(cpustate);lh5801_ora_mem(cpustate,adr, memory_decrypted_read_byte(cpustate->program,P++));
cpustate->icount-=19;break;
case 0xed:
adr=lh5801_readop_word(cpustate);lh5801_bit(cpustate,memory_read_byte(cpustate->program,adr), memory_decrypted_read_byte(cpustate->program,P++));
adr=lh5801_readop_word(cpustate);lh5801_bit(cpustate,cpustate->program->read_byte(adr), memory_decrypted_read_byte(cpustate->program,P++));
cpustate->icount-=16;break;
case 0xef:
adr=lh5801_readop_word(cpustate);
lh5801_add_mem(cpustate,adr, memory_decrypted_read_byte(cpustate->program,P++)); cpustate->icount-=19;
break;
case 0xf1: lh5801_aex(cpustate); cpustate->icount-=6; break;
case 0xf5: memory_write_byte(cpustate->program,Y++, memory_read_byte(cpustate->program,X++)); cpustate->icount-=7; break; //tin
case 0xf7: lh5801_cpa(cpustate,cpustate->a, memory_read_byte(cpustate->program,X++));cpustate->icount-=7; break; //cin
case 0xf5: cpustate->program->write_byte(Y++, cpustate->program->read_byte(X++)); cpustate->icount-=7; break; //tin
case 0xf7: lh5801_cpa(cpustate,cpustate->a, cpustate->program->read_byte(X++));cpustate->icount-=7; break; //cin
case 0xf9: cpustate->t&=~C;cpustate->icount-=4;break;
case 0xfb: cpustate->t|=C;cpustate->icount-=4;break;
case 0xfd: lh5801_instruction_fd(cpustate);break;

2
src/emu/cpu/lh5801/lh5801.c
View File

@ -112,7 +112,7 @@ static CPU_RESET( lh5801 )
{
lh5801_state *cpustate = get_safe_token(device);
P = (memory_read_byte(cpustate->program, 0xfffe)<<8) | memory_read_byte(cpustate->program, 0xffff);
P = (cpustate->program->read_byte(0xfffe)<<8) | cpustate->program->read_byte(0xffff);
cpustate->idle=0;
}

4
src/emu/cpu/lr35902/lr35902.c
View File

@ -129,8 +129,8 @@ typedef int (*OpcodeEmulator) (lr35902_state *cpustate);
/* Memory functions */
/****************************************************************************/
#define mem_ReadByte(cs,A) ((UINT8)memory_read_byte_8le((cs)->w.program,A))
#define mem_WriteByte(cs,A,V) (memory_write_byte_8le((cs)->w.program,A,V))
#define mem_ReadByte(cs,A) ((UINT8)(cs)->w.program->read_byte(A))
#define mem_WriteByte(cs,A,V) ((cs)->w.program->write_byte(A,V))
INLINE UINT16 mem_ReadWord (lr35902_state *cpustate, UINT32 address)
{

68
src/emu/cpu/m37710/m37710.c
View File

@ -405,56 +405,56 @@ static UINT8 m37710_internal_r(m37710i_cpu_struct *cpustate, int offset)
switch (offset)
{
case 2: // p0
return memory_read_byte_8le(cpustate->io, M37710_PORT0);
return cpustate->io->read_byte(M37710_PORT0);
case 3: // p1
return memory_read_byte_8le(cpustate->io, M37710_PORT1);
return cpustate->io->read_byte(M37710_PORT1);
case 6: // p2
return memory_read_byte_8le(cpustate->io, M37710_PORT2);
return cpustate->io->read_byte(M37710_PORT2);
case 7: // p3
return memory_read_byte_8le(cpustate->io, M37710_PORT3);
return cpustate->io->read_byte(M37710_PORT3);
case 0xa: // p4
return memory_read_byte_8le(cpustate->io, M37710_PORT4);
return cpustate->io->read_byte(M37710_PORT4);
case 0xb: // p5
return memory_read_byte_8le(cpustate->io, M37710_PORT5);
return cpustate->io->read_byte(M37710_PORT5);
case 0xe: // p6
return memory_read_byte_8le(cpustate->io, M37710_PORT6);
return cpustate->io->read_byte(M37710_PORT6);
case 0xf: // p7
return memory_read_byte_8le(cpustate->io, M37710_PORT7);
return cpustate->io->read_byte(M37710_PORT7);
case 0x12: // p8
return memory_read_byte_8le(cpustate->io, M37710_PORT8);
return cpustate->io->read_byte(M37710_PORT8);
case 0x20:
return memory_read_byte_8le(cpustate->io, M37710_ADC0_L);
return cpustate->io->read_byte(M37710_ADC0_L);
case 0x21:
return memory_read_byte_8le(cpustate->io, M37710_ADC0_H);
return cpustate->io->read_byte(M37710_ADC0_H);
case 0x22:
return memory_read_byte_8le(cpustate->io, M37710_ADC1_L);
return cpustate->io->read_byte(M37710_ADC1_L);
case 0x23:
return memory_read_byte_8le(cpustate->io, M37710_ADC1_H);
return cpustate->io->read_byte(M37710_ADC1_H);
case 0x24:
return memory_read_byte_8le(cpustate->io, M37710_ADC2_L);
return cpustate->io->read_byte(M37710_ADC2_L);
case 0x25:
return memory_read_byte_8le(cpustate->io, M37710_ADC2_H);
return cpustate->io->read_byte(M37710_ADC2_H);
case 0x26:
return memory_read_byte_8le(cpustate->io, M37710_ADC3_L);
return cpustate->io->read_byte(M37710_ADC3_L);
case 0x27:
return memory_read_byte_8le(cpustate->io, M37710_ADC3_H);
return cpustate->io->read_byte(M37710_ADC3_H);
case 0x28:
return memory_read_byte_8le(cpustate->io, M37710_ADC4_L);
return cpustate->io->read_byte(M37710_ADC4_L);
case 0x29:
return memory_read_byte_8le(cpustate->io, M37710_ADC4_H);
return cpustate->io->read_byte(M37710_ADC4_H);
case 0x2a:
return memory_read_byte_8le(cpustate->io, M37710_ADC5_L);
return cpustate->io->read_byte(M37710_ADC5_L);
case 0x2b:
return memory_read_byte_8le(cpustate->io, M37710_ADC5_H);
return cpustate->io->read_byte(M37710_ADC5_H);
case 0x2c:
return memory_read_byte_8le(cpustate->io, M37710_ADC6_L);
return cpustate->io->read_byte(M37710_ADC6_L);
case 0x2d:
return memory_read_byte_8le(cpustate->io, M37710_ADC6_H);
return cpustate->io->read_byte(M37710_ADC6_H);
case 0x2e:
return memory_read_byte_8le(cpustate->io, M37710_ADC7_L);
return cpustate->io->read_byte(M37710_ADC7_L);
case 0x2f:
return memory_read_byte_8le(cpustate->io, M37710_ADC7_H);
return cpustate->io->read_byte(M37710_ADC7_H);
case 0x35:
return 0xff; // UART control
@ -472,31 +472,31 @@ static void m37710_internal_w(m37710i_cpu_struct *cpustate, int offset, UINT8 da
switch(offset)
{
case 2: // p0
memory_write_byte_8le(cpustate->io, M37710_PORT0, data);
cpustate->io->write_byte(M37710_PORT0, data);
return;
case 3: // p1
memory_write_byte_8le(cpustate->io, M37710_PORT1, data);
cpustate->io->write_byte(M37710_PORT1, data);
return;
case 6: // p2
memory_write_byte_8le(cpustate->io, M37710_PORT2, data);
cpustate->io->write_byte(M37710_PORT2, data);
return;
case 7: // p3
memory_write_byte_8le(cpustate->io, M37710_PORT3, data);
cpustate->io->write_byte(M37710_PORT3, data);
return;
case 0xa: // p4
memory_write_byte_8le(cpustate->io, M37710_PORT4, data);
cpustate->io->write_byte(M37710_PORT4, data);
return;
case 0xb: // p5
memory_write_byte_8le(cpustate->io, M37710_PORT5, data);
cpustate->io->write_byte(M37710_PORT5, data);
return;
case 0xe: // p6
memory_write_byte_8le(cpustate->io, M37710_PORT6, data);
cpustate->io->write_byte(M37710_PORT6, data);
return;
case 0xf: // p7
memory_write_byte_8le(cpustate->io, M37710_PORT7, data);
cpustate->io->write_byte(M37710_PORT7, data);
return;
case 0x12: // p8
memory_write_byte_8le(cpustate->io, M37710_PORT8, data);
cpustate->io->write_byte(M37710_PORT8, data);
return;
case 0x40: // count start

10
src/emu/cpu/m37710/m37710cm.h
View File

@ -22,11 +22,11 @@
#undef M37710_CALL_DEBUGGER
#define M37710_CALL_DEBUGGER(x) debugger_instruction_hook(cpustate->device, x)
#define m37710_read_8(addr) memory_read_byte_16le(cpustate->program, addr)
#define m37710_write_8(addr,data) memory_write_byte_16le(cpustate->program, addr,data)
#define m37710_read_8_immediate(A) memory_read_byte_16le(cpustate->program, A)
#define m37710_read_16(addr) memory_read_word_16le(cpustate->program, addr)
#define m37710_write_16(addr,data) memory_write_word_16le(cpustate->program, addr,data)
#define m37710_read_8(addr) cpustate->program->read_byte(addr)
#define m37710_write_8(addr,data) cpustate->program->write_byte(addr,data)
#define m37710_read_8_immediate(A) cpustate->program->read_byte(A)
#define m37710_read_16(addr) cpustate->program->read_word(addr)
#define m37710_write_16(addr,data) cpustate->program->write_word(addr,data)
#define m37710_jumping(A)
#define m37710_branching(A)

4
src/emu/cpu/m6502/m4510.c
View File

@ -185,12 +185,12 @@ INLINE int m4510_cpu_readop_arg(m4510_Regs *cpustate)
static UINT8 default_rdmem_id(address_space *space, offs_t address)
{
m4510_Regs *cpustate = get_safe_token(space->cpu);
return memory_read_byte_8le(space, M4510_MEM(address));
return space->read_byte(M4510_MEM(address));
}
static void default_wrmem_id(address_space *space, offs_t address, UINT8 data)
{
m4510_Regs *cpustate = get_safe_token(space->cpu);
memory_write_byte_8le(space, M4510_MEM(address), data);
space->write_byte(M4510_MEM(address), data);
}
static CPU_INIT( m4510 )

4
src/emu/cpu/m6502/m6502.c
View File

@ -99,8 +99,8 @@ INLINE m6502_Regs *get_safe_token(running_device *device)
return (m6502_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
static UINT8 default_rdmem_id(address_space *space, offs_t offset) { return memory_read_byte_8le(space, offset); }
static void default_wdmem_id(address_space *space, offs_t offset, UINT8 data) { memory_write_byte_8le(space, offset, data); }
static UINT8 default_rdmem_id(address_space *space, offs_t offset) { return space->read_byte(offset); }
static void default_wdmem_id(address_space *space, offs_t offset, UINT8 data) { space->write_byte(offset, data); }
/***************************************************************
* include the opcode macros, functions and tables

4
src/emu/cpu/m6502/m6509.c
View File

@ -134,8 +134,8 @@ static ADDRESS_MAP_START(m6509_mem, ADDRESS_SPACE_PROGRAM, 8)
AM_RANGE(0x00001, 0x00001) AM_MIRROR(0xF0000) AM_READWRITE(m6509_read_00001, m6509_write_00001)
ADDRESS_MAP_END
static UINT8 default_rdmem_id(address_space *space, offs_t address) { return memory_read_byte_8le(space, address); }
static void default_wdmem_id(address_space *space, offs_t address, UINT8 data) { memory_write_byte_8le(space, address, data); }
static UINT8 default_rdmem_id(address_space *space, offs_t address) { return space->read_byte(address); }
static void default_wdmem_id(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
static CPU_INIT( m6509 )
{

4
src/emu/cpu/m6502/m65ce02.c
View File

@ -94,8 +94,8 @@ INLINE m65ce02_Regs *get_safe_token(running_device *device)
#include "t65ce02.c"
static UINT8 default_rdmem_id(address_space *space, offs_t address) { return memory_read_byte_8le(space, address); }
static void default_wdmem_id(address_space *space, offs_t address, UINT8 data) { memory_write_byte_8le(space, address, data); }
static UINT8 default_rdmem_id(address_space *space, offs_t address) { return space->read_byte(address); }
static void default_wdmem_id(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
static CPU_INIT( m65ce02 )
{

4
src/emu/cpu/m6502/minc4510.h
View File

@ -54,8 +54,8 @@
#define PEEK_OP() memory_decrypted_read_byte(cpustate->space, M4510_MEM(PCW))
#define RDMEM(addr) memory_read_byte_8le(cpustate->space, M4510_MEM(addr)); cpustate->icount -= 1
#define WRMEM(addr,data) memory_write_byte_8le(cpustate->space, M4510_MEM(addr),data); cpustate->icount -= 1
#define RDMEM(addr) cpustate->space->read_byte(M4510_MEM(addr)); cpustate->icount -= 1
#define WRMEM(addr,data) cpustate->space->write_byte(M4510_MEM(addr),data); cpustate->icount -= 1
/***************************************************************
* RDOP read an opcode

4
src/emu/cpu/m6502/mincce02.h
View File

@ -65,5 +65,5 @@
#define PEEK_OP() memory_decrypted_read_byte(cpustate->space, PCW)
#define RDMEM(addr) memory_read_byte_8le(cpustate->space, addr); cpustate->icount -= 1
#define WRMEM(addr,data) memory_write_byte_8le(cpustate->space, addr,data); cpustate->icount -= 1
#define RDMEM(addr) cpustate->space->read_byte(addr); cpustate->icount -= 1
#define WRMEM(addr,data) cpustate->space->write_byte(addr,data); cpustate->icount -= 1

4
src/emu/cpu/m6502/ops02.h
View File

@ -81,12 +81,12 @@
/***************************************************************
* RDMEM read memory
***************************************************************/
#define RDMEM(addr) memory_read_byte_8le(cpustate->space, addr); cpustate->icount -= 1
#define RDMEM(addr) cpustate->space->read_byte(addr); cpustate->icount -= 1
/***************************************************************
* WRMEM write memory
***************************************************************/
#define WRMEM(addr,data) memory_write_byte_8le(cpustate->space, addr,data); cpustate->icount -= 1
#define WRMEM(addr,data) cpustate->space->write_byte(addr,data); cpustate->icount -= 1
/***************************************************************
* BRA branch relative

4
src/emu/cpu/m6502/ops09.h
View File

@ -46,13 +46,13 @@
* RDMEM read memory
***************************************************************/
#undef RDMEM
#define RDMEM(addr) memory_read_byte_8le(cpustate->space, addr); cpustate->icount -= 1
#define RDMEM(addr) cpustate->space->read_byte(addr); cpustate->icount -= 1
/***************************************************************
* WRMEM write memory
***************************************************************/
#undef WRMEM
#define WRMEM(addr,data) memory_write_byte_8le(cpustate->space, addr,data); cpustate->icount -= 1
#define WRMEM(addr,data) cpustate->space->write_byte(addr,data); cpustate->icount -= 1
/***************************************************************
* push a register onto the stack

6
src/emu/cpu/m6502/tdeco16.c
View File

@ -188,7 +188,7 @@ OP(27) { RD_DUM; ILL; } /* 2 ILL / 5 RMB2 ZPG ?? */
OP(47) { RD_DUM; ILL; } /* 2 ILL / 5 RMB4 ZPG ?? */
OP(67) {
int tmp; RD_IMM;
cpustate->a=memory_read_byte_8le(cpustate->io,0);
cpustate->a=cpustate->io->read_byte(0);
// logerror("%04x: VBL (0x67)\n",PCW);
@ -274,7 +274,7 @@ OP(2b) { RD_DUM; ILL; } /* 2 ILL */
OP(4b) { int tmp; cpustate->icount -= 1; RD_IMM;
//logerror("%04x: OP4B %02x\n",PCW,tmp);
/* TODO: Maybe it's just read I/O 0 and do a logic AND with bit 1? */
cpustate->a=memory_read_byte_8le(cpustate->io,1);
cpustate->a=cpustate->io->read_byte(1);
//tilt??
@ -367,7 +367,7 @@ OP(8f) { int tmp; cpustate->icount -= 1; RD_IMM;
if (DECO16_VERBOSE)
logerror("%04x: BANK (8F) %02x\n",PCW,tmp);
memory_write_byte_8le(cpustate->io,0,tmp);
cpustate->io->write_byte(0,tmp);
//swap bank in/out
} /* */

68
src/emu/cpu/m6800/m6800.c
View File

@ -206,12 +206,12 @@ static UINT32 timer_next;
/****************************************************************************/
/* Read a byte from given memory location */
/****************************************************************************/
#define RM(Addr) ((unsigned)memory_read_byte_8be(cpustate->program, Addr))
#define RM(Addr) ((unsigned)cpustate->program->read_byte(Addr))
/****************************************************************************/
/* Write a byte to given memory location */
/****************************************************************************/
#define WM(Addr,Value) (memory_write_byte_8be(cpustate->program, Addr,Value))
#define WM(Addr,Value) (cpustate->program->write_byte(Addr,Value))
/****************************************************************************/
/* M6800_RDOP() is identical to M6800_RDMEM() except it is used for reading */
@ -675,15 +675,15 @@ static void m6800_tx(m6800_state *cpustate, int value)
cpustate->port2_data = (cpustate->port2_data & 0xef) | (value << 4);
if(cpustate->port2_ddr == 0xff)
memory_write_byte_8be(cpustate->io, M6803_PORT2,cpustate->port2_data);
cpustate->io->write_byte(M6803_PORT2,cpustate->port2_data);
else
memory_write_byte_8be(cpustate->io, M6803_PORT2,(cpustate->port2_data & cpustate->port2_ddr)
| (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff)));
cpustate->io->write_byte(M6803_PORT2,(cpustate->port2_data & cpustate->port2_ddr)
| (cpustate->io->read_byte(M6803_PORT2) & (cpustate->port2_ddr ^ 0xff)));
}
static int m6800_rx(m6800_state *cpustate)
{
return (memory_read_byte_8be(cpustate->io, M6803_PORT2) & M6800_PORT2_IO3) >> 3;
return (cpustate->io->read_byte(M6803_PORT2) & M6800_PORT2_IO3) >> 3;
}
static TIMER_CALLBACK(m6800_tx_tick)
@ -2360,20 +2360,20 @@ static READ8_HANDLER( m6803_internal_registers_r )
case 0x01:
return cpustate->port2_ddr;
case 0x02:
return (memory_read_byte_8be(cpustate->io, M6803_PORT1) & (cpustate->port1_ddr ^ 0xff))
return (cpustate->io->read_byte(M6803_PORT1) & (cpustate->port1_ddr ^ 0xff))
| (cpustate->port1_data & cpustate->port1_ddr);
case 0x03:
return (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff))
return (cpustate->io->read_byte(M6803_PORT2) & (cpustate->port2_ddr ^ 0xff))
| (cpustate->port2_data & cpustate->port2_ddr);
case 0x04:
return cpustate->port3_ddr;
case 0x05:
return cpustate->port4_ddr;
case 0x06:
return (memory_read_byte_8be(cpustate->io, M6803_PORT3) & (cpustate->port3_ddr ^ 0xff))
return (cpustate->io->read_byte(M6803_PORT3) & (cpustate->port3_ddr ^ 0xff))
| (cpustate->port3_data & cpustate->port3_ddr);
case 0x07:
return (memory_read_byte_8be(cpustate->io, M6803_PORT4) & (cpustate->port4_ddr ^ 0xff))
return (cpustate->io->read_byte(M6803_PORT4) & (cpustate->port4_ddr ^ 0xff))
| (cpustate->port4_data & cpustate->port4_ddr);
case 0x08:
cpustate->pending_tcsr = 0;
@ -2458,10 +2458,10 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
{
cpustate->port1_ddr = data;
if(cpustate->port1_ddr == 0xff)
memory_write_byte_8be(cpustate->io, M6803_PORT1,cpustate->port1_data);
cpustate->io->write_byte(M6803_PORT1,cpustate->port1_data);
else
memory_write_byte_8be(cpustate->io, M6803_PORT1,(cpustate->port1_data & cpustate->port1_ddr)
| (memory_read_byte_8be(cpustate->io, M6803_PORT1) & (cpustate->port1_ddr ^ 0xff)));
cpustate->io->write_byte(M6803_PORT1,(cpustate->port1_data & cpustate->port1_ddr)
| (cpustate->io->read_byte(M6803_PORT1) & (cpustate->port1_ddr ^ 0xff)));
}
break;
case 0x01:
@ -2469,10 +2469,10 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
{
cpustate->port2_ddr = data;
if(cpustate->port2_ddr == 0xff)
memory_write_byte_8be(cpustate->io, M6803_PORT2,cpustate->port2_data);
cpustate->io->write_byte(M6803_PORT2,cpustate->port2_data);
else
memory_write_byte_8be(cpustate->io, M6803_PORT2,(cpustate->port2_data & cpustate->port2_ddr)
| (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff)));
cpustate->io->write_byte(M6803_PORT2,(cpustate->port2_data & cpustate->port2_ddr)
| (cpustate->io->read_byte(M6803_PORT2) & (cpustate->port2_ddr ^ 0xff)));
if (cpustate->port2_ddr & 2)
logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->cpu->tag(),cpu_get_pc(space->cpu));
@ -2481,10 +2481,10 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
case 0x02:
cpustate->port1_data = data;
if(cpustate->port1_ddr == 0xff)
memory_write_byte_8be(cpustate->io, M6803_PORT1,cpustate->port1_data);
cpustate->io->write_byte(M6803_PORT1,cpustate->port1_data);
else
memory_write_byte_8be(cpustate->io, M6803_PORT1,(cpustate->port1_data & cpustate->port1_ddr)
| (memory_read_byte_8be(cpustate->io, M6803_PORT1) & (cpustate->port1_ddr ^ 0xff)));
cpustate->io->write_byte(M6803_PORT1,(cpustate->port1_data & cpustate->port1_ddr)
| (cpustate->io->read_byte(M6803_PORT1) & (cpustate->port1_ddr ^ 0xff)));
break;
case 0x03:
if (cpustate->trcsr & M6800_TRCSR_TE)
@ -2496,20 +2496,20 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
cpustate->port2_data = data;
}
if(cpustate->port2_ddr == 0xff)
memory_write_byte_8be(cpustate->io, M6803_PORT2,cpustate->port2_data);
cpustate->io->write_byte(M6803_PORT2,cpustate->port2_data);
else
memory_write_byte_8be(cpustate->io, M6803_PORT2,(cpustate->port2_data & cpustate->port2_ddr)
| (memory_read_byte_8be(cpustate->io, M6803_PORT2) & (cpustate->port2_ddr ^ 0xff)));
cpustate->io->write_byte(M6803_PORT2,(cpustate->port2_data & cpustate->port2_ddr)
| (cpustate->io->read_byte(M6803_PORT2) & (cpustate->port2_ddr ^ 0xff)));
break;
case 0x04:
if (cpustate->port3_ddr != data)
{
cpustate->port3_ddr = data;
if(cpustate->port3_ddr == 0xff)
memory_write_byte_8be(cpustate->io, M6803_PORT3,cpustate->port3_data);
cpustate->io->write_byte(M6803_PORT3,cpustate->port3_data);
else
memory_write_byte_8be(cpustate->io, M6803_PORT3,(cpustate->port3_data & cpustate->port3_ddr)
| (memory_read_byte_8be(cpustate->io, M6803_PORT3) & (cpustate->port3_ddr ^ 0xff)));
cpustate->io->write_byte(M6803_PORT3,(cpustate->port3_data & cpustate->port3_ddr)
| (cpustate->io->read_byte(M6803_PORT3) & (cpustate->port3_ddr ^ 0xff)));
}
break;
case 0x05:
@ -2517,27 +2517,27 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
{
cpustate->port4_ddr = data;
if(cpustate->port4_ddr == 0xff)
memory_write_byte_8be(cpustate->io, M6803_PORT4,cpustate->port4_data);
cpustate->io->write_byte(M6803_PORT4,cpustate->port4_data);
else
memory_write_byte_8be(cpustate->io, M6803_PORT4,(cpustate->port4_data & cpustate->port4_ddr)
| (memory_read_byte_8be(cpustate->io, M6803_PORT4) & (cpustate->port4_ddr ^ 0xff)));
cpustate->io->write_byte(M6803_PORT4,(cpustate->port4_data & cpustate->port4_ddr)
| (cpustate->io->read_byte(M6803_PORT4) & (cpustate->port4_ddr ^ 0xff)));
}
break;
case 0x06:
cpustate->port3_data = data;
if(cpustate->port3_ddr == 0xff)
memory_write_byte_8be(cpustate->io, M6803_PORT3,cpustate->port3_data);
cpustate->io->write_byte(M6803_PORT3,cpustate->port3_data);
else
memory_write_byte_8be(cpustate->io, M6803_PORT3,(cpustate->port3_data & cpustate->port3_ddr)
| (memory_read_byte_8be(cpustate->io, M6803_PORT3) & (cpustate->port3_ddr ^ 0xff)));
cpustate->io->write_byte(M6803_PORT3,(cpustate->port3_data & cpustate->port3_ddr)
| (cpustate->io->read_byte(M6803_PORT3) & (cpustate->port3_ddr ^ 0xff)));
break;
case 0x07:
cpustate->port4_data = data;
if(cpustate->port4_ddr == 0xff)
memory_write_byte_8be(cpustate->io, M6803_PORT4,cpustate->port4_data);
cpustate->io->write_byte(M6803_PORT4,cpustate->port4_data);
else
memory_write_byte_8be(cpustate->io, M6803_PORT4,(cpustate->port4_data & cpustate->port4_ddr)
| (memory_read_byte_8be(cpustate->io, M6803_PORT4) & (cpustate->port4_ddr ^ 0xff)));
cpustate->io->write_byte(M6803_PORT4,(cpustate->port4_data & cpustate->port4_ddr)
| (cpustate->io->read_byte(M6803_PORT4) & (cpustate->port4_ddr ^ 0xff)));
break;
case 0x08:
cpustate->tcsr = data;

111
src/emu/cpu/m68000/m68kcpu.c
View File

@ -940,6 +940,13 @@ void m68k_set_encrypted_opcode_range(running_device *device, offs_t start, offs_
m68k->encrypted_end = end;
}
static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
static UINT16 memory_read_word(address_space *space, offs_t address) { return space->read_word(address); }
static void memory_write_word(address_space *space, offs_t address, UINT16 data) { space->write_word(address, data); }
static UINT32 memory_read_dword(address_space *space, offs_t address) { return space->read_dword(address); }
static void memory_write_dword(address_space *space, offs_t address, UINT32 data) { space->write_dword(address, data); }
/****************************************************************************
* 8-bit data memory interface
****************************************************************************/
@ -955,12 +962,12 @@ static const m68k_memory_interface interface_d8 =
{
0,
m68008_read_immediate_16,
memory_read_byte_8be,
memory_read_word_8be,
memory_read_dword_8be,
memory_write_byte_8be,
memory_write_word_8be,
memory_write_dword_8be
memory_read_byte,
memory_read_word,
memory_read_dword,
memory_write_byte,
memory_write_word,
memory_write_dword
};
/****************************************************************************
@ -983,12 +990,12 @@ static const m68k_memory_interface interface_d16 =
{
0,
simple_read_immediate_16,
memory_read_byte_16be,
memory_read_word_16be,
memory_read_dword_16be,
memory_write_byte_16be,
memory_write_word_16be,
memory_write_dword_16be
memory_read_byte,
memory_read_word,
memory_read_dword,
memory_write_byte,
memory_write_word,
memory_write_dword
};
/****************************************************************************
@ -1001,9 +1008,9 @@ static UINT16 readword_d32(address_space *space, offs_t address)
UINT16 result;
if (!(address & 1))
return memory_read_word_32be(space, address);
result = memory_read_byte_32be(space, address) << 8;
return result | memory_read_byte_32be(space, address + 1);
return space->read_word(address);
result = space->read_byte(address) << 8;
return result | space->read_byte(address + 1);
}
/* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */
@ -1011,11 +1018,11 @@ static void writeword_d32(address_space *space, offs_t address, UINT16 data)
{
if (!(address & 1))
{
memory_write_word_32be(space, address, data);
space->write_word(address, data);
return;
}
memory_write_byte_32be(space, address, data >> 8);
memory_write_byte_32be(space, address + 1, data);
space->write_byte(address, data >> 8);
space->write_byte(address + 1, data);
}
/* potentially misaligned 32-bit reads with a 32-bit data bus (and 24-bit address bus) */
@ -1024,15 +1031,15 @@ static UINT32 readlong_d32(address_space *space, offs_t address)
UINT32 result;
if (!(address & 3))
return memory_read_dword_32be(space, address);
return space->read_dword(address);
else if (!(address & 1))
{
result = memory_read_word_32be(space, address) << 16;
return result | memory_read_word_32be(space, address + 2);
result = space->read_word(address) << 16;
return result | space->read_word(address + 2);
}
result = memory_read_byte_32be(space, address) << 24;
result |= memory_read_word_32be(space, address + 1) << 8;
return result | memory_read_byte_32be(space, address + 3);
result = space->read_byte(address) << 24;
result |= space->read_word(address + 1) << 8;
return result | space->read_byte(address + 3);
}
/* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */
@ -1040,18 +1047,18 @@ static void writelong_d32(address_space *space, offs_t address, UINT32 data)
{
if (!(address & 3))
{
memory_write_dword_32be(space, address, data);
space->write_dword(address, data);
return;
}
else if (!(address & 1))
{
memory_write_word_32be(space, address, data >> 16);
memory_write_word_32be(space, address + 2, data);
space->write_word(address, data >> 16);
space->write_word(address + 2, data);
return;
}
memory_write_byte_32be(space, address, data >> 24);
memory_write_word_32be(space, address + 1, data >> 8);
memory_write_byte_32be(space, address + 3, data);
space->write_byte(address, data >> 24);
space->write_word(address + 1, data >> 8);
space->write_byte(address + 3, data);
}
/* interface for 32-bit data bus (68EC020, 68020) */
@ -1059,10 +1066,10 @@ static const m68k_memory_interface interface_d32 =
{
WORD_XOR_BE(0),
read_immediate_16,
memory_read_byte_32be,
memory_read_byte,
readword_d32,
readlong_d32,
memory_write_byte_32be,
memory_write_byte,
writeword_d32,
writelong_d32
};
@ -1077,7 +1084,7 @@ static UINT8 read_byte_32_mmu(address_space *space, offs_t address)
address = pmmu_translate_addr(m68k, address);
}
return memory_read_byte_32be(space, address);
return space->read_byte(address);
}
static void write_byte_32_mmu(address_space *space, offs_t address, UINT8 data)
@ -1089,7 +1096,7 @@ static void write_byte_32_mmu(address_space *space, offs_t address, UINT8 data)
address = pmmu_translate_addr(m68k, address);
}
memory_write_byte_32be(space, address, data);
space->write_byte(address, data);
}
static UINT16 read_immediate_16_mmu(address_space *space, offs_t address)
@ -1116,9 +1123,9 @@ static UINT16 readword_d32_mmu(address_space *space, offs_t address)
}
if (!(address & 1))
return memory_read_word_32be(space, address);
result = memory_read_byte_32be(space, address) << 8;
return result | memory_read_byte_32be(space, address + 1);
return space->read_word(address);
result = space->read_byte(address) << 8;
return result | space->read_byte(address + 1);
}
/* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */
@ -1133,11 +1140,11 @@ static void writeword_d32_mmu(address_space *space, offs_t address, UINT16 data)
if (!(address & 1))
{
memory_write_word_32be(space, address, data);
space->write_word(address, data);
return;
}
memory_write_byte_32be(space, address, data >> 8);
memory_write_byte_32be(space, address + 1, data);
space->write_byte(address, data >> 8);
space->write_byte(address + 1, data);
}
/* potentially misaligned 32-bit reads with a 32-bit data bus (and 24-bit address bus) */
@ -1152,15 +1159,15 @@ static UINT32 readlong_d32_mmu(address_space *space, offs_t address)
}
if (!(address & 3))
return memory_read_dword_32be(space, address);
return space->read_dword(address);
else if (!(address & 1))
{
result = memory_read_word_32be(space, address) << 16;
return result | memory_read_word_32be(space, address + 2);
result = space->read_word(address) << 16;
return result | space->read_word(address + 2);
}
result = memory_read_byte_32be(space, address) << 24;
result |= memory_read_word_32be(space, address + 1) << 8;
return result | memory_read_byte_32be(space, address + 3);
result = space->read_byte(address) << 24;
result |= space->read_word(address + 1) << 8;
return result | space->read_byte(address + 3);
}
/* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */
@ -1175,18 +1182,18 @@ static void writelong_d32_mmu(address_space *space, offs_t address, UINT32 data)
if (!(address & 3))
{
memory_write_dword_32be(space, address, data);
space->write_dword(address, data);
return;
}
else if (!(address & 1))
{
memory_write_word_32be(space, address, data >> 16);
memory_write_word_32be(space, address + 2, data);
space->write_word(address, data >> 16);
space->write_word(address + 2, data);
return;
}
memory_write_byte_32be(space, address, data >> 24);
memory_write_word_32be(space, address + 1, data >> 8);
memory_write_byte_32be(space, address + 3, data);
space->write_byte(address, data >> 24);
space->write_word(address + 1, data >> 8);
space->write_byte(address + 3, data);
}
static const m68k_memory_interface interface_d32_mmu =

18
src/emu/cpu/m68000/m68kmmu.h
View File

@ -53,7 +53,7 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
case 2: // valid 4 byte descriptors
tofs *= 4;
// logerror("PMMU: reading table A entry at %08x\n", tofs + (root_aptr & 0xfffffffc));
tbl_entry = memory_read_dword_32be(m68k->program, tofs + (root_aptr & 0xfffffffc));
tbl_entry = m68k->program->read_dword(tofs + (root_aptr & 0xfffffffc));
tamode = tbl_entry & 3;
// logerror("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tamode, tofs);
break;
@ -61,8 +61,8 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
case 3: // valid 8 byte descriptors
tofs *= 8;
// logerror("PMMU: reading table A entries at %08x\n", tofs + (root_aptr & 0xfffffffc));
tbl_entry2 = memory_read_dword_32be(m68k->program, tofs + (root_aptr & 0xfffffffc));
tbl_entry = memory_read_dword_32be(m68k->program, tofs + (root_aptr & 0xfffffffc)+4);
tbl_entry2 = m68k->program->read_dword(tofs + (root_aptr & 0xfffffffc));
tbl_entry = m68k->program->read_dword(tofs + (root_aptr & 0xfffffffc)+4);
tamode = tbl_entry2 & 3;
// logerror("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tamode, tofs);
break;
@ -82,7 +82,7 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
case 2: // 4-byte table B descriptor
tofs *= 4;
// logerror("PMMU: reading table B entry at %08x\n", tofs + tptr);
tbl_entry = memory_read_dword_32be(m68k->program, tofs + tptr);
tbl_entry = m68k->program->read_dword(tofs + tptr);
tbmode = tbl_entry & 3;
// logerror("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs);
break;
@ -90,8 +90,8 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
case 3: // 8-byte table B descriptor
tofs *= 8;
// logerror("PMMU: reading table B entries at %08x\n", tofs + tptr);
tbl_entry2 = memory_read_dword_32be(m68k->program, tofs + tptr);
tbl_entry = memory_read_dword_32be(m68k->program, tofs + tptr + 4);
tbl_entry2 = m68k->program->read_dword(tofs + tptr);
tbl_entry = m68k->program->read_dword(tofs + tptr + 4);
tbmode = tbl_entry2 & 3;
// logerror("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs);
break;
@ -121,7 +121,7 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
case 2: // 4-byte table C descriptor
tofs *= 4;
// logerror("PMMU: reading table C entry at %08x\n", tofs + tptr);
tbl_entry = memory_read_dword_32be(m68k->program, tofs + tptr);
tbl_entry = m68k->program->read_dword(tofs + tptr);
tcmode = tbl_entry & 3;
// logerror("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs);
break;
@ -129,8 +129,8 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
case 3: // 8-byte table C descriptor
tofs *= 8;
// logerror("PMMU: reading table C entries at %08x\n", tofs + tptr);
tbl_entry2 = memory_read_dword_32be(m68k->program, tofs + tptr);
tbl_entry = memory_read_dword_32be(m68k->program, tofs + tptr + 4);
tbl_entry2 = m68k->program->read_dword(tofs + tptr);
tbl_entry = m68k->program->read_dword(tofs + tptr + 4);
tcmode = tbl_entry2 & 3;
// logerror("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs);
break;

4
src/emu/cpu/m6805/m6805.c
View File

@ -79,12 +79,12 @@ INLINE m6805_Regs *get_safe_token(running_device *device)
/****************************************************************************/
/* Read a byte from given memory location */
/****************************************************************************/
#define M6805_RDMEM(Addr) ((unsigned)memory_read_byte_8be(cpustate->program, Addr))
#define M6805_RDMEM(Addr) ((unsigned)cpustate->program->read_byte(Addr))
/****************************************************************************/
/* Write a byte to given memory location */
/****************************************************************************/
#define M6805_WRMEM(Addr,Value) (memory_write_byte_8be(cpustate->program, Addr,Value))
#define M6805_WRMEM(Addr,Value) (cpustate->program->write_byte(Addr,Value))
/****************************************************************************/
/* M6805_RDOP() is identical to M6805_RDMEM() except it is used for reading */

4
src/emu/cpu/m6809/m6809.c
View File

@ -172,12 +172,12 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
/****************************************************************************/
/* Read a byte from given memory location */
/****************************************************************************/
#define RM(Addr) ((unsigned)memory_read_byte_8be(m68_state->program, Addr))
#define RM(Addr) ((unsigned)m68_state->program->read_byte(Addr))
/****************************************************************************/
/* Write a byte to given memory location */
/****************************************************************************/
#define WM(Addr,Value) (memory_write_byte_8be(m68_state->program, Addr,Value))
#define WM(Addr,Value) (m68_state->program->write_byte(Addr,Value))
/****************************************************************************/
/* Z80_RDOP() is identical to Z80_RDMEM() except it is used for reading */

4
src/emu/cpu/mb86233/mb86233.c
View File

@ -96,8 +96,8 @@ INLINE mb86233_state *get_safe_token(running_device *device)
#define GETREPCNT() cpustate->repcnt
#define ROPCODE(a) memory_decrypted_read_dword(cpustate->program, a<<2)
#define RDMEM(a) memory_read_dword_32le(cpustate->program, (a<<2))
#define WRMEM(a,v) memory_write_dword_32le(cpustate->program, (a<<2), v)
#define RDMEM(a) cpustate->program->read_dword((a<<2))
#define WRMEM(a,v) cpustate->program->write_dword((a<<2), v)
/***************************************************************************
Initialization and Shutdown

8
src/emu/cpu/mb88xx/mb88xx.c
View File

@ -100,11 +100,11 @@ static TIMER_CALLBACK( serial_timer );
#define READOP(a) (memory_decrypted_read_byte(cpustate->program, a))
#define RDMEM(a) (memory_read_byte_8be(cpustate->data, a))
#define WRMEM(a,v) (memory_write_byte_8be(cpustate->data, (a), (v)))
#define RDMEM(a) (cpustate->data->read_byte(a))
#define WRMEM(a,v) (cpustate->data->write_byte((a), (v)))
#define READPORT(a) (memory_read_byte_8be(cpustate->io, a))
#define WRITEPORT(a,v) (memory_write_byte_8be(cpustate->io, (a), (v)))
#define READPORT(a) (cpustate->io->read_byte(a))
#define WRITEPORT(a,v) (cpustate->io->write_byte((a), (v)))
#define TEST_ST() (cpustate->st & 1)
#define TEST_ZF() (cpustate->zf & 1)

52
src/emu/cpu/mc68hc11/mc68hc11.c
View File

@ -97,21 +97,21 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
switch(reg)
{
case 0x00: /* PORTA */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTA);
return cpustate->io->read_byte(MC68HC11_IO_PORTA);
case 0x01: /* DDRA */
return 0;
case 0x02: /* PIOC */
return 0;
case 0x03: /* PORTC */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTC);
return cpustate->io->read_byte(MC68HC11_IO_PORTC);
case 0x04: /* PORTB */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTB);
return cpustate->io->read_byte(MC68HC11_IO_PORTB);
case 0x08: /* PORTD */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTD);
return cpustate->io->read_byte(MC68HC11_IO_PORTD);
case 0x09: /* DDRD */
return 0;
case 0x0a: /* PORTE */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTE);
return cpustate->io->read_byte(MC68HC11_IO_PORTE);
case 0x23:
return cpustate->tflg1;
case 0x28: /* SPCR1 */
@ -122,44 +122,44 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
{
if (cpustate->adctl & 0x10)
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x4) + MC68HC11_IO_AD0);
return cpustate->io->read_byte((cpustate->adctl & 0x4) + MC68HC11_IO_AD0);
}
else
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
return cpustate->io->read_byte((cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x32: /* ADR2 */
{
if (cpustate->adctl & 0x10)
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x4) + MC68HC11_IO_AD1);
return cpustate->io->read_byte((cpustate->adctl & 0x4) + MC68HC11_IO_AD1);
}
else
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
return cpustate->io->read_byte((cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x33: /* ADR3 */
{
if (cpustate->adctl & 0x10)
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x4) + MC68HC11_IO_AD2);
return cpustate->io->read_byte((cpustate->adctl & 0x4) + MC68HC11_IO_AD2);
}
else
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
return cpustate->io->read_byte((cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x34: /* ADR4 */
{
if (cpustate->adctl & 0x10)
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x4) + MC68HC11_IO_AD3);
return cpustate->io->read_byte((cpustate->adctl & 0x4) + MC68HC11_IO_AD3);
}
else
{
return memory_read_byte(cpustate->io, (cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
return cpustate->io->read_byte((cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x38: /* OPT2 */
@ -175,9 +175,9 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
case 0x74: /* SCSR1 */
return 0x40;
case 0x7c: /* PORTH */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTH);
return cpustate->io->read_byte(MC68HC11_IO_PORTH);
case 0x7e: /* PORTG */
return memory_read_byte(cpustate->io, MC68HC11_IO_PORTG);
return cpustate->io->read_byte(MC68HC11_IO_PORTG);
case 0x7f: /* DDRG */
return 0;
@ -186,7 +186,7 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
case 0x89: /* SPSR2 */
return 0x80;
case 0x8a: /* SPDR2 */
return memory_read_byte(cpustate->io, MC68HC11_IO_SPI2_DATA);
return cpustate->io->read_byte(MC68HC11_IO_SPI2_DATA);
case 0x8b: /* OPT4 */
return 0;
@ -203,25 +203,25 @@ static void hc11_regs_w(hc11_state *cpustate, UINT32 address, UINT8 value)
switch(reg)
{
case 0x00: /* PORTA */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTA, value);
cpustate->io->write_byte(MC68HC11_IO_PORTA, value);
return;
case 0x01: /* DDRA */
//mame_printf_debug("HC11: ddra = %02X\n", value);
return;
case 0x03: /* PORTC */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTC, value);
cpustate->io->write_byte(MC68HC11_IO_PORTC, value);
return;
case 0x04: /* PORTC */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTB, value);
cpustate->io->write_byte(MC68HC11_IO_PORTB, value);
return;
case 0x08: /* PORTD */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTD, value); //mask & 0x3f?
cpustate->io->write_byte(MC68HC11_IO_PORTD, value); //mask & 0x3f?
return;
case 0x09: /* DDRD */
//mame_printf_debug("HC11: ddrd = %02X\n", value);
return;
case 0x0a: /* PORTE */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTE, value);
cpustate->io->write_byte(MC68HC11_IO_PORTE, value);
return;
case 0x22: /* TMSK1 */
return;
@ -271,13 +271,13 @@ static void hc11_regs_w(hc11_state *cpustate, UINT32 address, UINT8 value)
case 0x77: /* SCDRL */
return;
case 0x7c: /* PORTH */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTH, value);
cpustate->io->write_byte(MC68HC11_IO_PORTH, value);
return;
case 0x7d: /* DDRH */
//mame_printf_debug("HC11: ddrh = %02X at %04X\n", value, cpustate->pc);
return;
case 0x7e: /* PORTG */
memory_write_byte(cpustate->io, MC68HC11_IO_PORTG, value);
cpustate->io->write_byte(MC68HC11_IO_PORTG, value);
return;
case 0x7f: /* DDRG */
//mame_printf_debug("HC11: ddrg = %02X at %04X\n", value, cpustate->pc);
@ -288,7 +288,7 @@ static void hc11_regs_w(hc11_state *cpustate, UINT32 address, UINT8 value)
case 0x89: /* SPSR2 */
return;
case 0x8a: /* SPDR2 */
memory_write_byte(cpustate->io, MC68HC11_IO_SPI2_DATA, value);
cpustate->io->write_byte(MC68HC11_IO_SPI2_DATA, value);
return;
case 0x8b: /* OPT4 */
@ -324,7 +324,7 @@ INLINE UINT8 READ8(hc11_state *cpustate, UINT32 address)
{
return cpustate->internal_ram[address-cpustate->ram_position];
}
return memory_read_byte(cpustate->program, address);
return cpustate->program->read_byte(address);
}
INLINE void WRITE8(hc11_state *cpustate, UINT32 address, UINT8 value)
@ -339,7 +339,7 @@ INLINE void WRITE8(hc11_state *cpustate, UINT32 address, UINT8 value)
cpustate->internal_ram[address-cpustate->ram_position] = value;
return;
}
memory_write_byte(cpustate->program, address, value);
cpustate->program->write_byte(address, value);
}
INLINE UINT16 READ16(hc11_state *cpustate, UINT32 address)

26
src/emu/cpu/mcs48/mcs48.c
View File

@ -175,23 +175,23 @@ typedef int (*mcs48_ophandler)(mcs48_state *state);
***************************************************************************/
/* ROM is mapped to ADDRESS_SPACE_PROGRAM */
#define program_r(a) memory_read_byte_8le(cpustate->program, a)
#define program_r(a) cpustate->program->read_byte(a)
/* RAM is mapped to ADDRESS_SPACE_DATA */
#define ram_r(a) memory_read_byte_8le(cpustate->data, a)
#define ram_w(a,V) memory_write_byte_8le(cpustate->data, a, V)
#define ram_r(a) cpustate->data->read_byte(a)
#define ram_w(a,V) cpustate->data->write_byte(a, V)
/* ports are mapped to ADDRESS_SPACE_IO */
#define ext_r(a) memory_read_byte_8le(cpustate->io, a)
#define ext_w(a,V) memory_write_byte_8le(cpustate->io, a, V)
#define port_r(a) memory_read_byte_8le(cpustate->io, MCS48_PORT_P0 + a)
#define port_w(a,V) memory_write_byte_8le(cpustate->io, MCS48_PORT_P0 + a, V)
#define test_r(a) memory_read_byte_8le(cpustate->io, MCS48_PORT_T0 + a)
#define test_w(a,V) memory_write_byte_8le(cpustate->io, MCS48_PORT_T0 + a, V)
#define bus_r() memory_read_byte_8le(cpustate->io, MCS48_PORT_BUS)
#define bus_w(V) memory_write_byte_8le(cpustate->io, MCS48_PORT_BUS, V)
#define ea_r() memory_read_byte_8le(cpustate->io, MCS48_PORT_EA)
#define prog_w(V) memory_write_byte_8le(cpustate->io, MCS48_PORT_PROG, V)
#define ext_r(a) cpustate->io->read_byte(a)
#define ext_w(a,V) cpustate->io->write_byte(a, V)
#define port_r(a) cpustate->io->read_byte(MCS48_PORT_P0 + a)
#define port_w(a,V) cpustate->io->write_byte(MCS48_PORT_P0 + a, V)
#define test_r(a) cpustate->io->read_byte(MCS48_PORT_T0 + a)
#define test_w(a,V) cpustate->io->write_byte(MCS48_PORT_T0 + a, V)
#define bus_r() cpustate->io->read_byte(MCS48_PORT_BUS)
#define bus_w(V) cpustate->io->write_byte(MCS48_PORT_BUS, V)
#define ea_r() cpustate->io->read_byte(MCS48_PORT_EA)
#define prog_w(V) cpustate->io->write_byte(MCS48_PORT_PROG, V)
/* r0-r7 map to memory via the regptr */
#define R0 regptr[0]

34
src/emu/cpu/mcs51/mcs51.c
View File

@ -314,11 +314,11 @@ struct _mcs51_state_t
#define ROP_ARG(pc) memory_raw_read_byte(mcs51_state->program, pc)
/* Read a byte from External Code Memory (Usually Program Rom(s) Space) */
#define CODEMEM_R(a) (UINT8)memory_read_byte_8le(mcs51_state->program, a)
#define CODEMEM_R(a) (UINT8)mcs51_state->program->read_byte(a)
/* Read/Write a byte from/to External Data Memory (Usually RAM or other I/O) */
#define DATAMEM_R(a) (UINT8)memory_read_byte_8le(mcs51_state->io, a)
#define DATAMEM_W(a,v) memory_write_byte_8le(mcs51_state->io, a, v)
#define DATAMEM_R(a) (UINT8)mcs51_state->io->read_byte(a)
#define DATAMEM_W(a,v) mcs51_state->io->write_byte(a, v)
/* Read/Write a byte from/to the Internal RAM */
@ -327,8 +327,8 @@ struct _mcs51_state_t
/* Read/Write a byte from/to the Internal RAM indirectly */
/* (called from indirect addressing) */
INLINE UINT8 iram_iread(mcs51_state_t *mcs51_state, offs_t a) { return (a <= mcs51_state->ram_mask) ? memory_read_byte_8le(mcs51_state->data, a) : 0xff; }
INLINE void iram_iwrite(mcs51_state_t *mcs51_state, offs_t a, UINT8 d) { if (a <= mcs51_state->ram_mask) memory_write_byte_8le(mcs51_state->data, a, d); }
INLINE UINT8 iram_iread(mcs51_state_t *mcs51_state, offs_t a) { return (a <= mcs51_state->ram_mask) ? mcs51_state->data->read_byte(a) : 0xff; }
INLINE void iram_iwrite(mcs51_state_t *mcs51_state, offs_t a, UINT8 d) { if (a <= mcs51_state->ram_mask) mcs51_state->data->write_byte(a, d); }
#define IRAM_IR(a) iram_iread(mcs51_state, a)
#define IRAM_IW(a, d) iram_iwrite(mcs51_state, a, d)
@ -342,8 +342,8 @@ INLINE void iram_iwrite(mcs51_state_t *mcs51_state, offs_t a, UINT8 d) { if (a <
#define BIT_W(a,v) bit_address_w(mcs51_state, a, v)
/* Input/Output a byte from given I/O port */
#define IN(port) ((UINT8)memory_read_byte(mcs51_state->io, port))
#define OUT(port,value) memory_write_byte(mcs51_state->io, port,value)
#define IN(port) ((UINT8)mcs51_state->io->read_byte(port))
#define OUT(port,value) mcs51_state->io->write_byte(port,value)
/***************************************************************************
@ -757,13 +757,13 @@ INLINE offs_t external_ram_iaddr(mcs51_state_t *mcs51_state, offs_t offset, offs
INLINE UINT8 iram_read(mcs51_state_t *mcs51_state, size_t offset)
{
return (((offset) < 0x80) ? memory_read_byte_8le(mcs51_state->data, offset) : mcs51_state->sfr_read(mcs51_state, offset));
return (((offset) < 0x80) ? mcs51_state->data->read_byte(offset) : mcs51_state->sfr_read(mcs51_state, offset));
}
INLINE void iram_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 data)
{
if ((offset) < 0x80)
memory_write_byte_8le(mcs51_state->data, offset, data);
mcs51_state->data->write_byte(offset, data);
else
mcs51_state->sfr_write(mcs51_state, offset, data);
}
@ -2024,7 +2024,7 @@ static void mcs51_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 dat
/* no write in this case according to manual */
return;
}
memory_write_byte_8le(mcs51_state->data, (size_t)offset | 0x100, data);
mcs51_state->data->write_byte((size_t)offset | 0x100, data);
}
static UINT8 mcs51_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
@ -2057,7 +2057,7 @@ static UINT8 mcs51_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
case ADDR_SBUF:
case ADDR_IE:
case ADDR_IP:
return memory_read_byte_8le(mcs51_state->data, (size_t) offset | 0x100);
return mcs51_state->data->read_byte((size_t) offset | 0x100);
/* Illegal or non-implemented sfr */
default:
LOG(("mcs51 '%s': attemping to read an invalid/non-implemented SFR address: %x at 0x%04x\n", mcs51_state->device->tag(), (UINT32)offset,PC));
@ -2212,7 +2212,7 @@ static void i8052_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 dat
case ADDR_RCAP2H:
case ADDR_TL2:
case ADDR_TH2:
memory_write_byte_8le(mcs51_state->data, (size_t) offset | 0x100, data);
mcs51_state->data->write_byte((size_t) offset | 0x100, data);
break;
default:
@ -2230,7 +2230,7 @@ static UINT8 i8052_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
case ADDR_RCAP2H:
case ADDR_TL2:
case ADDR_TH2:
return memory_read_byte_8le(mcs51_state->data, (size_t) offset | 0x100);
return mcs51_state->data->read_byte((size_t) offset | 0x100);
default:
return mcs51_sfr_read(mcs51_state, offset);
}
@ -2272,7 +2272,7 @@ static void i80c52_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 da
i8052_sfr_write(mcs51_state, offset, data);
return;
}
memory_write_byte_8le(mcs51_state->data, (size_t) offset | 0x100, data);
mcs51_state->data->write_byte((size_t) offset | 0x100, data);
}
static UINT8 i80c52_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
@ -2283,7 +2283,7 @@ static UINT8 i80c52_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
case ADDR_IPH:
case ADDR_SADDR:
case ADDR_SADEN:
return memory_read_byte_8le(mcs51_state->data, (size_t) offset | 0x100);
return mcs51_state->data->read_byte((size_t) offset | 0x100);
default:
return i8052_sfr_read(mcs51_state, offset);
}
@ -2355,7 +2355,7 @@ static void ds5002fp_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8
mcs51_sfr_write(mcs51_state, offset, data);
return;
}
memory_write_byte_8le(mcs51_state->data, (size_t) offset | 0x100, data);
mcs51_state->data->write_byte((size_t) offset | 0x100, data);
}
static UINT8 ds5002fp_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
@ -2376,7 +2376,7 @@ static UINT8 ds5002fp_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
default:
return mcs51_sfr_read(mcs51_state, offset);
}
return memory_read_byte_8le(mcs51_state->data, (size_t) offset | 0x100);
return mcs51_state->data->read_byte((size_t) offset | 0x100);
}
static CPU_INIT( ds5002fp )

4
src/emu/cpu/minx/minx.c
View File

@ -89,8 +89,8 @@ typedef struct {
int icount;
} minx_state;
#define RD(offset) memory_read_byte_8be( minx->program, offset )
#define WR(offset,data) memory_write_byte_8be( minx->program, offset, data )
#define RD(offset) minx->program->read_byte( offset )
#define WR(offset,data) minx->program->write_byte( offset, data )
#define GET_MINX_PC ( ( minx->PC & 0x8000 ) ? ( minx->V << 15 ) | (minx->PC & 0x7FFF ) : minx->PC )
INLINE minx_state *get_safe_token(running_device *device)

22
src/emu/cpu/mips/psx.c
View File

@ -335,7 +335,7 @@ INLINE UINT8 psx_readbyte( psxcpu_state *psxcpu, UINT32 address )
{
if( psxcpu->bus_attached )
{
return memory_read_byte_32le( psxcpu->program, address );
return psxcpu->program->read_byte( address );
}
else
{
@ -347,7 +347,7 @@ INLINE UINT16 psx_readhalf( psxcpu_state *psxcpu, UINT32 address )
{
if( psxcpu->bus_attached )
{
return memory_read_word_32le( psxcpu->program, address );
return psxcpu->program->read_word( address );
}
else
{
@ -359,7 +359,7 @@ INLINE UINT32 psx_readword( psxcpu_state *psxcpu, UINT32 address )
{
if( psxcpu->bus_attached )
{
return memory_read_dword_32le( psxcpu->program, address );
return psxcpu->program->read_dword( address );
}
else
{
@ -371,7 +371,7 @@ INLINE UINT32 psx_readword_masked( psxcpu_state *psxcpu, UINT32 address, UINT32
{
if( psxcpu->bus_attached )
{
return memory_read_dword_masked_32le( psxcpu->program, address, mask );
return psxcpu->program->read_dword( address, mask );
}
else
{
@ -383,7 +383,7 @@ INLINE void psx_writeword( psxcpu_state *psxcpu, UINT32 address, UINT32 data )
{
if( psxcpu->bus_attached )
{
memory_write_dword_32le( psxcpu->program, address, data );
psxcpu->program->write_dword( address, data );
}
else
{
@ -395,7 +395,7 @@ INLINE void psx_writeword_masked( psxcpu_state *psxcpu, UINT32 address, UINT32 d
{
if( psxcpu->bus_attached )
{
memory_write_dword_masked_32le( psxcpu->program, address, data, mask );
psxcpu->program->write_dword( address, data, mask );
}
else
{
@ -1797,7 +1797,7 @@ static void mips_swc( psxcpu_state *psxcpu, int cop, int sr_cu )
}
}
data = memory_read_dword_32le( psxcpu->program, address );
data = psxcpu->program->read_dword( address );
}
break;
@ -2959,7 +2959,7 @@ static UINT32 getcp1dr( psxcpu_state *psxcpu, int reg )
{
/* if a mtc/ctc precedes then this will get the value moved (which cop1 register is irrelevant). */
/* if a mfc/cfc follows then it will get the same value as this one. */
return memory_read_dword_32le( psxcpu->program, psxcpu->pc + 4 );
return psxcpu->program->read_dword( psxcpu->pc + 4 );
}
static void setcp1dr( psxcpu_state *psxcpu, int reg, UINT32 value )
@ -2970,7 +2970,7 @@ static UINT32 getcp1cr( psxcpu_state *psxcpu, int reg )
{
/* if a mtc/ctc precedes then this will get the value moved (which cop1 register is irrelevant). */
/* if a mfc/cfc follows then it will get the same value as this one. */
return memory_read_dword_32le( psxcpu->program, psxcpu->pc + 4 );
return psxcpu->program->read_dword( psxcpu->pc + 4 );
}
static void setcp1cr( psxcpu_state *psxcpu, int reg, UINT32 value )
@ -2983,7 +2983,7 @@ static UINT32 getcp3dr( psxcpu_state *psxcpu, int reg )
/* if you have mtc/ctc with an mfc/cfc directly afterwards then you get the value that was moved. */
/* if you have an lwc with an mfc/cfc somewhere after it then you get the value that is loaded */
/* otherwise you get the next opcode. which register you transfer to or from is irrelevant. */
return memory_read_dword_32le( psxcpu->program, psxcpu->pc + 4 );
return psxcpu->program->read_dword( psxcpu->pc + 4 );
}
static void setcp3dr( psxcpu_state *psxcpu, int reg, UINT32 value )
@ -2995,7 +2995,7 @@ static UINT32 getcp3cr( psxcpu_state *psxcpu, int reg )
/* if you have mtc/ctc with an mfc/cfc directly afterwards then you get the value that was moved. */
/* if you have an lwc with an mfc/cfc somewhere after it then you get the value that is loaded */
/* otherwise you get the next opcode. which register you transfer to or from is irrelevant. */
return memory_read_dword_32le( psxcpu->program, psxcpu->pc + 4 );
return psxcpu->program->read_dword( psxcpu->pc + 4 );
}
static void setcp3cr( psxcpu_state *psxcpu, int reg, UINT32 value )

30
src/emu/cpu/mn10200/mn10200.c
View File

@ -79,7 +79,7 @@ INLINE UINT8 mn102_read_byte(mn102_info *mn102, UINT32 address)
return mn10200_r(mn102, address-0xfc00, MEM_BYTE);
}
return memory_read_byte_16le(mn102->program, address);
return mn102->program->read_byte(address);
}
INLINE UINT16 mn102_read_word(mn102_info *mn102, UINT32 address)
@ -91,10 +91,10 @@ INLINE UINT16 mn102_read_word(mn102_info *mn102, UINT32 address)
if (address & 1)
{
return memory_read_byte_16le(mn102->program, address) | (memory_read_byte_16le(mn102->program, address+1)<<8);
return mn102->program->read_byte(address) | (mn102->program->read_byte(address+1)<<8);
}
return memory_read_word_16le(mn102->program, address);
return mn102->program->read_word(address);
}
INLINE void mn102_write_byte(mn102_info *mn102, UINT32 address, UINT8 data)
@ -105,7 +105,7 @@ INLINE void mn102_write_byte(mn102_info *mn102, UINT32 address, UINT8 data)
return;
}
memory_write_byte_16le(mn102->program, address, data);
mn102->program->write_byte(address, data);
}
INLINE void mn102_write_word(mn102_info *mn102, UINT32 address, UINT16 data)
@ -118,12 +118,12 @@ INLINE void mn102_write_word(mn102_info *mn102, UINT32 address, UINT16 data)
if (address & 1)
{
memory_write_byte_16le(mn102->program, address, data&0xff);
memory_write_byte_16le(mn102->program, address+1, (data>>8)&0xff);
mn102->program->write_byte(address, data&0xff);
mn102->program->write_byte(address+1, (data>>8)&0xff);
return;
}
memory_write_word_16le(mn102->program, address, data);
mn102->program->write_word(address, data);
}
INLINE INT32 r24u(mn102_info *mn102, offs_t adr)
@ -2057,7 +2057,7 @@ static void mn10200_w(mn102_info *mn102, UINT32 adr, UINT32 data, int type)
break;
case 0x264:
memory_write_byte_8le(mn102->io, MN10200_PORT1, data);
mn102->io->write_byte(MN10200_PORT1, data);
break;
case 0x280: case 0x290: case 0x2a0: case 0x2b0: case 0x2c0: case 0x2d0: case 0x2e0: case 0x2f0: {
@ -2211,15 +2211,15 @@ static void mn10200_w(mn102_info *mn102, UINT32 adr, UINT32 data, int type)
break;
case 0x3c0: // port 0 data
memory_write_byte_8le(mn102->io, MN10200_PORT0, data);
mn102->io->write_byte(MN10200_PORT0, data);
break;
case 0x3c2: // port 2 data
memory_write_byte_8le(mn102->io, MN10200_PORT2, data);
mn102->io->write_byte(MN10200_PORT2, data);
break;
case 0x3c3: // port 3 data
memory_write_byte_8le(mn102->io, MN10200_PORT3, data);
mn102->io->write_byte(MN10200_PORT3, data);
break;
case 0x3e0: // port0 ddr
@ -2304,7 +2304,7 @@ static UINT32 mn10200_r(mn102_info *mn102, UINT32 adr, int type)
break;
case 0x264: // port 1 data
return memory_read_byte_8le(mn102->io, MN10200_PORT1);
return mn102->io->read_byte(MN10200_PORT1);
case 0x28c: case 0x29c: case 0x2ac: case 0x2bc: case 0x2cc: case 0x2dc: case 0x2ec: case 0x2fc:
{
@ -2313,13 +2313,13 @@ static UINT32 mn10200_r(mn102_info *mn102, UINT32 adr, int type)
}
case 0x3c0: // port 0 data
return memory_read_byte_8le(mn102->io, MN10200_PORT0);
return mn102->io->read_byte(MN10200_PORT0);
case 0x3c2: // port 2 data
return memory_read_byte_8le(mn102->io, MN10200_PORT2);
return mn102->io->read_byte(MN10200_PORT2);
case 0x3c3: // port 3 data
return memory_read_byte_8le(mn102->io, MN10200_PORT3);
return mn102->io->read_byte(MN10200_PORT3);
default:
log_event("MN102", "internal_r %04x (%03x)", adr+0xfc00, adr);

34
src/emu/cpu/nec/nec.c
View File

@ -357,8 +357,8 @@ static void nec_interrupt(nec_state_t *nec_state, unsigned int_num,BOOLEAN md_fl
nec_state->pending_irq &= ~INT_IRQ;
}
dest_off = read_word(int_num*4);
dest_seg = read_word(int_num*4+2);
dest_off = read_mem_word(int_num*4);
dest_seg = read_mem_word(int_num*4+2);
PUSH(nec_state->sregs[PS]);
PUSH(nec_state->ip);
@ -1138,14 +1138,20 @@ static void nec_init(legacy_cpu_device *device, device_irq_callback irqcallback,
8-bit memory accessors
*****************************************************************************/
static UINT8 memory_read_byte(address_space *space, offs_t address) { return space->read_byte(address); }
static void memory_write_byte(address_space *space, offs_t address, UINT8 data) { space->write_byte(address, data); }
static UINT16 memory_read_word(address_space *space, offs_t address) { return space->read_word(address); }
static void memory_write_word(address_space *space, offs_t address, UINT16 data) { space->write_word(address, data); }
static void configure_memory_8bit(nec_state_t *nec_state)
{
nec_state->mem.fetch_xor = 0;
nec_state->mem.rbyte = memory_read_byte_8le;
nec_state->mem.rword = memory_read_word_8le;
nec_state->mem.wbyte = memory_write_byte_8le;
nec_state->mem.wword = memory_write_word_8le;
nec_state->mem.rbyte = memory_read_byte;
nec_state->mem.rword = memory_read_word;
nec_state->mem.wbyte = memory_write_byte;
nec_state->mem.wword = memory_write_word;
}
@ -1156,22 +1162,22 @@ static void configure_memory_8bit(nec_state_t *nec_state)
static UINT16 read_word_16le(address_space *space, offs_t addr)
{
if (!(addr & 1))
return memory_read_word_16le(space, addr);
return space->read_word(addr);
else
{
UINT16 result = memory_read_byte_16le(space, addr);
return result | (memory_read_byte_16le(space, addr + 1) << 8);
UINT16 result = space->read_byte(addr);
return result | (space->read_byte(addr + 1) << 8);
}
}
static void write_word_16le(address_space *space, offs_t addr, UINT16 data)
{
if (!(addr & 1))
memory_write_word_16le(space, addr, data);
space->write_word(addr, data);
else
{
memory_write_byte_16le(space, addr, data);
memory_write_byte_16le(space, addr + 1, data >> 8);
space->write_byte(addr, data);
space->write_byte(addr + 1, data >> 8);
}
}
@ -1179,9 +1185,9 @@ static void configure_memory_16bit(nec_state_t *nec_state)
{
nec_state->mem.fetch_xor = BYTE_XOR_LE(0);
nec_state->mem.rbyte = memory_read_byte_16le;
nec_state->mem.rbyte = memory_read_byte;
nec_state->mem.rword = read_word_16le;
nec_state->mem.wbyte = memory_write_byte_16le;
nec_state->mem.wbyte = memory_write_byte;
nec_state->mem.wword = write_word_16le;
}

18
src/emu/cpu/nec/necmodrm.h
View File

@ -13,15 +13,15 @@ static struct {
#define RegByte(ModRM) nec_state->regs.b[Mod_RM.reg.b[ModRM]]
#define GetRMWord(ModRM) \
((ModRM) >= 0xc0 ? nec_state->regs.w[Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(nec_state), read_word( EA ) ))
((ModRM) >= 0xc0 ? nec_state->regs.w[Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(nec_state), read_mem_word( EA ) ))
#define PutbackRMWord(ModRM,val) \
{ \
if (ModRM >= 0xc0) nec_state->regs.w[Mod_RM.RM.w[ModRM]]=val; \
else write_word(EA,val); \
else write_mem_word(EA,val); \
}
#define GetnextRMWord read_word((EA&0xf0000)|((EA+2)&0xffff))
#define GetnextRMWord read_mem_word((EA&0xf0000)|((EA+2)&0xffff))
#define PutRMWord(ModRM,val) \
{ \
@ -29,7 +29,7 @@ static struct {
nec_state->regs.w[Mod_RM.RM.w[ModRM]]=val; \
else { \
(*GetEA[ModRM])(nec_state); \
write_word( EA ,val); \
write_mem_word( EA ,val); \
} \
}
@ -41,19 +41,19 @@ static struct {
else { \
(*GetEA[ModRM])(nec_state); \
val = FETCHWORD(); \
write_word( EA , val); \
write_mem_word( EA , val); \
} \
}
#define GetRMByte(ModRM) \
((ModRM) >= 0xc0 ? nec_state->regs.b[Mod_RM.RM.b[ModRM]] : read_byte( (*GetEA[ModRM])(nec_state) ))
((ModRM) >= 0xc0 ? nec_state->regs.b[Mod_RM.RM.b[ModRM]] : read_mem_byte( (*GetEA[ModRM])(nec_state) ))
#define PutRMByte(ModRM,val) \
{ \
if (ModRM >= 0xc0) \
nec_state->regs.b[Mod_RM.RM.b[ModRM]]=val; \
else \
write_byte( (*GetEA[ModRM])(nec_state) ,val); \
write_mem_byte( (*GetEA[ModRM])(nec_state) ,val); \
}
#define PutImmRMByte(ModRM) \
@ -62,7 +62,7 @@ static struct {
nec_state->regs.b[Mod_RM.RM.b[ModRM]]=FETCH(); \
else { \
(*GetEA[ModRM])(nec_state); \
write_byte( EA , FETCH() ); \
write_mem_byte( EA , FETCH() ); \
} \
}
@ -71,7 +71,7 @@ static struct {
if (ModRM >= 0xc0) \
nec_state->regs.b[Mod_RM.RM.b[ModRM]]=val; \
else \
write_byte(EA,val); \
write_mem_byte(EA,val); \
}
#define DEF_br8 \

24
src/emu/cpu/nec/necpriv.h
View File

@ -80,10 +80,10 @@ typedef enum {
/************************************************************************/
#define read_byte(a) (*nec_state->mem.rbyte)(nec_state->program, a)
#define read_word(a) (*nec_state->mem.rword)(nec_state->program, a)
#define write_byte(a,d) (*nec_state->mem.wbyte)(nec_state->program, (a),(d))
#define write_word(a,d) (*nec_state->mem.wword)(nec_state->program, (a),(d))
#define read_mem_byte(a) (*nec_state->mem.rbyte)(nec_state->program, a)
#define read_mem_word(a) (*nec_state->mem.rword)(nec_state->program, a)
#define write_mem_byte(a,d) (*nec_state->mem.wbyte)(nec_state->program, (a),(d))
#define write_mem_word(a,d) (*nec_state->mem.wword)(nec_state->program, (a),(d))
#define read_port_byte(a) (*nec_state->mem.rbyte)(nec_state->io, a)
#define read_port_word(a) (*nec_state->mem.rword)(nec_state->io, a)
@ -98,11 +98,11 @@ typedef enum {
#define DefaultBase(Seg) ((nec_state->seg_prefix && (Seg==DS0 || Seg==SS)) ? nec_state->prefix_base : nec_state->sregs[Seg] << 4)
#define GetMemB(Seg,Off) (read_byte(DefaultBase(Seg) + (Off)))
#define GetMemW(Seg,Off) (read_word(DefaultBase(Seg) + (Off)))
#define GetMemB(Seg,Off) (read_mem_byte(DefaultBase(Seg) + (Off)))
#define GetMemW(Seg,Off) (read_mem_word(DefaultBase(Seg) + (Off)))
#define PutMemB(Seg,Off,x) { write_byte(DefaultBase(Seg) + (Off), (x)); }
#define PutMemW(Seg,Off,x) { write_word(DefaultBase(Seg) + (Off), (x)); }
#define PutMemB(Seg,Off,x) { write_mem_byte(DefaultBase(Seg) + (Off), (x)); }
#define PutMemW(Seg,Off,x) { write_mem_word(DefaultBase(Seg) + (Off), (x)); }
/* prefetch timing */
@ -112,8 +112,8 @@ typedef enum {
#define EMPTY_PREFETCH() nec_state->prefetch_reset = 1
#define PUSH(val) { nec_state->regs.w[SP]-=2; write_word((((nec_state->sregs[SS]<<4)+nec_state->regs.w[SP])),val); }
#define POP(var) { var = read_word((((nec_state->sregs[SS]<<4)+nec_state->regs.w[SP]))); nec_state->regs.w[SP]+=2; }
#define PUSH(val) { nec_state->regs.w[SP]-=2; write_mem_word((((nec_state->sregs[SS]<<4)+nec_state->regs.w[SP])),val); }
#define POP(var) { var = read_mem_word((((nec_state->sregs[SS]<<4)+nec_state->regs.w[SP]))); nec_state->regs.w[SP]+=2; }
#define GetModRM UINT32 ModRM=FETCH()
@ -221,7 +221,7 @@ typedef enum {
} \
else { \
(*GetEA[ModRM])(nec_state); \
tmp=read_byte(EA); \
tmp=read_mem_byte(EA); \
}
#define BITOP_WORD \
@ -231,7 +231,7 @@ typedef enum {
} \
else { \
(*GetEA[ModRM])(nec_state); \
tmp=read_word(EA); \
tmp=read_mem_word(EA); \
}
#define BIT_NOT \

4
src/emu/cpu/pdp1/pdp1.c
View File

@ -343,8 +343,8 @@
#define LOG_EXTRA 0
#define LOG_IOT_EXTRA 0
#define READ_PDP_18BIT(A) ((signed)memory_read_dword_32be(cpustate->program, (A)<<2))
#define WRITE_PDP_18BIT(A,V) (memory_write_dword_32be(cpustate->program, (A)<<2,(V)))
#define READ_PDP_18BIT(A) ((signed)cpustate->program->read_dword((A)<<2))
#define WRITE_PDP_18BIT(A,V) (cpustate->program->write_dword((A)<<2,(V)))
/* PDP1 Registers */

4
src/emu/cpu/pdp1/tx0.c
View File

@ -76,8 +76,8 @@ INLINE tx0_state *get_safe_token(running_device *device)
return (tx0_state *)downcast<legacy_cpu_device *>(device)->token();
}
#define READ_TX0_18BIT(A) ((signed)memory_read_dword_32be(cpustate->program, (A)<<2))
#define WRITE_TX0_18BIT(A,V) (memory_write_dword_32be(cpustate->program, (A)<<2,(V)))
#define READ_TX0_18BIT(A) ((signed)cpustate->program->read_dword((A)<<2))
#define WRITE_TX0_18BIT(A,V) (cpustate->program->write_dword((A)<<2,(V)))
#define io_handler_rim 3

10
src/emu/cpu/pic16c5x/pic16c5x.c
View File

@ -133,12 +133,12 @@ INLINE void update_internalram_ptr(pic16c5x_state *cpustate)
#define PIC16C5x_RDOP(A) (memory_decrypted_read_word(cpustate->program, (A)<<1))
#define PIC16C5x_RAM_RDMEM(A) ((UINT8)memory_read_byte_8le(cpustate->data, A))
#define PIC16C5x_RAM_WRMEM(A,V) (memory_write_byte_8le(cpustate->data, A,V))
#define PIC16C5x_In(Port) ((UINT8)memory_read_byte_8le(cpustate->io, (Port)))
#define PIC16C5x_Out(Port,Value) (memory_write_byte_8le(cpustate->io, (Port),Value))
#define PIC16C5x_RAM_RDMEM(A) ((UINT8)cpustate->data->read_byte(A))
#define PIC16C5x_RAM_WRMEM(A,V) (cpustate->data->write_byte(A,V))
#define PIC16C5x_In(Port) ((UINT8)cpustate->io->read_byte((Port)))
#define PIC16C5x_Out(Port,Value) (cpustate->io->write_byte((Port),Value))
/************ Read the state of the T0 Clock input signal ************/
#define PIC16C5x_T0_In (memory_read_byte_8le(cpustate->io, PIC16C5x_T0))
#define PIC16C5x_T0_In (cpustate->io->read_byte(PIC16C5x_T0))
#define M_RDRAM(A) (((A) < 8) ? cpustate->internalram[A] : PIC16C5x_RAM_RDMEM(A))
#define M_WRTRAM(A,V) do { if ((A) < 8) cpustate->internalram[A] = (V); else PIC16C5x_RAM_WRMEM(A,V); } while (0)

10
src/emu/cpu/pic16c62x/pic16c62x.c
View File

@ -130,12 +130,12 @@ INLINE void update_internalram_ptr(pic16c62x_state *cpustate)
}
#define PIC16C62x_RDOP(A) (memory_decrypted_read_word(cpustate->program, (A)<<1))
#define PIC16C62x_RAM_RDMEM(A) ((UINT8)memory_read_byte_8le(cpustate->data, A))
#define PIC16C62x_RAM_WRMEM(A,V) (memory_write_byte_8le(cpustate->data, A,V))
#define PIC16C62x_In(Port) ((UINT8)memory_read_byte_8le(cpustate->io, (Port)))
#define PIC16C62x_Out(Port,Value) (memory_write_byte_8le(cpustate->io, (Port),Value))
#define PIC16C62x_RAM_RDMEM(A) ((UINT8)cpustate->data->read_byte(A))
#define PIC16C62x_RAM_WRMEM(A,V) (cpustate->data->write_byte(A,V))
#define PIC16C62x_In(Port) ((UINT8)cpustate->io->read_byte((Port)))
#define PIC16C62x_Out(Port,Value) (cpustate->io->write_byte((Port),Value))
/************ Read the state of the T0 Clock input signal ************/
#define PIC16C62x_T0_In (memory_read_byte_8le(cpustate->io, PIC16C62x_T0) >> 4)
#define PIC16C62x_T0_In (cpustate->io->read_byte(PIC16C62x_T0) >> 4)
#define M_RDRAM(A) (((A) == 0) ? cpustate->internalram[0] : PIC16C62x_RAM_RDMEM(A))
#define M_WRTRAM(A,V) do { if ((A) == 0) cpustate->internalram[0] = (V); else PIC16C62x_RAM_WRMEM(A,V); } while (0)

8
src/emu/cpu/powerpc/ppc403.c
View File

@ -634,7 +634,7 @@ static void ppc403_spu_w(UINT32 a, UINT8 d)
for (i=0; i < length; i++)
{
memory_write_byte_32be(ppc.program, ppc.dma[ch].da++, spu_rx_dma_ptr[i]);
ppc.program->write_byte(ppc.dma[ch].da++, spu_rx_dma_ptr[i]);
}
}
@ -809,7 +809,7 @@ static void ppc403_dma_exec(int ch)
int length = ppc.dma[ch].ct;
for( i=0; i < length; i++ ) {
spu_tx_dma_ptr[i] = memory_read_byte_32be(ppc.program, ppc.dma[ch].da++);
spu_tx_dma_ptr[i] = ppc.program->read_byte(ppc.dma[ch].da++);
}
spu_tx_dma_handler(length);
}
@ -910,7 +910,7 @@ static UINT8 ppc403_read8(address_space *space, UINT32 a)
{
if(a >= 0x40000000 && a <= 0x4000000f) /* Serial Port */
return ppc403_spu_r(a);
return memory_read_byte_32be(space, a);
return space->read_byte(a);
}
#define ppc403_read16 memory_read_word_32be
@ -923,7 +923,7 @@ static void ppc403_write8(address_space *space, UINT32 a, UINT8 d)
ppc403_spu_w(a, d);
return;
}
memory_write_byte_32be(space, a, d);
space->write_byte(a, d);
}
#define ppc403_write16 memory_write_word_32be

42
src/emu/cpu/powerpc/ppc_mem.c
View File

@ -309,56 +309,56 @@ static int ppc_translate_address_cb(int space, offs_t *addr)
static UINT8 ppc_read8_translated(address_space *space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
return memory_read_byte_64be(space, address);
return space->read_byte(address);
}
static UINT16 ppc_read16_translated(address_space *space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
return memory_read_word_64be(space, address);
return space->read_word(address);
}
static UINT32 ppc_read32_translated(address_space *space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
return memory_read_dword_64be(space, address);
return space->read_dword(address);
}
static UINT64 ppc_read64_translated(address_space *space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
return memory_read_qword_64be(space, address);
return space->read_qword(address);
}
static void ppc_write8_translated(address_space *space, offs_t address, UINT8 data)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
memory_write_byte_64be(space, address, data);
space->write_byte(address, data);
}
static void ppc_write16_translated(address_space *space, offs_t address, UINT16 data)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
memory_write_word_64be(space, address, data);
space->write_word(address, data);
}
static void ppc_write32_translated(address_space *space, offs_t address, UINT32 data)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
memory_write_dword_64be(space, address, data);
space->write_dword(address, data);
}
static void ppc_write64_translated(address_space *space, offs_t address, UINT64 data)
{
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
memory_write_qword_64be(space, address, data);
space->write_qword(address, data);
}
#ifndef PPC_DRC
static UINT32 ppc_readop_translated(address_space *space, offs_t address)
{
ppc_translate_address(&address, PPC_TRANSLATE_CODE | PPC_TRANSLATE_READ);
return memory_read_dword_64be(space, address);
return space->read_dword(address);
}
#endif
@ -385,10 +385,10 @@ static CPU_READOP( ppc )
{
switch(size)
{
case 1: *value = memory_read_byte(ppc.program, offset); break;
case 2: *value = memory_read_word(ppc.program, offset); break;
case 4: *value = memory_read_dword(ppc.program, offset); break;
case 8: *value = memory_read_qword(ppc.program, offset); break;
case 1: *value = ppc.program->read_byte(offset); break;
case 2: *value = ppc.program->read_word(offset); break;
case 4: *value = ppc.program->read_dword(offset); break;
case 8: *value = ppc.program->read_qword(offset); break;
}
}
@ -406,10 +406,10 @@ static CPU_READ( ppc )
{
switch(size)
{
case 1: *value = memory_read_byte(ppc.program, offset); break;
case 2: *value = memory_read_word(ppc.program, offset); break;
case 4: *value = memory_read_dword(ppc.program, offset); break;
case 8: *value = memory_read_qword(ppc.program, offset); break;
case 1: *value = ppc.program->read_byte(offset); break;
case 2: *value = ppc.program->read_word(offset); break;
case 4: *value = ppc.program->read_dword(offset); break;
case 8: *value = ppc.program->read_qword(offset); break;
}
}
@ -425,10 +425,10 @@ static CPU_WRITE( ppc )
{
switch(size)
{
case 1: memory_write_byte(ppc.program, offset, value); break;
case 2: memory_write_word(ppc.program, offset, value); break;
case 4: memory_write_dword(ppc.program, offset, value); break;
case 8: memory_write_qword(ppc.program, offset, value); break;
case 1: ppc.program->write_byte(offset, value); break;
case 2: ppc.program->write_word(offset, value); break;
case 4: ppc.program->write_dword(offset, value); break;
case 8: ppc.program->write_qword(offset, value); break;
}
}

14
src/emu/cpu/powerpc/ppccom.c
View File

@ -1639,7 +1639,7 @@ static int ppc4xx_dma_fetch_transmit_byte(powerpc_state *ppc, int dmachan, UINT8
return FALSE;
/* fetch the data */
*byte = memory_read_byte(ppc->program, dmaregs[DCR4XX_DMADA0]++);
*byte = ppc->program->read_byte(dmaregs[DCR4XX_DMADA0]++);
ppc4xx_dma_decrement_count(ppc, dmachan);
return TRUE;
}
@ -1663,7 +1663,7 @@ static int ppc4xx_dma_handle_receive_byte(powerpc_state *ppc, int dmachan, UINT8
return FALSE;
/* store the data */
memory_write_byte(ppc->program, dmaregs[DCR4XX_DMADA0]++, byte);
ppc->program->write_byte(dmaregs[DCR4XX_DMADA0]++, byte);
ppc4xx_dma_decrement_count(ppc, dmachan);
return TRUE;
}
@ -1716,7 +1716,7 @@ static void ppc4xx_dma_exec(powerpc_state *ppc, int dmachan)
case 1:
do
{
memory_write_byte(ppc->program, dmaregs[DCR4XX_DMADA0], memory_read_byte(ppc->program, dmaregs[DCR4XX_DMASA0]));
ppc->program->write_byte(dmaregs[DCR4XX_DMADA0], ppc->program->read_byte(dmaregs[DCR4XX_DMASA0]));
dmaregs[DCR4XX_DMASA0] += srcinc;
dmaregs[DCR4XX_DMADA0] += destinc;
} while (!ppc4xx_dma_decrement_count(ppc, dmachan));
@ -1726,7 +1726,7 @@ static void ppc4xx_dma_exec(powerpc_state *ppc, int dmachan)
case 2:
do
{
memory_write_word(ppc->program, dmaregs[DCR4XX_DMADA0], memory_read_word(ppc->program, dmaregs[DCR4XX_DMASA0]));
ppc->program->write_word(dmaregs[DCR4XX_DMADA0], ppc->program->read_word(dmaregs[DCR4XX_DMASA0]));
dmaregs[DCR4XX_DMASA0] += srcinc;
dmaregs[DCR4XX_DMADA0] += destinc;
} while (!ppc4xx_dma_decrement_count(ppc, dmachan));
@ -1736,7 +1736,7 @@ static void ppc4xx_dma_exec(powerpc_state *ppc, int dmachan)
case 4:
do
{
memory_write_dword(ppc->program, dmaregs[DCR4XX_DMADA0], memory_read_dword(ppc->program, dmaregs[DCR4XX_DMASA0]));
ppc->program->write_dword(dmaregs[DCR4XX_DMADA0], ppc->program->read_dword(dmaregs[DCR4XX_DMASA0]));
dmaregs[DCR4XX_DMASA0] += srcinc;
dmaregs[DCR4XX_DMADA0] += destinc;
} while (!ppc4xx_dma_decrement_count(ppc, dmachan));
@ -1746,8 +1746,8 @@ static void ppc4xx_dma_exec(powerpc_state *ppc, int dmachan)
case 16:
do
{
memory_write_qword(ppc->program, dmaregs[DCR4XX_DMADA0], memory_read_qword(ppc->program, dmaregs[DCR4XX_DMASA0]));
memory_write_qword(ppc->program, dmaregs[DCR4XX_DMADA0] + 8, memory_read_qword(ppc->program, dmaregs[DCR4XX_DMASA0] + 8));
ppc->program->write_qword(dmaregs[DCR4XX_DMADA0], ppc->program->read_qword(dmaregs[DCR4XX_DMASA0]));
ppc->program->write_qword(dmaregs[DCR4XX_DMADA0] + 8, ppc->program->read_qword(dmaregs[DCR4XX_DMASA0] + 8));
dmaregs[DCR4XX_DMASA0] += srcinc;
dmaregs[DCR4XX_DMADA0] += destinc;
} while (!ppc4xx_dma_decrement_count(ppc, dmachan));

34
src/emu/cpu/rsp/rsp.c
View File

@ -109,7 +109,7 @@ INLINE rsp_state *get_safe_token(running_device *device)
INLINE UINT8 READ8(rsp_state *rsp, UINT32 address)
{
address = 0x04000000 | (address & 0xfff);
return memory_read_byte_32be(rsp->program, address);
return rsp->program->read_byte(address);
}
INLINE UINT16 READ16(rsp_state *rsp, UINT32 address)
@ -119,10 +119,10 @@ INLINE UINT16 READ16(rsp_state *rsp, UINT32 address)
if (address & 1)
{
//osd_die("RSP: READ16: unaligned %08X at %08X\n", address, rsp->ppc);
return ((memory_read_byte_32be(rsp->program, address+0) & 0xff) << 8) | (memory_read_byte_32be(rsp->program, address+1) & 0xff);
return ((rsp->program->read_byte(address+0) & 0xff) << 8) | (rsp->program->read_byte(address+1) & 0xff);
}
return memory_read_word_32be(rsp->program, address);
return rsp->program->read_word(address);
}
INLINE UINT32 READ32(rsp_state *rsp, UINT32 address)
@ -132,19 +132,19 @@ INLINE UINT32 READ32(rsp_state *rsp, UINT32 address)
if (address & 3)
{
//osd_die("RSP: READ32: unaligned %08X at %08X\n", address, rsp->ppc);
return ((memory_read_byte_32be(rsp->program, address + 0) & 0xff) << 24) |
((memory_read_byte_32be(rsp->program, address + 1) & 0xff) << 16) |
((memory_read_byte_32be(rsp->program, address + 2) & 0xff) << 8) |
((memory_read_byte_32be(rsp->program, address + 3) & 0xff) << 0);
return ((rsp->program->read_byte(address + 0) & 0xff) << 24) |
((rsp->program->read_byte(address + 1) & 0xff) << 16) |
((rsp->program->read_byte(address + 2) & 0xff) << 8) |
((rsp->program->read_byte(address + 3) & 0xff) << 0);
}
return memory_read_dword_32be(rsp->program, address);
return rsp->program->read_dword(address);
}
INLINE void WRITE8(rsp_state *rsp, UINT32 address, UINT8 data)
{
address = 0x04000000 | (address & 0xfff);
memory_write_byte_32be(rsp->program, address, data);
rsp->program->write_byte(address, data);
}
INLINE void WRITE16(rsp_state *rsp, UINT32 address, UINT16 data)
@ -154,12 +154,12 @@ INLINE void WRITE16(rsp_state *rsp, UINT32 address, UINT16 data)
if (address & 1)
{
//fatalerror("RSP: WRITE16: unaligned %08X, %04X at %08X\n", address, data, rsp->ppc);
memory_write_byte_32be(rsp->program, address + 0, (data >> 8) & 0xff);
memory_write_byte_32be(rsp->program, address + 1, (data >> 0) & 0xff);
rsp->program->write_byte(address + 0, (data >> 8) & 0xff);
rsp->program->write_byte(address + 1, (data >> 0) & 0xff);
return;
}
memory_write_word_32be(rsp->program, address, data);
rsp->program->write_word(address, data);
}
INLINE void WRITE32(rsp_state *rsp, UINT32 address, UINT32 data)
@ -169,14 +169,14 @@ INLINE void WRITE32(rsp_state *rsp, UINT32 address, UINT32 data)
if (address & 3)
{
//osd_die("RSP: WRITE32: unaligned %08X, %08X at %08X\n", address, data, rsp->ppc);
memory_write_byte_32be(rsp->program, address + 0, (data >> 24) & 0xff);
memory_write_byte_32be(rsp->program, address + 1, (data >> 16) & 0xff);
memory_write_byte_32be(rsp->program, address + 2, (data >> 8) & 0xff);
memory_write_byte_32be(rsp->program, address + 3, (data >> 0) & 0xff);
rsp->program->write_byte(address + 0, (data >> 24) & 0xff);
rsp->program->write_byte(address + 1, (data >> 16) & 0xff);
rsp->program->write_byte(address + 2, (data >> 8) & 0xff);
rsp->program->write_byte(address + 3, (data >> 0) & 0xff);
return;
}
memory_write_dword_32be(rsp->program, address, data);
rsp->program->write_dword(address, data);
}
/*****************************************************************************/

24
src/emu/cpu/s2650/s2650.c
View File

@ -151,7 +151,7 @@ static const int S2650_relative[0x100] =
* RDMEM
* read memory byte from addr
***************************************************************/
#define RDMEM(addr) memory_read_byte_8le(s2650c->program, addr)
#define RDMEM(addr) s2650c->program->read_byte(addr)
static void s2650_set_sense(s2650_regs *s2650c, int state);
@ -161,7 +161,7 @@ INLINE void set_psu(s2650_regs *s2650c, UINT8 new_val)
s2650c->psu = new_val;
if ((new_val ^ old) & FO)
memory_write_byte_8le(s2650c->io, S2650_FO_PORT, (new_val & FO) ? 1 : 0);
s2650c->io->write_byte(S2650_FO_PORT, (new_val & FO) ? 1 : 0);
}
INLINE UINT8 get_sp(s2650_regs *s2650c)
@ -532,7 +532,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* Store source register to memory addr (CC unchanged)
***************************************************************/
#define M_STR(address,source) \
memory_write_byte_8le(s2650c->program, address, source)
s2650c->program->write_byte(address, source)
/***************************************************************
* M_AND
@ -677,7 +677,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
***************************************************************/
#define M_SPSU() \
{ \
R0 = ((s2650c->psu & ~PSU34) | (memory_read_byte_8le(s2650c->io, S2650_SENSE_PORT) ? SI : 0)); \
R0 = ((s2650c->psu & ~PSU34) | (s2650c->io->read_byte(S2650_SENSE_PORT) ? SI : 0)); \
SET_CC(R0); \
}
@ -746,7 +746,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
#define M_TPSU() \
{ \
UINT8 tpsu = ARG(s2650c); \
UINT8 rpsu = (s2650c->psu | (memory_read_byte_8le(s2650c->io, S2650_SENSE_PORT) ? SI : 0)); \
UINT8 rpsu = (s2650c->psu | (s2650c->io->read_byte(S2650_SENSE_PORT) ? SI : 0)); \
s2650c->psl &= ~CC; \
if( (rpsu & tpsu) != tpsu ) \
s2650c->psl |= 0x80; \
@ -879,7 +879,7 @@ static int s2650_get_sense(s2650_regs *s2650c)
{
/* OR'd with Input to allow for external connections */
return (((s2650c->psu & SI) ? 1 : 0) | ((memory_read_byte_8le(s2650c->io, S2650_SENSE_PORT) & SI) ? 1 : 0));
return (((s2650c->psu & SI) ? 1 : 0) | ((s2650c->io->read_byte(S2650_SENSE_PORT) & SI) ? 1 : 0));
}
static CPU_EXECUTE( s2650 )
@ -1018,7 +1018,7 @@ static CPU_EXECUTE( s2650 )
case 0x32: /* REDC,2 */
case 0x33: /* REDC,3 */
s2650c->icount -= 6;
s2650c->reg[s2650c->r] = memory_read_byte_8le(s2650c->io, S2650_CTRL_PORT);
s2650c->reg[s2650c->r] = s2650c->io->read_byte(S2650_CTRL_PORT);
SET_CC( s2650c->reg[s2650c->r] );
break;
@ -1108,7 +1108,7 @@ static CPU_EXECUTE( s2650 )
case 0x56: /* REDE,2 v */
case 0x57: /* REDE,3 v */
s2650c->icount -= 9;
s2650c->reg[s2650c->r] = memory_read_byte_8le( s2650c->io, ARG(s2650c) );
s2650c->reg[s2650c->r] = s2650c->io->read_byte( ARG(s2650c) );
SET_CC(s2650c->reg[s2650c->r]);
break;
@ -1167,7 +1167,7 @@ static CPU_EXECUTE( s2650 )
case 0x72: /* REDD,2 */
case 0x73: /* REDD,3 */
s2650c->icount -= 6;
s2650c->reg[s2650c->r] = memory_read_byte_8le(s2650c->io, S2650_DATA_PORT);
s2650c->reg[s2650c->r] = s2650c->io->read_byte(S2650_DATA_PORT);
SET_CC(s2650c->reg[s2650c->r]);
break;
@ -1323,7 +1323,7 @@ static CPU_EXECUTE( s2650 )
case 0xb2: /* WRTC,2 */
case 0xb3: /* WRTC,3 */
s2650c->icount -= 6;
memory_write_byte_8le(s2650c->io, S2650_CTRL_PORT,s2650c->reg[s2650c->r]);
s2650c->io->write_byte(S2650_CTRL_PORT,s2650c->reg[s2650c->r]);
break;
case 0xb4: /* TPSU */
@ -1409,7 +1409,7 @@ static CPU_EXECUTE( s2650 )
case 0xd6: /* WRTE,2 v */
case 0xd7: /* WRTE,3 v */
s2650c->icount -= 9;
memory_write_byte_8le( s2650c->io, ARG(s2650c), s2650c->reg[s2650c->r] );
s2650c->io->write_byte( ARG(s2650c), s2650c->reg[s2650c->r] );
break;
case 0xd8: /* BIRR,0 (*)a */
@ -1467,7 +1467,7 @@ static CPU_EXECUTE( s2650 )
case 0xf2: /* WRTD,2 */
case 0xf3: /* WRTD,3 */
s2650c->icount -= 6;
memory_write_byte_8le(s2650c->io, S2650_DATA_PORT, s2650c->reg[s2650c->r]);
s2650c->io->write_byte(S2650_DATA_PORT, s2650c->reg[s2650c->r]);
break;
case 0xf4: /* TMI,0 v */

4
src/emu/cpu/saturn/satops.c
View File

@ -78,7 +78,7 @@ INLINE int READ_NIBBLE(saturn_state *cpustate, SaturnAdr adr)
{
UINT8 data;
cpustate->icount-=3;
data=memory_read_byte(cpustate->program, adr&0xfffff);
data=cpustate->program->read_byte(adr&0xfffff);
saturn_assert(data<0x10);
if (cpustate->config&&cpustate->config->crc) cpustate->config->crc(cpustate->device, adr&0xfffff, data);
return data;
@ -108,7 +108,7 @@ INLINE void WRITE_NIBBLE(saturn_state *cpustate, SaturnAdr adr, SaturnNib nib)
{
cpustate->icount-=3;
saturn_assert(nib<0x10);
memory_write_byte(cpustate->program, adr&0xfffff,nib);
cpustate->program->write_byte(adr&0xfffff,nib);
}
#define BEGIN_B 0

4
src/emu/cpu/sc61860/scops.c
View File

@ -45,12 +45,12 @@ INLINE UINT16 READ_OP_ARG_WORD(sc61860_state *cpustate)
INLINE UINT8 READ_BYTE(sc61860_state *cpustate, UINT16 adr)
{
return memory_read_byte(cpustate->program, adr);
return cpustate->program->read_byte(adr);
}
INLINE void WRITE_BYTE(sc61860_state *cpustate, UINT16 a,UINT8 v)
{
memory_write_byte(cpustate->program, a,v);
cpustate->program->write_byte(a,v);
}
#define PUSH(v) cpustate->ram[--cpustate->r]=v

4
src/emu/cpu/scmp/scmp.c
View File

@ -81,12 +81,12 @@ INLINE UINT8 ARG(scmp_state *cpustate)
INLINE UINT8 RM(scmp_state *cpustate,UINT32 a)
{
return memory_read_byte_8le(cpustate->program, a);
return cpustate->program->read_byte(a);
}
INLINE void WM(scmp_state *cpustate,UINT32 a, UINT8 v)
{
memory_write_byte_8le(cpustate->program, a, v);
cpustate->program->write_byte(a, v);
}
INLINE void illegal(scmp_state *cpustate,UINT8 opcode)

28
src/emu/cpu/se3208/se3208.c
View File

@ -68,31 +68,31 @@ INLINE se3208_state_t *get_safe_token(running_device *device)
INLINE UINT32 read_dword_unaligned(address_space *space, UINT32 address)
{
if (address & 3)
return memory_read_byte_32le(space,address) | memory_read_byte_32le(space,address+1)<<8 | memory_read_byte_32le(space,address+2)<<16 | memory_read_byte_32le(space,address+3)<<24;
return space->read_byte(address) | space->read_byte(address+1)<<8 | space->read_byte(address+2)<<16 | space->read_byte(address+3)<<24;
else
return memory_read_dword_32le(space,address);
return space->read_dword(address);
}
INLINE UINT16 read_word_unaligned(address_space *space, UINT32 address)
{
if (address & 1)
return memory_read_byte_32le(space,address) | memory_read_byte_32le(space,address+1)<<8;
return space->read_byte(address) | space->read_byte(address+1)<<8;
else
return memory_read_word_32le(space,address);
return space->read_word(address);
}
INLINE void write_dword_unaligned(address_space *space, UINT32 address, UINT32 data)
{
if (address & 3)
{
memory_write_byte_32le(space, address, data & 0xff);
memory_write_byte_32le(space, address+1, (data>>8)&0xff);
memory_write_byte_32le(space, address+2, (data>>16)&0xff);
memory_write_byte_32le(space, address+3, (data>>24)&0xff);
space->write_byte(address, data & 0xff);
space->write_byte(address+1, (data>>8)&0xff);
space->write_byte(address+2, (data>>16)&0xff);
space->write_byte(address+3, (data>>24)&0xff);
}
else
{
memory_write_dword_32le(space, address, data);
space->write_dword(address, data);
}
}
@ -100,19 +100,19 @@ INLINE void write_word_unaligned(address_space *space, UINT32 address, UINT16 da
{
if (address & 1)
{
memory_write_byte_32le(space, address, data & 0xff);
memory_write_byte_32le(space, address+1, (data>>8)&0xff);
space->write_byte(address, data & 0xff);
space->write_byte(address+1, (data>>8)&0xff);
}
else
{
memory_write_word_32le(space, address, data);
space->write_word(address, data);
}
}
INLINE UINT8 SE3208_Read8(se3208_state_t *se3208_state, UINT32 addr)
{
return memory_read_byte_32le(se3208_state->program,addr);
return se3208_state->program->read_byte(addr);
}
INLINE UINT16 SE3208_Read16(se3208_state_t *se3208_state, UINT32 addr)
@ -127,7 +127,7 @@ INLINE UINT32 SE3208_Read32(se3208_state_t *se3208_state, UINT32 addr)
INLINE void SE3208_Write8(se3208_state_t *se3208_state, UINT32 addr,UINT8 val)
{
memory_write_byte_32le(se3208_state->program,addr,val);
se3208_state->program->write_byte(addr,val);
}
INLINE void SE3208_Write16(se3208_state_t *se3208_state, UINT32 addr,UINT16 val)

24
src/emu/cpu/sh2/sh2.c
View File

@ -131,12 +131,12 @@ INLINE UINT8 RB(sh2_state *sh2, offs_t A)
return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xff << (((~A) & 3)*8)) >> (((~A) & 3)*8);
if (A >= 0xc0000000)
return memory_read_byte_32be(sh2->program, A);
return sh2->program->read_byte(A);
if (A >= 0x40000000)
return 0xa5;
return memory_read_byte_32be(sh2->program, A & AM);
return sh2->program->read_byte(A & AM);
}
INLINE UINT16 RW(sh2_state *sh2, offs_t A)
@ -145,12 +145,12 @@ INLINE UINT16 RW(sh2_state *sh2, offs_t A)
return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);
if (A >= 0xc0000000)
return memory_read_word_32be(sh2->program, A);
return sh2->program->read_word(A);
if (A >= 0x40000000)
return 0xa5a5;
return memory_read_word_32be(sh2->program, A & AM);
return sh2->program->read_word(A & AM);
}
INLINE UINT32 RL(sh2_state *sh2, offs_t A)
@ -159,12 +159,12 @@ INLINE UINT32 RL(sh2_state *sh2, offs_t A)
return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
if (A >= 0xc0000000)
return memory_read_dword_32be(sh2->program, A);
return sh2->program->read_dword(A);
if (A >= 0x40000000)
return 0xa5a5a5a5;
return memory_read_dword_32be(sh2->program, A & AM);
return sh2->program->read_dword(A & AM);
}
INLINE void WB(sh2_state *sh2, offs_t A, UINT8 V)
@ -178,14 +178,14 @@ INLINE void WB(sh2_state *sh2, offs_t A, UINT8 V)
if (A >= 0xc0000000)
{
memory_write_byte_32be(sh2->program, A,V);
sh2->program->write_byte(A,V);
return;
}
if (A >= 0x40000000)
return;
memory_write_byte_32be(sh2->program, A & AM,V);
sh2->program->write_byte(A & AM,V);
}
INLINE void WW(sh2_state *sh2, offs_t A, UINT16 V)
@ -198,14 +198,14 @@ INLINE void WW(sh2_state *sh2, offs_t A, UINT16 V)
if (A >= 0xc0000000)
{
memory_write_word_32be(sh2->program, A,V);
sh2->program->write_word(A,V);
return;
}
if (A >= 0x40000000)
return;
memory_write_word_32be(sh2->program, A & AM,V);
sh2->program->write_word(A & AM,V);
}
INLINE void WL(sh2_state *sh2, offs_t A, UINT32 V)
@ -218,14 +218,14 @@ INLINE void WL(sh2_state *sh2, offs_t A, UINT32 V)
if (A >= 0xc0000000)
{
memory_write_dword_32be(sh2->program, A,V);
sh2->program->write_dword(A,V);
return;
}
if (A >= 0x40000000)
return;
memory_write_dword_32be(sh2->program, A & AM,V);
sh2->program->write_dword(A & AM,V);
}
/* code cycles t-bit

36
src/emu/cpu/sh2/sh2comn.c
View File

@ -30,12 +30,12 @@ INLINE UINT32 RL(sh2_state *sh2, offs_t A)
return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
if (A >= 0xc0000000)
return memory_read_dword_32be(sh2->program, A);
return sh2->program->read_dword(A);
if (A >= 0x40000000)
return 0xa5a5a5a5;
return memory_read_dword_32be(sh2->program, A & AM);
return sh2->program->read_dword(A & AM);
}
INLINE void WL(sh2_state *sh2, offs_t A, UINT32 V)
@ -48,14 +48,14 @@ INLINE void WL(sh2_state *sh2, offs_t A, UINT32 V)
if (A >= 0xc0000000)
{
memory_write_dword_32be(sh2->program, A,V);
sh2->program->write_dword(A,V);
return;
}
if (A >= 0x40000000)
return;
memory_write_dword_32be(sh2->program, A & AM,V);
sh2->program->write_dword(A & AM,V);
}
static void sh2_timer_resync(sh2_state *sh2)
@ -185,9 +185,9 @@ static void sh2_dmac_check(sh2_state *sh2, int dma)
if(incd == 2)
dst --;
dmadata = memory_read_byte_32be(sh2->program, src);
dmadata = sh2->program->read_byte(src);
if (sh2->dma_callback_kludge) dmadata = sh2->dma_callback_kludge(src, dst, dmadata, size);
memory_write_byte_32be(sh2->program, dst, dmadata);
sh2->program->write_byte(dst, dmadata);
if(incs == 1)
src ++;
@ -207,9 +207,9 @@ static void sh2_dmac_check(sh2_state *sh2, int dma)
dst -= 2;
// check: should this really be using read_word_32 / write_word_32?
dmadata = memory_read_word_32be(sh2->program, src);
dmadata = sh2->program->read_word(src);
if (sh2->dma_callback_kludge) dmadata = sh2->dma_callback_kludge(src, dst, dmadata, size);
memory_write_word_32be(sh2->program, dst, dmadata);
sh2->program->write_word(dst, dmadata);
if(incs == 1)
src += 2;
@ -227,9 +227,9 @@ static void sh2_dmac_check(sh2_state *sh2, int dma)
if(incd == 2)
dst -= 4;
dmadata = memory_read_dword_32be(sh2->program, src);
dmadata = sh2->program->read_dword(src);
if (sh2->dma_callback_kludge) dmadata = sh2->dma_callback_kludge(src, dst, dmadata, size);
memory_write_dword_32be(sh2->program, dst, dmadata);
sh2->program->write_dword(dst, dmadata);
if(incs == 1)
src += 4;
@ -247,21 +247,21 @@ static void sh2_dmac_check(sh2_state *sh2, int dma)
if(incd == 2)
dst -= 16;
dmadata = memory_read_dword_32be(sh2->program, src);
dmadata = sh2->program->read_dword(src);
if (sh2->dma_callback_kludge) dmadata = sh2->dma_callback_kludge(src, dst, dmadata, size);
memory_write_dword_32be(sh2->program, dst, dmadata);
sh2->program->write_dword(dst, dmadata);
dmadata = memory_read_dword_32be(sh2->program, src+4);
dmadata = sh2->program->read_dword(src+4);
if (sh2->dma_callback_kludge) dmadata = sh2->dma_callback_kludge(src, dst, dmadata, size);
memory_write_dword_32be(sh2->program, dst+4, dmadata);
sh2->program->write_dword(dst+4, dmadata);
dmadata = memory_read_dword_32be(sh2->program, src+8);
dmadata = sh2->program->read_dword(src+8);
if (sh2->dma_callback_kludge) dmadata = sh2->dma_callback_kludge(src, dst, dmadata, size);
memory_write_dword_32be(sh2->program, dst+8, dmadata);
sh2->program->write_dword(dst+8, dmadata);
dmadata = memory_read_dword_32be(sh2->program, src+12);
dmadata = sh2->program->read_dword(src+12);
if (sh2->dma_callback_kludge) dmadata = sh2->dma_callback_kludge(src, dst, dmadata, size);
memory_write_dword_32be(sh2->program, dst+12, dmadata);
sh2->program->write_dword(dst+12, dmadata);
src += 16;
if(incd == 1)

12
src/emu/cpu/sh2/sh2drc.c
View File

@ -151,9 +151,9 @@ INLINE UINT16 RW(sh2_state *sh2, offs_t A)
return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);
if (A >= 0xc0000000)
return memory_read_word_32be(sh2->program, A);
return sh2->program->read_word(A);
return memory_read_word_32be(sh2->program, A & AM);
return sh2->program->read_word(A & AM);
}
INLINE UINT32 RL(sh2_state *sh2, offs_t A)
@ -162,9 +162,9 @@ INLINE UINT32 RL(sh2_state *sh2, offs_t A)
return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff);
if (A >= 0xc0000000)
return memory_read_dword_32be(sh2->program, A);
return sh2->program->read_dword(A);
return memory_read_dword_32be(sh2->program, A & AM);
return sh2->program->read_dword(A & AM);
}
/*-------------------------------------------------
@ -827,8 +827,8 @@ static CPU_RESET( sh2 )
sh2->m = m;
memset(sh2->m, 0, 0x200);
sh2->pc = memory_read_dword_32be(sh2->program, 0);
sh2->r[15] = memory_read_dword_32be(sh2->program, 4);
sh2->pc = sh2->program->read_dword(0);
sh2->r[15] = sh2->program->read_dword(4);
sh2->sr = I;
sh2->internal_irq_level = -1;

26
src/emu/cpu/sh4/sh4.c
View File

@ -126,9 +126,9 @@ INLINE UINT8 RB(sh4_state *sh4, offs_t A)
return sh4_internal_r(sh4->internal, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), 0xff << ((A & 3)*8)) >> ((A & 3)*8);
if (A >= 0xe0000000)
return memory_read_byte_64le(sh4->program, A);
return sh4->program->read_byte(A);
return memory_read_byte_64le(sh4->program, A & AM);
return sh4->program->read_byte(A & AM);
}
INLINE UINT16 RW(sh4_state *sh4, offs_t A)
@ -137,9 +137,9 @@ INLINE UINT16 RW(sh4_state *sh4, offs_t A)
return sh4_internal_r(sh4->internal, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), 0xffff << ((A & 2)*8)) >> ((A & 2)*8);
if (A >= 0xe0000000)
return memory_read_word_64le(sh4->program, A);
return sh4->program->read_word(A);
return memory_read_word_64le(sh4->program, A & AM);
return sh4->program->read_word(A & AM);
}
INLINE UINT32 RL(sh4_state *sh4, offs_t A)
@ -148,9 +148,9 @@ INLINE UINT32 RL(sh4_state *sh4, offs_t A)
return sh4_internal_r(sh4->internal, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), 0xffffffff);
if (A >= 0xe0000000)
return memory_read_dword_64le(sh4->program, A);
return sh4->program->read_dword(A);
return memory_read_dword_64le(sh4->program, A & AM);
return sh4->program->read_dword(A & AM);
}
INLINE void WB(sh4_state *sh4, offs_t A, UINT8 V)
@ -164,11 +164,11 @@ INLINE void WB(sh4_state *sh4, offs_t A, UINT8 V)
if (A >= 0xe0000000)
{
memory_write_byte_64le(sh4->program, A,V);
sh4->program->write_byte(A,V);
return;
}
memory_write_byte_64le(sh4->program, A & AM,V);
sh4->program->write_byte(A & AM,V);
}
INLINE void WW(sh4_state *sh4, offs_t A, UINT16 V)
@ -181,11 +181,11 @@ INLINE void WW(sh4_state *sh4, offs_t A, UINT16 V)
if (A >= 0xe0000000)
{
memory_write_word_64le(sh4->program, A,V);
sh4->program->write_word(A,V);
return;
}
memory_write_word_64le(sh4->program, A & AM,V);
sh4->program->write_word(A & AM,V);
}
INLINE void WL(sh4_state *sh4, offs_t A, UINT32 V)
@ -198,14 +198,14 @@ INLINE void WL(sh4_state *sh4, offs_t A, UINT32 V)
if (A >= 0xe0000000)
{
memory_write_dword_64le(sh4->program, A,V);
sh4->program->write_dword(A,V);
return;
}
/* if (A >= 0x40000000)
return;*/
memory_write_dword_64le(sh4->program, A & AM,V);
sh4->program->write_dword(A & AM,V);
}
/* code cycles t-bit
@ -2129,7 +2129,7 @@ INLINE void PREFM(sh4_state *sh4, UINT32 n)
for (a = 0;a < 4;a++)
{
// shouldn't be causing a memory read, should store sq writes in registers.
memory_write_qword_64le(sh4->program, dest, memory_read_qword_64le(sh4->program, addr));
sh4->program->write_qword(dest, sh4->program->read_qword(addr));
addr += 8;
dest += 8;
}

36
src/emu/cpu/sh4/sh4comn.c
View File

@ -480,7 +480,7 @@ static int sh4_dma_transfer(sh4_state *sh4, int channel, int timermode, UINT32 c
src --;
if(incd == 2)
dst --;
memory_write_byte_64le(sh4->program, dst, memory_read_byte_64le(sh4->program, src));
sh4->program->write_byte(dst, sh4->program->read_byte(src));
if(incs == 1)
src ++;
if(incd == 1)
@ -496,7 +496,7 @@ static int sh4_dma_transfer(sh4_state *sh4, int channel, int timermode, UINT32 c
src -= 2;
if(incd == 2)
dst -= 2;
memory_write_word_64le(sh4->program, dst, memory_read_word_64le(sh4->program, src));
sh4->program->write_word(dst, sh4->program->read_word(src));
if(incs == 1)
src += 2;
if(incd == 1)
@ -512,7 +512,7 @@ static int sh4_dma_transfer(sh4_state *sh4, int channel, int timermode, UINT32 c
src -= 8;
if(incd == 2)
dst -= 8;
memory_write_qword_64le(sh4->program, dst, memory_read_qword_64le(sh4->program, src));
sh4->program->write_qword(dst, sh4->program->read_qword(src));
if(incs == 1)
src += 8;
if(incd == 1)
@ -529,7 +529,7 @@ static int sh4_dma_transfer(sh4_state *sh4, int channel, int timermode, UINT32 c
src -= 4;
if(incd == 2)
dst -= 4;
memory_write_dword_64le(sh4->program, dst, memory_read_dword_64le(sh4->program, src));
sh4->program->write_dword(dst, sh4->program->read_dword(src));
if(incs == 1)
src += 4;
if(incd == 1)
@ -546,10 +546,10 @@ static int sh4_dma_transfer(sh4_state *sh4, int channel, int timermode, UINT32 c
src -= 32;
if(incd == 2)
dst -= 32;
memory_write_qword_64le(sh4->program, dst, memory_read_qword_64le(sh4->program, src));
memory_write_qword_64le(sh4->program, dst+8, memory_read_qword_64le(sh4->program, src+8));
memory_write_qword_64le(sh4->program, dst+16, memory_read_qword_64le(sh4->program, src+16));
memory_write_qword_64le(sh4->program, dst+24, memory_read_qword_64le(sh4->program, src+24));
sh4->program->write_qword(dst, sh4->program->read_qword(src));
sh4->program->write_qword(dst+8, sh4->program->read_qword(src+8));
sh4->program->write_qword(dst+16, sh4->program->read_qword(src+16));
sh4->program->write_qword(dst+24, sh4->program->read_qword(src+24));
if(incs == 1)
src += 32;
if(incd == 1)
@ -910,11 +910,11 @@ WRITE32_HANDLER( sh4_internal_w )
sh4->ioport16_direction &= 0xffff;
sh4->ioport16_pullup = (sh4->ioport16_pullup | sh4->ioport16_direction) ^ 0xffff;
if (sh4->m[BCR2] & 1)
memory_write_dword_64le(sh4->io, SH4_IOPORT_16, (UINT64)(sh4->m[PDTRA] & sh4->ioport16_direction) | ((UINT64)sh4->m[PCTRA] << 16));
sh4->io->write_dword(SH4_IOPORT_16, (UINT64)(sh4->m[PDTRA] & sh4->ioport16_direction) | ((UINT64)sh4->m[PCTRA] << 16));
break;
case PDTRA:
if (sh4->m[BCR2] & 1)
memory_write_dword_64le(sh4->io, SH4_IOPORT_16, (UINT64)(sh4->m[PDTRA] & sh4->ioport16_direction) | ((UINT64)sh4->m[PCTRA] << 16));
sh4->io->write_dword(SH4_IOPORT_16, (UINT64)(sh4->m[PDTRA] & sh4->ioport16_direction) | ((UINT64)sh4->m[PCTRA] << 16));
break;
case PCTRB:
sh4->ioport4_pullup = 0;
@ -926,11 +926,11 @@ WRITE32_HANDLER( sh4_internal_w )
sh4->ioport4_direction &= 0xf;
sh4->ioport4_pullup = (sh4->ioport4_pullup | sh4->ioport4_direction) ^ 0xf;
if (sh4->m[BCR2] & 1)
memory_write_dword_64le(sh4->io, SH4_IOPORT_4, (sh4->m[PDTRB] & sh4->ioport4_direction) | (sh4->m[PCTRB] << 16));
sh4->io->write_dword(SH4_IOPORT_4, (sh4->m[PDTRB] & sh4->ioport4_direction) | (sh4->m[PCTRB] << 16));
break;
case PDTRB:
if (sh4->m[BCR2] & 1)
memory_write_dword_64le(sh4->io, SH4_IOPORT_4, (sh4->m[PDTRB] & sh4->ioport4_direction) | (sh4->m[PCTRB] << 16));
sh4->io->write_dword(SH4_IOPORT_4, (sh4->m[PDTRB] & sh4->ioport4_direction) | (sh4->m[PCTRB] << 16));
break;
case SCBRR2:
@ -981,11 +981,11 @@ READ32_HANDLER( sh4_internal_r )
// I/O ports
case PDTRA:
if (sh4->m[BCR2] & 1)
return (memory_read_dword_64le(sh4->io, SH4_IOPORT_16) & ~sh4->ioport16_direction) | (sh4->m[PDTRA] & sh4->ioport16_direction);
return (sh4->io->read_dword(SH4_IOPORT_16) & ~sh4->ioport16_direction) | (sh4->m[PDTRA] & sh4->ioport16_direction);
break;
case PDTRB:
if (sh4->m[BCR2] & 1)
return (memory_read_dword_64le(sh4->io, SH4_IOPORT_4) & ~sh4->ioport4_direction) | (sh4->m[PDTRB] & sh4->ioport4_direction);
return (sh4->io->read_dword(SH4_IOPORT_4) & ~sh4->ioport4_direction) | (sh4->m[PDTRB] & sh4->ioport4_direction);
break;
// SCIF (UART with FIFO)
@ -1278,7 +1278,7 @@ void sh4_dma_ddt(running_device *device, struct sh4_ddt_dma *s)
len = s->length;
p32bits = (UINT32 *)(s->buffer);
for (pos = 0;pos < len;pos++) {
*p32bits = memory_read_dword_64le(sh4->program, s->source);
*p32bits = sh4->program->read_dword(s->source);
p32bits++;
s->source = s->source + 4;
}
@ -1286,7 +1286,7 @@ void sh4_dma_ddt(running_device *device, struct sh4_ddt_dma *s)
len = s->length;
p32bits = (UINT32 *)(s->buffer);
for (pos = 0;pos < len;pos++) {
memory_write_dword_64le(sh4->program, s->destination, *p32bits);
sh4->program->write_dword(s->destination, *p32bits);
p32bits++;
s->destination = s->destination + 4;
}
@ -1297,7 +1297,7 @@ void sh4_dma_ddt(running_device *device, struct sh4_ddt_dma *s)
len = s->length * 4;
p32bytes = (UINT64 *)(s->buffer);
for (pos = 0;pos < len;pos++) {
*p32bytes = memory_read_qword_64le(sh4->program, s->source);
*p32bytes = sh4->program->read_qword(s->source);
p32bytes++;
s->destination = s->destination + 8;
}
@ -1305,7 +1305,7 @@ void sh4_dma_ddt(running_device *device, struct sh4_ddt_dma *s)
len = s->length * 4;
p32bytes = (UINT64 *)(s->buffer);
for (pos = 0;pos < len;pos++) {
memory_write_qword_64le(sh4->program, s->destination, *p32bytes);
sh4->program->write_qword(s->destination, *p32bytes);
p32bytes++;
s->destination = s->destination + 8;
}

4
src/emu/cpu/sharc/sharcmem.c
View File

@ -153,7 +153,7 @@ static UINT32 dm_read32(SHARC_REGS *cpustate, UINT32 address)
}
}
return memory_read_dword_32le(cpustate->data, address << 2);
return cpustate->data->read_dword(address << 2);
}
static void dm_write32(SHARC_REGS *cpustate, UINT32 address, UINT32 data)
@ -198,5 +198,5 @@ static void dm_write32(SHARC_REGS *cpustate, UINT32 address, UINT32 data)
return;
}
memory_write_dword_32le(cpustate->data, address << 2, data);
cpustate->data->write_dword(address << 2, data);
}

4
src/emu/cpu/sm8500/sm8500.c
View File

@ -68,14 +68,14 @@ static const UINT8 sm8500_b2w[8] = {
};
static UINT8 sm85cpu_mem_readbyte( sm8500_state *cpustate, UINT32 offset ) {
return ( offset < 0x10 ) ? cpustate->register_base[offset] : memory_read_byte_8be( cpustate->program, offset );
return ( offset < 0x10 ) ? cpustate->register_base[offset] : cpustate->program->read_byte( offset );
}
static void sm85cpu_mem_writebyte( sm8500_state *cpustate, UINT32 offset, UINT8 data ) {
if ( offset < 0x10 ) {
cpustate->register_base[offset] = data;
} else {
memory_write_byte_8be( cpustate->program, offset, data );
cpustate->program->write_byte( offset, data );
}
}

8
src/emu/cpu/spc700/spc700.c
View File

@ -247,15 +247,15 @@ INLINE int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
/* ================================= MAME ================================= */
/* ======================================================================== */
#define spc700_read_8(addr) memory_read_byte_8le(cpustate->program,addr)
#define spc700_write_8(addr,data) memory_write_byte_8le(cpustate->program,addr,data)
#define spc700_read_8(addr) cpustate->program->read_byte(addr)
#define spc700_write_8(addr,data) cpustate->program->write_byte(addr,data)
#define spc700_read_8_direct(A) spc700_read_8(A)
#define spc700_write_8_direct(A, V) spc700_write_8(A, V)
//#define spc700_read_instruction(A) memory_decrypted_read_byte(cpustate->program,A)
//#define spc700_read_8_immediate(A) memory_raw_read_byte(cpustate->program,A)
#define spc700_read_instruction(A) memory_read_byte_8le(cpustate->program,A)
#define spc700_read_8_immediate(A) memory_read_byte_8le(cpustate->program,A)
#define spc700_read_instruction(A) cpustate->program->read_byte(A)
#define spc700_read_8_immediate(A) cpustate->program->read_byte(A)
#define spc700_jumping(A)
#define spc700_branching(A)

18
src/emu/cpu/ssem/ssem.c
View File

@ -67,10 +67,10 @@ INLINE UINT32 READ32(ssem_state *cpustate, UINT32 address)
// the address value to get the appropriate byte index.
address <<= 2;
v |= memory_read_byte(cpustate->program, address + 0) << 24;
v |= memory_read_byte(cpustate->program, address + 1) << 16;
v |= memory_read_byte(cpustate->program, address + 2) << 8;
v |= memory_read_byte(cpustate->program, address + 3) << 0;
v |= cpustate->program->read_byte(address + 0) << 24;
v |= cpustate->program->read_byte(address + 1) << 16;
v |= cpustate->program->read_byte(address + 2) << 8;
v |= cpustate->program->read_byte(address + 3) << 0;
return reverse(v);
}
@ -84,10 +84,10 @@ INLINE void WRITE32(ssem_state *cpustate, UINT32 address, UINT32 data)
// the address value to get the appropriate byte index.
address <<= 2;
memory_write_byte(cpustate->program, address + 0, (v >> 24) & 0x000000ff);
memory_write_byte(cpustate->program, address + 1, (v >> 16) & 0x000000ff);
memory_write_byte(cpustate->program, address + 2, (v >> 8) & 0x000000ff);
memory_write_byte(cpustate->program, address + 3, (v >> 0) & 0x000000ff);
cpustate->program->write_byte(address + 0, (v >> 24) & 0x000000ff);
cpustate->program->write_byte(address + 1, (v >> 16) & 0x000000ff);
cpustate->program->write_byte(address + 2, (v >> 8) & 0x000000ff);
cpustate->program->write_byte(address + 3, (v >> 0) & 0x000000ff);
return;
}
@ -130,7 +130,7 @@ static void unimplemented_opcode(ssem_state *cpustate, UINT32 op)
{
for( i = 0; i < 0x80; i++ )
{
fputc(memory_read_byte_32be(cpustate->program, i), store);
fputc(cpustate->program->read_byte(i), store);
}
fclose(store);
}

6
src/emu/cpu/ssp1601/ssp1601.c
View File

@ -84,7 +84,7 @@ INLINE ssp1601_state_t *get_safe_token(running_device *device)
#define PPC ssp1601_state->ppc.w.h
#define FETCH() memory_decrypted_read_word(ssp1601_state->program, rPC++ << 1)
#define PROGRAM_WORD(a) memory_read_word(ssp1601_state->program, (a) << 1)
#define PROGRAM_WORD(a) ssp1601_state->program->read_word((a) << 1)
#define GET_PPC_OFFS() PPC
#define REG_READ(ssp1601_state,r) (((r) <= 4) ? ssp1601_state->gr[r].w.h : reg_read_handlers[r](ssp1601_state, r))
@ -255,13 +255,13 @@ static void write_unknown(ssp1601_state_t *ssp1601_state, int reg, UINT32 d)
static UINT32 read_ext(ssp1601_state_t *ssp1601_state, int reg)
{
reg &= 7;
return memory_read_word_16be(ssp1601_state->io, (reg << 1));
return ssp1601_state->io->read_word((reg << 1));
}
static void write_ext(ssp1601_state_t *ssp1601_state, int reg, UINT32 d)
{
reg &= 7;
memory_write_word_16be(ssp1601_state->io, (reg << 1), d);
ssp1601_state->io->write_word((reg << 1), d);
}
// 4

4
src/emu/cpu/superfx/superfx.c
View File

@ -179,12 +179,12 @@ static void superfx_memory_reset(superfx_state *cpustate)
INLINE UINT8 superfx_bus_read(superfx_state *cpustate, UINT32 addr)
{
return memory_read_byte(cpustate->program, addr);
return cpustate->program->read_byte(addr);
}
INLINE void superfx_bus_write(superfx_state *cpustate, UINT32 addr, UINT8 data)
{
memory_write_byte(cpustate->program, addr, data);
cpustate->program->write_byte(addr, data);
}
INLINE void superfx_pixelcache_flush(superfx_state *cpustate, INT32 line)

8
src/emu/cpu/t11/t11.c
View File

@ -82,25 +82,25 @@ INLINE int ROPCODE(t11_state *cpustate)
INLINE int RBYTE(t11_state *cpustate, int addr)
{
return memory_read_byte_16le(cpustate->program, addr);
return cpustate->program->read_byte(addr);
}
INLINE void WBYTE(t11_state *cpustate, int addr, int data)
{
memory_write_byte_16le(cpustate->program, addr, data);
cpustate->program->write_byte(addr, data);
}
INLINE int RWORD(t11_state *cpustate, int addr)
{
return memory_read_word_16le(cpustate->program, addr & 0xfffe);
return cpustate->program->read_word(addr & 0xfffe);
}
INLINE void WWORD(t11_state *cpustate, int addr, int data)
{
memory_write_word_16le(cpustate->program, addr & 0xfffe, data);
cpustate->program->write_word(addr & 0xfffe, data);
}

12
src/emu/cpu/tlcs90/tlcs90.c
View File

@ -177,16 +177,16 @@ static const char *const cc_names[] = { "f", "lt", "le", "ule", "ov", "mi", "z",
#define R16D8( N,R,I ) cpustate->mode##N = MODE_R16D8; cpustate->r##N = R; cpustate->r##N##b = I;
#define R16R8( N,R,g ) cpustate->mode##N = MODE_R16R8; cpustate->r##N = R; cpustate->r##N##b = g;
INLINE UINT8 RM8 (t90_Regs *cpustate, UINT32 a) { return memory_read_byte_8le( cpustate->program, a ); }
INLINE UINT8 RM8 (t90_Regs *cpustate, UINT32 a) { return cpustate->program->read_byte( a ); }
INLINE UINT16 RM16(t90_Regs *cpustate, UINT32 a) { return RM8(cpustate,a) | (RM8( cpustate, (a+1) & 0xffff ) << 8); }
INLINE void WM8 (t90_Regs *cpustate, UINT32 a, UINT8 v) { memory_write_byte_8le( cpustate->program, a, v ); }
INLINE void WM8 (t90_Regs *cpustate, UINT32 a, UINT8 v) { cpustate->program->write_byte( a, v ); }
INLINE void WM16(t90_Regs *cpustate, UINT32 a, UINT16 v) { WM8(cpustate,a,v); WM8( cpustate, (a+1) & 0xffff, v >> 8); }
INLINE UINT8 RX8 (t90_Regs *cpustate, UINT32 a, UINT32 base) { return memory_read_byte_8le( cpustate->program, base | a ); }
INLINE UINT8 RX8 (t90_Regs *cpustate, UINT32 a, UINT32 base) { return cpustate->program->read_byte( base | a ); }
INLINE UINT16 RX16(t90_Regs *cpustate, UINT32 a, UINT32 base) { return RX8(cpustate,a,base) | (RX8( cpustate, (a+1) & 0xffff, base ) << 8); }
INLINE void WX8 (t90_Regs *cpustate, UINT32 a, UINT8 v, UINT32 base) { memory_write_byte_8le( cpustate->program, base | a, v ); }
INLINE void WX8 (t90_Regs *cpustate, UINT32 a, UINT8 v, UINT32 base) { cpustate->program->write_byte( base | a, v ); }
INLINE void WX16(t90_Regs *cpustate, UINT32 a, UINT16 v, UINT32 base) { WX8(cpustate,a,v,base); WX8( cpustate, (a+1) & 0xffff, v >> 8, base); }
INLINE UINT8 READ8(t90_Regs *cpustate) { UINT8 b0 = RM8( cpustate, cpustate->addr++ ); cpustate->addr &= 0xffff; return b0; }
@ -2284,7 +2284,7 @@ static READ8_HANDLER( t90_internal_registers_r )
{
t90_Regs *cpustate = get_safe_token(space->cpu);
#define RIO memory_read_byte_8le( cpustate->io, T90_IOBASE+offset )
#define RIO cpustate->io->read_byte( T90_IOBASE+offset )
UINT8 data = cpustate->internal_registers[offset];
switch ( T90_IOBASE + offset )
@ -2495,7 +2495,7 @@ static TIMER_CALLBACK( t90_timer4_callback )
static WRITE8_HANDLER( t90_internal_registers_w )
{
#define WIO memory_write_byte_8le( cpustate->io, T90_IOBASE+offset, data )
#define WIO cpustate->io->write_byte( T90_IOBASE+offset, data )
t90_Regs *cpustate = get_safe_token(space->cpu);
UINT8 out_mask;

4
src/emu/cpu/tlcs900/tlcs900.c
View File

@ -195,8 +195,8 @@ struct _tlcs900_state
#define FLAG_SF 0x80
#define RDMEM(addr) memory_read_byte_8le( cpustate->program, addr )
#define WRMEM(addr,data) memory_write_byte_8le( cpustate->program, addr, data )
#define RDMEM(addr) cpustate->program->read_byte( addr )
#define WRMEM(addr,data) cpustate->program->write_byte( addr, data )
#define RDOP() RDMEM( cpustate->pc.d ); cpustate->pc.d++
#define RDMEMW(addr) ( RDMEM(addr) | ( RDMEM(addr+1) << 8 ) )
#define RDMEML(addr) ( RDMEMW(addr) | ( RDMEMW(addr+2) << 16 ) )

14
src/emu/cpu/tms0980/tms0980.c
View File

@ -814,7 +814,7 @@ static CPU_EXECUTE( tms0980 )
/* fetch: rom address 0 */
/* execute: read ram, alu input, execute br/call, k input valid */
tms0980_set_cki_bus( device );
cpustate->ram_data = memory_read_byte_8le( cpustate->data, cpustate->ram_address );
cpustate->ram_data = cpustate->data->read_byte( cpustate->ram_address );
cpustate->status = 1;
cpustate->p = 0;
cpustate->n = 0;
@ -909,22 +909,22 @@ static CPU_EXECUTE( tms0980 )
}
if ( cpustate->decode & M_STO )
{
memory_write_byte_8le( cpustate->data, cpustate->ram_address, cpustate->a );
cpustate->data->write_byte( cpustate->ram_address, cpustate->a );
}
if ( cpustate->decode & M_CKM )
{
memory_write_byte_8le( cpustate->data, cpustate->ram_address, cpustate->cki_bus );
cpustate->data->write_byte( cpustate->ram_address, cpustate->cki_bus );
}
}
else
{
if ( cpustate->decode & F_SBIT )
{
memory_write_byte_8le( cpustate->data, cpustate->ram_address, cpustate->ram_data | tms0980_bit_value[ cpustate->opcode & 0x03 ] );
cpustate->data->write_byte( cpustate->ram_address, cpustate->ram_data | tms0980_bit_value[ cpustate->opcode & 0x03 ] );
}
if ( cpustate->decode & F_RBIT )
{
memory_write_byte_8le( cpustate->data, cpustate->ram_address, cpustate->ram_data & tms0980_nbit_value[ cpustate->opcode & 0x03 ] );
cpustate->data->write_byte( cpustate->ram_address, cpustate->ram_data & tms0980_nbit_value[ cpustate->opcode & 0x03 ] );
}
if ( cpustate->decode & F_SETR )
{
@ -1028,12 +1028,12 @@ static CPU_EXECUTE( tms0980 )
if ( cpustate->byte_size > 8 )
{
debugger_instruction_hook( device, cpustate->rom_address << 1 );
cpustate->opcode = memory_read_word_16be( cpustate->program, cpustate->rom_address << 1 ) & 0x1FF;
cpustate->opcode = cpustate->program->read_word( cpustate->rom_address << 1 ) & 0x1FF;
}
else
{
debugger_instruction_hook( device, cpustate->rom_address );
cpustate->opcode = memory_read_word_8le( cpustate->program, cpustate->rom_address ) & 0xFF;
cpustate->opcode = cpustate->program->read_word( cpustate->rom_address ) & 0xFF;
}
tms0980_next_pc( cpustate );
if (LOG)

14
src/emu/cpu/tms32010/tms32010.c
View File

@ -148,21 +148,21 @@ INLINE int add_branch_cycle(tms32010_state *cpustate);
* Read the state of the BIO pin
*/
#define TMS32010_BIO_In (memory_read_word_16be(cpustate->io, TMS32010_BIO<<1))
#define TMS32010_BIO_In (cpustate->io->read_word(TMS32010_BIO<<1))
/****************************************************************************
* Input a word from given I/O port
*/
#define TMS32010_In(Port) (memory_read_word_16be(cpustate->io, (Port)<<1))
#define TMS32010_In(Port) (cpustate->io->read_word((Port)<<1))
/****************************************************************************
* Output a word to given I/O port
*/
#define TMS32010_Out(Port,Value) (memory_write_word_16be(cpustate->io, (Port)<<1,Value))
#define TMS32010_Out(Port,Value) (cpustate->io->write_word((Port)<<1,Value))
@ -170,14 +170,14 @@ INLINE int add_branch_cycle(tms32010_state *cpustate);
* Read a word from given ROM memory location
*/
#define TMS32010_ROM_RDMEM(A) (memory_read_word_16be(cpustate->program, (A)<<1))
#define TMS32010_ROM_RDMEM(A) (cpustate->program->read_word((A)<<1))
/****************************************************************************
* Write a word to given ROM memory location
*/
#define TMS32010_ROM_WRMEM(A,V) (memory_write_word_16be(cpustate->program, (A)<<1,V))
#define TMS32010_ROM_WRMEM(A,V) (cpustate->program->write_word((A)<<1,V))
@ -185,14 +185,14 @@ INLINE int add_branch_cycle(tms32010_state *cpustate);
* Read a word from given RAM memory location
*/
#define TMS32010_RAM_RDMEM(A) (memory_read_word_16be(cpustate->data, (A)<<1))
#define TMS32010_RAM_RDMEM(A) (cpustate->data->read_word((A)<<1))
/****************************************************************************
* Write a word to given RAM memory location
*/
#define TMS32010_RAM_WRMEM(A,V) (memory_write_word_16be(cpustate->data, (A)<<1,V))
#define TMS32010_RAM_WRMEM(A,V) (cpustate->data->write_word((A)<<1,V))

16
src/emu/cpu/tms32025/tms32025.c
View File

@ -127,10 +127,10 @@ Table 3-2. TMS32025/26 Memory Blocks
#define SET_PC(x) do { cpustate->PC = (x); } while (0)
#define P_IN(A) (memory_read_word_16be(cpustate->io, (A)<<1))
#define P_OUT(A,V) (memory_write_word_16be(cpustate->io, ((A)<<1),(V)))
#define S_IN(A) (memory_read_word_16be(cpustate->io, (A)<<1))
#define S_OUT(A,V) (memory_write_word_16be(cpustate->io, ((A)<<1),(V)))
#define P_IN(A) (cpustate->io->read_word((A)<<1))
#define P_OUT(A,V) (cpustate->io->write_word(((A)<<1),(V)))
#define S_IN(A) (cpustate->io->read_word((A)<<1))
#define S_OUT(A,V) (cpustate->io->write_word(((A)<<1),(V)))
#define M_RDOP(A) ((cpustate->pgmmap[(A) >> 7]) ? (cpustate->pgmmap[(A) >> 7][(A) & 0x7f]) : memory_decrypted_read_word(cpustate->program, (A)<<1))
#define M_RDOP_ARG(A) ((cpustate->pgmmap[(A) >> 7]) ? (cpustate->pgmmap[(A) >> 7][(A) & 0x7f]) : memory_decrypted_read_word(cpustate->program, (A)<<1))
@ -324,7 +324,7 @@ INLINE UINT16 M_RDROM(tms32025_state *cpustate, offs_t addr)
addr &= 0xffff;
ram = cpustate->pgmmap[addr >> 7];
if (ram) return ram[addr & 0x7f];
return memory_read_word_16be(cpustate->program, addr << 1);
return cpustate->program->read_word(addr << 1);
}
INLINE void M_WRTROM(tms32025_state *cpustate, offs_t addr, UINT16 data)
@ -333,7 +333,7 @@ INLINE void M_WRTROM(tms32025_state *cpustate, offs_t addr, UINT16 data)
addr &= 0xffff;
ram = cpustate->pgmmap[addr >> 7];
if (ram) { ram[addr & 0x7f] = data; }
else memory_write_word_16be(cpustate->program, addr << 1, data);
else cpustate->program->write_word(addr << 1, data);
}
INLINE UINT16 M_RDRAM(tms32025_state *cpustate, offs_t addr)
@ -342,7 +342,7 @@ INLINE UINT16 M_RDRAM(tms32025_state *cpustate, offs_t addr)
addr &= 0xffff;
ram = cpustate->datamap[addr >> 7];
if (ram) return ram[addr & 0x7f];
return memory_read_word_16be(cpustate->data, addr << 1);
return cpustate->data->read_word(addr << 1);
}
INLINE void M_WRTRAM(tms32025_state *cpustate, offs_t addr, UINT16 data)
@ -359,7 +359,7 @@ INLINE void M_WRTRAM(tms32025_state *cpustate, offs_t addr, UINT16 data)
cpustate->IFR |= 0x20;
}
}
else memory_write_word_16be(cpustate->data, addr << 1, data);
else cpustate->data->write_word(addr << 1, data);
}

4
src/emu/cpu/tms32031/tms32031.c
View File

@ -148,8 +148,8 @@ static UINT32 boot_loader(tms32031_state *tms, UINT32 boot_rom_addr);
#define ROPCODE(T,pc) memory_decrypted_read_dword((T)->program, (pc) << 2)
#define RMEM(T,addr) memory_read_dword_32le((T)->program, (addr) << 2)
#define WMEM(T,addr,data) memory_write_dword_32le((T)->program, (addr) << 2, data)
#define RMEM(T,addr) (T)->program->read_dword((addr) << 2)
#define WMEM(T,addr,data) (T)->program->write_dword((addr) << 2, data)

8
src/emu/cpu/tms32051/tms32051.c
View File

@ -173,22 +173,22 @@ INLINE void CHANGE_PC(tms32051_state *cpustate, UINT16 new_pc)
INLINE UINT16 PM_READ16(tms32051_state *cpustate, UINT16 address)
{
return memory_read_word_16le(cpustate->program, address << 1);
return cpustate->program->read_word(address << 1);
}
INLINE void PM_WRITE16(tms32051_state *cpustate, UINT16 address, UINT16 data)
{
memory_write_word_16le(cpustate->program, address << 1, data);
cpustate->program->write_word(address << 1, data);
}
INLINE UINT16 DM_READ16(tms32051_state *cpustate, UINT16 address)
{
return memory_read_word_16le(cpustate->data, address << 1);
return cpustate->data->read_word(address << 1);
}
INLINE void DM_WRITE16(tms32051_state *cpustate, UINT16 address, UINT16 data)
{
memory_write_word_16le(cpustate->data, address << 1, data);
cpustate->data->write_word(address << 1, data);
}
#include "32051ops.c"

26
src/emu/cpu/tms34010/34010gfx.c
View File

@ -201,6 +201,16 @@ static int compute_pixblt_b_cycles(int left_partials, int right_partials, int fu
/* Shift register handling */
static void memory_w(address_space *space, offs_t offset,UINT16 data)
{
space->write_word(offset, data);
}
static UINT16 memory_r(address_space *space, offs_t offset)
{
return space->read_word(offset);
}
static void shiftreg_w(address_space *space, offs_t offset,UINT16 data)
{
tms34010_state *tms = get_safe_token(space->cpu);
@ -1042,8 +1052,8 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
}
else
{
word_write = memory_write_word_16le;
word_read = memory_read_word_16le;
word_write = memory_w;
word_read = memory_r;
}
/* compute the starting addresses */
@ -1388,8 +1398,8 @@ static void FUNCTION_NAME(pixblt_r)(tms34010_state *tms, int src_is_linear, int
}
else
{
word_write = memory_write_word_16le;
word_read = memory_read_word_16le;
word_write = memory_w;
word_read = memory_r;
}
/* compute the starting addresses */
@ -1653,8 +1663,8 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
}
else
{
word_write = memory_write_word_16le;
word_read = memory_read_word_16le;
word_write = memory_w;
word_read = memory_r;
}
/* compute the starting addresses */
@ -1867,8 +1877,8 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear)
}
else
{
word_write = memory_write_word_16le;
word_read = memory_read_word_16le;
word_write = memory_w;
word_read = memory_r;
}
/* compute the bounds of the operation */

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