mirror of
https://github.com/holub/mame
synced 2025-05-28 16:43:04 +03:00
Replace "const address_space" with "address_space" throughout the system.
The purpose of making it const before was to discourage direct tampering, but private/protected does a better job of that now anyhow, and it is annoying now. s/const[ \t]+address_space\b/address_space/g; Is basically what I did.
This commit is contained in:
parent
dd19e512c0
commit
3598b772bc
@ -85,7 +85,7 @@ static TIMER_CALLBACK( latch_callback )
|
||||
latch_w - handle a write to a given latch
|
||||
-------------------------------------------------*/
|
||||
|
||||
INLINE void latch_w(const address_space *space, int which, UINT16 value)
|
||||
INLINE void latch_w(address_space *space, int which, UINT16 value)
|
||||
{
|
||||
timer_call_after_resynch(space->machine, NULL, which | (value << 8), latch_callback);
|
||||
}
|
||||
@ -95,7 +95,7 @@ INLINE void latch_w(const address_space *space, int which, UINT16 value)
|
||||
latch_r - handle a read from a given latch
|
||||
-------------------------------------------------*/
|
||||
|
||||
INLINE UINT16 latch_r(const address_space *space, int which)
|
||||
INLINE UINT16 latch_r(address_space *space, int which)
|
||||
{
|
||||
generic_audio_private *state = space->machine->generic_audio_data;
|
||||
state->latch_read[which] = 1;
|
||||
@ -107,7 +107,7 @@ INLINE UINT16 latch_r(const address_space *space, int which)
|
||||
latch_clear - clear a given latch
|
||||
-------------------------------------------------*/
|
||||
|
||||
INLINE void latch_clear(const address_space *space, int which)
|
||||
INLINE void latch_clear(address_space *space, int which)
|
||||
{
|
||||
generic_audio_private *state = space->machine->generic_audio_data;
|
||||
state->latched_value[which] = state->latch_clear_value;
|
||||
|
@ -263,9 +263,9 @@ typedef struct
|
||||
adsp21xx_timer_func timer_fired;
|
||||
|
||||
/* memory spaces */
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
|
||||
} adsp2100_state;
|
||||
|
||||
|
@ -198,7 +198,7 @@ struct _alpha8201_state
|
||||
#endif
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
int inst_cycles;
|
||||
};
|
||||
|
@ -131,9 +131,9 @@ typedef struct _am29000_state
|
||||
UINT32 exec_pc;
|
||||
UINT32 next_pc;
|
||||
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
} am29000_state;
|
||||
|
||||
|
||||
|
@ -359,8 +359,8 @@ struct _apexc_state
|
||||
UINT32 pc; /* address of next instruction for the disassembler */
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -236,7 +236,7 @@ typedef struct
|
||||
UINT8 pendingFiq;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
endianness_t endian;
|
||||
} ARM_REGS;
|
||||
|
||||
|
@ -163,7 +163,7 @@ enum
|
||||
endianness_t endian; \
|
||||
device_irq_callback irq_callback; \
|
||||
legacy_cpu_device *device; \
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
|
||||
|
||||
/* CPU state struct */
|
||||
|
@ -86,7 +86,7 @@ struct _asap_state
|
||||
UINT8 irq_state;
|
||||
int icount;
|
||||
device_irq_callback irq_callback;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
legacy_cpu_device *device;
|
||||
|
||||
/* src2val table, registers are at the end */
|
||||
|
@ -27,8 +27,8 @@ struct _avr8_state
|
||||
UINT32 pc;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -44,9 +44,9 @@ struct _ccpu_state
|
||||
int icount;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
};
|
||||
|
||||
|
||||
|
@ -26,8 +26,8 @@ struct _cdp1802_state
|
||||
{
|
||||
const cdp1802_interface *intf;
|
||||
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
|
||||
devcb_resolved_write_line out_q_func;
|
||||
devcb_resolved_read8 in_dma_func;
|
||||
|
@ -89,9 +89,9 @@ struct _cop400_state
|
||||
{
|
||||
const cop400_interface *intf;
|
||||
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
|
||||
UINT8 featuremask;
|
||||
|
||||
|
@ -47,7 +47,7 @@ struct _cp1610_state
|
||||
int intrm_pending;
|
||||
int mask_interrupts;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -98,7 +98,7 @@ typedef struct
|
||||
UINT16 *sound_data;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
} cquestsnd_state;
|
||||
|
||||
@ -139,7 +139,7 @@ typedef struct
|
||||
|
||||
legacy_cpu_device *device;
|
||||
legacy_cpu_device *lindevice;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
} cquestrot_state;
|
||||
|
||||
@ -185,7 +185,7 @@ typedef struct
|
||||
|
||||
legacy_cpu_device *device;
|
||||
legacy_cpu_device *rotdevice;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
} cquestlin_state;
|
||||
|
||||
|
@ -213,7 +213,7 @@ enum
|
||||
struct _drcbe_state
|
||||
{
|
||||
running_device * device; /* CPU device we are associated with */
|
||||
const address_space * space[ADDRESS_SPACES]; /* pointers to CPU's address space */
|
||||
address_space * space[ADDRESS_SPACES]; /* pointers to CPU's address space */
|
||||
drcuml_state * drcuml; /* pointer back to our owner */
|
||||
drccache * cache; /* pointer to the cache */
|
||||
drcuml_machine_state state; /* state of the machine */
|
||||
|
@ -278,7 +278,7 @@ struct _drcbe_state
|
||||
x86code * debug_log_hashjmp; /* hashjmp debugging */
|
||||
x86code * drcmap_get_value; /* map lookup helper */
|
||||
data_accessors accessors[ADDRESS_SPACES]; /* memory accessors */
|
||||
const address_space * space[ADDRESS_SPACES]; /* address spaces */
|
||||
address_space * space[ADDRESS_SPACES]; /* address spaces */
|
||||
|
||||
UINT8 sse41; /* do we have SSE4.1 support? */
|
||||
UINT32 ssemode; /* saved SSE mode */
|
||||
|
@ -179,7 +179,7 @@ struct _drcbe_state
|
||||
double fptemp; /* temporary storage for floating point */
|
||||
|
||||
data_accessors accessors[ADDRESS_SPACES]; /* memory accessors */
|
||||
const address_space * space[ADDRESS_SPACES]; /* address spaces */
|
||||
address_space * space[ADDRESS_SPACES]; /* address spaces */
|
||||
|
||||
UINT8 sse3; /* do we have SSE3 support? */
|
||||
UINT16 fpumode; /* saved FPU mode */
|
||||
|
@ -55,7 +55,7 @@ struct _drcfe_state
|
||||
|
||||
/* CPU parameters */
|
||||
cpu_device * cpudevice; /* CPU device object */
|
||||
const address_space *program; /* program address space for this CPU */
|
||||
address_space *program; /* program address space for this CPU */
|
||||
offs_t pageshift; /* shift to convert address to a page index */
|
||||
|
||||
/* opcode descriptor arrays */
|
||||
|
@ -185,7 +185,7 @@ struct _dsp32_state
|
||||
UINT32 ppc;
|
||||
void (*output_pins_changed)(running_device *device, UINT32 pins);
|
||||
legacy_cpu_device * device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
};
|
||||
|
||||
|
||||
|
@ -233,8 +233,8 @@ typedef struct
|
||||
int interrupt_cycles;
|
||||
void (*output_pins_changed)(UINT32 pins);
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
|
||||
UINT16 peripheral_ram[0x40];
|
||||
UINT16 program_ram[0x800];
|
||||
|
@ -320,8 +320,8 @@ struct _hyperstone_state
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
UINT32 opcodexor;
|
||||
|
||||
INT32 instruction_length;
|
||||
|
@ -110,7 +110,7 @@ typedef struct
|
||||
UINT8 *lbrm;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
|
||||
read16_device_func fdt_r;
|
||||
|
@ -54,8 +54,8 @@ struct _f8_Regs
|
||||
UINT16 irq_vector;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *iospace;
|
||||
address_space *program;
|
||||
address_space *iospace;
|
||||
int icount;
|
||||
UINT8 r[64]; /* scratchpad RAM */
|
||||
int irq_request;
|
||||
|
@ -95,7 +95,7 @@ struct _g65816i_cpu_struct
|
||||
uint irq_delay; /* delay 1 instruction before checking irq */
|
||||
device_irq_callback int_ack; /* Interrupt Acknowledge */
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
read8_space_func read_vector; /* Read vector override */
|
||||
uint stopped; /* Sets how the CPU is stopped */
|
||||
void (*const *opcodes)(g65816i_cpu_struct *cpustate);
|
||||
|
@ -62,8 +62,8 @@ typedef struct
|
||||
UINT8 irq_pending;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
|
||||
#if LAZY_FLAGS
|
||||
INT32 NZ; /* last value (lazy N and Z flag) */
|
||||
|
@ -28,8 +28,8 @@ struct _h83xx_state
|
||||
device_irq_callback irq_cb;
|
||||
legacy_cpu_device *device;
|
||||
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
|
||||
// onboard peripherals stuff
|
||||
UINT8 per_regs[256];
|
||||
|
@ -137,7 +137,7 @@ struct _m68_state_t
|
||||
PAIR ea; /* effective address */
|
||||
|
||||
/* Memory spaces */
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
|
||||
UINT8 int_state; /* SYNC and CWAI flags */
|
||||
UINT8 nmi_state;
|
||||
|
@ -228,8 +228,8 @@ struct _i386_state
|
||||
UINT8 irq_state;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
UINT32 a20_mask;
|
||||
|
||||
int cpuid_max_input_value_eax;
|
||||
|
@ -34,9 +34,9 @@ struct _i4004_state
|
||||
UINT8 flags; // used for I/O only
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
int icount;
|
||||
int pc_pos; // PC possition in ADDR
|
||||
int addr_mask;
|
||||
|
@ -34,8 +34,8 @@ struct _i8008_state
|
||||
UINT8 HALT;
|
||||
UINT8 flags; // temporary I/O only
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
int pc_pos; // PC possition in ADDR
|
||||
|
||||
|
@ -184,8 +184,8 @@ struct _i8085_state
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -59,8 +59,8 @@ struct _i80286_state
|
||||
} ldtr, tr;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
INT32 AuxVal, OverVal, SignVal, ZeroVal, CarryVal, DirVal; /* 0 or non-0 valued flags */
|
||||
UINT8 ParityVal;
|
||||
UINT8 TF, IF; /* 0 or 1 valued flags */
|
||||
|
@ -60,8 +60,8 @@ struct _i8086_state
|
||||
memory_interface mem;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
|
||||
unsigned prefix_base; /* base address of the latest prefix segment */
|
||||
|
@ -19,7 +19,7 @@ static void configure_memory_8bit(i8086_state *cpustate)
|
||||
16-bit memory accessors
|
||||
*****************************************************************************/
|
||||
|
||||
static UINT16 read_word_16le(const address_space *space, offs_t addr)
|
||||
static UINT16 read_word_16le(address_space *space, offs_t addr)
|
||||
{
|
||||
if (!(addr & 1))
|
||||
return memory_read_word_16le(space, addr);
|
||||
@ -30,7 +30,7 @@ static UINT16 read_word_16le(const address_space *space, offs_t addr)
|
||||
}
|
||||
}
|
||||
|
||||
static void write_word_16le(const address_space *space, offs_t addr, UINT16 data)
|
||||
static void write_word_16le(address_space *space, offs_t addr, UINT16 data)
|
||||
{
|
||||
if (!(addr & 1))
|
||||
memory_write_word_16le(space, addr, data);
|
||||
|
@ -3,8 +3,8 @@ struct _memory_interface
|
||||
{
|
||||
offs_t fetch_xor;
|
||||
|
||||
UINT8 (*rbyte)(const address_space *, offs_t);
|
||||
UINT16 (*rword)(const address_space *, offs_t);
|
||||
void (*wbyte)(const address_space *, offs_t, UINT8);
|
||||
void (*wword)(const address_space *, offs_t, UINT16);
|
||||
UINT8 (*rbyte)(address_space *, offs_t);
|
||||
UINT16 (*rword)(address_space *, offs_t);
|
||||
void (*wbyte)(address_space *, offs_t, UINT8);
|
||||
void (*wword)(address_space *, offs_t, UINT16);
|
||||
};
|
||||
|
@ -169,7 +169,7 @@ typedef struct {
|
||||
* MAME-specific stuff.
|
||||
*/
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
UINT32 ppc;
|
||||
int icount;
|
||||
|
||||
|
@ -35,7 +35,7 @@ struct _i960_state_t {
|
||||
|
||||
device_irq_callback irq_cb;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
|
||||
int icount;
|
||||
};
|
||||
|
@ -101,7 +101,7 @@ struct _jaguar_state
|
||||
device_irq_callback irq_callback;
|
||||
jaguar_int_func cpu_interrupt;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
};
|
||||
|
||||
|
||||
|
@ -62,7 +62,7 @@ struct _konami_state
|
||||
UINT8 nmi_pending;
|
||||
int icount;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
konami_set_lines_func setlines_callback;
|
||||
};
|
||||
|
||||
|
@ -51,7 +51,7 @@ struct _lh5810_state
|
||||
{
|
||||
const lh5801_cpu_core *config;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
|
||||
PAIR s, p, u, x, y;
|
||||
int tm; //9 bit
|
||||
|
@ -66,7 +66,7 @@ typedef struct {
|
||||
int ei_delay;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
/* Timer stuff */
|
||||
lr35902_timer_fired_func timer_fired_func;
|
||||
|
@ -110,8 +110,8 @@ struct _m37710i_cpu_struct
|
||||
uint destination; /* temp register */
|
||||
device_irq_callback int_ack;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
uint stopped; /* Sets how the CPU is stopped */
|
||||
void (*const *opcodes)(m37710i_cpu_struct *cpustate); /* opcodes with no prefix */
|
||||
void (*const *opcodes42)(m37710i_cpu_struct *cpustate); /* opcodes with 0x42 prefix */
|
||||
|
@ -144,7 +144,7 @@ struct _m4510_Regs {
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *space;
|
||||
address_space *space;
|
||||
int icount;
|
||||
|
||||
read8_space_func rdmem_id; /* readmem callback for indexed instructions */
|
||||
@ -182,12 +182,12 @@ INLINE int m4510_cpu_readop_arg(m4510_Regs *cpustate)
|
||||
#define M4510
|
||||
#include "t65ce02.c"
|
||||
|
||||
static UINT8 default_rdmem_id(const address_space *space, offs_t address)
|
||||
static UINT8 default_rdmem_id(address_space *space, offs_t address)
|
||||
{
|
||||
m4510_Regs *cpustate = get_safe_token(space->cpu);
|
||||
return memory_read_byte_8le(space, M4510_MEM(address));
|
||||
}
|
||||
static void default_wrmem_id(const address_space *space, offs_t address, UINT8 data)
|
||||
static void default_wrmem_id(address_space *space, offs_t address, UINT8 data)
|
||||
{
|
||||
m4510_Regs *cpustate = get_safe_token(space->cpu);
|
||||
memory_write_byte_8le(space, M4510_MEM(address), data);
|
||||
|
@ -70,8 +70,8 @@ struct _m6502_Regs
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *space;
|
||||
const address_space *io;
|
||||
address_space *space;
|
||||
address_space *io;
|
||||
int int_occured;
|
||||
int icount;
|
||||
|
||||
@ -99,8 +99,8 @@ INLINE m6502_Regs *get_safe_token(running_device *device)
|
||||
return (m6502_Regs *)downcast<legacy_cpu_device *>(device)->token();
|
||||
}
|
||||
|
||||
static UINT8 default_rdmem_id(const address_space *space, offs_t offset) { return memory_read_byte_8le(space, offset); }
|
||||
static void default_wdmem_id(const address_space *space, offs_t offset, UINT8 data) { memory_write_byte_8le(space, offset, data); }
|
||||
static UINT8 default_rdmem_id(address_space *space, offs_t offset) { return memory_read_byte_8le(space, offset); }
|
||||
static void default_wdmem_id(address_space *space, offs_t offset, UINT8 data) { memory_write_byte_8le(space, offset, data); }
|
||||
|
||||
/***************************************************************
|
||||
* include the opcode macros, functions and tables
|
||||
|
@ -79,7 +79,7 @@ struct _m6509_Regs {
|
||||
UINT8 so_state;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *space;
|
||||
address_space *space;
|
||||
|
||||
int icount;
|
||||
|
||||
@ -134,8 +134,8 @@ static ADDRESS_MAP_START(m6509_mem, ADDRESS_SPACE_PROGRAM, 8)
|
||||
AM_RANGE(0x00001, 0x00001) AM_MIRROR(0xF0000) AM_READWRITE(m6509_read_00001, m6509_write_00001)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static UINT8 default_rdmem_id(const address_space *space, offs_t address) { return memory_read_byte_8le(space, address); }
|
||||
static void default_wdmem_id(const address_space *space, offs_t address, UINT8 data) { memory_write_byte_8le(space, address, data); }
|
||||
static UINT8 default_rdmem_id(address_space *space, offs_t address) { return memory_read_byte_8le(space, address); }
|
||||
static void default_wdmem_id(address_space *space, offs_t address, UINT8 data) { memory_write_byte_8le(space, address, data); }
|
||||
|
||||
static CPU_INIT( m6509 )
|
||||
{
|
||||
|
@ -76,7 +76,7 @@ struct _m65ce02_Regs {
|
||||
int icount;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *space;
|
||||
address_space *space;
|
||||
read8_space_func rdmem_id; /* readmem callback for indexed instructions */
|
||||
write8_space_func wrmem_id; /* writemem callback for indexed instructions */
|
||||
};
|
||||
@ -94,8 +94,8 @@ INLINE m65ce02_Regs *get_safe_token(running_device *device)
|
||||
|
||||
#include "t65ce02.c"
|
||||
|
||||
static UINT8 default_rdmem_id(const address_space *space, offs_t address) { return memory_read_byte_8le(space, address); }
|
||||
static void default_wdmem_id(const address_space *space, offs_t address, UINT8 data) { memory_write_byte_8le(space, address, data); }
|
||||
static UINT8 default_rdmem_id(address_space *space, offs_t address) { return memory_read_byte_8le(space, address); }
|
||||
static void default_wdmem_id(address_space *space, offs_t address, UINT8 data) { memory_write_byte_8le(space, address, data); }
|
||||
|
||||
static CPU_INIT( m65ce02 )
|
||||
{
|
||||
|
@ -116,9 +116,9 @@ struct _m6800_state
|
||||
legacy_cpu_device *device;
|
||||
|
||||
/* Memory spaces */
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
|
||||
void (* const * insn)(m6800_state *); /* instruction table */
|
||||
const UINT8 *cycles; /* clock cycle of instruction table */
|
||||
|
@ -944,7 +944,7 @@ void m68k_set_encrypted_opcode_range(running_device *device, offs_t start, offs_
|
||||
* 8-bit data memory interface
|
||||
****************************************************************************/
|
||||
|
||||
static UINT16 m68008_read_immediate_16(const address_space *space, offs_t address)
|
||||
static UINT16 m68008_read_immediate_16(address_space *space, offs_t address)
|
||||
{
|
||||
offs_t addr = address;
|
||||
return (memory_decrypted_read_byte(space, addr) << 8) | (memory_decrypted_read_byte(space, addr + 1));
|
||||
@ -967,13 +967,13 @@ static const m68k_memory_interface interface_d8 =
|
||||
* 16-bit data memory interface
|
||||
****************************************************************************/
|
||||
|
||||
static UINT16 read_immediate_16(const address_space *space, offs_t address)
|
||||
static UINT16 read_immediate_16(address_space *space, offs_t address)
|
||||
{
|
||||
m68ki_cpu_core *m68k = get_safe_token(space->cpu);
|
||||
return memory_decrypted_read_word(space, (address) ^ m68k->memory.opcode_xor);
|
||||
}
|
||||
|
||||
static UINT16 simple_read_immediate_16(const address_space *space, offs_t address)
|
||||
static UINT16 simple_read_immediate_16(address_space *space, offs_t address)
|
||||
{
|
||||
return memory_decrypted_read_word(space, address);
|
||||
}
|
||||
@ -996,7 +996,7 @@ static const m68k_memory_interface interface_d16 =
|
||||
****************************************************************************/
|
||||
|
||||
/* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */
|
||||
static UINT16 readword_d32(const address_space *space, offs_t address)
|
||||
static UINT16 readword_d32(address_space *space, offs_t address)
|
||||
{
|
||||
UINT16 result;
|
||||
|
||||
@ -1007,7 +1007,7 @@ static UINT16 readword_d32(const address_space *space, offs_t address)
|
||||
}
|
||||
|
||||
/* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */
|
||||
static void writeword_d32(const address_space *space, offs_t address, UINT16 data)
|
||||
static void writeword_d32(address_space *space, offs_t address, UINT16 data)
|
||||
{
|
||||
if (!(address & 1))
|
||||
{
|
||||
@ -1019,7 +1019,7 @@ static void writeword_d32(const address_space *space, offs_t address, UINT16 dat
|
||||
}
|
||||
|
||||
/* potentially misaligned 32-bit reads with a 32-bit data bus (and 24-bit address bus) */
|
||||
static UINT32 readlong_d32(const address_space *space, offs_t address)
|
||||
static UINT32 readlong_d32(address_space *space, offs_t address)
|
||||
{
|
||||
UINT32 result;
|
||||
|
||||
@ -1036,7 +1036,7 @@ static UINT32 readlong_d32(const address_space *space, offs_t address)
|
||||
}
|
||||
|
||||
/* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */
|
||||
static void writelong_d32(const address_space *space, offs_t address, UINT32 data)
|
||||
static void writelong_d32(address_space *space, offs_t address, UINT32 data)
|
||||
{
|
||||
if (!(address & 3))
|
||||
{
|
||||
@ -1068,7 +1068,7 @@ static const m68k_memory_interface interface_d32 =
|
||||
};
|
||||
|
||||
/* interface for 32-bit data bus with PMMU (68EC020, 68020) */
|
||||
static UINT8 read_byte_32_mmu(const address_space *space, offs_t address)
|
||||
static UINT8 read_byte_32_mmu(address_space *space, offs_t address)
|
||||
{
|
||||
m68ki_cpu_core *m68k = get_safe_token(space->cpu);
|
||||
|
||||
@ -1080,7 +1080,7 @@ static UINT8 read_byte_32_mmu(const address_space *space, offs_t address)
|
||||
return memory_read_byte_32be(space, address);
|
||||
}
|
||||
|
||||
static void write_byte_32_mmu(const address_space *space, offs_t address, UINT8 data)
|
||||
static void write_byte_32_mmu(address_space *space, offs_t address, UINT8 data)
|
||||
{
|
||||
m68ki_cpu_core *m68k = get_safe_token(space->cpu);
|
||||
|
||||
@ -1092,7 +1092,7 @@ static void write_byte_32_mmu(const address_space *space, offs_t address, UINT8
|
||||
memory_write_byte_32be(space, address, data);
|
||||
}
|
||||
|
||||
static UINT16 read_immediate_16_mmu(const address_space *space, offs_t address)
|
||||
static UINT16 read_immediate_16_mmu(address_space *space, offs_t address)
|
||||
{
|
||||
m68ki_cpu_core *m68k = get_safe_token(space->cpu);
|
||||
|
||||
@ -1105,7 +1105,7 @@ static UINT16 read_immediate_16_mmu(const address_space *space, offs_t address)
|
||||
}
|
||||
|
||||
/* potentially misaligned 16-bit reads with a 32-bit data bus (and 24-bit address bus) */
|
||||
static UINT16 readword_d32_mmu(const address_space *space, offs_t address)
|
||||
static UINT16 readword_d32_mmu(address_space *space, offs_t address)
|
||||
{
|
||||
m68ki_cpu_core *m68k = get_safe_token(space->cpu);
|
||||
UINT16 result;
|
||||
@ -1122,7 +1122,7 @@ static UINT16 readword_d32_mmu(const address_space *space, offs_t address)
|
||||
}
|
||||
|
||||
/* potentially misaligned 16-bit writes with a 32-bit data bus (and 24-bit address bus) */
|
||||
static void writeword_d32_mmu(const address_space *space, offs_t address, UINT16 data)
|
||||
static void writeword_d32_mmu(address_space *space, offs_t address, UINT16 data)
|
||||
{
|
||||
m68ki_cpu_core *m68k = get_safe_token(space->cpu);
|
||||
|
||||
@ -1141,7 +1141,7 @@ static void writeword_d32_mmu(const address_space *space, offs_t address, UINT16
|
||||
}
|
||||
|
||||
/* potentially misaligned 32-bit reads with a 32-bit data bus (and 24-bit address bus) */
|
||||
static UINT32 readlong_d32_mmu(const address_space *space, offs_t address)
|
||||
static UINT32 readlong_d32_mmu(address_space *space, offs_t address)
|
||||
{
|
||||
m68ki_cpu_core *m68k = get_safe_token(space->cpu);
|
||||
UINT32 result;
|
||||
@ -1164,7 +1164,7 @@ static UINT32 readlong_d32_mmu(const address_space *space, offs_t address)
|
||||
}
|
||||
|
||||
/* potentially misaligned 32-bit writes with a 32-bit data bus (and 24-bit address bus) */
|
||||
static void writelong_d32_mmu(const address_space *space, offs_t address, UINT32 data)
|
||||
static void writelong_d32_mmu(address_space *space, offs_t address, UINT32 data)
|
||||
{
|
||||
m68ki_cpu_core *m68k = get_safe_token(space->cpu);
|
||||
|
||||
|
@ -539,13 +539,13 @@ typedef struct _m68k_memory_interface m68k_memory_interface;
|
||||
struct _m68k_memory_interface
|
||||
{
|
||||
offs_t opcode_xor; // Address Calculation
|
||||
UINT16 (*readimm16)(const address_space *, offs_t); // Immediate read 16 bit
|
||||
UINT8 (*read8)(const address_space *, offs_t); // Normal read 8 bit
|
||||
UINT16 (*read16)(const address_space *, offs_t); // Normal read 16 bit
|
||||
UINT32 (*read32)(const address_space *, offs_t); // Normal read 32 bit
|
||||
void (*write8)(const address_space *, offs_t, UINT8); // Write 8 bit
|
||||
void (*write16)(const address_space *, offs_t, UINT16); // Write 16 bit
|
||||
void (*write32)(const address_space *, offs_t, UINT32); // Write 32 bit
|
||||
UINT16 (*readimm16)(address_space *, offs_t); // Immediate read 16 bit
|
||||
UINT8 (*read8)(address_space *, offs_t); // Normal read 8 bit
|
||||
UINT16 (*read16)(address_space *, offs_t); // Normal read 16 bit
|
||||
UINT32 (*read32)(address_space *, offs_t); // Normal read 32 bit
|
||||
void (*write8)(address_space *, offs_t, UINT8); // Write 8 bit
|
||||
void (*write16)(address_space *, offs_t, UINT16); // Write 16 bit
|
||||
void (*write32)(address_space *, offs_t, UINT32); // Write 32 bit
|
||||
};
|
||||
|
||||
struct _m68ki_cpu_core
|
||||
@ -628,7 +628,7 @@ struct _m68ki_cpu_core
|
||||
m68k_tas_func tas_instr_callback; /* Called when a TAS instruction is encountered, allows / disallows writeback */
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
m68k_memory_interface memory;
|
||||
offs_t encrypted_start;
|
||||
offs_t encrypted_end;
|
||||
|
@ -62,7 +62,7 @@ typedef struct
|
||||
UINT16 pending_interrupts; /* MB */
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int irq_state[9]; /* KW Additional lines for HD63705 */
|
||||
int nmi_state;
|
||||
} m6805_Regs;
|
||||
|
@ -105,7 +105,7 @@ struct _m68_state_t
|
||||
PAIR ea; /* effective address */
|
||||
|
||||
/* Memory spaces */
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
|
||||
UINT8 int_state; /* SYNC and CWAI flags */
|
||||
UINT8 nmi_state;
|
||||
|
@ -51,7 +51,7 @@ struct _mb86233_state
|
||||
UINT32 extport[0x30];
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
|
||||
/* FIFO */
|
||||
|
@ -75,9 +75,9 @@ struct _mb88_state
|
||||
UINT8 pending_interrupt;
|
||||
device_irq_callback irqcallback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -62,8 +62,8 @@ struct _hc11_state
|
||||
device_irq_callback irq_callback;
|
||||
UINT8 irq_state[2];
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
|
||||
int ram_position;
|
||||
|
@ -154,9 +154,9 @@ struct _mcs48_state
|
||||
int icount;
|
||||
|
||||
/* Memory spaces */
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
|
||||
UINT8 feature_mask; /* processor feature flags */
|
||||
UINT16 int_rom_size; /* internal rom size */
|
||||
|
@ -285,9 +285,9 @@ struct _mcs51_state_t
|
||||
legacy_cpu_device *device;
|
||||
|
||||
/* Memory spaces */
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
|
||||
/* Serial Port TX/RX Callbacks */
|
||||
// TODO: Move to special port r/w
|
||||
|
@ -85,7 +85,7 @@ typedef struct {
|
||||
UINT8 interrupt_pending;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
} minx_state;
|
||||
|
||||
|
@ -196,7 +196,7 @@ struct _mips3_state
|
||||
mips3_flavor flavor;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device * device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
UINT32 system_clock;
|
||||
UINT32 cpu_clock;
|
||||
UINT64 count_zero_time;
|
||||
|
@ -186,7 +186,7 @@ struct _psxcpu_state
|
||||
UINT32 multiplier_operand2;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int bus_attached;
|
||||
UINT32 bad_byte_address_mask;
|
||||
UINT32 bad_half_address_mask;
|
||||
@ -1300,7 +1300,7 @@ static WRITE32_HANDLER( psx_berr_w )
|
||||
psxcpu->berr = 1;
|
||||
}
|
||||
|
||||
static void mips_update_scratchpad( const address_space *space )
|
||||
static void mips_update_scratchpad( address_space *space )
|
||||
{
|
||||
psxcpu_state *psxcpu = get_safe_token(space->cpu);
|
||||
|
||||
|
@ -139,7 +139,7 @@ struct _r3000_state
|
||||
int hasfpu;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
|
||||
/* endian-dependent load/store */
|
||||
void (*lwl)(r3000_state *r3000, UINT32 op);
|
||||
@ -187,19 +187,19 @@ static void lwr_le(r3000_state *r3000, UINT32 op);
|
||||
static void swl_le(r3000_state *r3000, UINT32 op);
|
||||
static void swr_le(r3000_state *r3000, UINT32 op);
|
||||
|
||||
static UINT8 readcache_be(const address_space *space, offs_t offset);
|
||||
static UINT16 readcache_be_word(const address_space *space, offs_t offset);
|
||||
static UINT32 readcache_be_dword(const address_space *space, offs_t offset);
|
||||
static void writecache_be(const address_space *space, offs_t offset, UINT8 data);
|
||||
static void writecache_be_word(const address_space *space, offs_t offset, UINT16 data);
|
||||
static void writecache_be_dword(const address_space *space, offs_t offset, UINT32 data);
|
||||
static UINT8 readcache_be(address_space *space, offs_t offset);
|
||||
static UINT16 readcache_be_word(address_space *space, offs_t offset);
|
||||
static UINT32 readcache_be_dword(address_space *space, offs_t offset);
|
||||
static void writecache_be(address_space *space, offs_t offset, UINT8 data);
|
||||
static void writecache_be_word(address_space *space, offs_t offset, UINT16 data);
|
||||
static void writecache_be_dword(address_space *space, offs_t offset, UINT32 data);
|
||||
|
||||
static UINT8 readcache_le(const address_space *space, offs_t offset);
|
||||
static UINT16 readcache_le_word(const address_space *space, offs_t offset);
|
||||
static UINT32 readcache_le_dword(const address_space *space, offs_t offset);
|
||||
static void writecache_le(const address_space *space, offs_t offset, UINT8 data);
|
||||
static void writecache_le_word(const address_space *space, offs_t offset, UINT16 data);
|
||||
static void writecache_le_dword(const address_space *space, offs_t offset, UINT32 data);
|
||||
static UINT8 readcache_le(address_space *space, offs_t offset);
|
||||
static UINT16 readcache_le_word(address_space *space, offs_t offset);
|
||||
static UINT32 readcache_le_dword(address_space *space, offs_t offset);
|
||||
static void writecache_le(address_space *space, offs_t offset, UINT8 data);
|
||||
static void writecache_le_word(address_space *space, offs_t offset, UINT16 data);
|
||||
static void writecache_le_dword(address_space *space, offs_t offset, UINT32 data);
|
||||
|
||||
|
||||
|
||||
@ -891,84 +891,84 @@ static CPU_EXECUTE( r3000 )
|
||||
CACHE I/O
|
||||
***************************************************************************/
|
||||
|
||||
static UINT8 readcache_be(const address_space *space, offs_t offset)
|
||||
static UINT8 readcache_be(address_space *space, offs_t offset)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
return (offset * 4 < r3000->cache_size) ? r3000->cache[BYTE4_XOR_BE(offset)] : 0xff;
|
||||
}
|
||||
|
||||
static UINT16 readcache_be_word(const address_space *space, offs_t offset)
|
||||
static UINT16 readcache_be_word(address_space *space, offs_t offset)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
return (offset * 4 < r3000->cache_size) ? *(UINT16 *)&r3000->cache[WORD_XOR_BE(offset)] : 0xffff;
|
||||
}
|
||||
|
||||
static UINT32 readcache_be_dword(const address_space *space, offs_t offset)
|
||||
static UINT32 readcache_be_dword(address_space *space, offs_t offset)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
return (offset * 4 < r3000->cache_size) ? *(UINT32 *)&r3000->cache[offset] : 0xffffffff;
|
||||
}
|
||||
|
||||
static void writecache_be(const address_space *space, offs_t offset, UINT8 data)
|
||||
static void writecache_be(address_space *space, offs_t offset, UINT8 data)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
if (offset * 4 < r3000->cache_size) r3000->cache[BYTE4_XOR_BE(offset)] = data;
|
||||
}
|
||||
|
||||
static void writecache_be_word(const address_space *space, offs_t offset, UINT16 data)
|
||||
static void writecache_be_word(address_space *space, offs_t offset, UINT16 data)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
if (offset * 4 < r3000->cache_size) *(UINT16 *)&r3000->cache[WORD_XOR_BE(offset)] = data;
|
||||
}
|
||||
|
||||
static void writecache_be_dword(const address_space *space, offs_t offset, UINT32 data)
|
||||
static void writecache_be_dword(address_space *space, offs_t offset, UINT32 data)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
if (offset * 4 < r3000->cache_size) *(UINT32 *)&r3000->cache[offset] = data;
|
||||
}
|
||||
|
||||
static UINT8 readcache_le(const address_space *space, offs_t offset)
|
||||
static UINT8 readcache_le(address_space *space, offs_t offset)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
return (offset * 4 < r3000->cache_size) ? r3000->cache[BYTE4_XOR_LE(offset)] : 0xff;
|
||||
}
|
||||
|
||||
static UINT16 readcache_le_word(const address_space *space, offs_t offset)
|
||||
static UINT16 readcache_le_word(address_space *space, offs_t offset)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
return (offset * 4 < r3000->cache_size) ? *(UINT16 *)&r3000->cache[WORD_XOR_LE(offset)] : 0xffff;
|
||||
}
|
||||
|
||||
static UINT32 readcache_le_dword(const address_space *space, offs_t offset)
|
||||
static UINT32 readcache_le_dword(address_space *space, offs_t offset)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
return (offset * 4 < r3000->cache_size) ? *(UINT32 *)&r3000->cache[offset] : 0xffffffff;
|
||||
}
|
||||
|
||||
static void writecache_le(const address_space *space, offs_t offset, UINT8 data)
|
||||
static void writecache_le(address_space *space, offs_t offset, UINT8 data)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
if (offset * 4 < r3000->cache_size) r3000->cache[BYTE4_XOR_LE(offset)] = data;
|
||||
}
|
||||
|
||||
static void writecache_le_word(const address_space *space, offs_t offset, UINT16 data)
|
||||
static void writecache_le_word(address_space *space, offs_t offset, UINT16 data)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
if (offset * 4 < r3000->cache_size) *(UINT16 *)&r3000->cache[WORD_XOR_LE(offset)] = data;
|
||||
}
|
||||
|
||||
static void writecache_le_dword(const address_space *space, offs_t offset, UINT32 data)
|
||||
static void writecache_le_dword(address_space *space, offs_t offset, UINT32 data)
|
||||
{
|
||||
r3000_state *r3000 = get_safe_token(space->cpu);
|
||||
offset &= 0x1fffffff;
|
||||
|
@ -65,8 +65,8 @@ struct _mn102_info
|
||||
int cycles;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
};
|
||||
|
||||
static void mn10200_w(mn102_info *mn102, UINT32 adr, UINT32 data, int type);
|
||||
|
@ -135,10 +135,10 @@ typedef struct
|
||||
{
|
||||
offs_t fetch_xor;
|
||||
|
||||
UINT8 (*rbyte)(const address_space *, offs_t);
|
||||
UINT16 (*rword)(const address_space *, offs_t);
|
||||
void (*wbyte)(const address_space *, offs_t, UINT8);
|
||||
void (*wword)(const address_space *, offs_t, UINT16);
|
||||
UINT8 (*rbyte)(address_space *, offs_t);
|
||||
UINT16 (*rword)(address_space *, offs_t);
|
||||
void (*wbyte)(address_space *, offs_t, UINT8);
|
||||
void (*wword)(address_space *, offs_t, UINT16);
|
||||
} memory_interface;
|
||||
|
||||
|
||||
@ -162,8 +162,8 @@ struct _nec_state_t
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
|
||||
memory_interface mem;
|
||||
@ -1153,7 +1153,7 @@ static void configure_memory_8bit(nec_state_t *nec_state)
|
||||
16-bit memory accessors
|
||||
*****************************************************************************/
|
||||
|
||||
static UINT16 read_word_16le(const address_space *space, offs_t addr)
|
||||
static UINT16 read_word_16le(address_space *space, offs_t addr)
|
||||
{
|
||||
if (!(addr & 1))
|
||||
return memory_read_word_16le(space, addr);
|
||||
@ -1164,7 +1164,7 @@ static UINT16 read_word_16le(const address_space *space, offs_t addr)
|
||||
}
|
||||
}
|
||||
|
||||
static void write_word_16le(const address_space *space, offs_t addr, UINT16 data)
|
||||
static void write_word_16le(address_space *space, offs_t addr, UINT16 data)
|
||||
{
|
||||
if (!(addr & 1))
|
||||
memory_write_word_16le(space, addr, data);
|
||||
|
@ -418,7 +418,7 @@ struct _pdp1_state
|
||||
int type_20_sbs;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -65,7 +65,7 @@ struct _tx0_state
|
||||
int icount;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
};
|
||||
|
||||
INLINE tx0_state *get_safe_token(running_device *device)
|
||||
|
@ -98,9 +98,9 @@ struct _pic16c5x_state
|
||||
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
};
|
||||
|
||||
INLINE pic16c5x_state *get_safe_token(running_device *device)
|
||||
|
@ -88,9 +88,9 @@ struct _pic16c62x_state
|
||||
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
};
|
||||
|
||||
INLINE pic16c62x_state *get_safe_token(running_device *device)
|
||||
|
@ -307,7 +307,7 @@ typedef struct {
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
|
||||
// STUFF added for the 6xx series
|
||||
UINT32 dec, dec_frac;
|
||||
@ -330,20 +330,20 @@ typedef struct {
|
||||
|
||||
/* PowerPC function pointers for memory accesses/exceptions */
|
||||
jmp_buf exception_jmpbuf;
|
||||
UINT8 (*read8)(const address_space *space, offs_t address);
|
||||
UINT16 (*read16)(const address_space *space, offs_t address);
|
||||
UINT32 (*read32)(const address_space *space, offs_t address);
|
||||
UINT64 (*read64)(const address_space *space, offs_t address);
|
||||
void (*write8)(const address_space *space, offs_t address, UINT8 data);
|
||||
void (*write16)(const address_space *space, offs_t address, UINT16 data);
|
||||
void (*write32)(const address_space *space, offs_t address, UINT32 data);
|
||||
void (*write64)(const address_space *space, offs_t address, UINT64 data);
|
||||
UINT16 (*read16_unaligned)(const address_space *space, offs_t address);
|
||||
UINT32 (*read32_unaligned)(const address_space *space, offs_t address);
|
||||
UINT64 (*read64_unaligned)(const address_space *space, offs_t address);
|
||||
void (*write16_unaligned)(const address_space *space, offs_t address, UINT16 data);
|
||||
void (*write32_unaligned)(const address_space *space, offs_t address, UINT32 data);
|
||||
void (*write64_unaligned)(const address_space *space, offs_t address, UINT64 data);
|
||||
UINT8 (*read8)(address_space *space, offs_t address);
|
||||
UINT16 (*read16)(address_space *space, offs_t address);
|
||||
UINT32 (*read32)(address_space *space, offs_t address);
|
||||
UINT64 (*read64)(address_space *space, offs_t address);
|
||||
void (*write8)(address_space *space, offs_t address, UINT8 data);
|
||||
void (*write16)(address_space *space, offs_t address, UINT16 data);
|
||||
void (*write32)(address_space *space, offs_t address, UINT32 data);
|
||||
void (*write64)(address_space *space, offs_t address, UINT64 data);
|
||||
UINT16 (*read16_unaligned)(address_space *space, offs_t address);
|
||||
UINT32 (*read32_unaligned)(address_space *space, offs_t address);
|
||||
UINT64 (*read64_unaligned)(address_space *space, offs_t address);
|
||||
void (*write16_unaligned)(address_space *space, offs_t address, UINT16 data);
|
||||
void (*write32_unaligned)(address_space *space, offs_t address, UINT32 data);
|
||||
void (*write64_unaligned)(address_space *space, offs_t address, UINT64 data);
|
||||
|
||||
void (* optable19[1024])(UINT32);
|
||||
void (* optable31[1024])(UINT32);
|
||||
@ -786,14 +786,14 @@ INLINE UINT32 ppc_get_spr(int spr)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT8 ppc_read8_translated(const address_space *space, offs_t address);
|
||||
static UINT16 ppc_read16_translated(const address_space *space, offs_t address);
|
||||
static UINT32 ppc_read32_translated(const address_space *space, offs_t address);
|
||||
static UINT64 ppc_read64_translated(const address_space *space, offs_t address);
|
||||
static void ppc_write8_translated(const address_space *space, offs_t address, UINT8 data);
|
||||
static void ppc_write16_translated(const address_space *space, offs_t address, UINT16 data);
|
||||
static void ppc_write32_translated(const address_space *space, offs_t address, UINT32 data);
|
||||
static void ppc_write64_translated(const address_space *space, offs_t address, UINT64 data);
|
||||
static UINT8 ppc_read8_translated(address_space *space, offs_t address);
|
||||
static UINT16 ppc_read16_translated(address_space *space, offs_t address);
|
||||
static UINT32 ppc_read32_translated(address_space *space, offs_t address);
|
||||
static UINT64 ppc_read64_translated(address_space *space, offs_t address);
|
||||
static void ppc_write8_translated(address_space *space, offs_t address, UINT8 data);
|
||||
static void ppc_write16_translated(address_space *space, offs_t address, UINT16 data);
|
||||
static void ppc_write32_translated(address_space *space, offs_t address, UINT32 data);
|
||||
static void ppc_write64_translated(address_space *space, offs_t address, UINT64 data);
|
||||
|
||||
INLINE void ppc_set_msr(UINT32 value)
|
||||
{
|
||||
|
@ -906,7 +906,7 @@ static void ppc403_dma_exec(int ch)
|
||||
|
||||
/*********************************************************************************/
|
||||
|
||||
static UINT8 ppc403_read8(const address_space *space, UINT32 a)
|
||||
static UINT8 ppc403_read8(address_space *space, UINT32 a)
|
||||
{
|
||||
if(a >= 0x40000000 && a <= 0x4000000f) /* Serial Port */
|
||||
return ppc403_spu_r(a);
|
||||
@ -916,7 +916,7 @@ static UINT8 ppc403_read8(const address_space *space, UINT32 a)
|
||||
#define ppc403_read16 memory_read_word_32be
|
||||
#define ppc403_read32 memory_read_dword_32be
|
||||
|
||||
static void ppc403_write8(const address_space *space, UINT32 a, UINT8 d)
|
||||
static void ppc403_write8(address_space *space, UINT32 a, UINT8 d)
|
||||
{
|
||||
if( a >= 0x40000000 && a <= 0x4000000f ) /* Serial Port */
|
||||
{
|
||||
@ -929,24 +929,24 @@ static void ppc403_write8(const address_space *space, UINT32 a, UINT8 d)
|
||||
#define ppc403_write16 memory_write_word_32be
|
||||
#define ppc403_write32 memory_write_dword_32be
|
||||
|
||||
static UINT16 ppc403_read16_unaligned(const address_space *space, UINT32 a)
|
||||
static UINT16 ppc403_read16_unaligned(address_space *space, UINT32 a)
|
||||
{
|
||||
fatalerror("ppc: Unaligned read16 %08X at %08X", a, ppc.pc);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 ppc403_read32_unaligned(const address_space *space, UINT32 a)
|
||||
static UINT32 ppc403_read32_unaligned(address_space *space, UINT32 a)
|
||||
{
|
||||
fatalerror("ppc: Unaligned read32 %08X at %08X", a, ppc.pc);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ppc403_write16_unaligned(const address_space *space, UINT32 a, UINT16 d)
|
||||
static void ppc403_write16_unaligned(address_space *space, UINT32 a, UINT16 d)
|
||||
{
|
||||
fatalerror("ppc: Unaligned write16 %08X, %04X at %08X", a, d, ppc.pc);
|
||||
}
|
||||
|
||||
static void ppc403_write32_unaligned(const address_space *space, UINT32 a, UINT32 d)
|
||||
static void ppc403_write32_unaligned(address_space *space, UINT32 a, UINT32 d)
|
||||
{
|
||||
fatalerror("ppc: Unaligned write32 %08X, %08X at %08X", a, d, ppc.pc);
|
||||
}
|
||||
|
@ -66,29 +66,29 @@ INLINE void WRITE64(UINT32 a, UINT64 d)
|
||||
|
||||
/***********************************************************************/
|
||||
|
||||
static UINT16 ppc_read16_unaligned(const address_space *space, UINT32 a)
|
||||
static UINT16 ppc_read16_unaligned(address_space *space, UINT32 a)
|
||||
{
|
||||
return ((UINT16)ppc.read8(space, a+0) << 8) | ((UINT16)ppc.read8(space, a+1) << 0);
|
||||
}
|
||||
|
||||
static UINT32 ppc_read32_unaligned(const address_space *space, UINT32 a)
|
||||
static UINT32 ppc_read32_unaligned(address_space *space, UINT32 a)
|
||||
{
|
||||
return ((UINT32)ppc.read8(space, a+0) << 24) | ((UINT32)ppc.read8(space, a+1) << 16) |
|
||||
((UINT32)ppc.read8(space, a+2) << 8) | ((UINT32)ppc.read8(space, a+3) << 0);
|
||||
}
|
||||
|
||||
static UINT64 ppc_read64_unaligned(const address_space *space, UINT32 a)
|
||||
static UINT64 ppc_read64_unaligned(address_space *space, UINT32 a)
|
||||
{
|
||||
return ((UINT64)READ32(space, a+0) << 32) | (UINT64)(READ32(space, a+4));
|
||||
}
|
||||
|
||||
static void ppc_write16_unaligned(const address_space *space, UINT32 a, UINT16 d)
|
||||
static void ppc_write16_unaligned(address_space *space, UINT32 a, UINT16 d)
|
||||
{
|
||||
ppc.write8(space, a+0, (UINT8)(d >> 8));
|
||||
ppc.write8(space, a+1, (UINT8)(d));
|
||||
}
|
||||
|
||||
static void ppc_write32_unaligned(const address_space *space, UINT32 a, UINT32 d)
|
||||
static void ppc_write32_unaligned(address_space *space, UINT32 a, UINT32 d)
|
||||
{
|
||||
ppc.write8(space, a+0, (UINT8)(d >> 24));
|
||||
ppc.write8(space, a+1, (UINT8)(d >> 16));
|
||||
@ -96,7 +96,7 @@ static void ppc_write32_unaligned(const address_space *space, UINT32 a, UINT32 d
|
||||
ppc.write8(space, a+3, (UINT8)(d >> 0));
|
||||
}
|
||||
|
||||
static void ppc_write64_unaligned(const address_space *space, UINT32 a, UINT64 d)
|
||||
static void ppc_write64_unaligned(address_space *space, UINT32 a, UINT64 d)
|
||||
{
|
||||
ppc.write32(space, a+0, (UINT32)(d >> 32));
|
||||
ppc.write32(space, a+4, (UINT32)(d));
|
||||
@ -306,56 +306,56 @@ static int ppc_translate_address_cb(int space, offs_t *addr)
|
||||
return success;
|
||||
}
|
||||
|
||||
static UINT8 ppc_read8_translated(const address_space *space, offs_t address)
|
||||
static UINT8 ppc_read8_translated(address_space *space, offs_t address)
|
||||
{
|
||||
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
|
||||
return memory_read_byte_64be(space, address);
|
||||
}
|
||||
|
||||
static UINT16 ppc_read16_translated(const address_space *space, offs_t address)
|
||||
static UINT16 ppc_read16_translated(address_space *space, offs_t address)
|
||||
{
|
||||
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
|
||||
return memory_read_word_64be(space, address);
|
||||
}
|
||||
|
||||
static UINT32 ppc_read32_translated(const address_space *space, offs_t address)
|
||||
static UINT32 ppc_read32_translated(address_space *space, offs_t address)
|
||||
{
|
||||
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
|
||||
return memory_read_dword_64be(space, address);
|
||||
}
|
||||
|
||||
static UINT64 ppc_read64_translated(const address_space *space, offs_t address)
|
||||
static UINT64 ppc_read64_translated(address_space *space, offs_t address)
|
||||
{
|
||||
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_READ);
|
||||
return memory_read_qword_64be(space, address);
|
||||
}
|
||||
|
||||
static void ppc_write8_translated(const address_space *space, offs_t address, UINT8 data)
|
||||
static void ppc_write8_translated(address_space *space, offs_t address, UINT8 data)
|
||||
{
|
||||
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
|
||||
memory_write_byte_64be(space, address, data);
|
||||
}
|
||||
|
||||
static void ppc_write16_translated(const address_space *space, offs_t address, UINT16 data)
|
||||
static void ppc_write16_translated(address_space *space, offs_t address, UINT16 data)
|
||||
{
|
||||
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
|
||||
memory_write_word_64be(space, address, data);
|
||||
}
|
||||
|
||||
static void ppc_write32_translated(const address_space *space, offs_t address, UINT32 data)
|
||||
static void ppc_write32_translated(address_space *space, offs_t address, UINT32 data)
|
||||
{
|
||||
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
|
||||
memory_write_dword_64be(space, address, data);
|
||||
}
|
||||
|
||||
static void ppc_write64_translated(const address_space *space, offs_t address, UINT64 data)
|
||||
static void ppc_write64_translated(address_space *space, offs_t address, UINT64 data)
|
||||
{
|
||||
ppc_translate_address(&address, PPC_TRANSLATE_DATA | PPC_TRANSLATE_WRITE);
|
||||
memory_write_qword_64be(space, address, data);
|
||||
}
|
||||
|
||||
#ifndef PPC_DRC
|
||||
static UINT32 ppc_readop_translated(const address_space *space, offs_t address)
|
||||
static UINT32 ppc_readop_translated(address_space *space, offs_t address)
|
||||
{
|
||||
ppc_translate_address(&address, PPC_TRANSLATE_CODE | PPC_TRANSLATE_READ);
|
||||
return memory_read_dword_64be(space, address);
|
||||
|
@ -552,7 +552,7 @@ struct _powerpc_state
|
||||
/* internal stuff */
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device * device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
offs_t codexor;
|
||||
UINT32 irq_pending;
|
||||
UINT32 system_clock;
|
||||
|
@ -210,7 +210,7 @@ struct _rsp_state
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
|
||||
rspimp_state* impstate;
|
||||
|
@ -43,8 +43,8 @@ struct _s2650_regs {
|
||||
int icount;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
};
|
||||
|
||||
INLINE s2650_regs *get_safe_token(running_device *device)
|
||||
|
@ -83,7 +83,7 @@ struct _saturn_state
|
||||
int monitor_in;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -56,7 +56,7 @@ struct _sc61860_state
|
||||
struct { int t2ms, t512ms; int count;} timer;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -33,8 +33,8 @@ struct _scmp_state
|
||||
UINT8 SR;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
|
||||
devcb_resolved_write8 flag_out_func;
|
||||
|
@ -24,7 +24,7 @@ struct _se3208_state_t
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
UINT8 IRQ;
|
||||
UINT8 NMI;
|
||||
|
||||
@ -65,7 +65,7 @@ INLINE se3208_state_t *get_safe_token(running_device *device)
|
||||
return (se3208_state_t *)downcast<legacy_cpu_device *>(device)->token();
|
||||
}
|
||||
|
||||
INLINE UINT32 read_dword_unaligned(const address_space *space, UINT32 address)
|
||||
INLINE UINT32 read_dword_unaligned(address_space *space, UINT32 address)
|
||||
{
|
||||
if (address & 3)
|
||||
return memory_read_byte_32le(space,address) | memory_read_byte_32le(space,address+1)<<8 | memory_read_byte_32le(space,address+2)<<16 | memory_read_byte_32le(space,address+3)<<24;
|
||||
@ -73,7 +73,7 @@ INLINE UINT32 read_dword_unaligned(const address_space *space, UINT32 address)
|
||||
return memory_read_dword_32le(space,address);
|
||||
}
|
||||
|
||||
INLINE UINT16 read_word_unaligned(const address_space *space, UINT32 address)
|
||||
INLINE UINT16 read_word_unaligned(address_space *space, UINT32 address)
|
||||
{
|
||||
if (address & 1)
|
||||
return memory_read_byte_32le(space,address) | memory_read_byte_32le(space,address+1)<<8;
|
||||
@ -81,7 +81,7 @@ INLINE UINT16 read_word_unaligned(const address_space *space, UINT32 address)
|
||||
return memory_read_word_32le(space,address);
|
||||
}
|
||||
|
||||
INLINE void write_dword_unaligned(const address_space *space, UINT32 address, UINT32 data)
|
||||
INLINE void write_dword_unaligned(address_space *space, UINT32 address, UINT32 data)
|
||||
{
|
||||
if (address & 3)
|
||||
{
|
||||
@ -96,7 +96,7 @@ INLINE void write_dword_unaligned(const address_space *space, UINT32 address, UI
|
||||
}
|
||||
}
|
||||
|
||||
INLINE void write_word_unaligned(const address_space *space, UINT32 address, UINT16 data)
|
||||
INLINE void write_word_unaligned(address_space *space, UINT32 address, UINT16 data)
|
||||
{
|
||||
if (address & 1)
|
||||
{
|
||||
|
@ -116,8 +116,8 @@ typedef struct
|
||||
INT8 irq_line_state[17];
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *internal;
|
||||
address_space *program;
|
||||
address_space *internal;
|
||||
UINT32 *m;
|
||||
INT8 nmi_line_state;
|
||||
|
||||
|
@ -63,9 +63,9 @@ typedef struct
|
||||
INT8 irq_line_state[17];
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *internal;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *internal;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
UINT32 *m;
|
||||
INT8 nmi_line_state;
|
||||
|
||||
|
@ -126,8 +126,8 @@ struct _SHARC_REGS
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
void (*opcode_handler)(SHARC_REGS *cpustate);
|
||||
int icount;
|
||||
UINT64 opcode;
|
||||
|
@ -52,7 +52,7 @@ struct _sm8500_state
|
||||
int icount;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
UINT8 internal_ram[0x500];
|
||||
};
|
||||
|
||||
|
@ -88,7 +88,7 @@ typedef struct
|
||||
uint ir; /* Instruction Register */
|
||||
device_irq_callback int_ack;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
uint stopped; /* stopped status */
|
||||
int ICount;
|
||||
uint source;
|
||||
|
@ -22,7 +22,7 @@ struct _ssem_state
|
||||
UINT32 halt;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -53,8 +53,8 @@ struct _ssp1601_state_t
|
||||
int g_cycles;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
};
|
||||
|
||||
INLINE ssp1601_state_t *get_safe_token(running_device *device)
|
||||
|
@ -62,7 +62,7 @@ struct _superfx_state
|
||||
pixelcache_t pixelcache[2];
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -34,7 +34,7 @@ struct _t11_state
|
||||
int icount;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device * device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
};
|
||||
|
||||
|
||||
|
@ -32,8 +32,8 @@ typedef struct
|
||||
UINT16 irq_state, irq_mask;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
int extra_cycles; // extra cycles for interrupts
|
||||
UINT8 internal_registers[48];
|
||||
|
@ -73,7 +73,7 @@ struct _tlcs900_state
|
||||
int regbank;
|
||||
device_irq_callback irqcallback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
};
|
||||
|
||||
|
||||
|
@ -268,8 +268,8 @@ struct _tms0980_state
|
||||
UINT8 byte_size; /* 8 or 9 bit bytes */
|
||||
const UINT32 *decode_table;
|
||||
const tms0980_config *config;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
};
|
||||
|
||||
|
||||
|
@ -98,9 +98,9 @@ struct _tms32010_state
|
||||
int addr_mask;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
};
|
||||
|
||||
INLINE tms32010_state *get_safe_token(running_device *device)
|
||||
|
@ -174,9 +174,9 @@ struct _tms32025_state
|
||||
int waiting_for_serial_frame;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
address_space *io;
|
||||
|
||||
UINT16 *pgmmap[0x200];
|
||||
UINT16 *datamap[0x200];
|
||||
|
@ -120,7 +120,7 @@ struct _tms32031_state
|
||||
tms32031_iack_func iack_w;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
};
|
||||
|
||||
INLINE tms32031_state *get_safe_token(running_device *device)
|
||||
|
@ -144,8 +144,8 @@ struct _tms32051_state
|
||||
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *data;
|
||||
address_space *program;
|
||||
address_space *data;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
@ -201,7 +201,7 @@ static int compute_pixblt_b_cycles(int left_partials, int right_partials, int fu
|
||||
|
||||
|
||||
/* Shift register handling */
|
||||
static void shiftreg_w(const address_space *space, offs_t offset,UINT16 data)
|
||||
static void shiftreg_w(address_space *space, offs_t offset,UINT16 data)
|
||||
{
|
||||
tms34010_state *tms = get_safe_token(space->cpu);
|
||||
if (tms->config->from_shiftreg)
|
||||
@ -210,7 +210,7 @@ static void shiftreg_w(const address_space *space, offs_t offset,UINT16 data)
|
||||
logerror("From ShiftReg function not set. PC = %08X\n", tms->pc);
|
||||
}
|
||||
|
||||
static UINT16 shiftreg_r(const address_space *space, offs_t offset)
|
||||
static UINT16 shiftreg_r(address_space *space, offs_t offset)
|
||||
{
|
||||
tms34010_state *tms = get_safe_token(space->cpu);
|
||||
if (tms->config->to_shiftreg)
|
||||
@ -220,7 +220,7 @@ static UINT16 shiftreg_r(const address_space *space, offs_t offset)
|
||||
return tms->shiftreg[0];
|
||||
}
|
||||
|
||||
static UINT16 dummy_shiftreg_r(const address_space *space, offs_t offset)
|
||||
static UINT16 dummy_shiftreg_r(address_space *space, offs_t offset)
|
||||
{
|
||||
tms34010_state *tms = get_safe_token(space->cpu);
|
||||
return tms->shiftreg[0];
|
||||
@ -1028,8 +1028,8 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds
|
||||
if (!P_FLAG(tms))
|
||||
{
|
||||
int dx, dy, x, y, /*words,*/ yreverse;
|
||||
void (*word_write)(const address_space *space,offs_t address,UINT16 data);
|
||||
UINT16 (*word_read)(const address_space *space,offs_t address);
|
||||
void (*word_write)(address_space *space,offs_t address,UINT16 data);
|
||||
UINT16 (*word_read)(address_space *space,offs_t address);
|
||||
UINT32 readwrites = 0;
|
||||
UINT32 saddr, daddr;
|
||||
XY dstxy = { 0 };
|
||||
@ -1375,8 +1375,8 @@ static void FUNCTION_NAME(pixblt_r)(tms34010_state *tms, int src_is_linear, int
|
||||
if (!P_FLAG(tms))
|
||||
{
|
||||
int dx, dy, x, y, words, yreverse;
|
||||
void (*word_write)(const address_space *space,offs_t address,UINT16 data);
|
||||
UINT16 (*word_read)(const address_space *space,offs_t address);
|
||||
void (*word_write)(address_space *space,offs_t address,UINT16 data);
|
||||
UINT16 (*word_read)(address_space *space,offs_t address);
|
||||
UINT32 saddr, daddr;
|
||||
XY dstxy = { 0 };
|
||||
|
||||
@ -1640,8 +1640,8 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear)
|
||||
if (!P_FLAG(tms))
|
||||
{
|
||||
int dx, dy, x, y, words, left_partials, right_partials, full_words;
|
||||
void (*word_write)(const address_space *space,offs_t address,UINT16 data);
|
||||
UINT16 (*word_read)(const address_space *space,offs_t address);
|
||||
void (*word_write)(address_space *space,offs_t address,UINT16 data);
|
||||
UINT16 (*word_read)(address_space *space,offs_t address);
|
||||
UINT32 saddr, daddr;
|
||||
XY dstxy = { 0 };
|
||||
|
||||
@ -1854,8 +1854,8 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear)
|
||||
if (!P_FLAG(tms))
|
||||
{
|
||||
int dx, dy, x, y, words, left_partials, right_partials, full_words;
|
||||
void (*word_write)(const address_space *space,offs_t address,UINT16 data);
|
||||
UINT16 (*word_read)(const address_space *space,offs_t address);
|
||||
void (*word_write)(address_space *space,offs_t address,UINT16 data);
|
||||
UINT16 (*word_read)(address_space *space,offs_t address);
|
||||
UINT32 daddr;
|
||||
XY dstxy = { 0 };
|
||||
|
||||
|
@ -63,7 +63,7 @@ struct _tms34010_state
|
||||
UINT8 executing;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
const tms34010_config *config;
|
||||
screen_device *screen;
|
||||
emu_timer * scantimer;
|
||||
@ -1556,7 +1556,7 @@ static STATE_POSTLOAD( tms34010_state_postload )
|
||||
|
||||
void tms34010_host_w(running_device *cpu, int reg, int data)
|
||||
{
|
||||
const address_space *space;
|
||||
address_space *space;
|
||||
tms34010_state *tms = get_safe_token(cpu);
|
||||
unsigned int addr;
|
||||
|
||||
|
@ -198,8 +198,8 @@ struct _tms34010_config
|
||||
int pixperclock; /* pixels per clock */
|
||||
void (*scanline_callback)(screen_device &screen, bitmap_t *bitmap, int scanline, const tms34010_display_params *params);
|
||||
void (*output_int)(running_device *device, int state); /* output interrupt callback */
|
||||
void (*to_shiftreg)(const address_space *space, offs_t, UINT16 *); /* shift register write */
|
||||
void (*from_shiftreg)(const address_space *space, offs_t, UINT16 *); /* shift register read */
|
||||
void (*to_shiftreg)(address_space *space, offs_t, UINT16 *); /* shift register write */
|
||||
void (*from_shiftreg)(address_space *space, offs_t, UINT16 *); /* shift register read */
|
||||
};
|
||||
|
||||
|
||||
|
@ -104,7 +104,7 @@ typedef struct {
|
||||
|
||||
cd cache;
|
||||
|
||||
const address_space *program, *data;
|
||||
address_space *program, *data;
|
||||
int icount;
|
||||
int unsupported_inst_warning;
|
||||
} tms57002_t;
|
||||
|
@ -74,8 +74,8 @@ struct _tms7000_state
|
||||
UINT8 pf[0x100]; /* Perpherial file */
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
int div_by_16_trigger;
|
||||
int cycles_per_INT2;
|
||||
|
@ -437,8 +437,8 @@ struct _tms99xx_state
|
||||
retreive the value on IC0-IC3 (non-standard behaviour) */
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
|
||||
UINT8 IDLE; /* nonzero if processor is IDLE - i.e waiting for interrupt while writing
|
||||
|
@ -24,7 +24,7 @@ struct _unsp_state
|
||||
UINT8 saved_sb;
|
||||
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
address_space *program;
|
||||
int icount;
|
||||
|
||||
unspimp_state *impstate;
|
||||
|
@ -500,8 +500,8 @@ struct _upd7810_state
|
||||
UPD7810_CONFIG config;
|
||||
device_irq_callback irq_callback;
|
||||
legacy_cpu_device *device;
|
||||
const address_space *program;
|
||||
const address_space *io;
|
||||
address_space *program;
|
||||
address_space *io;
|
||||
int icount;
|
||||
};
|
||||
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user