mirror of
https://github.com/holub/mame
synced 2025-05-11 16:48:52 +03:00
Adds readmes for Galaga, The Outfoxies, Splatter House, and Top Racer.
This commit is contained in:
Andrew Gardner
parent
3ea67aa8c9
commit
14f225e1d3
@ -2144,6 +2144,169 @@ ROM_END
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/**********************************************************************************************
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Galaga & clones
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**********************************************************************************************/
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/*
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Galaga
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Namco/Midway, 1982
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PCB Layout
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----------
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Top board
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23149611 (23149631
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|------------------------------------------|
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| LM324 |
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| 04M_G01.3N |
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| Z80 5400 |
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| 04K_G02.3M |
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| |
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| 0600 04J_G03.3L |-|
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| DSW1 |
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| 04H_G04.3K DSW2 |-|
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| |
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| 0801 04E_G05.3J Z80 4|
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| 4|
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| W|
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| * 5100 A|
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| 0801 Y|
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| TD62064 |
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| 04D_G06.3E Z80 |
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| |-|
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| 0801 |
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| * |-|
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| 0702 VOL |
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| MB3730|
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|GG1-1.1D |
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| GG1-2.5C |
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| 3101 |
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| 3101 4066 18.432MHz|
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|------------------------------------------|
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Notes:
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GG1-1.1D & GG1-2.5C are PROMs, type MB7052 (equivalent to TBP24S10 and 82S129).
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All other ROMs are 2732 EPROMs (i.e. 04*.*).
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*: Unpopulated sockets
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VSync : 60.606060Hz
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Z80 clocks (all): 1.536MHz
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5400 clock : 1.536MHz
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5100 clock : 1.536MHz
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3101 : 16bytes x4 bit Bipolar SRAM, compatible with 7489, MB461 & AM31L01 (trivia - This was Intel's first product, released in 1969!)
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MB3730 : Sound AMP
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TD62064: Darlington transistor for driving coin counters.
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4066 : Quad Bilateral Switch logic IC, used to mix several sound sources to one output.
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NAMCO customs:
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0600 (DIP28): Bus Interface IC
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0801 (DIP28): Multi CPU Bus Controller IC
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5100 (DIP42): Controls player input, coins, DSW's (custom 4 bit I/O Microcontroller)
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0702 (DIP28): Sync Generator/Clock Divider IC
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5400 (DIP28): MUX 4-channel Audio Generator IC. Generates 'death bang'.
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This is not a Z80 with swapped pins as many sites have reported.
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Pinouts:
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Galaga PCB edge connector pinouts
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Parts Side Pin Pin Solder Side
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----------------------------------
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Logic Ground A 1 Logic Ground
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Speaker + B 2 Speaker -
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C 3 Coin Counter 1
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P1 Start Lamp D 4 P2 Start Lamp
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+12 E 5 +12
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+5 F 6 +5
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Ground H 7 Ground
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Service Credit J 8 Test
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Coin 1 K 9 Coin 2
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Player 1 Start L 10 Player 2 Start
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P1 Fire M 11 P2 Fire
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P1 Left N 12 P2 Left
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P 13
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P1 Right R 14 P2 Right
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S 15
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T 16
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U 17
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V 18
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W 19
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X 20
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Coin Counter 2 Y 21 Cocktail Mode
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Ground Z 22 Ground
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Pin21: Ground this pin for cocktail mode
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Bottom board
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23149612 (23149632
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|------------------------------------------|
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| 0700 GG1-4.2N GG1-5.5N |
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| * RGBS|
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| 0015 |
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| |
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| 2114 |
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| 6116 8147 |
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| 2114 07M_G08.4L |
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| 8147 |
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| 2114 |
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| 0400 8147 |
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| 2114 |
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| 8147 |
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| 2114 0200 |
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| |
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| 2114 |
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| 07H_G09.4F 8147 |
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| |
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| 8147 |
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| |
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| 07E_G10.4D 8147 |
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| |
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| 8147 |
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| GG1-3.1C |
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| |
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| |
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|------------------------------------------|
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Notes:
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RGBS: Video output socket (Red, Green Blue, Sync to monitor)
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GG1* are PROMs, type MB7052 (equivalent to TBP24S10 and 82S129).
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All other ROMs are 2732 EPROMs.
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*: Unpopulated socket
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2114 : 1K x4 SRAM
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6116 : 2K x8 SRAM
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8147 : 4K x1 SRAM (Note - you can remove the eight 8147 RAMs and install two 2148s (1K x 4) in their place at positions 6H and 6B.
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Bootup RAM Errors
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Error Code Meaning
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RAM OK All RAMs are good
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RAM 0L RAM located on Video PC board at position 1K is bad
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RAM 0H RAM located on Video PC board at position 1K is bad
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RAM 1L RAM located on Video PC board at position 1K is bad
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RAM 1H RAM located on Video PC board at position 1K is bad
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RAM 2L RAM located on Video PC board at position 3E is bad
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RAM 2H RAM located on Video PC board at position 3F is bad
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RAM 3L RAM located on Video PC board at position 3K is bad
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RAM 3H RAM located on Video PC board at position 3L is bad
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RAM 4L RAM located on Video PC board at position 3H is bad
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RAM 4H RAM located on Video PC board at position 3J is bad
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Bootup ROM Errors
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Error Code Meaning
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ROM OK All ROMs are good
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ROM 01 ROM located on CPU PC board at position 3N is bad
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ROM 02 ROM located on CPU PC board at position 3M is bad
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ROM 03 ROM located on CPU PC board at position 3L is bad
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ROM 04 ROM located on CPU PC board at position 3K is bad
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ROM 11 ROM located on CPU PC board at position 3J is bad
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ROM 21 ROM located on CPU PC board at position 3E is bad
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NAMCO customs:
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0015 (DIP28): Video RAM addresser IC
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0200 (DIP28): Graphics ROM Data Custom Shift Register IC
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0400 (DIP28): Motion Object and Scratch RAM to CPU Bus Interface IC
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0702 (DIP28): Sync Generator/Clock Divider IC
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*/
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#define GALAGA_CUSTOMS \
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ROM_REGION_NAMCO_54XX( CPUTAG_54XX ) \
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@ -1062,6 +1062,164 @@ ROM_START( vshoot )
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ROM_LOAD( "vsjsha-0.5m", 0, 0x80000, CRC(78335ea4) SHA1(d4b9f179b1b456a866354ea308664c036de6414d) )
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ROM_END
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/*
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The Outfoxies
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Namco, 1994
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This game runs on Namco NB-2 hardware.
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Main Board
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----------
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NB-2 MAIN PCB 8639960102 (8639970102)
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|------------------------------------------------------------------------|
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||----------------------------------------------------------------------||
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|| J103 J104 J105 ||
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||VOL CY7C185 ||
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||458 CY7C185 156 123 C384 C384 C384 LH52250 C355 ||
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||JP5 CY7C185 JP11 LH52250 ||
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||LA4705 ||
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||LC78815 C116 LH52250 OU1SHAS.12S OU1SHAR.18S ||
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|| LH52250 JP8 JP10 ||
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|| JP4 ||
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|| ||
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||--------------------NB-2-MASK-ROM-PCB-(ON-TOP)------------------------||
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|J |
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| JP3 |
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|A JP2 145 PAL1 187 |
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| OU1VOI0.6N VSYNC LH52250 |
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|M HSYNC LH52250 |
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| C352 169 LH52250 TC511632 (x4) |
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|M 137 48.384MHz LH52250 |
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| |
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|A SW1 75 |
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| JP7 TC511632 (x4) |
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| PAL3 C383 |
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| C382 |
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| M5M1008 OU2MPRU.11D JP9 BR28C16 C390 |
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| M5M1008 PAL2 OU2MPRL.11C 68EC020 C385 |
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| OU1SPR0.5B JP6 OU1DAT1.20B |
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| JP1 |
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| OU1DAT0.20A |
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|------------------------------------------------------------------------|
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ROM Board
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---------
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NB-2 MASK ROM PCB 8639969800 (8639979800)
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-------------------------------------------------------------------------|
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| J103 J104 J105 |
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|OU1SCR0.1D OU1ROT0.3D |
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| |
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| OU1ROT1.3C OU1OBJ0L.4C OU1OBJ3L.6C OU1OBJ0U.8C OU1OBJ3U.9C |
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| |
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| OU1ROT2.3B OU1OBJ1L.4B OU1OBJ4L.6B OU1OBJ1U.8B OU1OBJ4U.9B |
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| |
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| OU1OBJ2L.4A OU1OBJ2U.8A |
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|------------------------------------------------------------------------|
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Notes:
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CLOCKs
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------
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MASTER clock 48.384 MHz
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68020 clock: 24.192MHz (MASTER / 2)
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HSYNC: 15.75kHz
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VSYNC: 59.7Hz
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DIPs
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----
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SW1: 2 position, both are OFF. Position 1 toggles TEST mode, position 2 is freeze.
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RAM
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---
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TC511632FL x 8 (SOP40, 32k x16)
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M5M51008AFP x 2 (SOP32, 128k x8)
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LH52250AN x 8 (SOP28, 32k x8)
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CY7C185 x 3 (SOP28, 8k x8)
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NAMCO CUSTOM CHIPS
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------------------
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75 (QFP80)
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123 (QFP80)
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137 (NDIP28)
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145 (QFP80)
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156 (QFP64)
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169 (QFP120)
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187 (QFP120)
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C116 (QFP64)
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C352 (QFP100)
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C355 (QFP160)
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C382 (QFP120)
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C383 (QFP100)
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C384 x 3 (QFP48)
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C385 (QFP144)
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C390 (DIP32, KEYCUS)
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OTHER
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-----
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BR28C16 (DIP24, EEPROM)
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2 gold pins labelled HSYNC & VSYNC, connected to Namco custom chip 145
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3 connectors for ROM PCB, labelled J103 (SCROLL), J104 (ROTATE), J105 (OBJECT)
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PALs
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----
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PAL1 PALCE16V8 (NAMCO CODE = NB2-1, PCB says "MIXER")
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PAL2 PAL16L8 (NAMCO CODE = NB1-2, PCB says "DEC75") (note! PAL is NB1-2)
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PAL3 PAL16L8 (NAMCO CODE = NB2-2, PCB says "SIZE")
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JUMPERs
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-------
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JP1 4M O-O O 1M Config jumper for ROM size, 4M = 27C4002, 1M = 27C1024
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JP2 A20 O O-O GND Config jumper for ROM size, GND = 16M, A20 = 32M
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JP3 A20 O O-O GND Config jumper for ROM size, GND = 16M, A20 = 32M
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JP4 O-O (2 pins shorted, hardwired on PCB)
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JP5 1 O O O L (hardwired on PCB, not shorted)
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JP6 1M O O-O 4M Config jumper for ROM size, 1M = 27C1024, 4M = 27C240
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JP7 O O-O /WDR (hardwired on PCB)
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JP8 GND O-O O A20 Config jumper for ROM size, GND = 16M, A20 = 32M
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JP9 CON O-O O COFF (hardwired on PCB)
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JP10 GND O-O O A20 Config jumper for ROM size, GND = 16M, A20 = 32M
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JP11 355 O O-O F32 (hardwired on PCB)
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ROMs, Main PCB
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--------------
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Filename / PCB ROM
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ROM Label Label Type
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------------------------------------------------------------------------------
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ou1dat0.20a DATA0 27C4002 Shared Data
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ou1dat1.20b DATA1 27C4002 Shared Data
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ou2mprl.11c PRGL 27C4002 \ Main program
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ou2mpru.11d PRGU 27C4002 /
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ou1spr0.5b SPRG 27C240 Sound program, linked to C352 and C382
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ou1voi0.6n VOICE0 MB8316200B Sound voices
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ou1shas.12s SHAPE-S 16M MASK Shape
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ou1shar.18s SHAPE-R 16M MASK Shape
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ROMs, MASK ROM PCB (All ROMs surface mounted)
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------------------
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Filename / PCB ROM
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ROM Label Label Type
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------------------------------------------------
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ou1scr0.1d SCR0 MB8316200B (16M SOP44)
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ou1rot0.3d ROT0 MB8316200B (16M SOP44)
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ou1rot1.3c ROT1 MB8316200B (16M SOP44)
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ou1rot2.3b ROT2 MB8316200B (16M SOP44)
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ou1obj0l.4c OBJ0L MB8316200B (16M SOP44)
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ou1obj1l.4b OBJ1L MB8316200B (16M SOP44)
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ou1obj2l.4a OBJ2L MB8316200B (16M SOP44)
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ou1obj3l.6c OBJ3L MB8316200B (16M SOP44)
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ou1obj4l.6b OBJ4L MB8316200B (16M SOP44)
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ou1obj0u.8c OBJ0U MB8316200B (16M SOP44)
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ou1obj1u.8b OBJ1U MB8316200B (16M SOP44)
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ou1obj2u.8a OBJ2U MB8316200B (16M SOP44)
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ou1obj3u.9c OBJ3U MB8316200B (16M SOP44)
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ou1obj4u.9b OBJ4U MB8316200B (16M SOP44)
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*/
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ROM_START( outfxies )
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ROM_REGION( 0x100000, "main", 0 ) /* main program */
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ROM_LOAD32_WORD( "ou2mprl.11c", 0x00002, 0x80000, CRC(f414a32e) SHA1(9733ab087cfde1b8fb5b676d8a2eb5325ebdbb56) )
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@ -1793,7 +1793,129 @@ ROM_START( wldcourt )
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ROM_LOAD( "wc1_obj3.bin", 0x60000, 0x10000, CRC(1aa2dbc8) SHA1(dc100fd85aca8b4c29d2100dba43dd4093976633) )
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ROM_END
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/* Splatter House */
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/*
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Splatter House
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Namco, 198x
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This game runs on Namco System 1 hardware
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PCB Layout
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----------
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Top Board
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(8617963201)
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(8617961201)
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|---------------------------------------------------------------------------|
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| TRB LA4460 LA4460 |
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| BAS |
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| BAL CHR8.U8 |
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| LA4520 JP4 JP3 |
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| TS7630 |
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| |-----| |
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| VOL | 123 | JP2 PRG7.T10 |
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| |-----| |
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| TL084 TL084 PRG6.S10 |
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| |
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| PRG5.P10 |
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|J MB3771 4066 YM3012 |
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|A PRG4.N10 |
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|M PAL1 |
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|M 64A1.M4 CHR7.M8 OBJ7.M9 PRG3.M10 |
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|A |
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| CHR6.L8 OBJ6.L9 PRG2.L10 |
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| |
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| VOICE5.K4 CHR5.K8 OBJ5.K9 PRG1.K10 |
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| |
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| VOICE4.H4 CHR4.H8 OBJ4.H9 PRG0.H10 |
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| |
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| VOICE3.F4 CHR3.F8 OBJ3.F9 JP1 KEYCUS(181) |
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| |
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| VOICE2.E4 CHR2.E8 OBJ2.E9 |
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| |
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| VOICE1.B4 CHR1.B8 OBJ1.B9 SOUND1.B10 |
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| LB1760 |
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| VOICE0.A4 CHR0.A8 OBJ0.A9 SOUND0.A10 |
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| DSW |
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| |
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|---------------------------------------------------------------------------|
|
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Notes:
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PAL1 - MMI Pal16L8, labelled 'SYS87A-R' (DIP20)
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JP1 - Configures ROM types, setting: 1-2
|
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JP2 - Configures ROM types, setting: 1-2
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JP3 - Configures ROM types, setting: 2-3
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JP4 - Used to set speaker output to STEREO/MONO
|
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TRB - Treble Adjustment Pot
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BAS - Bass Adjustment Pot
|
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BAL - Balance Adjustment Pot
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VOL - Master Volume Pot
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|
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Namco Custom ICs -
|
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123 (QFP80)
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||||
181 (DIP28, KEYCUS, Splatter House)
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64A1 (DIP40, 63701 MCU)
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|
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|
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Bottom Board
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8617961101
|
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(8617963101)
|
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|-----------------------------------------------------------------|
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|3.579545MHz YM2151 6809 6809 |
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| |
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| 2064 2064 6809 |
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|2816 |
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| |
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| |
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| |-----| 62256-10 |
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| | 121 | |
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| | | |
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| |-----| |-----| |
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| |117 | |
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| | | |
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| |-----| |
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| |
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| PAL2 2064 |
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| |
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| |
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| 62256-8* |
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| 6116 30 |
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| |
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| 2064 |-----| |
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| |133 | |
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| 2064 | | 2064 |
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| |-----| |
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| 2064 6116 |
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| |-----| 2064 |
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| |C116 | 6116 |
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| | | |-----| 48 |
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||||
| |-----| |C120 | 39 49.152MHz |
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| | | |
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| |-----| 27 |
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|-----------------------------------------------------------------|
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Notes:
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6809 - Hitachi HD68B09EP CPUs, running at 8.000MHz (all 3)
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YM2151- Running at 3.579545MHz
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PAL2 - MMI Pal16L8, labelled 'SYS87A-C' (DIP20)
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2816 - 2K x8 EEPROM (DIP24)
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6116 - 2K x8 SRAM (DIP24)
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2064 - 8K x8 SRAM (DIP28)
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62256 - 32K x8 SRAM (DIP28)
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* Note, a -8 part must be used at this location or the PCB will not boot
|
||||
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Namco Custom ICs -
|
||||
30 (SDIP64)
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||||
39 (DIP42)
|
||||
48 (SDIP64)
|
||||
27 (DIP42)
|
||||
121 (QFP64)
|
||||
C116 (QFP80)
|
||||
C120 (QFP64)
|
||||
117 (QFP64)
|
||||
133 (QFP64)
|
||||
|
||||
*/
|
||||
ROM_START( splatter )
|
||||
ROM_REGION( 0x2c000, "audio", 0 ) /* 176k for the sound cpu */
|
||||
ROM_LOAD( "sh1_snd0.bin", 0x0c000, 0x10000, CRC(90abd4ad) SHA1(caeba5befcf57d90671786c7ef1ce49d54821949) )
|
||||
|
||||
@ -1148,7 +1148,104 @@ ROM_START( polepos1 )
|
||||
ROM_LOAD( "136014.117", 0x0000, 0x0100, CRC(2401c817) SHA1(8991b7994513a469e64392fa8f233af5e5f06d54) ) /* sync chain */
|
||||
ROM_END
|
||||
|
||||
/*
|
||||
Top Racer / Pole Position I/II (?)
|
||||
|
||||
PCB Layouts
|
||||
===========
|
||||
|
||||
Upper Board
|
||||
-----------
|
||||
PP-1126
|
||||
|----------------------------------------------------------------------------------|
|
||||
| LM324 8A 9A |
|
||||
|1B DIP28 DIP28 DIP28 |
|
||||
| 4066 |
|
||||
| |
|
||||
| LM324 |
|
||||
| DSW2 4066 4066 |
|
||||
| MB8841 MB8841 MB8841 82S129.14C |
|
||||
| |
|
||||
| |
|
||||
| DSW1 |
|
||||
| 4066 4066 82S153.16D |
|
||||
| |
|
||||
| |
|
||||
| MB8842 |
|
||||
| LM324 82S129.9E 2148 2148 Z80 Z8002 Z8002 |
|
||||
| |-----daughterboard-------| |
|
||||
| | | |
|
||||
| | 82S153.18E 82S153.21E| |
|
||||
| | 20E | |
|
||||
| 6116| | |
|
||||
| ADC0804 |16F 17F 20F 21F | 23F |
|
||||
| |-------------------------| |
|
||||
| 16F 17F |
|
||||
| 4066 |
|
||||
| |
|
||||
| 4093 |
|
||||
| 3.6V_BATT |
|
||||
|---------|----18-way-----|-----------------J2-------|----50-pin cable---|---------|
|
||||
|---------------| |-------------------|
|
||||
Notes:
|
||||
82S153 - Field Programmable Logic Array (DIP20)
|
||||
2148 - 1K x4bit SRAM (DIP18)
|
||||
6116 - 2K x8bit SRAM (DIP24)
|
||||
ADC0804 - 8bit Microprocessor Compatible A/D Convertor (DIP20)
|
||||
J2 - 3 Pin Power Connector
|
||||
DIP28 - Unpopulated Sockets
|
||||
MB8841 - Fujitsu 4bit Microcontroller (DIP40)
|
||||
MB8842 - Fujitsu 4bit Microcontroller (DIP28)
|
||||
LM324 - Low Power Quad Operational Amplifier (DIP14)
|
||||
|
||||
Note - All ROMs labelled PP2_U.* are located on the upper PCB.
|
||||
All ROMs labelled PP2_D.* are located on the plug-in daughterboard.
|
||||
|
||||
|
||||
Lower Board
|
||||
-----------
|
||||
|
||||
|----------------------------------------------------------------------------------|
|
||||
| 1A 2A 3A 4A 5A 6A 7A 8A 9A 10A |
|
||||
| |
|
||||
| 9D 82S129.13D |
|
||||
| |
|
||||
| 82S129.13E |
|
||||
| 2148 2148 |
|
||||
| 82S129.13F |
|
||||
| 6116 6116 82S137.7H |
|
||||
| |
|
||||
| |
|
||||
| |
|
||||
| 2J 6116 6116 |
|
||||
| |
|
||||
| |
|
||||
| |
|
||||
| 2M 8M 9M |
|
||||
| |
|
||||
| |
|
||||
| 82S129.2N |
|
||||
| 2114 2114 |
|
||||
| 82S129.2P 82S137.5P 8P |
|
||||
| 2114 2114 82S123.15R |
|
||||
| 82S129.2S |
|
||||
| 2114 2114 82S123.15S |
|
||||
| 82S129.2T |
|
||||
| MB3730 MB3730 MB3730 MB3730 24.576MHz 2114 2114 |
|
||||
| 82S129.2U VOL VOL VOL VOL |
|
||||
| |
|
||||
|---------|----18-way-----|-----------------J2-------|----50-pin cable---|---------|
|
||||
|---------------| |-------------------|
|
||||
Notes:
|
||||
2114 - 1K x4bit SRAM (DIP18)
|
||||
2148 - 1K x4bit SRAM (DIP18)
|
||||
6116 - 2K x8bit SRAM (DIP24)
|
||||
MB3730 - 12W Power Amp IC (SIP7)
|
||||
J2 - 3 Pin Power Connector
|
||||
VOL - Volume Potentiometer
|
||||
|
||||
Note - All ROMs labelled PP2_L.* are located on the lower PCB.
|
||||
*/
|
||||
ROM_START( topracer )
|
||||
/* Z80 memory/ROM data */
|
||||
ROM_REGION( 0x10000, "main", 0 )
|
||||
|
||||
Loading…
Reference in New Issue
Block a user