Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-26 10:13:37 +03:00
Code Issues Actions 29 Packages Projects Releases Wiki Activity

-abcbus/hdc, abcbus/lux21056, abcbus/lux4105, zorro/a590:, cbmiec/cmdhd, econet/e01, ieee488/d9060, video/huc622, x68k_scsiext:

Browse Source 
device_add_mconfig modernization. [Ryan Holtz]

-amiga_dmac: Replaced old devcb with devcb3. [Ryan Holtz]

-mc6854, ataintf, mb89352, mc6854, wd33c93: Added devcb3 support. [Ryan Holtz]

-8042kbdc, i8255, idectrl, intelfsh, mb89352, ram, wd33c93, volt_reg: Default clocks to 0 (nw)

-bebox, indy_indigo2: machine_config modernization. [Ryan Holtz]
This commit is contained in:
mooglyguy 2018-07-30 18:35:47 +02:00
parent ef33cc041d
commit 1a899d987f
44 changed files with 691 additions and 574 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
src/devices/bus/abcbus/hdc.cpp
View File

@ -83,15 +83,16 @@ static const z80_daisy_config daisy_chain[] =
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(abc_hdc_device::device_add_mconfig)
MCFG_DEVICE_ADD(Z80_TAG, Z80, 4000000)
MCFG_DEVICE_PROGRAM_MAP(abc_hdc_mem)
MCFG_DEVICE_IO_MAP(abc_hdc_io)
MCFG_Z80_DAISY_CHAIN(daisy_chain)
void abc_hdc_device::device_add_mconfig(machine_config &config)
{
Z80(config, m_maincpu, 4000000);
m_maincpu->set_memory_map(&abc_hdc_device::abc_hdc_mem);
m_maincpu->set_io_map(&abc_hdc_device::abc_hdc_io);
m_maincpu->set_daisy_config(daisy_chain);
MCFG_DEVICE_ADD(SASIBUS_TAG, SCSI_PORT, 0)
MCFG_SCSIDEV_ADD(SASIBUS_TAG ":" SCSI_PORT_DEVICE1, "harddisk", SCSIHD, SCSI_ID_0)
MACHINE_CONFIG_END
scsi_port_device &scsi(SCSI_PORT(config, SASIBUS_TAG));
scsi.set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
}
//**************************************************************************

2
src/devices/bus/abcbus/hdc.h
View File

@ -44,7 +44,7 @@ protected:
virtual void abcbus_cs(uint8_t data) override;
private:
required_device<cpu_device> m_maincpu;
required_device<z80_device> m_maincpu;
void abc_hdc_io(address_map &map);
void abc_hdc_mem(address_map &map);

56
src/devices/bus/abcbus/lux21056.cpp
View File

@ -247,32 +247,42 @@ WRITE_LINE_MEMBER( luxor_55_21056_device::write_sasi_msg )
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(luxor_55_21056_device::device_add_mconfig)
MCFG_DEVICE_ADD(Z80_TAG, Z80, XTAL(8'000'000)/2)
MCFG_DEVICE_PROGRAM_MAP(luxor_55_21056_mem)
MCFG_DEVICE_IO_MAP(luxor_55_21056_io)
MCFG_Z80_DAISY_CHAIN(daisy_chain)
void luxor_55_21056_device::device_add_mconfig(machine_config &config)
{
Z80(config, m_maincpu, XTAL(8'000'000)/2);
m_maincpu->set_memory_map(&luxor_55_21056_device::luxor_55_21056_mem);
m_maincpu->set_io_map(&luxor_55_21056_device::luxor_55_21056_io);
m_maincpu->set_daisy_config(daisy_chain);
MCFG_DEVICE_ADD(Z80DMA_TAG, Z80DMA, XTAL(8'000'000)/2)
MCFG_Z80DMA_OUT_BUSREQ_CB(INPUTLINE(Z80_TAG, INPUT_LINE_HALT))
MCFG_Z80DMA_OUT_INT_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80DMA_IN_MREQ_CB(READ8(*this, luxor_55_21056_device, memory_read_byte))
MCFG_Z80DMA_OUT_MREQ_CB(WRITE8(*this, luxor_55_21056_device, memory_write_byte))
MCFG_Z80DMA_IN_IORQ_CB(READ8(*this, luxor_55_21056_device, io_read_byte))
MCFG_Z80DMA_OUT_IORQ_CB(WRITE8(*this, luxor_55_21056_device, io_write_byte))
Z80DMA(config, m_dma, XTAL(8'000'000)/2);
m_dma->out_busreq_callback().set_inputline(m_maincpu, INPUT_LINE_HALT);
m_dma->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
m_dma->in_mreq_callback().set(FUNC(luxor_55_21056_device::memory_read_byte));
m_dma->out_mreq_callback().set(FUNC(luxor_55_21056_device::memory_write_byte));
m_dma->in_iorq_callback().set(FUNC(luxor_55_21056_device::io_read_byte));
m_dma->out_iorq_callback().set(FUNC(luxor_55_21056_device::io_write_byte));
MCFG_DEVICE_ADD(SASIBUS_TAG, SCSI_PORT, 0)
MCFG_SCSI_DATA_INPUT_BUFFER("sasi_data_in")
MCFG_SCSI_REQ_HANDLER(WRITELINE(*this, luxor_55_21056_device, write_sasi_req))
MCFG_SCSI_IO_HANDLER(WRITELINE(*this, luxor_55_21056_device, write_sasi_io))
MCFG_SCSI_CD_HANDLER(WRITELINE(*this, luxor_55_21056_device, write_sasi_cd))
MCFG_SCSI_MSG_HANDLER(WRITELINE(*this, luxor_55_21056_device, write_sasi_msg))
MCFG_SCSI_BSY_HANDLER(WRITELINE(*this, luxor_55_21056_device, write_sasi_bsy))
MCFG_SCSIDEV_ADD(SASIBUS_TAG ":" SCSI_PORT_DEVICE1, "harddisk", S1410, SCSI_ID_0)
SCSI_PORT(config, m_sasibus);
m_sasibus->set_data_input_buffer(m_sasi_data_in);
m_sasibus->req_handler().set(FUNC(luxor_55_21056_device::write_sasi_req));
m_sasibus->io_handler().set(FUNC(luxor_55_21056_device::write_sasi_io));
m_sasibus->cd_handler().set(FUNC(luxor_55_21056_device::write_sasi_cd));
m_sasibus->msg_handler().set(FUNC(luxor_55_21056_device::write_sasi_msg));
m_sasibus->bsy_handler().set(FUNC(luxor_55_21056_device::write_sasi_bsy));
m_sasibus->set_slot_device(1, "harddisk", S1410, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
MCFG_SCSI_OUTPUT_LATCH_ADD("sasi_data_out", SASIBUS_TAG)
MCFG_DEVICE_ADD("sasi_data_in", INPUT_BUFFER, 0)
MACHINE_CONFIG_END
OUTPUT_LATCH(config, m_sasi_data_out);
m_sasi_data_out->bit_handler<0>().set(m_sasibus, FUNC(scsi_port_device::write_data0));
m_sasi_data_out->bit_handler<1>().set(m_sasibus, FUNC(scsi_port_device::write_data1));
m_sasi_data_out->bit_handler<2>().set(m_sasibus, FUNC(scsi_port_device::write_data2));
m_sasi_data_out->bit_handler<3>().set(m_sasibus, FUNC(scsi_port_device::write_data3));
m_sasi_data_out->bit_handler<4>().set(m_sasibus, FUNC(scsi_port_device::write_data4));
m_sasi_data_out->bit_handler<5>().set(m_sasibus, FUNC(scsi_port_device::write_data5));
m_sasi_data_out->bit_handler<6>().set(m_sasibus, FUNC(scsi_port_device::write_data6));
m_sasi_data_out->bit_handler<7>().set(m_sasibus, FUNC(scsi_port_device::write_data7));
INPUT_BUFFER(config, m_sasi_data_in);
}
//-------------------------------------------------

2
src/devices/bus/abcbus/lux21056.h
View File

@ -80,7 +80,7 @@ private:
void luxor_55_21056_io(address_map &map);
void luxor_55_21056_mem(address_map &map);
required_device<cpu_device> m_maincpu;
required_device<z80_device> m_maincpu;
required_device<z80dma_device> m_dma;
required_device<scsi_port_device> m_sasibus;
required_device<output_latch_device> m_sasi_data_out;

32
src/devices/bus/abcbus/lux4105.cpp
View File

@ -72,18 +72,28 @@ WRITE_LINE_MEMBER( luxor_4105_device::write_sasi_cd )
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(luxor_4105_device::device_add_mconfig)
MCFG_DEVICE_ADD(SASIBUS_TAG, SCSI_PORT, 0)
MCFG_SCSI_DATA_INPUT_BUFFER("sasi_data_in")
MCFG_SCSI_BSY_HANDLER(WRITELINE(*this, luxor_4105_device, write_sasi_bsy))
MCFG_SCSI_REQ_HANDLER(WRITELINE(*this, luxor_4105_device, write_sasi_req))
MCFG_SCSI_CD_HANDLER(WRITELINE(*this, luxor_4105_device, write_sasi_cd))
MCFG_SCSI_IO_HANDLER(WRITELINE(*this, luxor_4105_device, write_sasi_io))
MCFG_SCSIDEV_ADD(SASIBUS_TAG ":" SCSI_PORT_DEVICE1, "harddisk", S1410, SCSI_ID_0)
void luxor_4105_device::device_add_mconfig(machine_config &config)
{
SCSI_PORT(config, m_sasibus);
m_sasibus->set_data_input_buffer(m_sasi_data_in);
m_sasibus->bsy_handler().set(FUNC(luxor_4105_device::write_sasi_bsy));
m_sasibus->req_handler().set(FUNC(luxor_4105_device::write_sasi_req));
m_sasibus->cd_handler().set(FUNC(luxor_4105_device::write_sasi_cd));
m_sasibus->io_handler().set(FUNC(luxor_4105_device::write_sasi_io));
m_sasibus->set_slot_device(1, "harddisk", S1410, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
MCFG_SCSI_OUTPUT_LATCH_ADD("sasi_data_out", SASIBUS_TAG)
MCFG_DEVICE_ADD("sasi_data_in", INPUT_BUFFER, 0)
MACHINE_CONFIG_END
OUTPUT_LATCH(config, m_sasi_data_out);
m_sasi_data_out->bit_handler<0>().set(m_sasibus, FUNC(scsi_port_device::write_data0));
m_sasi_data_out->bit_handler<1>().set(m_sasibus, FUNC(scsi_port_device::write_data1));
m_sasi_data_out->bit_handler<2>().set(m_sasibus, FUNC(scsi_port_device::write_data2));
m_sasi_data_out->bit_handler<3>().set(m_sasibus, FUNC(scsi_port_device::write_data3));
m_sasi_data_out->bit_handler<4>().set(m_sasibus, FUNC(scsi_port_device::write_data4));
m_sasi_data_out->bit_handler<5>().set(m_sasibus, FUNC(scsi_port_device::write_data5));
m_sasi_data_out->bit_handler<6>().set(m_sasibus, FUNC(scsi_port_device::write_data6));
m_sasi_data_out->bit_handler<7>().set(m_sasibus, FUNC(scsi_port_device::write_data7));
INPUT_BUFFER(config, m_sasi_data_in);
}
//-------------------------------------------------

27
src/devices/bus/amiga/zorro/a590.cpp
View File

@ -114,18 +114,21 @@ ioport_constructor a2091_device::device_input_ports() const
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(dmac_hdc_device::device_add_mconfig)
MCFG_DMAC_ADD("dmac", 0)
MCFG_DMAC_SCSI_READ_HANDLER(READ8(*this, dmac_hdc_device, dmac_scsi_r))
MCFG_DMAC_SCSI_WRITE_HANDLER(WRITE8(*this, dmac_hdc_device, dmac_scsi_w))
MCFG_DMAC_INT_HANDLER(WRITELINE(*this, dmac_hdc_device, dmac_int_w))
MCFG_DMAC_CFGOUT_HANDLER(WRITELINE(*this, dmac_hdc_device, dmac_cfgout_w))
MCFG_DEVICE_ADD("scsi", SCSI_PORT, 0)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE1, "harddisk", SCSIHD, SCSI_ID_1)
MCFG_DEVICE_ADD("wd33c93", WD33C93, 0)
MCFG_LEGACY_SCSI_PORT("scsi")
MCFG_WD33C93_IRQ_CB(WRITELINE(*this, dmac_hdc_device, scsi_irq_w))
MACHINE_CONFIG_END
void dmac_hdc_device::device_add_mconfig(machine_config &config)
{
amiga_dmac_device &dmac(AMIGA_DMAC(config, "dmac", 0));
dmac.scsi_read_handler().set(FUNC(dmac_hdc_device::dmac_scsi_r));
dmac.scsi_write_handler().set(FUNC(dmac_hdc_device::dmac_scsi_w));
dmac.int_handler().set(FUNC(dmac_hdc_device::dmac_int_w));
dmac.cfgout_handler().set(FUNC(dmac_hdc_device::dmac_cfgout_w));
scsi_port_device &scsi(SCSI_PORT(config, "scsi"));
scsi.set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_1));
wd33c93_device &scsi_ctrl(WD33C93(config, "wd33c93"));
scsi_ctrl.set_scsi_port("scsi");
scsi_ctrl.irq_cb().set(FUNC(dmac_hdc_device::scsi_irq_w));
}
//-------------------------------------------------

27
src/devices/bus/cbmiec/cmdhd.cpp
View File

@ -57,11 +57,7 @@ const tiny_rom_entry *cmd_hd_device::device_rom_region() const
}
//-------------------------------------------------
// ADDRESS_MAP( cmd_hd_mem )
//-------------------------------------------------
void cmd_hd_device::cmd_hd_mem(address_map &map)
void cmd_hd_device::mem_map(address_map &map)
{
map(0x0000, 0x7fff).ram();
map(0x8000, 0xffff).rom().region(M6502_TAG, 0);
@ -77,18 +73,19 @@ void cmd_hd_device::cmd_hd_mem(address_map &map)
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(cmd_hd_device::device_add_mconfig)
MCFG_DEVICE_ADD(M6502_TAG, M6502, 2000000)
MCFG_DEVICE_PROGRAM_MAP(cmd_hd_mem)
void cmd_hd_device::device_add_mconfig(machine_config &config)
{
M6502(config, m_maincpu, 2000000);
m_maincpu->set_addrmap(AS_PROGRAM, &cmd_hd_device::mem_map);
MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, 2000000)
MCFG_DEVICE_ADD(M6522_2_TAG, VIA6522, 2000000)
MCFG_DEVICE_ADD(I8255A_TAG, I8255A, 0)
MCFG_DEVICE_ADD(RTC72421A_TAG, RTC72421, XTAL(32'768))
VIA6522(config, M6522_1_TAG, 2000000);
VIA6522(config, M6522_2_TAG, 2000000);
I8255A(config, I8255A_TAG, 0);
RTC72421(config, RTC72421A_TAG, XTAL(32'768));
MCFG_DEVICE_ADD(SCSIBUS_TAG, SCSI_PORT, 0)
MCFG_SCSIDEV_ADD(SCSIBUS_TAG ":" SCSI_PORT_DEVICE1, "harddisk", SCSIHD, SCSI_ID_0)
MACHINE_CONFIG_END
SCSI_PORT(config, m_scsibus);
m_scsibus->set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
}

4
src/devices/bus/cbmiec/cmdhd.h
View File

@ -56,12 +56,12 @@ protected:
void cbm_iec_reset(int state) override;
private:
required_device<cpu_device> m_maincpu;
required_device<m6502_device> m_maincpu;
required_device<scsi_port_device> m_scsibus;
DECLARE_WRITE8_MEMBER( led_w );
void cmd_hd_mem(address_map &map);
void mem_map(address_map &map);
};

106
src/devices/bus/econet/e01.cpp
View File

@ -173,11 +173,6 @@ FLOPPY_FORMATS_MEMBER( econet_e01_device::floppy_formats_afs )
FLOPPY_AFS_FORMAT
FLOPPY_FORMATS_END0
static void e01_floppies(device_slot_interface &device)
{
device.option_add("35dd", FLOPPY_35_DD); // NEC FD1036 A
}
WRITE_LINE_MEMBER( econet_e01_device::fdc_irq_w )
{
m_fdc_irq = state;
@ -243,55 +238,81 @@ void econet_e01_device::e01_mem(address_map &map)
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(econet_e01_device::device_add_mconfig)
void econet_e01_device::device_add_mconfig(machine_config &config)
{
// basic machine hardware
MCFG_DEVICE_ADD(R65C102_TAG, M65C02, XTAL(8'000'000)/4) // Rockwell R65C102P3
MCFG_DEVICE_PROGRAM_MAP(e01_mem)
M65C02(config, m_maincpu, XTAL(8'000'000)/4); // Rockwell R65C102P3
m_maincpu->set_addrmap(AS_PROGRAM, &econet_e01_device::e01_mem);
MCFG_DEVICE_ADD(HD146818_TAG, MC146818, 32.768_kHz_XTAL)
MCFG_MC146818_IRQ_HANDLER(WRITELINE(*this, econet_e01_device, rtc_irq_w))
MC146818(config, m_rtc, 32.768_kHz_XTAL);
m_rtc->irq_callback().set(FUNC(econet_e01_device::rtc_irq_w));
// devices
MCFG_DEVICE_ADD(R6522_TAG, VIA6522, 8_MHz_XTAL / 4)
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8("cent_data_out", output_latch_device, bus_w))
MCFG_VIA6522_IRQ_HANDLER(WRITELINE(*this, econet_e01_device, via_irq_w))
via6522_device &via(VIA6522(config, R6522_TAG, 8_MHz_XTAL / 4));
via.writepa_handler().set("cent_data_out", FUNC(output_latch_device::bus_w));
via.irq_handler().set(FUNC(econet_e01_device::via_irq_w));
MCFG_DEVICE_ADD(MC6854_TAG, MC6854, 0)
MCFG_MC6854_OUT_IRQ_CB(WRITELINE(*this, econet_e01_device, adlc_irq_w))
MCFG_MC6854_OUT_TXD_CB(WRITELINE(*this, econet_e01_device, econet_data_w))
MC6854(config, m_adlc, 0);
m_adlc->out_irq_cb().set(FUNC(econet_e01_device::adlc_irq_w));
m_adlc->out_txd_cb().set(FUNC(econet_e01_device::econet_data_w));
MCFG_DEVICE_ADD(WD2793_TAG, WD2793, 8_MHz_XTAL / 4)
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, econet_e01_device, fdc_irq_w))
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(*this, econet_e01_device, fdc_drq_w))
MCFG_FLOPPY_DRIVE_ADD(WD2793_TAG":0", e01_floppies, "35dd", floppy_formats_afs)
MCFG_FLOPPY_DRIVE_ADD(WD2793_TAG":1", e01_floppies, "35dd", floppy_formats_afs)
MCFG_SOFTWARE_LIST_ADD("flop_ls_e01", "e01_flop")
WD2793(config, m_fdc, 8_MHz_XTAL / 4);
m_fdc->intrq_wr_callback().set(FUNC(econet_e01_device::fdc_irq_w));
m_fdc->drq_wr_callback().set(FUNC(econet_e01_device::fdc_drq_w));
MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer")
MCFG_CENTRONICS_ACK_HANDLER(WRITELINE(R6522_TAG, via6522_device, write_ca1))
for (int i = 0; i < 2; i++)
{
FLOPPY_CONNECTOR(config, m_floppy[i]);
m_floppy[i]->option_add("35dd", FLOPPY_35_DD);
m_floppy[i]->set_default_option("35dd");
m_floppy[i]->set_formats(floppy_formats_afs);
}
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", CENTRONICS_TAG)
software_list_device &softlist(SOFTWARE_LIST(config, "flop_ls_e01"));
softlist.set_type("e01_flop", SOFTWARE_LIST_ORIGINAL_SYSTEM);
MCFG_DEVICE_ADD(SCSIBUS_TAG, SCSI_PORT, 0)
MCFG_SCSI_DATA_INPUT_BUFFER("scsi_data_in")
MCFG_SCSI_MSG_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit0))
MCFG_SCSI_BSY_HANDLER(WRITELINE(*this, econet_e01_device, scsi_bsy_w)) // bit1
CENTRONICS(config, m_centronics, centronics_devices, "printer");
m_centronics->ack_handler().set(R6522_TAG, FUNC(via6522_device::write_ca1));
output_latch_device &cent_data_out(OUTPUT_LATCH(config, "cent_data_out"));
cent_data_out.bit_handler<0>().set(m_centronics, FUNC(centronics_device::write_data0));
cent_data_out.bit_handler<1>().set(m_centronics, FUNC(centronics_device::write_data1));
cent_data_out.bit_handler<2>().set(m_centronics, FUNC(centronics_device::write_data2));
cent_data_out.bit_handler<3>().set(m_centronics, FUNC(centronics_device::write_data3));
cent_data_out.bit_handler<4>().set(m_centronics, FUNC(centronics_device::write_data4));
cent_data_out.bit_handler<5>().set(m_centronics, FUNC(centronics_device::write_data5));
cent_data_out.bit_handler<6>().set(m_centronics, FUNC(centronics_device::write_data6));
cent_data_out.bit_handler<7>().set(m_centronics, FUNC(centronics_device::write_data7));
SCSI_PORT(config, m_scsibus);
m_scsibus->set_data_input_buffer(m_scsi_data_in);
m_scsibus->msg_handler().set(m_scsi_ctrl_in, FUNC(input_buffer_device::write_bit0));
m_scsibus->bsy_handler().set(FUNC(econet_e01_device::scsi_bsy_w)); // bit1
// bit 2 0
// bit 3 0
// bit 4 NIRQ
MCFG_SCSI_REQ_HANDLER(WRITELINE(*this, econet_e01_device, scsi_req_w)) // bit5
MCFG_SCSI_IO_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit6))
MCFG_SCSI_CD_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit7))
MCFG_SCSIDEV_ADD(SCSIBUS_TAG ":" SCSI_PORT_DEVICE1, "harddisk", SCSIHD, SCSI_ID_0)
m_scsibus->req_handler().set(FUNC(econet_e01_device::scsi_req_w)); // bit5
m_scsibus->io_handler().set(m_scsi_ctrl_in, FUNC(input_buffer_device::write_bit6));
m_scsibus->cd_handler().set(m_scsi_ctrl_in, FUNC(input_buffer_device::write_bit7));
m_scsibus->set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
MCFG_SCSI_OUTPUT_LATCH_ADD("scsi_data_out", SCSIBUS_TAG)
MCFG_DEVICE_ADD("scsi_data_in", INPUT_BUFFER, 0)
MCFG_DEVICE_ADD("scsi_ctrl_in", INPUT_BUFFER, 0)
OUTPUT_LATCH(config, m_scsi_data_out);
m_scsi_data_out->bit_handler<0>().set(m_scsibus, FUNC(scsi_port_device::write_data0));
m_scsi_data_out->bit_handler<1>().set(m_scsibus, FUNC(scsi_port_device::write_data1));
m_scsi_data_out->bit_handler<2>().set(m_scsibus, FUNC(scsi_port_device::write_data2));
m_scsi_data_out->bit_handler<3>().set(m_scsibus, FUNC(scsi_port_device::write_data3));
m_scsi_data_out->bit_handler<4>().set(m_scsibus, FUNC(scsi_port_device::write_data4));
m_scsi_data_out->bit_handler<5>().set(m_scsibus, FUNC(scsi_port_device::write_data5));
m_scsi_data_out->bit_handler<6>().set(m_scsibus, FUNC(scsi_port_device::write_data6));
m_scsi_data_out->bit_handler<7>().set(m_scsibus, FUNC(scsi_port_device::write_data7));
INPUT_BUFFER(config, m_scsi_data_in);
INPUT_BUFFER(config, m_scsi_ctrl_in);
// internal ram
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("64K")
MACHINE_CONFIG_END
RAM(config, m_ram);
m_ram->set_default_size("64K");
}
//-------------------------------------------------
@ -390,8 +411,7 @@ econet_e01_device::econet_e01_device(const machine_config &mconfig, device_type
, m_scsi_data_out(*this, "scsi_data_out")
, m_scsi_data_in(*this, "scsi_data_in")
, m_scsi_ctrl_in(*this, "scsi_ctrl_in")
, m_floppy0(*this, WD2793_TAG":0")
, m_floppy1(*this, WD2793_TAG":1")
, m_floppy(*this, WD2793_TAG":%u", 0U)
, m_rom(*this, R65C102_TAG)
, m_centronics(*this, CENTRONICS_TAG)
, m_adlc_ie(0)
@ -521,8 +541,8 @@ WRITE8_MEMBER( econet_e01_device::floppy_w )
// floppy select
floppy_image_device *floppy = nullptr;
if (!BIT(data, 0)) floppy = m_floppy0->get_device();
if (!BIT(data, 1)) floppy = m_floppy1->get_device();
if (!BIT(data, 0)) floppy = m_floppy[0]->get_device();
if (!BIT(data, 1)) floppy = m_floppy[1]->get_device();
m_fdc->set_floppy(floppy);

3
src/devices/bus/econet/e01.h
View File

@ -92,8 +92,7 @@ private:
required_device<output_latch_device> m_scsi_data_out;
required_device<input_buffer_device> m_scsi_data_in;
required_device<input_buffer_device> m_scsi_ctrl_in;
required_device<floppy_connector> m_floppy0;
required_device<floppy_connector> m_floppy1;
required_device_array<floppy_connector, 2> m_floppy;
required_memory_region m_rom;
required_device<centronics_device> m_centronics;

105
src/devices/bus/ieee488/d9060.cpp
View File

@ -105,16 +105,12 @@ const tiny_rom_entry *d9060_device_base::device_rom_region() const
}
//-------------------------------------------------
// ADDRESS_MAP( d9060_main_mem )
//-------------------------------------------------
void d9060_device_base::d9060_main_mem(address_map &map)
void d9060_device_base::main_mem(address_map &map)
{
map(0x0000, 0x007f).mirror(0x0100).m(M6532_0_TAG, FUNC(mos6532_new_device::ram_map));
map(0x0080, 0x00ff).mirror(0x0100).m(M6532_1_TAG, FUNC(mos6532_new_device::ram_map));
map(0x0200, 0x021f).mirror(0x0d60).m(M6532_0_TAG, FUNC(mos6532_new_device::io_map));
map(0x0280, 0x029f).mirror(0x0d60).m(M6532_1_TAG, FUNC(mos6532_new_device::io_map));
map(0x0000, 0x007f).mirror(0x0100).m(m_riot0, FUNC(mos6532_new_device::ram_map));
map(0x0080, 0x00ff).mirror(0x0100).m(m_riot1, FUNC(mos6532_new_device::ram_map));
map(0x0200, 0x021f).mirror(0x0d60).m(m_riot0, FUNC(mos6532_new_device::io_map));
map(0x0280, 0x029f).mirror(0x0d60).m(m_riot1, FUNC(mos6532_new_device::io_map));
map(0x1000, 0x13ff).mirror(0x0c00).ram().share("share1");
map(0x2000, 0x23ff).mirror(0x0c00).ram().share("share2");
map(0x3000, 0x33ff).mirror(0x0c00).ram().share("share3");
@ -123,15 +119,11 @@ void d9060_device_base::d9060_main_mem(address_map &map)
}
//-------------------------------------------------
// ADDRESS_MAP( d9060_hdc_mem )
//-------------------------------------------------
void d9060_device_base::d9060_hdc_mem(address_map &map)
void d9060_device_base::hdc_mem(address_map &map)
{
map.global_mask(0x1fff);
map(0x0000, 0x007f).mirror(0x300).ram();
map(0x0080, 0x008f).mirror(0x370).rw(M6522_TAG, FUNC(via6522_device::read), FUNC(via6522_device::write));
map(0x0080, 0x008f).mirror(0x370).rw(m_via, FUNC(via6522_device::read), FUNC(via6522_device::write));
map(0x0400, 0x07ff).ram().share("share1");
map(0x0800, 0x0bff).ram().share("share2");
map(0x0c00, 0x0fff).ram().share("share3");
@ -370,52 +362,61 @@ WRITE8_MEMBER( d9060_device_base::scsi_data_w )
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(d9060_device_base::device_add_mconfig)
void d9060_device_base::device_add_mconfig(machine_config &config)
{
// DOS
MCFG_DEVICE_ADD(M6502_DOS_TAG, M6502, XTAL(4'000'000)/4)
MCFG_DEVICE_PROGRAM_MAP(d9060_main_mem)
M6502(config, m_maincpu, XTAL(4'000'000)/4);
m_maincpu->set_addrmap(AS_PROGRAM, &d9060_device::main_mem);
MCFG_DEVICE_ADD(M6532_0_TAG, MOS6532_NEW, XTAL(4'000'000)/4)
MCFG_MOS6530n_IN_PA_CB(READ8(*this, d9060_device_base, dio_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(*this, d9060_device_base, dio_w))
MOS6532_NEW(config, m_riot0, XTAL(4'000'000)/4);
m_riot0->pa_rd_callback().set(FUNC(d9060_device_base::dio_r));
m_riot0->pb_wr_callback().set(FUNC(d9060_device_base::dio_w));
MCFG_DEVICE_ADD(M6532_1_TAG, MOS6532_NEW, XTAL(4'000'000)/4)
MCFG_MOS6530n_IN_PA_CB(READ8(*this, d9060_device_base, riot1_pa_r))
MCFG_MOS6530n_OUT_PA_CB(WRITE8(*this, d9060_device_base, riot1_pa_w))
MCFG_MOS6530n_IN_PB_CB(READ8(*this, d9060_device_base, riot1_pb_r))
MCFG_MOS6530n_OUT_PB_CB(WRITE8(*this, d9060_device_base, riot1_pb_w))
MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6502_DOS_TAG, INPUT_LINE_IRQ0))
MOS6532_NEW(config, m_riot1, XTAL(4'000'000)/4);
m_riot1->pa_rd_callback().set(FUNC(d9060_device_base::riot1_pa_r));
m_riot1->pa_wr_callback().set(FUNC(d9060_device_base::riot1_pa_w));
m_riot1->pb_rd_callback().set(FUNC(d9060_device_base::riot1_pb_r));
m_riot1->pb_wr_callback().set(FUNC(d9060_device_base::riot1_pb_w));
m_riot1->irq_wr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
// controller
MCFG_DEVICE_ADD(M6502_HDC_TAG, M6502, XTAL(4'000'000)/4)
MCFG_DEVICE_PROGRAM_MAP(d9060_hdc_mem)
M6502(config, m_hdccpu, XTAL(4'000'000)/4);
m_hdccpu->set_addrmap(AS_PROGRAM, &d9060_device::hdc_mem);
MCFG_DEVICE_ADD(M6522_TAG, VIA6522, XTAL(4'000'000)/4)
MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(*this, d9060_device_base, scsi_data_w))
MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(*this, d9060_device_base, via_pb_w))
MCFG_VIA6522_CA2_HANDLER(WRITELINE(*this, d9060_device_base, ack_w))
MCFG_VIA6522_CB2_HANDLER(WRITELINE(*this, d9060_device_base, enable_w))
MCFG_VIA6522_IRQ_HANDLER(INPUTLINE(M6502_HDC_TAG, M6502_IRQ_LINE))
VIA6522(config, m_via, XTAL(4'000'000)/4);
m_via->writepa_handler().set(FUNC(d9060_device_base::scsi_data_w));
m_via->writepb_handler().set(FUNC(d9060_device_base::via_pb_w));
m_via->ca2_handler().set(FUNC(d9060_device_base::ack_w));
m_via->cb2_handler().set(FUNC(d9060_device_base::enable_w));
m_via->irq_handler().set_inputline(m_hdccpu, M6502_IRQ_LINE);
MCFG_DEVICE_ADD(SASIBUS_TAG, SCSI_PORT, 0)
MCFG_SCSI_REQ_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_ca1))
MCFG_SCSI_CD_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pb2))
MCFG_SCSI_BSY_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pb3))
MCFG_SCSI_IO_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pb6))
MCFG_SCSI_MSG_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pb7))
MCFG_SCSI_DATA0_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pa0))
MCFG_SCSI_DATA1_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pa1))
MCFG_SCSI_DATA2_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pa2))
MCFG_SCSI_DATA3_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pa3))
MCFG_SCSI_DATA4_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pa4))
MCFG_SCSI_DATA5_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pa5))
MCFG_SCSI_DATA6_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pa6))
MCFG_SCSI_DATA7_HANDLER(WRITELINE(M6522_TAG, via6522_device, write_pa7))
SCSI_PORT(config, m_sasibus);
m_sasibus->req_handler().set(M6522_TAG, FUNC(via6522_device::write_ca1));
m_sasibus->cd_handler().set(M6522_TAG, FUNC(via6522_device::write_pb2));
m_sasibus->bsy_handler().set(M6522_TAG, FUNC(via6522_device::write_pb3));
m_sasibus->io_handler().set(M6522_TAG, FUNC(via6522_device::write_pb6));
m_sasibus->msg_handler().set(M6522_TAG, FUNC(via6522_device::write_pb7));
m_sasibus->data0_handler().set(M6522_TAG, FUNC(via6522_device::write_pa0));
m_sasibus->data1_handler().set(M6522_TAG, FUNC(via6522_device::write_pa1));
m_sasibus->data2_handler().set(M6522_TAG, FUNC(via6522_device::write_pa2));
m_sasibus->data3_handler().set(M6522_TAG, FUNC(via6522_device::write_pa3));
m_sasibus->data4_handler().set(M6522_TAG, FUNC(via6522_device::write_pa4));
m_sasibus->data5_handler().set(M6522_TAG, FUNC(via6522_device::write_pa5));
m_sasibus->data6_handler().set(M6522_TAG, FUNC(via6522_device::write_pa6));
m_sasibus->data7_handler().set(M6522_TAG, FUNC(via6522_device::write_pa7));
MCFG_SCSI_OUTPUT_LATCH_ADD("sasi_data_out", SASIBUS_TAG)
OUTPUT_LATCH(config, m_sasi_data_out);
m_sasi_data_out->bit_handler<0>().set(m_sasibus, FUNC(scsi_port_device::write_data0));
m_sasi_data_out->bit_handler<1>().set(m_sasibus, FUNC(scsi_port_device::write_data1));
m_sasi_data_out->bit_handler<2>().set(m_sasibus, FUNC(scsi_port_device::write_data2));
m_sasi_data_out->bit_handler<3>().set(m_sasibus, FUNC(scsi_port_device::write_data3));
m_sasi_data_out->bit_handler<4>().set(m_sasibus, FUNC(scsi_port_device::write_data4));
m_sasi_data_out->bit_handler<5>().set(m_sasibus, FUNC(scsi_port_device::write_data5));
m_sasi_data_out->bit_handler<6>().set(m_sasibus, FUNC(scsi_port_device::write_data6));
m_sasi_data_out->bit_handler<7>().set(m_sasibus, FUNC(scsi_port_device::write_data7));
MCFG_SCSIDEV_ADD(SASIBUS_TAG ":" SCSI_PORT_DEVICE1, "harddisk", D9060HD, SCSI_ID_0)
MACHINE_CONFIG_END
m_sasibus->set_slot_device(1, "harddisk", D9060HD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
}
//-------------------------------------------------

8
src/devices/bus/ieee488/d9060.h
View File

@ -65,8 +65,8 @@ private:
DECLARE_WRITE_LINE_MEMBER( enable_w );
DECLARE_WRITE8_MEMBER( scsi_data_w );
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_hdccpu;
required_device<m6502_device> m_maincpu;
required_device<m6502_device> m_hdccpu;
required_device<mos6532_new_device> m_riot0;
required_device<mos6532_new_device> m_riot1;
required_device<via6522_device> m_via;
@ -86,8 +86,8 @@ private:
uint8_t m_data;
int m_variant;
void d9060_hdc_mem(address_map &map);
void d9060_main_mem(address_map &map);
void hdc_mem(address_map &map);
void main_mem(address_map &map);
};

2
src/devices/bus/lpci/pci.h
View File

@ -44,7 +44,7 @@ class pci_connector_device : public device_t,
public device_slot_interface
{
public:
pci_connector_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
pci_connector_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
virtual ~pci_connector_device();
pci_device_interface *get_device();

50
src/devices/bus/scsi/scsi.cpp
View File

@ -23,6 +23,7 @@ scsi_port_device::scsi_port_device(const machine_config &mconfig, const char *ta
m_data5_handler(*this),
m_data6_handler(*this),
m_data7_handler(*this),
m_slot(*this, "%u", 1U),
m_device_count(0),
m_bsy_in(0),
m_sel_in(0),
@ -61,39 +62,15 @@ scsi_port_device::scsi_port_device(const machine_config &mconfig, const char *ta
{
}
MACHINE_CONFIG_START(scsi_port_device::device_add_mconfig)
MCFG_DEVICE_ADD( SCSI_PORT_DEVICE1, SCSI_PORT_SLOT, 0 )
MCFG_DEVICE_ADD( SCSI_PORT_DEVICE2, SCSI_PORT_SLOT, 0 )
MCFG_DEVICE_ADD( SCSI_PORT_DEVICE3, SCSI_PORT_SLOT, 0 )
MCFG_DEVICE_ADD( SCSI_PORT_DEVICE4, SCSI_PORT_SLOT, 0 )
MCFG_DEVICE_ADD( SCSI_PORT_DEVICE5, SCSI_PORT_SLOT, 0 )
MCFG_DEVICE_ADD( SCSI_PORT_DEVICE6, SCSI_PORT_SLOT, 0 )
MCFG_DEVICE_ADD( SCSI_PORT_DEVICE7, SCSI_PORT_SLOT, 0 )
MACHINE_CONFIG_END
void scsi_port_device::device_add_mconfig(machine_config &config)
{
for (int i = 0; i < 7; i++)
SCSI_PORT_SLOT(config, m_slot[i]);
}
void scsi_port_device::device_start()
{
const char *deviceName[] =
{
SCSI_PORT_DEVICE1,
SCSI_PORT_DEVICE2,
SCSI_PORT_DEVICE3,
SCSI_PORT_DEVICE4,
SCSI_PORT_DEVICE5,
SCSI_PORT_DEVICE6,
SCSI_PORT_DEVICE7
};
m_device_count = 0;
for (int i = 0; i < 7; i++)
{
scsi_port_slot_device *slot = subdevice<scsi_port_slot_device>(deviceName[i]);
m_slot[i] = slot;
if (slot != nullptr)
m_device_count = i + 1;
}
m_device_count = 8;
m_bsy_handler.resolve_safe();
m_sel_handler.resolve_safe();
@ -660,6 +637,19 @@ WRITE_LINE_MEMBER( scsi_port_device::write_data7 )
}
}
scsi_port_slot_device &scsi_port_device::slot(int index)
{
assert(index >= 1 && index <= 7);
return *subdevice<scsi_port_slot_device>(m_slot[index-1].finder_tag());
}
void scsi_port_device::set_slot_device(int index, const char *option, const device_type &type, const input_device_default *id)
{
slot(index).option_add(option, type);
slot(index).set_option_device_input_defaults(option, id);
slot(index).set_default_option(option);
}
DEFINE_DEVICE_TYPE(SCSI_PORT, scsi_port_device, "scsi", "SCSI Port")
scsi_port_slot_device::scsi_port_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :

12
src/devices/bus/scsi/scsi.h
View File

@ -98,6 +98,11 @@ class scsi_port_device : public device_t
public:
// construction/destruction
scsi_port_device(const machine_config &mconfig, const char *tag, device_t *owner)
: scsi_port_device(mconfig, tag, owner, (uint32_t)0)
{
}
scsi_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_bsy_handler(Object &&cb) { return m_bsy_handler.set_callback(std::forward<Object>(cb)); }
@ -166,6 +171,9 @@ public:
DECLARE_WRITE_LINE_MEMBER( write_data6 );
DECLARE_WRITE_LINE_MEMBER( write_data7 );
scsi_port_slot_device &slot(int index);
void set_slot_device(int index, const char *option, const device_type &type, const input_device_default *id);
protected:
// device-level overrides
virtual void device_start() override;
@ -208,7 +216,7 @@ private:
devcb_write_line m_data6_handler;
devcb_write_line m_data7_handler;
scsi_port_slot_device *m_slot[7];
required_device_array<scsi_port_slot_device, 7> m_slot;
int m_device_count;
int m_bsy_in;
@ -258,7 +266,7 @@ class scsi_port_slot_device : public device_t,
friend class scsi_port_interface;
public:
scsi_port_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
scsi_port_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
scsi_port_interface *dev() { return m_dev; }
scsi_port_device *port() { return m_port; }

25
src/devices/bus/x68k/x68k_scsiext.cpp
View File

@ -38,25 +38,26 @@ const tiny_rom_entry *x68k_scsiext_device::device_rom_region() const
// device machine config
MACHINE_CONFIG_START(x68k_scsiext_device::device_add_mconfig)
MCFG_DEVICE_ADD("scsi", SCSI_PORT, 0)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE1, "harddisk", SCSIHD, SCSI_ID_0)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE2, "harddisk", SCSIHD, SCSI_ID_1)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE3, "harddisk", SCSIHD, SCSI_ID_2)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE4, "harddisk", SCSIHD, SCSI_ID_3)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE5, "harddisk", SCSIHD, SCSI_ID_4)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE6, "harddisk", SCSIHD, SCSI_ID_5)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE7, "harddisk", SCSIHD, SCSI_ID_6)
SCSI_PORT(config, m_scsibus);
m_scsibus->set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
m_scsibus->set_slot_device(2, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_1));
m_scsibus->set_slot_device(3, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_2));
m_scsibus->set_slot_device(4, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_3));
m_scsibus->set_slot_device(5, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_4));
m_scsibus->set_slot_device(6, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_5));
m_scsibus->set_slot_device(7, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_6));
MCFG_DEVICE_ADD("mb89352", MB89352A, 0)
MCFG_LEGACY_SCSI_PORT("scsi")
MCFG_MB89352A_IRQ_CB(WRITELINE(*this, x68k_scsiext_device, irq_w))
MCFG_MB89352A_DRQ_CB(WRITELINE(*this, x68k_scsiext_device, drq_w))
MB89352A(config, m_spc);
m_spc->set_scsi_port("scsi");
m_spc->irq_cb().set(FUNC(x68k_scsiext_device::irq_w));
m_spc->drq_cb().set(FUNC(x68k_scsiext_device::drq_w));
MACHINE_CONFIG_END
x68k_scsiext_device::x68k_scsiext_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, X68K_SCSIEXT, tag, owner, clock)
, device_x68k_expansion_card_interface(mconfig, *this)
, m_slot(nullptr),
m_scsibus(*this, "scsi"),
m_spc(*this, "mb89352")
{
}

1
src/devices/bus/x68k/x68k_scsiext.h
View File

@ -37,6 +37,7 @@ private:
x68k_expansion_slot_device *m_slot;
required_device<scsi_port_device> m_scsibus;
required_device<mb89352_device> m_spc;
};

20
src/devices/machine/53c810.h
View File

@ -20,12 +20,30 @@ public:
typedef device_delegate<uint32_t (uint32_t dsp)> fetch_delegate;
// construction/destruction
lsi53c810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
lsi53c810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
template <typename Object> void set_irq_callback(Object &&cb) { m_irq_cb = std::forward<Object>(cb); }
template <typename Object> void set_dma_callback(Object &&cb) { m_dma_cb = std::forward<Object>(cb); }
template <typename Object> void set_fetch_callback(Object &&cb) { m_fetch_cb = std::forward<Object>(cb); }
template <class FunctionClass> void set_irq_callback(void (FunctionClass::*callback)(int), const char *name)
{
set_irq_callback(irq_delegate(callback, name, nullptr, static_cast<FunctionClass *>(nullptr)));
}
void set_irq_callback(irq_delegate callback) { m_irq_cb = callback; }
template <class FunctionClass> void set_dma_callback(void (FunctionClass::*callback)(uint32_t, uint32_t, int, int), const char *name)
{
set_dma_callback(dma_delegate(callback, name, nullptr, static_cast<FunctionClass *>(nullptr)));
}
void set_dma_callback(dma_delegate callback) { m_dma_cb = callback; }
template <class FunctionClass> void set_fetch_callback(uint32_t (FunctionClass::*callback)(uint32_t), const char *name)
{
set_fetch_callback(fetch_delegate(callback, name, nullptr, static_cast<FunctionClass *>(nullptr)));
}
void set_fetch_callback(fetch_delegate callback) { m_fetch_cb = callback; }
uint8_t reg_r(int offset);
void reg_w(int offset, uint8_t data);

2
src/devices/machine/8042kbdc.h
View File

@ -55,7 +55,7 @@ public:
};
// construction/destruction
kbdc8042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
kbdc8042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
void set_keyboard_type(kbdc8042_type_t keybtype) { m_keybtype = keybtype; }
template <class Object> devcb_base &set_system_reset_callback(Object &&cb) { return m_system_reset_cb.set_callback(std::forward<Object>(cb)); }

34
src/devices/machine/ataintf.cpp
View File

@ -17,6 +17,23 @@
#include "debugger.h"
void abstract_ata_interface_device::set_default_ata_devices(const char* _master, const char* _slave)
{
for (size_t slot_index = 0; slot_index < SLOT_COUNT; slot_index++)
{
slot(slot_index).option_add("hdd", IDE_HARDDISK);
slot(slot_index).option_add("cdrom", ATAPI_CDROM);
}
slot(SLOT_MASTER).set_default_option(_master);
slot(SLOT_SLAVE).set_default_option(_slave);
}
ata_slot_device &abstract_ata_interface_device::slot(int index)
{
assert(index < 2);
return *subdevice<ata_slot_device>(m_slot[index].finder_tag());
}
void abstract_ata_interface_device::set_irq(int state)
{
// logerror( "%s: irq %d\n", machine().describe_context(), state );
@ -212,9 +229,11 @@ void ata_devices(device_slot_interface &device)
abstract_ata_interface_device::abstract_ata_interface_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, type, tag, owner, clock),
m_slot(*this, "%u", 0U),
m_irq_handler(*this),
m_dmarq_handler(*this),
m_dasp_handler(*this){
m_dasp_handler(*this)
{
}
@ -235,10 +254,6 @@ void abstract_ata_interface_device::device_start()
m_dmarq_handler.resolve_safe();
m_dasp_handler.resolve_safe();
/* set MAME harddisk handle */
m_slot[0] = subdevice<ata_slot_device>("0");
m_slot[1] = subdevice<ata_slot_device>("1");
for (int i = 0; i < 2; i++)
{
m_irq[i] = 0;
@ -274,10 +289,11 @@ void abstract_ata_interface_device::device_start()
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(abstract_ata_interface_device::device_add_mconfig)
MCFG_DEVICE_ADD( "0", ATA_SLOT, 0 )
MCFG_DEVICE_ADD( "1", ATA_SLOT, 0 )
MACHINE_CONFIG_END
void abstract_ata_interface_device::device_add_mconfig(machine_config &config)
{
for (size_t slot = 0; slot < SLOT_COUNT; slot++)
ATA_SLOT(config, m_slot[slot]);
}
//**************************************************************************

26
src/devices/machine/ataintf.h
View File

@ -26,7 +26,7 @@ class ata_slot_device : public device_t,
{
public:
// construction/destruction
ata_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ata_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
device_ata_interface *dev() { return m_dev; }
@ -82,6 +82,12 @@ public:
template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_dmarq_handler(Object &&cb) { return m_dmarq_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_dasp_handler(Object &&cb) { return m_dasp_handler.set_callback(std::forward<Object>(cb)); }
auto irq_handler() { return m_irq_handler.bind(); }
auto dmarq_handler() { return m_dmarq_handler.bind(); }
auto dasp_handler() { return m_dasp_handler.bind(); }
ata_slot_device &slot(int index);
virtual void set_default_ata_devices(const char* _master, const char* _slave);
uint16_t read_dma();
void write_dma(uint16_t data);
@ -103,6 +109,14 @@ protected:
virtual void set_dmarq(int state);
virtual void set_dasp(int state);
enum : size_t
{
SLOT_MASTER,
SLOT_SLAVE,
SLOT_COUNT
};
private:
DECLARE_WRITE_LINE_MEMBER(irq0_write_line);
DECLARE_WRITE_LINE_MEMBER(dmarq0_write_line);
@ -114,11 +128,11 @@ private:
DECLARE_WRITE_LINE_MEMBER(dasp1_write_line);
DECLARE_WRITE_LINE_MEMBER(pdiag1_write_line);
ata_slot_device *m_slot[2];
int m_irq[2];
int m_dmarq[2];
int m_dasp[2];
int m_pdiag[2];
required_device_array<ata_slot_device, SLOT_COUNT> m_slot;
int m_irq[SLOT_COUNT];
int m_dmarq[SLOT_COUNT];
int m_dasp[SLOT_COUNT];
int m_pdiag[SLOT_COUNT];
devcb_write_line m_irq_handler;
devcb_write_line m_dmarq_handler;

44
src/devices/machine/dmac.h
View File

@ -16,40 +16,10 @@
#include "autoconfig.h"
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_DMAC_ADD(_tag, _clock) \
MCFG_DEVICE_ADD(_tag, AMIGA_DMAC, _clock)
#define MCFG_DMAC_CFGOUT_HANDLER(_devcb) \
downcast<amiga_dmac_device &>(*device).set_cfgout_handler(DEVCB_##_devcb);
#define MCFG_DMAC_INT_HANDLER(_devcb) \
downcast<amiga_dmac_device &>(*device).set_int_handler(DEVCB_##_devcb);
#define MCFG_DMAC_XDACK_HANDLER(_devcb) \
downcast<amiga_dmac_device &>(*device).set_xdack_handler(DEVCB_##_devcb);
#define MCFG_DMAC_SCSI_READ_HANDLER(_devcb) \
downcast<amiga_dmac_device &>(*device).set_scsi_read_handler(DEVCB_##_devcb);
#define MCFG_DMAC_SCSI_WRITE_HANDLER(_devcb) \
downcast<amiga_dmac_device &>(*device).set_scsi_write_handler(DEVCB_##_devcb);
#define MCFG_DMAC_IO_READ_HANDLER(_devcb) \
downcast<amiga_dmac_device &>(*device).set_io_read_handler(DEVCB_##_devcb);
#define MCFG_DMAC_IO_WRITE_HANDLER(_devcb) \
downcast<amiga_dmac_device &>(*device).set_io_write_handler(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> amiga_dmac_device
class amiga_dmac_device : public device_t, public amiga_autoconfig
{
public:
@ -57,13 +27,13 @@ public:
amiga_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// callbacks
template <class Object> devcb_base &set_cfgout_handler(Object &&cb) { return m_cfgout_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_int_handler(Object &&cb) { return m_int_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_xdack_handler(Object &&cb) { return m_xdack_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_scsi_read_handler(Object &&cb) { return m_scsi_read_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_scsi_write_handler(Object &&cb) { return m_scsi_write_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_io_read_handler(Object &&cb) { return m_io_read_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_io_write_handler(Object &&cb) { return m_io_write_handler.set_callback(std::forward<Object>(cb)); }
auto cfgout_handler() { return m_cfgout_handler.bind(); }
auto int_handler() { return m_int_handler.bind(); }
auto xdack_handler() { return m_xdack_handler.bind(); }
auto scsi_read_handler() { return m_scsi_read_handler.bind(); }
auto scsi_write_handler() { return m_scsi_write_handler.bind(); }
auto io_read_handler() { return m_io_read_handler.bind(); }
auto io_write_handler() { return m_io_write_handler.bind(); }
void set_address_space(address_space *space) { m_space = space; }
void set_rom(uint8_t *rom) { m_rom = rom; }

2
src/devices/machine/i8255.h
View File

@ -74,7 +74,7 @@ class i8255_device : public device_t
{
public:
// construction/destruction
i8255_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
i8255_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
template <class Object> devcb_base &set_in_pa_callback(Object &&cb) { return m_in_pa_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_in_pb_callback(Object &&cb) { return m_in_pb_cb.set_callback(std::forward<Object>(cb)); }

1
src/devices/machine/idectrl.cpp
View File

@ -86,7 +86,6 @@ void ide_controller_device::write_cs1(offs_t offset, uint16_t data, uint16_t mem
}
}
DEFINE_DEVICE_TYPE(IDE_CONTROLLER_32, ide_controller_32_device, "idectrl32", "IDE Controller (32-bit)")
ide_controller_32_device::ide_controller_32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :

2
src/devices/machine/idectrl.h
View File

@ -30,7 +30,7 @@
class ide_controller_device : public abstract_ata_interface_device
{
public:
ide_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ide_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
uint16_t read_cs0(offs_t offset, uint16_t mem_mask = 0xffff);
uint16_t read_cs1(offs_t offset, uint16_t mem_mask = 0xffff);

124
src/devices/machine/intelfsh.h
View File

@ -15,97 +15,97 @@
//**************************************************************************
#define MCFG_INTEL_28F016S5_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, INTEL_28F016S5, 0)
MCFG_DEVICE_ADD(_tag, INTEL_28F016S5)
#define MCFG_SHARP_LH28F016S_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SHARP_LH28F016S, 0)
MCFG_DEVICE_ADD(_tag, SHARP_LH28F016S)
#define MCFG_SHARP_LH28F016S_16BIT_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SHARP_LH28F016S_16BIT, 0)
MCFG_DEVICE_ADD(_tag, SHARP_LH28F016S_16BIT)
#define MCFG_ATMEL_29C010_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, ATMEL_29C010, 0)
MCFG_DEVICE_ADD(_tag, ATMEL_29C010)
#define MCFG_ATMEL_49F4096_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, ATMEL_49F4096, 0)
MCFG_DEVICE_ADD(_tag, ATMEL_49F4096)
#define MCFG_AMD_29F010_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, AMD_29F010, 0)
MCFG_DEVICE_ADD(_tag, AMD_29F010)
#define MCFG_AMD_29F040_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, AMD_29F040, 0)
MCFG_DEVICE_ADD(_tag, AMD_29F040)
#define MCFG_AMD_29F080_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, AMD_29F080, 0)
MCFG_DEVICE_ADD(_tag, AMD_29F080)
#define MCFG_AMD_29F400T_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, AMD_29F400T, 0)
MCFG_DEVICE_ADD(_tag, AMD_29F400T)
#define MCFG_AMD_29F800T_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, AMD_29F800T, 0)
MCFG_DEVICE_ADD(_tag, AMD_29F800T)
#define MCFG_AMD_29F800B_16BIT_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, AMD_29F800B_16BIT, 0)
MCFG_DEVICE_ADD(_tag, AMD_29F800B_16BIT)
#define MCFG_AMD_29LV200T_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, AMD_29LV200T, 0)
MCFG_DEVICE_ADD(_tag, AMD_29LV200T)
#define MCFG_FUJITSU_29F160T_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, FUJITSU_29F160T, 0)
MCFG_DEVICE_ADD(_tag, FUJITSU_29F160T)
#define MCFG_FUJITSU_29F016A_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, FUJITSU_29F016A, 0)
MCFG_DEVICE_ADD(_tag, FUJITSU_29F016A)
#define MCFG_FUJITSU_29DL16X_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, FUJITSU_29DL16X, 0)
MCFG_DEVICE_ADD(_tag, FUJITSU_29DL16X)
#define MCFG_INTEL_E28F400B_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, INTEL_E28F400B, 0)
MCFG_DEVICE_ADD(_tag, INTEL_E28F400B)
#define MCFG_MACRONIX_29L001MC_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, MACRONIX_29L001MC, 0)
MCFG_DEVICE_ADD(_tag, MACRONIX_29L001MC)
#define MCFG_MACRONIX_29LV160TMC_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, MACRONIX_29LV160TMC, 0)
MCFG_DEVICE_ADD(_tag, MACRONIX_29LV160TMC)
#define MCFG_PANASONIC_MN63F805MNP_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, PANASONIC_MN63F805MNP, 0)
MCFG_DEVICE_ADD(_tag, PANASONIC_MN63F805MNP)
#define MCFG_SANYO_LE26FV10N1TS_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SANYO_LE26FV10N1TS, 0)
MCFG_DEVICE_ADD(_tag, SANYO_LE26FV10N1TS)
#define MCFG_SST_28SF040_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SST_28SF040, 0)
MCFG_DEVICE_ADD(_tag, SST_28SF040)
#define MCFG_SST_39VF020_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SST_39VF020, 0)
MCFG_DEVICE_ADD(_tag, SST_39VF020)
#define MCFG_SHARP_LH28F400_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SHARP_LH28F400, 0)
MCFG_DEVICE_ADD(_tag, SHARP_LH28F400)
#define MCFG_INTEL_E28F008SA_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, INTEL_E28F008SA, 0)
MCFG_DEVICE_ADD(_tag, INTEL_E28F008SA)
#define MCFG_INTEL_TE28F160_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, INTEL_TE28F160, 0)
MCFG_DEVICE_ADD(_tag, INTEL_TE28F160)
#define MCFG_INTEL_TE28F320_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, INTEL_TE28F320, 0)
MCFG_DEVICE_ADD(_tag, INTEL_TE28F320)
#define MCFG_SHARP_UNK128MBIT_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SHARP_UNK128MBIT, 0)
MCFG_DEVICE_ADD(_tag, SHARP_UNK128MBIT)
#define MCFG_INTEL_28F320J3D_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, INTEL_28F320J3D, 0)
MCFG_DEVICE_ADD(_tag, INTEL_28F320J3D)
#define MCFG_INTEL_28F320J5_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, INTEL_28F320J5, 0)
MCFG_DEVICE_ADD(_tag, INTEL_28F320J5)
#define MCFG_SST_39VF400A_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SST_39VF400A, 0)
MCFG_DEVICE_ADD(_tag, SST_39VF400A)
#define MCFG_TMS_29F040_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, TMS_29F040, 0)
MCFG_DEVICE_ADD(_tag, TMS_29F040)
//**************************************************************************
// TYPE DEFINITIONS
@ -242,188 +242,188 @@ protected:
class intel_28f016s5_device : public intelfsh8_device
{
public:
intel_28f016s5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
intel_28f016s5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class fujitsu_29f160t_device : public intelfsh8_device
{
public:
fujitsu_29f160t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
fujitsu_29f160t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class fujitsu_29f016a_device : public intelfsh8_device
{
public:
fujitsu_29f016a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
fujitsu_29f016a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class fujitsu_29dl16x_device : public intelfsh8_device
{
public:
fujitsu_29dl16x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
fujitsu_29dl16x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class atmel_29c010_device : public intelfsh8_device
{
public:
atmel_29c010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
atmel_29c010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class amd_29f010_device : public intelfsh8_device
{
public:
amd_29f010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
amd_29f010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class amd_29f040_device : public intelfsh8_device
{
public:
amd_29f040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
amd_29f040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class amd_29f080_device : public intelfsh8_device
{
public:
amd_29f080_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
amd_29f080_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class amd_29f400t_device : public intelfsh8_device
{
public:
amd_29f400t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
amd_29f400t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class amd_29f800t_device : public intelfsh8_device
{
public:
amd_29f800t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
amd_29f800t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class amd_29f800b_16bit_device : public intelfsh16_device
{
public:
amd_29f800b_16bit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
amd_29f800b_16bit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class amd_29lv200t_device : public intelfsh8_device
{
public:
amd_29lv200t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
amd_29lv200t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class sharp_lh28f016s_device : public intelfsh8_device
{
public:
sharp_lh28f016s_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sharp_lh28f016s_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class sharp_lh28f016s_16bit_device : public intelfsh16_device
{
public:
sharp_lh28f016s_16bit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sharp_lh28f016s_16bit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class intel_e28f008sa_device : public intelfsh8_device
{
public:
intel_e28f008sa_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
intel_e28f008sa_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class macronix_29l001mc_device : public intelfsh8_device
{
public:
macronix_29l001mc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
macronix_29l001mc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class macronix_29lv160tmc_device : public intelfsh8_device
{
public:
macronix_29lv160tmc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
macronix_29lv160tmc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class panasonic_mn63f805mnp_device : public intelfsh8_device
{
public:
panasonic_mn63f805mnp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
panasonic_mn63f805mnp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class sanyo_le26fv10n1ts_device : public intelfsh8_device
{
public:
sanyo_le26fv10n1ts_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sanyo_le26fv10n1ts_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class sst_28sf040_device : public intelfsh8_device
{
public:
sst_28sf040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sst_28sf040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class sst_39vf020_device : public intelfsh8_device
{
public:
sst_39vf020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sst_39vf020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class tms_29f040_device : public intelfsh8_device
{
public:
tms_29f040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
tms_29f040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
// 16-bit variants
class sharp_lh28f400_device : public intelfsh16_device
{
public:
sharp_lh28f400_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sharp_lh28f400_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class intel_te28f160_device : public intelfsh16_device
{
public:
intel_te28f160_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
intel_te28f160_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class intel_te28f320_device : public intelfsh16_device
{
public:
intel_te28f320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
intel_te28f320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class intel_e28f400b_device : public intelfsh16_device
{
public:
intel_e28f400b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
intel_e28f400b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class sharp_unk128mbit_device : public intelfsh16_device
{
public:
sharp_unk128mbit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sharp_unk128mbit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class intel_28f320j3d_device : public intelfsh16_device
{
public:
intel_28f320j3d_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
intel_28f320j3d_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class intel_28f320j5_device : public intelfsh16_device
{
public:
intel_28f320j5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
intel_28f320j5_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class sst_39vf400a_device : public intelfsh16_device
{
public:
sst_39vf400a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sst_39vf400a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
class atmel_49f4096_device : public intelfsh16_device
{
public:
atmel_49f4096_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
atmel_49f4096_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};

4
src/devices/machine/mb89352.h
View File

@ -21,10 +21,12 @@ class mb89352_device : public legacy_scsi_host_adapter
{
public:
// construction/destruction
mb89352_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
mb89352_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
template <class Object> devcb_base &set_irq_callback(Object &&cb) { return m_irq_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_drq_callback(Object &&cb) { return m_drq_cb.set_callback(std::forward<Object>(cb)); }
auto irq_cb() { return m_irq_cb.bind(); }
auto drq_cb() { return m_drq_cb.bind(); }
// any publically accessible interfaces needed for runtime
DECLARE_READ8_MEMBER( mb89352_r );

6
src/devices/machine/mc6854.h
View File

@ -44,9 +44,13 @@ public:
template <class Object> devcb_base &set_out_irq_callback(Object &&cb) { return m_out_irq_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_txd_callback(Object &&cb) { return m_out_txd_cb.set_callback(std::forward<Object>(cb)); }
template <typename Object> void set_out_frame_callback(Object &&cb) { m_out_frame_cb = std::forward<Object>(cb); }
template <class Object> devcb_base &set_out_rts_callback(Object &&cb) { return m_out_rts_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_dtr_callback(Object &&cb) { return m_out_dtr_cb.set_callback(std::forward<Object>(cb)); }
template <typename Object> void set_out_frame_callback(Object &&cb) { m_out_frame_cb = std::forward<Object>(cb); }
auto out_irq_cb() { return m_out_irq_cb.bind(); }
auto out_txd_cb() { return m_out_txd_cb.bind(); }
auto out_rts_cb() { return m_out_rts_cb.bind(); }
auto out_dtr_cb() { return m_out_dtr_cb.bind(); }
/* interface to CPU via address/data bus*/
DECLARE_READ8_MEMBER( read );

2
src/devices/machine/ram.h
View File

@ -60,7 +60,7 @@ public:
using extra_option_vector = std::vector<extra_option>;
// construction/destruction
ram_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
ram_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock = 0);
// accessors
u32 size() const { return m_size; }

6
src/devices/machine/wd33c93.h
View File

@ -19,9 +19,15 @@ class wd33c93_device : public legacy_scsi_host_adapter
{
public:
// construction/destruction
wd33c93_device(const machine_config &mconfig, const char *tag, device_t *owner)
: wd33c93_device(mconfig, tag, owner, (uint32_t)0)
{
}
wd33c93_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template<class Object> devcb_base &set_irq_callback(Object &&cb) { return m_irq_cb.set_callback(std::forward<Object>(cb)); }
auto irq_cb() { return m_irq_cb.bind(); }
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);

5
src/devices/sound/volt_reg.h
View File

@ -22,6 +22,11 @@ class voltage_regulator_device : public device_t, public device_sound_interface
public:
void set_output(double analogue_dc) { m_output = (analogue_dc * 32768) / 5.0f; }
voltage_regulator_device(const machine_config &mconfig, const char *tag, device_t *owner)
: voltage_regulator_device(mconfig, tag, owner, (uint32_t)0)
{
}
voltage_regulator_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual bool issound() override { return false; }

39
src/devices/video/huc6272.cpp
View File

@ -379,21 +379,30 @@ WRITE32_MEMBER( huc6272_device::write )
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(huc6272_device::device_add_mconfig)
MCFG_DEVICE_ADD("scsi", SCSI_PORT, 0)
MCFG_SCSI_RST_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit7))
MCFG_SCSI_BSY_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit6))
MCFG_SCSI_REQ_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit5))
MCFG_SCSI_MSG_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit4))
MCFG_SCSI_CD_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit3))
MCFG_SCSI_IO_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit2))
MCFG_SCSI_SEL_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit1))
void huc6272_device::device_add_mconfig(machine_config &config)
{
scsi_port_device &scsibus(SCSI_PORT(config, "scsi"));
scsibus.set_data_input_buffer("scsi_data_in");
scsibus.rst_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit7));
scsibus.bsy_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit6));
scsibus.req_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit5));
scsibus.msg_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit4));
scsibus.cd_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit3));
scsibus.io_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit2));
scsibus.sel_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit1));
MCFG_SCSI_DATA_INPUT_BUFFER("scsi_data_in")
output_latch_device &scsiout(OUTPUT_LATCH(config, "scsi_data_out"));
scsiout.bit_handler<0>().set("scsi", FUNC(scsi_port_device::write_data0));
scsiout.bit_handler<1>().set("scsi", FUNC(scsi_port_device::write_data1));
scsiout.bit_handler<2>().set("scsi", FUNC(scsi_port_device::write_data2));
scsiout.bit_handler<3>().set("scsi", FUNC(scsi_port_device::write_data3));
scsiout.bit_handler<4>().set("scsi", FUNC(scsi_port_device::write_data4));
scsiout.bit_handler<5>().set("scsi", FUNC(scsi_port_device::write_data5));
scsiout.bit_handler<6>().set("scsi", FUNC(scsi_port_device::write_data6));
scsiout.bit_handler<7>().set("scsi", FUNC(scsi_port_device::write_data7));
MCFG_SCSI_OUTPUT_LATCH_ADD("scsi_data_out", "scsi")
MCFG_DEVICE_ADD("scsi_ctrl_in", INPUT_BUFFER, 0)
MCFG_DEVICE_ADD("scsi_data_in", INPUT_BUFFER, 0)
INPUT_BUFFER(config, "scsi_ctrl_in");
INPUT_BUFFER(config, "scsi_data_in");
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE1, "cdrom", SCSICD, SCSI_ID_1)
MACHINE_CONFIG_END
scsibus.set_slot_device(1, "cdrom", SCSICD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_1));
}

12
src/mame/drivers/amiga.cpp
View File

@ -1606,12 +1606,12 @@ MACHINE_CONFIG_START(cdtv_state::cdtv)
MCFG_DEVICE_ADD("u61", MSM6242, XTAL(32'768))
// cd-rom controller
MCFG_DMAC_ADD("u36", amiga_state::CLK_7M_PAL)
MCFG_DMAC_SCSI_READ_HANDLER(READ8(*this, cdtv_state, dmac_scsi_data_read))
MCFG_DMAC_SCSI_WRITE_HANDLER(WRITE8(*this, cdtv_state, dmac_scsi_data_write))
MCFG_DMAC_IO_READ_HANDLER(READ8(*this, cdtv_state, dmac_io_read))
MCFG_DMAC_IO_WRITE_HANDLER(WRITE8(*this, cdtv_state, dmac_io_write))
MCFG_DMAC_INT_HANDLER(WRITELINE(*this, cdtv_state, dmac_int_w))
AMIGA_DMAC(config, m_dmac, amiga_state::CLK_7M_PAL);
m_dmac->scsi_read_handler().set(FUNC(cdtv_state::dmac_scsi_data_read));
m_dmac->scsi_write_handler().set(FUNC(cdtv_state::dmac_scsi_data_write));
m_dmac->io_read_handler().set(FUNC(cdtv_state::dmac_io_read));
m_dmac->io_write_handler().set(FUNC(cdtv_state::dmac_io_write));
m_dmac->int_handler().set(FUNC(cdtv_state::dmac_int_w));
MCFG_DEVICE_ADD("u32", TPI6525, 0)
MCFG_TPI6525_OUT_IRQ_CB(WRITELINE(*this, cdtv_state, tpi_int_w))

32
src/mame/drivers/bbc.cpp
View File

@ -1153,18 +1153,28 @@ MACHINE_CONFIG_START(bbc_state::abc110)
MCFG_SLOT_FIXED(true)
/* Add ADAPTEC ACB-4000 Winchester Disc Controller */
//MCFG_DEVICE_ADD(SCSIBUS_TAG, SCSI_PORT, 0)
//MCFG_SCSI_DATA_INPUT_BUFFER("scsi_data_in")
//MCFG_SCSI_MSG_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit0))
//MCFG_SCSI_BSY_HANDLER(WRITELINE(*this, bbc_state, scsi_bsy_w))
//MCFG_SCSI_REQ_HANDLER(WRITELINE(*this, bbc_state, scsi_req_w))
//MCFG_SCSI_IO_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit6))
//MCFG_SCSI_CD_HANDLER(WRITELINE("scsi_ctrl_in", input_buffer_device, write_bit7))
//MCFG_SCSIDEV_ADD(SCSIBUS_TAG ":" SCSI_PORT_DEVICE1, "harddisk", ACB4070, SCSI_ID_0)
//scsi_port_device &scsibus(SCSI_PORT(config, SCSIBUS_TAG));
//scsibus.set_data_input_buffer("scsi_data_in");
//scsibus.msg_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit0));
//scsibus.bsy_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::scsi_bsy_w))
//scsibus.req_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::scsi_req_w))
//scsibus.io_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit6));
//scsibus.cd_handler().set("scsi_ctrl_in", FUNC(input_buffer_device::write_bit7));
//scsibus.set_slot_device(1, "harddisk", ACB4070, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
//output_latch_device &scsiout(OUTPUT_LATCH(config, "scsi_data_out"));
//scsiout.bit_handler<0>().set("scsi", FUNC(scsi_port_device::write_data0));
//scsiout.bit_handler<1>().set("scsi", FUNC(scsi_port_device::write_data1));
//scsiout.bit_handler<2>().set("scsi", FUNC(scsi_port_device::write_data2));
//scsiout.bit_handler<3>().set("scsi", FUNC(scsi_port_device::write_data3));
//scsiout.bit_handler<4>().set("scsi", FUNC(scsi_port_device::write_data4));
//scsiout.bit_handler<5>().set("scsi", FUNC(scsi_port_device::write_data5));
//scsiout.bit_handler<6>().set("scsi", FUNC(scsi_port_device::write_data6));
//scsiout.bit_handler<7>().set("scsi", FUNC(scsi_port_device::write_data7));
//INPUT_BUFFER(config, "scsi_ctrl_in");
//INPUT_BUFFER(config, "scsi_data_in");
//MCFG_SCSI_OUTPUT_LATCH_ADD("scsi_data_out", SCSIBUS_TAG)
//MCFG_DEVICE_ADD("scsi_data_in", INPUT_BUFFER, 0)
//MCFG_DEVICE_ADD("scsi_ctrl_in", INPUT_BUFFER, 0)
/* Add 10MB ST-412 Winchester */
/* software lists */

215
src/mame/drivers/bebox.cpp
View File

@ -15,7 +15,6 @@
/* Components */
#include "video/clgd542x.h"
#include "bus/lpci/cirrus.h"
#include "cpu/powerpc/ppc.h"
#include "sound/3812intf.h"
#include "machine/mc146818.h"
#include "machine/pckeybrd.h"
@ -29,10 +28,10 @@
#include "formats/pc_dsk.h"
#include "machine/8042kbdc.h"
READ8_MEMBER(bebox_state::at_dma8237_1_r) { return m_dma8237_2->read(space, offset / 2); }
WRITE8_MEMBER(bebox_state::at_dma8237_1_w) { m_dma8237_2->write(space, offset / 2, data); }
READ8_MEMBER(bebox_state::at_dma8237_1_r) { return m_dma8237[1]->read(space, offset / 2); }
WRITE8_MEMBER(bebox_state::at_dma8237_1_w) { m_dma8237[1]->write(space, offset / 2, data); }
void bebox_state::bebox_mem(address_map &map)
void bebox_state::main_mem(address_map &map)
{
map(0x7FFFF0F0, 0x7FFFF0F7).rw(FUNC(bebox_state::bebox_cpu0_imask_r), FUNC(bebox_state::bebox_cpu0_imask_w));
map(0x7FFFF1F0, 0x7FFFF1F7).rw(FUNC(bebox_state::bebox_cpu1_imask_r), FUNC(bebox_state::bebox_cpu1_imask_w));
@ -40,13 +39,13 @@ void bebox_state::bebox_mem(address_map &map)
map(0x7FFFF3F0, 0x7FFFF3F7).rw(FUNC(bebox_state::bebox_crossproc_interrupts_r), FUNC(bebox_state::bebox_crossproc_interrupts_w));
map(0x7FFFF4F0, 0x7FFFF4F7).w(FUNC(bebox_state::bebox_processor_resets_w));
map(0x80000000, 0x8000001F).rw(m_dma8237_1, FUNC(am9517a_device::read), FUNC(am9517a_device::write));
map(0x80000020, 0x8000003F).rw(m_pic8259_1, FUNC(pic8259_device::read), FUNC(pic8259_device::write));
map(0x80000000, 0x8000001F).rw(m_dma8237[0], FUNC(am9517a_device::read), FUNC(am9517a_device::write));
map(0x80000020, 0x8000003F).rw(m_pic8259[0], FUNC(pic8259_device::read), FUNC(pic8259_device::write));
map(0x80000040, 0x8000005f).rw(m_pit8254, FUNC(pit8254_device::read), FUNC(pit8254_device::write));
map(0x80000060, 0x8000006F).rw("kbdc", FUNC(kbdc8042_device::data_r), FUNC(kbdc8042_device::data_w));
map(0x80000070, 0x8000007F).rw("rtc", FUNC(mc146818_device::read), FUNC(mc146818_device::write));
map(0x80000080, 0x8000009F).rw(FUNC(bebox_state::bebox_page_r), FUNC(bebox_state::bebox_page_w));
map(0x800000A0, 0x800000BF).rw(m_pic8259_2, FUNC(pic8259_device::read), FUNC(pic8259_device::write));
map(0x800000A0, 0x800000BF).rw(m_pic8259[1], FUNC(pic8259_device::read), FUNC(pic8259_device::write));
map(0x800000C0, 0x800000DF).rw(FUNC(bebox_state::at_dma8237_1_r), FUNC(bebox_state::at_dma8237_1_w));
map(0x800001F0, 0x800001F7).rw("ide", FUNC(ide_controller_device::cs0_r), FUNC(ide_controller_device::cs0_w));
map(0x800002F8, 0x800002FF).rw("ns16550_1", FUNC(ns16550_device::ins8250_r), FUNC(ns16550_device::ins8250_w));
@ -75,7 +74,7 @@ void bebox_state::bebox_mem(address_map &map)
READ64_MEMBER(bebox_state::bb_slave_64be_r)
{
// 2e94 is the real address, 2e84 is where the PC appears to be under full DRC
if ((m_ppc2->pc() == 0xfff02e94) || (m_ppc2->pc() == 0xfff02e84))
if ((m_ppc[1]->pc() == 0xfff02e94) || (m_ppc[1]->pc() == 0xfff02e84))
{
return 0x108000ff; // indicate slave CPU
}
@ -83,9 +82,9 @@ READ64_MEMBER(bebox_state::bb_slave_64be_r)
return m_pcibus->read_64be(space, offset, mem_mask);
}
void bebox_state::bebox_slave_mem(address_map &map)
void bebox_state::slave_mem(address_map &map)
{
bebox_mem(map);
main_mem(map);
map(0x80000cf8, 0x80000cff).r(FUNC(bebox_state::bb_slave_64be_r));
map(0x80000cf8, 0x80000cff).w(m_pcibus, FUNC(pci_bus_device::write_64be));
}
@ -97,7 +96,7 @@ void bebox_state::bebox_slave_mem(address_map &map)
LSI53C810_FETCH_CB(bebox_state::scsi_fetch)
{
uint32_t result = m_ppc1->space(AS_PROGRAM).read_dword(dsp & 0x7FFFFFFF);
uint32_t result = m_ppc[0]->space(AS_PROGRAM).read_dword(dsp & 0x7FFFFFFF);
return BYTE_REVERSE32(result);
}
@ -116,11 +115,6 @@ FLOPPY_FORMATS_MEMBER( bebox_state::floppy_formats )
FLOPPY_PC_FORMAT
FLOPPY_FORMATS_END
static void bebox_floppies(device_slot_interface &device)
{
device.option_add("35hd", FLOPPY_35_HD);
}
void bebox_state::mpc105_config(device_t *device)
{
MCFG_MPC105_CPU( "ppc1" )
@ -136,122 +130,141 @@ void bebox_state::mpc105_config(device_t *device)
WRITE_LINE_MEMBER(bebox_state::bebox_keyboard_interrupt)
{
bebox_set_irq_bit(16, state);
m_pic8259_1->ir1_w(state);
m_pic8259[0]->ir1_w(state);
}
static void pci_devices(device_slot_interface &device)
pci_connector_device &bebox_state::add_pci_slot(machine_config &config, const char *tag, size_t index, const char *default_tag)
{
device.option_add("mpc105", MPC105);
device.option_add("cirrus", PCI_CIRRUS_SVGA);
pci_connector_device &pcislot(PCI_CONNECTOR(config, tag, index));
pcislot.option_add("mpc105", MPC105);
pcislot.option_add("cirrus", PCI_CIRRUS_SVGA);
pcislot.set_default_option(default_tag);
pcislot.set_fixed(true);
return pcislot;
}
MACHINE_CONFIG_START(bebox_state::bebox)
/* basic machine hardware */
MCFG_DEVICE_ADD("ppc1", PPC603, 66000000) /* 66 MHz */
MCFG_DEVICE_PROGRAM_MAP(bebox_mem)
void bebox_state::bebox_peripherals(machine_config &config)
{
config.m_minimum_quantum = attotime::from_hz(60);
MCFG_DEVICE_ADD("ppc2", PPC603, 66000000) /* 66 MHz */
MCFG_DEVICE_PROGRAM_MAP(bebox_slave_mem)
PIT8254(config, m_pit8254, 0);
m_pit8254->set_clk<0>(4772720/4); /* heartbeat IRQ */
m_pit8254->set_clk<1>(4772720/4); /* dram refresh */
m_pit8254->set_clk<2>(4772720/4); /* pio port c pin 4, and speaker polling */
m_pit8254->out_handler<0>().set(FUNC(bebox_state::bebox_timer0_w));
m_pit8254->out_handler<2>().set("kbdc", FUNC(kbdc8042_device::write_out2));
MCFG_QUANTUM_TIME(attotime::from_hz(60))
AM9517A(config, m_dma8237[0], XTAL(14'318'181)/3);
m_dma8237[0]->out_hreq_callback().set(FUNC(bebox_state::bebox_dma_hrq_changed));
m_dma8237[0]->out_eop_callback().set(FUNC(bebox_state::bebox_dma8237_out_eop));
m_dma8237[0]->in_memr_callback().set(FUNC(bebox_state::bebox_dma_read_byte));
m_dma8237[0]->out_memw_callback().set(FUNC(bebox_state::bebox_dma_write_byte));
m_dma8237[0]->in_ior_callback<2>().set(FUNC(bebox_state::bebox_dma8237_fdc_dack_r));
m_dma8237[0]->out_iow_callback<2>().set(FUNC(bebox_state::bebox_dma8237_fdc_dack_w));
m_dma8237[0]->out_dack_callback<0>().set(FUNC(bebox_state::pc_dack0_w));
m_dma8237[0]->out_dack_callback<1>().set(FUNC(bebox_state::pc_dack1_w));
m_dma8237[0]->out_dack_callback<2>().set(FUNC(bebox_state::pc_dack2_w));
m_dma8237[0]->out_dack_callback<3>().set(FUNC(bebox_state::pc_dack3_w));
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, bebox_state, bebox_timer0_w))
MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
MCFG_PIT8253_OUT2_HANDLER(WRITELINE("kbdc", kbdc8042_device, write_out2))
AM9517A(config, m_dma8237[1], XTAL(14'318'181)/3);
AM9517A(config, m_dma8237_1, XTAL(14'318'181)/3);
m_dma8237_1->out_hreq_callback().set(FUNC(bebox_state::bebox_dma_hrq_changed));
m_dma8237_1->out_eop_callback().set(FUNC(bebox_state::bebox_dma8237_out_eop));
m_dma8237_1->in_memr_callback().set(FUNC(bebox_state::bebox_dma_read_byte));
m_dma8237_1->out_memw_callback().set(FUNC(bebox_state::bebox_dma_write_byte));
m_dma8237_1->in_ior_callback<2>().set(FUNC(bebox_state::bebox_dma8237_fdc_dack_r));
m_dma8237_1->out_iow_callback<2>().set(FUNC(bebox_state::bebox_dma8237_fdc_dack_w));
m_dma8237_1->out_dack_callback<0>().set(FUNC(bebox_state::pc_dack0_w));
m_dma8237_1->out_dack_callback<1>().set(FUNC(bebox_state::pc_dack1_w));
m_dma8237_1->out_dack_callback<2>().set(FUNC(bebox_state::pc_dack2_w));
m_dma8237_1->out_dack_callback<3>().set(FUNC(bebox_state::pc_dack3_w));
PIC8259(config, m_pic8259[0], 0);
m_pic8259[0]->out_int_callback().set(FUNC(bebox_state::bebox_pic8259_master_set_int_line));
m_pic8259[0]->in_sp_callback().set_constant(1);
m_pic8259[0]->read_slave_ack_callback().set(FUNC(bebox_state::get_slave_ack));
AM9517A(config, m_dma8237_2, XTAL(14'318'181)/3);
PIC8259(config, m_pic8259[1], 0);
m_pic8259[1]->out_int_callback().set(FUNC(bebox_state::bebox_pic8259_slave_set_int_line));
m_pic8259[1]->in_sp_callback().set_constant(0);
PIC8259(config, m_pic8259_1, 0);
m_pic8259_1->out_int_callback().set(FUNC(bebox_state::bebox_pic8259_master_set_int_line));
m_pic8259_1->in_sp_callback().set_constant(1);
m_pic8259_1->read_slave_ack_callback().set(FUNC(bebox_state::get_slave_ack));
PIC8259(config, m_pic8259_2, 0);
m_pic8259_2->out_int_callback().set(FUNC(bebox_state::bebox_pic8259_slave_set_int_line));
m_pic8259_2->in_sp_callback().set_constant(0);
MCFG_DEVICE_ADD( "ns16550_0", NS16550, 0 ) /* TODO: Verify model */
MCFG_DEVICE_ADD( "ns16550_1", NS16550, 0 ) /* TODO: Verify model */
MCFG_DEVICE_ADD( "ns16550_2", NS16550, 0 ) /* TODO: Verify model */
MCFG_DEVICE_ADD( "ns16550_3", NS16550, 0 ) /* TODO: Verify model */
NS16550(config, "ns16550_0", 0); /* TODO: Verify model */
NS16550(config, "ns16550_1", 0); /* TODO: Verify model */
NS16550(config, "ns16550_2", 0); /* TODO: Verify model */
NS16550(config, "ns16550_3", 0); /* TODO: Verify model */
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL(25'174'800),900,0,640,526,0,480)
MCFG_SCREEN_UPDATE_DEVICE("vga", cirrus_gd5428_device, screen_update)
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480);
screen.set_screen_update("vga", FUNC(cirrus_gd5428_device::screen_update));
MCFG_DEVICE_ADD("vga", CIRRUS_GD5428, 0)
MCFG_VIDEO_SET_SCREEN("screen")
cirrus_gd5428_device &vga(CIRRUS_GD5428(config, "vga", 0));
vga.set_screen("screen");
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("ym3812", YM3812, 3579545)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
speaker_device &speaker(SPEAKER(config, "mono"));
speaker.front_center();
MCFG_FUJITSU_29F016A_ADD("flash")
ym3812_device &ym3812(YM3812(config, "ym3812", 3579545));
ym3812.add_route(ALL_OUTPUTS, speaker, 1.0);
MCFG_DEVICE_ADD("scsi", SCSI_PORT, 0)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE1, "harddisk", SCSIHD, SCSI_ID_0)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE2, "cdrom", SCSICD, SCSI_ID_3)
FUJITSU_29F016A(config, "flash");
MCFG_DEVICE_ADD("lsi53c810", LSI53C810, 0)
MCFG_LSI53C810_IRQ_CB(bebox_state, scsi_irq_callback)
MCFG_LSI53C810_DMA_CB(bebox_state, scsi_dma_callback)
MCFG_LSI53C810_FETCH_CB(bebox_state, scsi_fetch)
MCFG_LEGACY_SCSI_PORT("scsi")
scsi_port_device &scsibus(SCSI_PORT(config, "scsi"));
scsibus.set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_0));
scsibus.set_slot_device(2, "cdrom", SCSICD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_3));
MCFG_IDE_CONTROLLER_ADD( "ide", ata_devices, "hdd", nullptr, false ) /* FIXME */
MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(*this, bebox_state, bebox_ide_interrupt))
lsi53c810_device &scsictrl(LSI53C810(config, "lsi53c810"));
scsictrl.set_irq_callback(FUNC(bebox_state::scsi_irq_callback));
scsictrl.set_dma_callback(FUNC(bebox_state::scsi_dma_callback));
scsictrl.set_fetch_callback(FUNC(bebox_state::scsi_fetch));
scsictrl.set_scsi_port("scsi");
ide_controller_device &idectrl(IDE_CONTROLLER(config, "ide"));
idectrl.set_default_ata_devices("hdd", nullptr);
idectrl.irq_handler().set(FUNC(bebox_state::bebox_ide_interrupt));
/* pci */
MCFG_PCI_BUS_ADD("pcibus", 0)
MCFG_PCI_BUS_DEVICE("pcibus:0", pci_devices, "mpc105", true)
MCFG_SLOT_OPTION_MACHINE_CONFIG("mpc105", mpc105_config)
PCI_BUS(config, m_pcibus, 0);
m_pcibus->set_busnum(0);
MCFG_PCI_BUS_DEVICE("pcibus:1", pci_devices, "cirrus", true)
pci_connector_device &pcislot0 = add_pci_slot(config, "pcibus:0", 0, "mpc105");
pcislot0.set_option_machine_config("mpc105", mpc105_config);
add_pci_slot(config, "pcibus:1", 1, "cirrus");
/*MCFG_PCI_BUS_DEVICE(12, nullptr, scsi53c810_pci_read, scsi53c810_pci_write)*/
MCFG_SMC37C78_ADD("smc37c78")
MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, bebox_state, fdc_interrupt))
MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dma8237_1", am9517a_device, dreq2_w))
MCFG_FLOPPY_DRIVE_ADD("smc37c78:0", bebox_floppies, "35hd", bebox_state::floppy_formats)
SMC37C78(config, m_smc37c78, 0);
m_smc37c78->intrq_wr_callback().set(FUNC(bebox_state::fdc_interrupt));
m_smc37c78->drq_wr_callback().set(m_dma8237[0], FUNC(am9517a_device::dreq2_w));
MCFG_DEVICE_ADD("rtc", MC146818, 32.768_kHz_XTAL)
floppy_connector &fdc(FLOPPY_CONNECTOR(config, "smc37c78:0"));
fdc.option_add("35hd", FLOPPY_35_HD);
fdc.set_default_option("35hd");
fdc.set_formats(bebox_state::floppy_formats);
MCFG_DEVICE_ADD("kbdc", KBDC8042, 0)
MCFG_KBDC8042_KEYBOARD_TYPE(KBDC8042_STANDARD)
MCFG_KBDC8042_SYSTEM_RESET_CB(INPUTLINE("ppc1", INPUT_LINE_RESET))
MCFG_KBDC8042_INPUT_BUFFER_FULL_CB(WRITELINE(*this, bebox_state, bebox_keyboard_interrupt))
MC146818(config, "rtc", 32.768_kHz_XTAL);
kbdc8042_device &kbdc(KBDC8042(config, "kbdc"));
kbdc.set_keyboard_type(kbdc8042_device::KBDC8042_STANDARD);
kbdc.system_reset_callback().set_inputline(m_ppc[0], INPUT_LINE_RESET);
kbdc.input_buffer_full_callback().set(FUNC(bebox_state::bebox_keyboard_interrupt));
/* internal ram */
MCFG_RAM_ADD(RAM_TAG)
MCFG_RAM_DEFAULT_SIZE("32M")
MCFG_RAM_EXTRA_OPTIONS("8M,16M")
MACHINE_CONFIG_END
RAM(config, m_ram);
m_ram->set_default_size("32M");
m_ram->set_extra_options("8M,16M");
}
MACHINE_CONFIG_START(bebox_state::bebox2)
bebox(config);
MCFG_DEVICE_REPLACE("ppc1", PPC603E, 133000000) /* 133 MHz */
MCFG_DEVICE_PROGRAM_MAP(bebox_mem)
void bebox_state::bebox(machine_config &config)
{
PPC603(config, m_ppc[0], 66000000); /* 66 MHz */
m_ppc[0]->set_addrmap(AS_PROGRAM, &bebox_state::main_mem);
MCFG_DEVICE_REPLACE("ppc2", PPC603E, 133000000) /* 133 MHz */
MCFG_DEVICE_PROGRAM_MAP(bebox_slave_mem)
MACHINE_CONFIG_END
PPC603(config, m_ppc[1], 66000000); /* 66 MHz */
m_ppc[1]->set_addrmap(AS_PROGRAM, &bebox_state::slave_mem);
bebox_peripherals(config);
}
void bebox_state::bebox2(machine_config &config)
{
PPC603E(config, m_ppc[0], 133000000); /* 133 MHz */
m_ppc[0]->set_addrmap(AS_PROGRAM, &bebox_state::main_mem);
PPC603E(config, m_ppc[1], 133000000); /* 133 MHz */
m_ppc[1]->set_addrmap(AS_PROGRAM, &bebox_state::slave_mem);
bebox_peripherals(config);
}
static INPUT_PORTS_START( bebox )
PORT_INCLUDE( at_keyboard )

76
src/mame/drivers/indy_indigo2.cpp
View File

@ -70,10 +70,9 @@ public:
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_mainram(*this, "mainram")
, m_sgi_mc(*this, "sgi_mc")
, m_mem_ctrl(*this, "memctrl")
, m_scsi_ctrl(*this, "wd33c93")
, m_newport(*this, "newport")
, m_dac(*this, "dac")
, m_scsi(*this, "wd33c93")
, m_hal2(*this, HAL2_TAG)
, m_hpc3(*this, HPC3_TAG)
, m_ioc2(*this, IOC2_TAG)
@ -104,10 +103,9 @@ private:
required_device<mips3_device> m_maincpu;
required_shared_ptr<uint32_t> m_mainram;
required_device<sgi_mc_device> m_sgi_mc;
required_device<sgi_mc_device> m_mem_ctrl;
required_device<wd33c93_device> m_scsi_ctrl;
required_device<newport_video_device> m_newport;
required_device<dac_word_interface> m_dac;
required_device<wd33c93_device> m_scsi;
required_device<hal2_device> m_hal2;
required_device<hpc3_device> m_hpc3;
required_device<ioc2_device> m_ioc2;
@ -140,14 +138,14 @@ inline void ATTR_PRINTF(3,4) ip22_state::verboselog(int n_level, const char *s_f
WRITE32_MEMBER(ip22_state::ip22_write_ram)
{
// if banks 2 or 3 are enabled, do nothing, we don't support that much memory
if (m_sgi_mc->read(space, 0xc8/4, 0xffffffff) & 0x10001000)
if (m_mem_ctrl->read(space, 0xc8/4, 0xffffffff) & 0x10001000)
{
// a random perturbation so the memory test fails
data ^= 0xffffffff;
}
// if banks 0 or 1 have 2 membanks, also kill it, we only want 128 MB
if (m_sgi_mc->read(space, 0xc0/4, 0xffffffff) & 0x40004000)
if (m_mem_ctrl->read(space, 0xc0/4, 0xffffffff) & 0x40004000)
{
// a random perturbation so the memory test fails
data ^= 0xffffffff;
@ -160,7 +158,7 @@ void ip22_state::ip225015_map(address_map &map)
map(0x00000000, 0x0007ffff).bankrw("bank1"); /* mirror of first 512k of main RAM */
map(0x08000000, 0x0fffffff).share("mainram").ram().w(FUNC(ip22_state::ip22_write_ram)); /* 128 MB of main RAM */
map(0x1f0f0000, 0x1f0f1fff).rw(m_newport, FUNC(newport_video_device::rex3_r), FUNC(newport_video_device::rex3_w));
map(0x1fa00000, 0x1fa1ffff).rw(m_sgi_mc, FUNC(sgi_mc_device::read), FUNC(sgi_mc_device::write));
map(0x1fa00000, 0x1fa1ffff).rw(m_mem_ctrl, FUNC(sgi_mc_device::read), FUNC(sgi_mc_device::write));
map(0x1fb90000, 0x1fb9ffff).rw(m_hpc3, FUNC(hpc3_device::hd_enet_r), FUNC(hpc3_device::hd_enet_w));
map(0x1fbb0000, 0x1fbb0003).ram(); /* unknown, but read a lot and discarded */
map(0x1fbc0000, 0x1fbc7fff).rw(m_hpc3, FUNC(hpc3_device::hd0_r), FUNC(hpc3_device::hd0_w));
@ -210,47 +208,51 @@ void ip22_state::cdrom_config(device_t *device)
MCFG_SOUND_ROUTE(1, ":rspeaker", 1.0)
}
MACHINE_CONFIG_START(ip22_state::ip225015)
MCFG_DEVICE_ADD("maincpu", R5000BE, 50000000*3)
//MCFG_MIPS3_ICACHE_SIZE(32768)
//MCFG_MIPS3_DCACHE_SIZE(32768)
MCFG_DEVICE_PROGRAM_MAP(ip225015_map)
void ip22_state::ip225015(machine_config &config)
{
R5000BE(config, m_maincpu, 50000000*3);
m_maincpu->set_addrmap(AS_PROGRAM, &ip22_state::ip225015_map);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE( 60 )
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
MCFG_SCREEN_SIZE(1280+64, 1024+64)
MCFG_SCREEN_VISIBLE_AREA(0, 1279, 0, 1023)
MCFG_SCREEN_UPDATE_DEVICE("newport", newport_video_device, screen_update)
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60);
screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
screen.set_size(1280+64, 1024+64);
screen.set_visarea(0, 1279, 0, 1023);
screen.set_screen_update("newport", FUNC(newport_video_device::screen_update));
MCFG_PALETTE_ADD("palette", 65536)
PALETTE(config, "palette", 65536);
MCFG_DEVICE_ADD("newport", NEWPORT_VIDEO, 0)
NEWPORT_VIDEO(config, m_newport);
MCFG_DEVICE_ADD("sgi_mc", SGI_MC, 0)
SGI_MC(config, m_mem_ctrl);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
MCFG_DEVICE_ADD("dac", DAC_16BIT_R2R_TWOS_COMPLEMENT, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.25) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.25) // unknown DAC
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE(0, "dac", -1.0, DAC_VREF_NEG_INPUT)
dac_16bit_r2r_twos_complement_device &dac(DAC_16BIT_R2R_TWOS_COMPLEMENT(config, "dac", 0));
dac.add_route(ALL_OUTPUTS, "lspeaker", 0.25);
dac.add_route(ALL_OUTPUTS, "rspeaker", 0.25);
MCFG_DEVICE_ADD("scsi", SCSI_PORT, 0)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE1, "harddisk", SCSIHD, SCSI_ID_1)
MCFG_SCSIDEV_ADD("scsi:" SCSI_PORT_DEVICE2, "cdrom", SCSICD, SCSI_ID_4)
MCFG_SLOT_OPTION_MACHINE_CONFIG("cdrom", cdrom_config)
voltage_regulator_device &vreg = VOLTAGE_REGULATOR(config, "vref");
vreg.set_output(5.0);
vreg.add_route(0, "dac", 1.0, DAC_VREF_POS_INPUT);
vreg.add_route(0, "dac", -1.0, DAC_VREF_NEG_INPUT);
MCFG_DEVICE_ADD("wd33c93", WD33C93, 0)
MCFG_LEGACY_SCSI_PORT("scsi")
MCFG_WD33C93_IRQ_CB(WRITELINE(HPC3_TAG, hpc3_device, scsi_irq))
scsi_port_device &scsi(SCSI_PORT(config, "scsi"));
scsi.set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_1));
scsi.set_slot_device(2, "cdrom", SCSICD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_4));
scsi.slot(2).set_option_machine_config("cdrom", cdrom_config);
MCFG_DEVICE_ADD(HAL2_TAG, SGI_HAL2, 0)
MCFG_DEVICE_ADD(IOC2_TAG, SGI_IOC2_GUINNESS, 0, "maincpu")
MCFG_DEVICE_ADD(HPC3_TAG, SGI_HPC3, 0, "maincpu", "wd33c93", "ioc2")
WD33C93(config, m_scsi_ctrl);
m_scsi_ctrl->set_scsi_port("scsi");
m_scsi_ctrl->irq_cb().set(m_hpc3, FUNC(hpc3_device::scsi_irq));
MCFG_DEVICE_ADD(RTC_TAG, DS1386_8K, 32768)
SGI_HAL2(config, m_hal2);
SGI_IOC2_GUINNESS(config, m_ioc2, m_maincpu);
SGI_HPC3(config, m_hpc3, m_maincpu, m_scsi_ctrl, m_ioc2);
DS1386_8K(config, m_rtc, 32768);
MACHINE_CONFIG_END
MACHINE_CONFIG_START(ip22_state::ip224613)

29
src/mame/includes/bebox.h
View File

@ -11,6 +11,8 @@
#ifndef MAME_INCLUDES_BEBOX_H
#define MAME_INCLUDES_BEBOX_H
#include "cpu/powerpc/ppc.h"
#include "machine/53c810.h"
#include "machine/am9517a.h"
#include "machine/idectrl.h"
@ -20,6 +22,7 @@
#include "machine/ram.h"
#include "machine/upd765.h"
#include "machine/intelfsh.h"
#include "bus/lpci/pci.h"
@ -33,13 +36,10 @@ public:
bebox_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_ppc1(*this, "ppc1")
, m_ppc2(*this, "ppc2")
, m_ppc(*this, "ppc%u", 1U)
, m_lsi53c810(*this, "lsi53c810")
, m_dma8237_1(*this, "dma8237_1")
, m_dma8237_2(*this, "dma8237_2")
, m_pic8259_1(*this, "pic8259_1")
, m_pic8259_2(*this, "pic8259_2")
, m_dma8237(*this, "dma8237_%u", 1U)
, m_pic8259(*this, "pic8259_%u", 1U)
, m_pit8254(*this, "pit8254")
, m_ram(*this, RAM_TAG)
, m_smc37c78(*this, "smc37c78")
@ -48,13 +48,10 @@ public:
{
}
required_device<cpu_device> m_ppc1;
required_device<cpu_device> m_ppc2;
required_device_array<ppc_device, 2> m_ppc;
required_device<lsi53c810_device> m_lsi53c810;
required_device<am9517a_device> m_dma8237_1;
required_device<am9517a_device> m_dma8237_2;
required_device<pic8259_device> m_pic8259_1;
required_device<pic8259_device> m_pic8259_2;
required_device_array<am9517a_device, 2> m_dma8237;
required_device_array<pic8259_device, 2> m_pic8259;
required_device<pit8254_device> m_pit8254;
required_device<ram_device> m_ram;
required_device<smc37c78_device> m_smc37c78;
@ -121,10 +118,14 @@ public:
void bebox_update_interrupts();
static void mpc105_config(device_t *device);
pci_connector_device & add_pci_slot(machine_config &config, const char *tag, size_t index, const char *default_tag);
void bebox_peripherals(machine_config &config);
void bebox(machine_config &config);
void bebox2(machine_config &config);
void bebox_mem(address_map &map);
void bebox_slave_mem(address_map &map);
void main_mem(address_map &map);
void slave_mem(address_map &map);
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;

44
src/mame/machine/bebox.cpp
View File

@ -183,7 +183,7 @@ READ64_MEMBER(bebox_state::bebox_crossproc_interrupts_r )
result = m_crossproc_interrupts;
/* return a different result depending on which CPU is accessing this handler */
if (&space != &m_ppc1->space(AS_PROGRAM))
if (&space != &m_ppc[0]->space(AS_PROGRAM))
result |= 0x02000000;
else
result &= ~0x02000000;
@ -208,7 +208,6 @@ WRITE64_MEMBER(bebox_state::bebox_crossproc_interrupts_w )
};
int i, line;
uint32_t old_crossproc_interrupts = m_crossproc_interrupts;
cpu_device *cpus[] = { m_ppc1, m_ppc2 };
bebox_mbreg32_w(&m_crossproc_interrupts, data, mem_mask);
@ -230,7 +229,7 @@ WRITE64_MEMBER(bebox_state::bebox_crossproc_interrupts_w )
*/
}
cpus[crossproc_map[i].cpunum]->set_input_line(crossproc_map[i].inputline, line);
m_ppc[crossproc_map[i].cpunum]->set_input_line(crossproc_map[i].inputline, line);
}
}
}
@ -241,7 +240,7 @@ WRITE64_MEMBER(bebox_state::bebox_processor_resets_w )
if (b & 0x20)
{
m_ppc2->set_input_line(INPUT_LINE_RESET, (b & 0x80) ? CLEAR_LINE : ASSERT_LINE);
m_ppc[1]->set_input_line(INPUT_LINE_RESET, (b & 0x80) ? CLEAR_LINE : ASSERT_LINE);
}
}
@ -249,7 +248,6 @@ WRITE64_MEMBER(bebox_state::bebox_processor_resets_w )
void bebox_state::bebox_update_interrupts()
{
uint32_t interrupt;
cpu_device *cpus[] = { m_ppc1, m_ppc2 };
for (int cpunum = 0; cpunum < 2; cpunum++)
{
@ -261,7 +259,7 @@ void bebox_state::bebox_update_interrupts()
m_interrupts, m_cpu_imask[cpunum], interrupt ? "on" : "off");
}
cpus[cpunum]->set_input_line(INPUT_LINE_IRQ0, interrupt ? ASSERT_LINE : CLEAR_LINE);
m_ppc[cpunum]->set_input_line(INPUT_LINE_IRQ0, interrupt ? ASSERT_LINE : CLEAR_LINE);
}
}
@ -311,8 +309,8 @@ void bebox_state::bebox_set_irq_bit(unsigned int interrupt_bit, int val)
assert_always((interrupt_bit < ARRAY_LENGTH(interrupt_names)) && (interrupt_names[interrupt_bit] != nullptr), "Raising invalid interrupt");
logerror("bebox_set_irq_bit(): pc[0]=0x%08x pc[1]=0x%08x %s interrupt #%u (%s)\n",
(unsigned) m_ppc1->pc(),
(unsigned) m_ppc2->pc(),
(unsigned) m_ppc[0]->pc(),
(unsigned) m_ppc[1]->pc(),
val ? "Asserting" : "Clearing",
interrupt_bit, interrupt_names[interrupt_bit]);
}
@ -337,7 +335,7 @@ void bebox_state::bebox_set_irq_bit(unsigned int interrupt_bit, int val)
WRITE_LINE_MEMBER( bebox_state::fdc_interrupt )
{
bebox_set_irq_bit(13, state);
m_pic8259_1->ir6_w(state);
m_pic8259[0]->ir6_w(state);
}
/*************************************
@ -349,7 +347,7 @@ WRITE_LINE_MEMBER( bebox_state::fdc_interrupt )
READ64_MEMBER(bebox_state::bebox_interrupt_ack_r )
{
uint32_t result;
result = m_pic8259_1->acknowledge();
result = m_pic8259[0]->acknowledge();
bebox_set_irq_bit(5, 0); /* HACK */
return ((uint64_t) result) << 56;
}
@ -368,12 +366,12 @@ WRITE_LINE_MEMBER(bebox_state::bebox_pic8259_master_set_int_line)
WRITE_LINE_MEMBER(bebox_state::bebox_pic8259_slave_set_int_line)
{
m_pic8259_1->ir2_w(state);
m_pic8259[0]->ir2_w(state);
}
READ8_MEMBER(bebox_state::get_slave_ack)
{
return m_pic8259_2->acknowledge();
return m_pic8259[1]->acknowledge();
}
@ -386,7 +384,7 @@ READ8_MEMBER(bebox_state::get_slave_ack)
WRITE_LINE_MEMBER(bebox_state::bebox_ide_interrupt)
{
bebox_set_irq_bit(7, state);
m_pic8259_1->ir6_w(state);
m_pic8259[0]->ir6_w(state);
}
@ -530,16 +528,16 @@ READ8_MEMBER(bebox_state::bebox_80000480_r)
WRITE_LINE_MEMBER(bebox_state::bebox_dma_hrq_changed)
{
m_ppc1->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
m_ppc[0]->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
/* Assert HLDA */
m_dma8237_1->hack_w( state );
m_dma8237[0]->hack_w( state );
}
READ8_MEMBER(bebox_state::bebox_dma_read_byte )
{
address_space& prog_space = m_ppc1->space(AS_PROGRAM); // get the right address space
address_space& prog_space = m_ppc[0]->space(AS_PROGRAM); // get the right address space
offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16)
& 0x7FFF0000;
return prog_space.read_byte(page_offset + offset);
@ -548,7 +546,7 @@ READ8_MEMBER(bebox_state::bebox_dma_read_byte )
WRITE8_MEMBER(bebox_state::bebox_dma_write_byte )
{
address_space& prog_space = m_ppc1->space(AS_PROGRAM); // get the right address space
address_space& prog_space = m_ppc[0]->space(AS_PROGRAM); // get the right address space
offs_t page_offset = (((offs_t) m_dma_offset[0][m_dma_channel]) << 16)
& 0x7FFF0000;
prog_space.write_byte(page_offset + offset, data);
@ -588,7 +586,7 @@ WRITE_LINE_MEMBER(bebox_state::pc_dack3_w){ set_dma_channel(machine(), 3, state)
WRITE_LINE_MEMBER(bebox_state::bebox_timer0_w)
{
m_pic8259_1->ir0_w(state);
m_pic8259[0]->ir0_w(state);
}
@ -732,7 +730,7 @@ void bebox_state::scsi53c810_pci_write(int function, int offset, uint32_t data,
/* brutal ugly hack; at some point the PCI code should be handling this stuff */
if (m_scsi53c810_data[5] != 0xFFFFFFF0)
{
address_space &space = m_ppc1->space(AS_PROGRAM);
address_space &space = m_ppc[0]->space(AS_PROGRAM);
addr = (m_scsi53c810_data[5] | 0xC0000000) & ~0xFF;
space.install_readwrite_handler(addr, addr + 0xFF, read64_delegate(FUNC(bebox_state::scsi53c810_r),this), write64_delegate(FUNC(bebox_state::scsi53c810_w),this));
@ -767,8 +765,8 @@ void bebox_state::machine_reset()
{
timer_set(attotime::zero, TIMER_GET_DEVICES);
m_ppc1->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
m_ppc2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
m_ppc[0]->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
m_ppc[1]->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
// Endianness? Bah!
memcpy(m_flash->base(),memregion("user1")->base(),0x200000);
@ -780,8 +778,8 @@ void bebox_state::machine_start()
void bebox_state::init_bebox()
{
address_space &space_0 = m_ppc1->space(AS_PROGRAM);
address_space &space_1 = m_ppc2->space(AS_PROGRAM);
address_space &space_0 = m_ppc[0]->space(AS_PROGRAM);
address_space &space_1 = m_ppc[1]->space(AS_PROGRAM);
/* set up boot and flash ROM */
membank("bank2")->set_base(memregion("user2")->base());

9
src/mame/machine/hal2.h
View File

@ -14,10 +14,15 @@
class hal2_device : public device_t
{
public:
hal2_device(const machine_config &mconfig, const char *tag, device_t *owner)
: hal2_device(mconfig, tag, owner, (uint32_t)0)
{
}
hal2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE32_MEMBER( write );
DECLARE_READ32_MEMBER( read );
DECLARE_WRITE32_MEMBER(write);
DECLARE_READ32_MEMBER(read);
protected:
virtual void device_start() override;

14
src/mame/machine/hpc3.h
View File

@ -18,17 +18,13 @@
class hpc3_device : public device_t
{
public:
template <typename T> void set_cpu_tag(T &&tag) { m_maincpu.set_tag(std::forward<T>(tag)); }
template <typename T> void set_scsi_tag(T &&tag) { m_wd33c93.set_tag(std::forward<T>(tag)); }
template <typename T> void set_ioc2_tag(T &&tag) { m_ioc2.set_tag(std::forward<T>(tag)); }
template <typename T, typename U, typename V>
hpc3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, U &&scsi_tag, V &&ioc2_tag)
: hpc3_device(mconfig, tag, owner, clock)
hpc3_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu_tag, U &&scsi_tag, V &&ioc2_tag)
: hpc3_device(mconfig, tag, owner, (uint32_t)0)
{
set_cpu_tag(std::forward<T>(cpu_tag));
set_scsi_tag(std::forward<U>(scsi_tag));
set_ioc2_tag(std::forward<V>(ioc2_tag));
m_maincpu.set_tag(std::forward<T>(cpu_tag));
m_wd33c93.set_tag(std::forward<U>(scsi_tag));
m_ioc2.set_tag(std::forward<V>(ioc2_tag));
}
hpc3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);

18
src/mame/machine/ioc2.cpp
View File

@ -68,17 +68,17 @@ MACHINE_CONFIG_START(ioc2_device::device_add_mconfig)
MCFG_RS232_DCD_HANDLER(WRITELINE(SCC_TAG, scc85230_device, dcdb_w))
MCFG_RS232_RXD_HANDLER(WRITELINE(SCC_TAG, scc85230_device, rxb_w))
MCFG_DEVICE_ADD(PI1_TAG, PC_LPT, 0)
PC_LPT(config, m_pi1, 0);
MCFG_DEVICE_ADD(KBDC_TAG, KBDC8042, 0)
MCFG_KBDC8042_KEYBOARD_TYPE(KBDC8042_PS2)
MCFG_KBDC8042_SYSTEM_RESET_CB(INPUTLINE("^maincpu", INPUT_LINE_RESET))
KBDC8042(config, m_kbdc);
m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_PS2);
m_kbdc->system_reset_callback().set_inputline(m_maincpu, INPUT_LINE_RESET);
MCFG_DEVICE_ADD(PIT_TAG, PIT8254, 0)
MCFG_PIT8253_CLK0(1000000)
MCFG_PIT8253_CLK1(1000000)
MCFG_PIT8253_CLK2(1000000)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(KBDC_TAG, kbdc8042_device, write_out2))
PIT8254(config, m_pit, 0);
m_pit->set_clk<0>(1000000);
m_pit->set_clk<1>(1000000);
m_pit->set_clk<2>(1000000);
m_pit->out_handler<2>().set(m_kbdc, FUNC(kbdc8042_device::write_out2));
MACHINE_CONFIG_END

8
src/mame/machine/ioc2.h
View File

@ -185,8 +185,8 @@ class ioc2_guinness_device : public ioc2_device
{
public:
template <typename T>
ioc2_guinness_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag)
: ioc2_guinness_device(mconfig, tag, owner, clock)
ioc2_guinness_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu_tag)
: ioc2_guinness_device(mconfig, tag, owner, (uint32_t)0)
{
set_cpu_tag(std::forward<T>(cpu_tag));
}
@ -201,8 +201,8 @@ class ioc2_full_house_device : public ioc2_device
{
public:
template <typename T>
ioc2_full_house_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag)
: ioc2_full_house_device(mconfig, tag, owner, clock)
ioc2_full_house_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu_tag)
: ioc2_full_house_device(mconfig, tag, owner, (uint32_t)0)
{
set_cpu_tag(std::forward<T>(cpu_tag));
}

5
src/mame/machine/sgi.h
View File

@ -16,6 +16,11 @@
class sgi_mc_device : public device_t
{
public:
sgi_mc_device(const machine_config &mconfig, const char *tag, device_t *owner)
: sgi_mc_device(mconfig, tag, owner, (uint32_t)0)
{
}
sgi_mc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ32_MEMBER(read);

7
src/mame/video/newport.h
View File

@ -2,7 +2,6 @@
// copyright-holders:Ryan Holtz
/*
SGI "Newport" graphics board used in the Indy and some Indigo2s
*/
#ifndef MAME_VIDEO_NEWPORT_H
@ -13,8 +12,12 @@
class newport_video_device : public device_t
{
public:
newport_video_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
newport_video_device(const machine_config &mconfig, const char *tag, device_t *owner)
: newport_video_device(mconfig, tag, owner, (uint32_t)0) // TODO: Use actual pixel clock
{
}
newport_video_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ32_MEMBER( rex3_r );
DECLARE_WRITE32_MEMBER( rex3_w );