mirror of
https://github.com/holub/mame
synced 2025-04-24 17:30:55 +03:00
got rid of namcona1 legacy nvram handler
This commit is contained in:
Michaël Banaan Ananas
parent
d88747c2e5
commit
1ad6c5839c
@ -198,6 +198,7 @@ enum
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XTAL_48_66MHz = 48660000, /* Zaxxon */
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XTAL_49_152MHz = 49152000, /* Used on some Namco PCBs, Baraduke h/w, System 21, Super System 22 */
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XTAL_50MHz = 50000000, /* Williams/Midway T/W/V-unit system */
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XTAL_50_113MHz = 50113000, /* Namco NA-1 */
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XTAL_52MHz = 52000000, /* Cojag */
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XTAL_52_832MHz = 52832000, /* Wang PC TIG video controller */
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XTAL_53_693175MHz = 53693175, /* PSX-based h/w, Sony ZN1-2-based (15x NTSC subcarrier) */
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@ -1,4 +1,5 @@
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/***************************************************************************
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Namco NA-1 / NA-2 System
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NA-1 Games:
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@ -20,6 +21,10 @@ NA-2 Games:
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To Do:
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- Remove remaining MCU simulation hacks
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- View area / screen resolution controlled by registers?
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- Canned EEPROM data for [see below*] oughtn't be necessary; when their EEPROM
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area is uninitialized, the game software automatically writes these values there,
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but then hangs.
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*cgangpzl, cgangpzlj, exvania, exvaniaj, knckheadjp, quiztou
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- X-Day 2:
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Rom board M112
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@ -163,94 +168,12 @@ Notes:
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#include "includes/namcona1.h"
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#include "sound/c140.h"
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#include "cpu/m37710/m37710.h"
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#include "mcfglgcy.h"
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#define MASTER_CLOCK XTAL_50_113MHz
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/*************************************************************************/
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static const UINT8 ExvaniaDefaultNvMem[] =
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{
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/* This data oughtn't be necessary; when Exbania's EPROM area is uninitialized,
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* the game software automatically writes these values there, but then jumps
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* to an unmapped (bogus) address, causing MAME to crash.
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*/
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0x30,0x32,0x4f,0x63,0x74,0x39,0x32,0x52,0x45,0x56,0x49,0x53,0x49,0x4f,0x4e,0x35,
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0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x01,
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0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x02
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}; /* ExvaniaDefaultNvMem */
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static const UINT8 QuiztouDefaultNvMem[] =
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{
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/* This data oughtn't be necessary; when QuiztouDefaultNvMem's EPROM area is uninitialized,
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* the game software automatically writes these values there, but then jumps
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* to an unmapped (bogus) address, causing MAME to crash.
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*/
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0x30,0x32,0x4F,0x63,0x74,0x39,0x32,0x52,0x45,0x56,0x49,0x53,0x49,0x4F,0x4E,0x35,
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0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x01,
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0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02
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}; /* QuiztouDefaultNvMem */
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static const UINT8 CgangpzlDefaultNvMem[] =
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{
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/* This data oughtn't be necessary; when Cgangpzl's EPROM area is uninitialized,
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* the game software automatically writes these values there, but then hangs.
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*/
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0x30,0x32,0x4F,0x63,0x74,0x39,0x32,0x52,0x45,0x56,0x49,0x53,0x49,0x4F,0x4E,0x35,
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0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x01,
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0x00,0x02,0x00,0x00,0x00,0x01
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}; /* CgangpzlDefaultNvMem */
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static NVRAM_HANDLER( namcosna1 )
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{
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namcona1_state *state = machine.driver_data<namcona1_state>();
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if( read_or_write )
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{
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file->write( state->m_nvmem, NA1_NVRAM_SIZE );
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}
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else
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{
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if (file)
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{
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file->read( state->m_nvmem, NA1_NVRAM_SIZE );
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}
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else
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{
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memset( state->m_nvmem, 0x00, NA1_NVRAM_SIZE );
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switch( state->m_gametype )
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{
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case NAMCO_EXBANIA:
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memcpy( state->m_nvmem, ExvaniaDefaultNvMem, sizeof(ExvaniaDefaultNvMem) );
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break;
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case NAMCO_QUIZTOU:
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memcpy( state->m_nvmem, QuiztouDefaultNvMem, sizeof(QuiztouDefaultNvMem) );
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break;
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case NAMCO_CGANGPZL:
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memcpy( state->m_nvmem, CgangpzlDefaultNvMem, sizeof(CgangpzlDefaultNvMem) );
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break;
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}
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}
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}
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} /* namcosna1_nvram_handler */
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READ16_MEMBER(namcona1_state::namcona1_nvram_r)
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{
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return m_nvmem[offset];
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} /* namcona1_nvram_r */
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WRITE16_MEMBER(namcona1_state::namcona1_nvram_w)
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{
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if( ACCESSING_BITS_0_7 )
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{
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m_nvmem[offset] = data&0xff;
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}
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} /* namcona1_nvram_w */
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/***************************************************************************/
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static INPUT_PORTS_START( namcona1_joy )
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PORT_START("P1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
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@ -743,12 +666,12 @@ static ADDRESS_MAP_START( namcona1_main_map, AS_PROGRAM, 16, namcona1_state )
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AM_RANGE(0x3f8000, 0x3fffff) AM_READWRITE(mcu_mailbox_r, mcu_mailbox_w_68k)
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AM_RANGE(0x400000, 0xbfffff) AM_ROM AM_REGION("maincpu", 0x280000) /* data */
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AM_RANGE(0xc00000, 0xdfffff) AM_ROM AM_REGION("maincpu", 0x080000) /* code */
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AM_RANGE(0xe00000, 0xe00fff) AM_READWRITE(namcona1_nvram_r, namcona1_nvram_w)
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AM_RANGE(0xe00000, 0xe00fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
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AM_RANGE(0xe40000, 0xe4000f) AM_READWRITE(custom_key_r, custom_key_w)
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AM_RANGE(0xefff00, 0xefffff) AM_READWRITE(namcona1_vreg_r, namcona1_vreg_w) AM_SHARE("vreg")
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AM_RANGE(0xf00000, 0xf01fff) AM_READWRITE(namcona1_paletteram_r, namcona1_paletteram_w) AM_SHARE("paletteram")
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AM_RANGE(0xf40000, 0xf7ffff) AM_READWRITE(namcona1_gfxram_r, namcona1_gfxram_w)
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AM_RANGE(0xff0000, 0xffbfff) AM_READWRITE(namcona1_videoram_r, namcona1_videoram_w) AM_SHARE("videoram")
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AM_RANGE(0xff0000, 0xffbfff) AM_READWRITE(namcona1_videoram_r, namcona1_videoram_w) AM_SHARE("videoram")
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AM_RANGE(0xffd000, 0xffdfff) AM_RAM /* unknown */
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AM_RANGE(0xffe000, 0xffefff) AM_RAM AM_SHARE("scroll") /* scroll registers */
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AM_RANGE(0xfff000, 0xffffff) AM_RAM AM_SHARE("spriteram") /* spriteram */
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@ -764,13 +687,13 @@ static ADDRESS_MAP_START( namcona2_main_map, AS_PROGRAM, 16, namcona1_state )
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AM_RANGE(0xd80000, 0xd80001) AM_WRITENOP /* xday: serial out? */
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AM_RANGE(0xdc0000, 0xdc001f) AM_WRITENOP /* xday: serial config? */
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AM_RANGE(0xc00000, 0xdfffff) AM_ROM AM_REGION("maincpu", 0x080000) /* code */
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AM_RANGE(0xe00000, 0xe00fff) AM_READWRITE(namcona1_nvram_r, namcona1_nvram_w)
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AM_RANGE(0xe00000, 0xe00fff) AM_DEVREADWRITE8("eeprom", eeprom_parallel_28xx_device, read, write, 0x00ff)
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/* xday: additional battery-backed ram at 00E024FA? */
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AM_RANGE(0xe40000, 0xe4000f) AM_READWRITE(custom_key_r, custom_key_w)
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AM_RANGE(0xefff00, 0xefffff) AM_READWRITE(namcona1_vreg_r, namcona1_vreg_w) AM_SHARE("vreg")
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AM_RANGE(0xf00000, 0xf01fff) AM_READWRITE(namcona1_paletteram_r, namcona1_paletteram_w) AM_SHARE("paletteram")
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AM_RANGE(0xf40000, 0xf7ffff) AM_READWRITE(namcona1_gfxram_r, namcona1_gfxram_w)
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AM_RANGE(0xff0000, 0xffbfff) AM_READWRITE(namcona1_videoram_r, namcona1_videoram_w) AM_SHARE("videoram")
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AM_RANGE(0xff0000, 0xffbfff) AM_READWRITE(namcona1_videoram_r, namcona1_videoram_w) AM_SHARE("videoram")
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AM_RANGE(0xffd000, 0xffdfff) AM_RAM /* unknown */
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AM_RANGE(0xffe000, 0xffefff) AM_RAM AM_SHARE("scroll") /* scroll registers */
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AM_RANGE(0xfff000, 0xffffff) AM_RAM AM_SHARE("spriteram") /* spriteram */
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@ -1004,17 +927,18 @@ static const c140_interface C140_interface_typeA =
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/* cropped at sides */
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static MACHINE_CONFIG_START( namcona1, namcona1_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M68000, 50113000/4)
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MCFG_CPU_ADD("maincpu", M68000, MASTER_CLOCK/4)
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MCFG_CPU_PROGRAM_MAP(namcona1_main_map)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scan_main", namcona1_state, namcona1_interrupt, "screen", 0, 1)
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MCFG_CPU_ADD("mcu", M37702, 50113000/4)
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MCFG_CPU_ADD("mcu", M37702, MASTER_CLOCK/4)
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MCFG_CPU_PROGRAM_MAP(namcona1_mcu_map)
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MCFG_CPU_IO_MAP( namcona1_mcu_io_map)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scan_mcu", namcona1_state, mcu_interrupt, "screen", 0, 1)
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MCFG_NVRAM_HANDLER(namcosna1)
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MCFG_EEPROM_2816_ADD("eeprom")
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MCFG_QUANTUM_TIME(attotime::from_hz(2400))
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/* video hardware */
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@ -1029,7 +953,6 @@ static MACHINE_CONFIG_START( namcona1, namcona1_state )
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MCFG_PALETTE_LENGTH(0x2000)
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/* sound hardware */
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MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
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@ -1043,8 +966,6 @@ MACHINE_CONFIG_END
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/* full-width */
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static MACHINE_CONFIG_DERIVED( namcona1w, namcona1 )
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/* basic machine hardware */
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/* video hardware */
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MCFG_SCREEN_MODIFY("screen")
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MCFG_SCREEN_VISIBLE_AREA(0, 38*8-1-0, 4*8, 32*8-1)
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@ -1054,7 +975,6 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( namcona2, namcona1 )
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/* basic machine hardware */
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MCFG_CPU_MODIFY("maincpu")
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MCFG_CPU_PROGRAM_MAP(namcona2_main_map)
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MACHINE_CONFIG_END
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@ -1110,6 +1030,9 @@ ROM_START( cgangpzl )
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/* M37702 BIOS - labeled as Namco custom C69 */
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ROM_REGION16_LE( 0x4000, "mcu", 0 )
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ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
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ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
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ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(5f8dfe9e) SHA1(81cc9cdbd8b5d6092a292309f78e3037233078f9) )
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ROM_END
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ROM_START( cgangpzlj )
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@ -1120,6 +1043,9 @@ ROM_START( cgangpzlj )
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/* M37702 BIOS - labeled as Namco custom C69 */
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ROM_REGION16_LE( 0x4000, "mcu", 0 )
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ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
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ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
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ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(ef5ddff2) SHA1(ea3f8e4da119e27c27f66f169bbf19bc37499048) )
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ROM_END
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ROM_START( emeraldaj ) /* NA-1 Game PCB, parent is NA-2 version listed below */
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@ -1159,6 +1085,9 @@ ROM_START( exvania )
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/* M37702 BIOS - labeled as Namco custom C69 */
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ROM_REGION16_LE( 0x4000, "mcu", 0 )
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ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
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ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
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ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(0f46389d) SHA1(5706a46b02a667f5bddaa3842bb009ea07d23603) )
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ROM_END
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ROM_START( exvaniaj )
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@ -1174,6 +1103,9 @@ ROM_START( exvaniaj )
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/* M37702 BIOS - labeled as Namco custom C69 */
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ROM_REGION16_LE( 0x4000, "mcu", 0 )
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ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
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ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
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ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(0f46389d) SHA1(5706a46b02a667f5bddaa3842bb009ea07d23603) )
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ROM_END
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ROM_START( fghtatck )
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@ -1342,6 +1274,9 @@ ROM_START( knckheadjp ) /* Older or possible prototype. Doesn't show rom test at
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/* M37702 BIOS - labeled as Namco custom C70 */
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ROM_REGION16_LE( 0x4000, "mcu", 0 )
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ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
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ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
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ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(98875a23) SHA1(2256cd231587351a0768faaedafbd1f80e3fd7c4) )
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ROM_END
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ROM_START( numanath )
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@ -1405,6 +1340,9 @@ ROM_START( quiztou )
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/* M37702 BIOS - labeled as Namco custom C70 */
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ROM_REGION16_LE( 0x4000, "mcu", 0 )
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ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
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ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
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ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(57a478a6) SHA1(b6d66610690f2fdf6643b2de91e2345d15d839b1) )
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ROM_END
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ROM_START( xday2 )
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@ -1,3 +1,11 @@
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/***************************************************************************
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Namco NA-1 System hardware
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***************************************************************************/
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#include "machine/eeprompar.h"
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enum
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{
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NAMCO_CGANGPZL,
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@ -13,9 +21,9 @@ enum
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NAMCO_XDAY2
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};
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#define NA1_NVRAM_SIZE (0x800)
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#define NAMCONA1_NUM_TILEMAPS 4
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class namcona1_state : public driver_device
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{
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public:
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@ -23,25 +31,27 @@ public:
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: driver_device(mconfig, type, tag),
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m_maincpu(*this,"maincpu"),
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m_mcu(*this,"mcu"),
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m_eeprom(*this, "eeprom"),
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m_videoram(*this,"videoram"),
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m_spriteram(*this,"spriteram"),
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m_workram(*this,"workram"),
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m_vreg(*this,"vreg"),
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m_scroll(*this,"scroll")
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{ }
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{ }
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_mcu;
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required_device<eeprom_parallel_28xx_device> m_eeprom;
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required_shared_ptr<UINT16> m_videoram;
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required_shared_ptr<UINT16> m_spriteram;
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required_shared_ptr<UINT16> m_workram;
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required_shared_ptr<UINT16> m_vreg;
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required_shared_ptr<UINT16> m_scroll;
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UINT16 *m_mpBank0;
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UINT16 *m_mpBank1;
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int m_mEnableInterrupts;
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int m_gametype;
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UINT8 m_nvmem[NA1_NVRAM_SIZE];
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UINT16 m_count;
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UINT32 m_keyval;
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UINT16 m_mcu_mailbox[8];
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@ -59,8 +69,6 @@ public:
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UINT8 m_mask_data[8];
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UINT8 m_conv_data[9];
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DECLARE_READ16_MEMBER(namcona1_nvram_r);
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DECLARE_WRITE16_MEMBER(namcona1_nvram_w);
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DECLARE_READ16_MEMBER(custom_key_r);
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DECLARE_WRITE16_MEMBER(custom_key_w);
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DECLARE_READ16_MEMBER(namcona1_vreg_r);
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