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mc68hc11: Fix size of fetched operand for ADDD indexed modes

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This appears to have accidentally regressed in bcd74f1e42.
This commit is contained in:
AJR 2019-11-14 09:15:24 -05:00
parent f394d486bc
commit 1ce4051cf4
1 changed files with 2 additions and 2 deletions
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4
src/devices/cpu/mc68hc11/hc11ops.hxx
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@ -474,7 +474,7 @@ void HC11OP(addd_indx)()
{ {
uint8_t offset = FETCH(); uint8_t offset = FETCH();
uint16_t adr = m_ix + offset; uint16_t adr = m_ix + offset;
uint8_t i = READ8(adr); uint16_t i = READ16(adr);
uint32_t r = REG_D + i; uint32_t r = REG_D + i;
CLEAR_NZVC(); CLEAR_NZVC();
SET_N16(r); SET_N16(r);
@ -490,7 +490,7 @@ void HC11OP(addd_indy)()
{ {
uint8_t offset = FETCH(); uint8_t offset = FETCH();
uint16_t adr = m_iy + offset; uint16_t adr = m_iy + offset;
uint8_t i = READ8(adr); uint16_t i = READ16(adr);
uint32_t r = REG_D + i; uint32_t r = REG_D + i;
CLEAR_NZVC(); CLEAR_NZVC();
SET_N16(r); SET_N16(r);