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DISCRETE_COUNTER - added MIN parameter and optimized speed.

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This commit is contained in:
Derrick Renaud 2009-10-22 02:36:26 +00:00
parent a8ddc0a162
commit 20765c0fe2
17 changed files with 163 additions and 124 deletions
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85
src/emu/sound/disc_wav.c
View File

@ -33,8 +33,10 @@ struct dss_counter_context
int clock_type;
int out_type;
int is_7492;
int last; /* Last clock state */
int count; /* current count */
UINT32 last; /* Last clock state */
UINT32 min;
UINT32 max;
UINT32 diff;
double t_left; /* time unused during last sample in seconds */
};
@ -179,11 +181,12 @@ struct dss_trianglewave_context
#define DSS_COUNTER__ENABLE DISCRETE_INPUT(0)
#define DSS_COUNTER__RESET DISCRETE_INPUT(1)
#define DSS_COUNTER__CLOCK DISCRETE_INPUT(2)
#define DSS_COUNTER__MAX DISCRETE_INPUT(3)
#define DSS_COUNTER__DIR DISCRETE_INPUT(4)
#define DSS_COUNTER__INIT DISCRETE_INPUT(5)
#define DSS_COUNTER__CLOCK_TYPE DISCRETE_INPUT(6)
#define DSS_7492__CLOCK_TYPE DSS_COUNTER__MAX
#define DSS_COUNTER__MIN DISCRETE_INPUT(3)
#define DSS_COUNTER__MAX DISCRETE_INPUT(4)
#define DSS_COUNTER__DIR DISCRETE_INPUT(5)
#define DSS_COUNTER__INIT DISCRETE_INPUT(6)
#define DSS_COUNTER__CLOCK_TYPE DISCRETE_INPUT(7)
#define DSS_7492__CLOCK_TYPE DSS_COUNTER__MIN
static const int disc_7492_count[6] = {0x00, 0x01, 0x02, 0x04, 0x05, 0x06};
@ -193,13 +196,8 @@ static DISCRETE_STEP(dss_counter)
double cycles;
double ds_clock;
int clock = 0, last_count, inc = 0;
int max;
double x_time = 0;
if (context->is_7492)
max = 5;
else
max = DSS_COUNTER__MAX;
UINT32 count = node->output[0];
ds_clock = DSS_COUNTER__CLOCK;
if (UNEXPECTED(context->clock_type == DISC_CLK_IS_FREQ))
@ -213,6 +211,7 @@ static DISCRETE_STEP(dss_counter)
else
{
clock = (int)ds_clock;
/* x_time from input clock */
x_time = ds_clock - clock;
}
@ -220,8 +219,7 @@ static DISCRETE_STEP(dss_counter)
/* If reset enabled then set output to the reset value. No x_time in reset. */
if (UNEXPECTED(DSS_COUNTER__RESET))
{
context->count = DSS_COUNTER__INIT;
node->output[0] = context->count;
node->output[0] = (int)DSS_COUNTER__INIT;
return;
}
@ -231,7 +229,7 @@ static DISCRETE_STEP(dss_counter)
*/
if (EXPECTED(DSS_COUNTER__ENABLE))
{
last_count = context->count;
last_count = count;
switch (context->clock_type)
{
@ -256,57 +254,76 @@ static DISCRETE_STEP(dss_counter)
break;
}
/* use loops because init is not always min or max */
if (DSS_COUNTER__DIR)
context->count = (context->count + inc) % (max + 1);
{
count += inc;
while (count > context->max)
{
count -= context->diff;
}
}
else
context->count = max - ((context->count + inc) % (max + 1));
{
count -= inc;
while (count < context->min)
{
count += context->diff;
}
}
node->output[0] = context->is_7492 ? disc_7492_count[context->count] : context->count;
node->output[0] = context->is_7492 ? disc_7492_count[count] : count;
if (EXPECTED(context->count != last_count))
if (UNEXPECTED(count != last_count))
{
/* the x_time is only output if the output changed. */
switch (context->out_type)
{
case DISC_OUT_HAS_XTIME:
node->output[0] += x_time;
break;
case DISC_OUT_IS_ENERGY:
if (x_time == 0) x_time = 1.0;
node->output[0] = last_count;
if (context->count > last_count)
node->output[0] += (context->count - last_count) * x_time;
if (count > last_count)
node->output[0] += (count - last_count) * x_time;
else
node->output[0] -= (last_count - context->count) * x_time;
break;
case DISC_OUT_HAS_XTIME:
node->output[0] += x_time;
node->output[0] -= (last_count - count) * x_time;
break;
}
}
}
else
node->output[0] = context->count;
}
static DISCRETE_RESET(dss_counter)
{
struct dss_counter_context *context = (struct dss_counter_context *)node->context;
if (DSS_COUNTER__MAX < DSS_COUNTER__MIN)
fatalerror("MAX < MIN in NODE_%02d", NODE_INDEX(node->block->node));
if ((int)DSS_COUNTER__CLOCK_TYPE & DISC_COUNTER_IS_7492)
{
context->is_7492 = 1;
context->clock_type = (int)DSS_7492__CLOCK_TYPE;
context->clock_type = DSS_7492__CLOCK_TYPE;
context->max = 5;
context->min = 0;
context->diff = 6;
}
else
{
context->is_7492 = 0;
context->clock_type = (int)DSS_COUNTER__CLOCK_TYPE;
context->clock_type = DSS_COUNTER__CLOCK_TYPE;
context->max = DSS_COUNTER__MAX;
context->min = DSS_COUNTER__MIN;
context->diff = context->max - context->min + 1;
}
context->out_type = context->clock_type & DISC_OUT_MASK;
context->clock_type &= DISC_CLK_MASK;
context->t_left = 0;
context->last = 0;
context->count = DSS_COUNTER__INIT; /* count starts at reset value */
node->output[0] = DSS_COUNTER__INIT;
node->output[0] = DSS_COUNTER__INIT; /* count starts at reset value */
}
@ -1247,10 +1264,10 @@ static DISCRETE_RESET(dss_sawtoothwave)
/* Establish starting phase, convert from degrees to radians */
start = (DSS_SAWTOOTHWAVE__PHASE / 360.0) * (2.0 * M_PI);
/* Make sure its always mod 2Pi */
context->phase=fmod(start, 2.0 * M_PI);
context->phase = fmod(start, 2.0 * M_PI);
/* Invert gradient depending on sawtooth type /|/|/|/|/| or |\|\|\|\|\ */
context->type=(DSS_SAWTOOTHWAVE__GRAD) ? 1 : 0;
context->type = (DSS_SAWTOOTHWAVE__GRAD) ? 1 : 0;
/* Step the node to set the output */
DISCRETE_STEP_CALL(dss_sawtoothwave);

9
src/emu/sound/discrete.h
View File

@ -201,7 +201,7 @@
* DISCRETE_INPUT_STREAM(NODE, NUM)
* DISCRETE_INPUTX_STREAM(NODE,NUM, GAIN,OFFSET)
*
* DISCRETE_COUNTER(NODE,ENAB,RESET,CLK,MAX,DIR,INIT0,CLKTYPE)
* DISCRETE_COUNTER(NODE,ENAB,RESET,CLK,MIN,MAX,DIR,INIT0,CLKTYPE)
* DISCRETE_COUNTER_7492(NODE,ENAB,RESET,CLK,CLKTYPE)
* DISCRETE_LFSR_NOISE(NODE,ENAB,RESET,CLK,AMPL,FEED,BIAS,LFSRTB)
* DISCRETE_NOISE(NODE,ENAB,FREQ,AMP,BIAS)
@ -461,7 +461,7 @@
*
* DISCRETE_COUNTER - up/down counter.
*
* This counter counts up/down from 0 to MAX. When the enable is low, the output
* This counter counts up/down from MIN to MAX. When the enable is low, the output
* is held at it's last value. When reset is high, the reset value is loaded
* into the output. The counter can be clocked internally or externally. It also
* supports x_time used by the clock modules to pass on anti-aliasing info.
@ -491,6 +491,7 @@
* enable node or static value,
* reset node or static value, (reset when TRUE)
* clock node or static value,
* min count static value,
* max count static value,
* direction node or static value,
* reset value node or static value,
@ -4403,8 +4404,8 @@ enum
/* from disc_wav.c */
/* generic modules */
#define DISCRETE_COUNTER(NODE,ENAB,RESET,CLK,MAX,DIR,INIT0,CLKTYPE) { NODE, DSS_COUNTER , 7, { ENAB,RESET,CLK,NODE_NC,DIR,INIT0,NODE_NC }, { ENAB,RESET,CLK,MAX,DIR,INIT0,CLKTYPE }, NULL, "DISCRETE_COUNTER" },
#define DISCRETE_COUNTER_7492(NODE,ENAB,RESET,CLK,CLKTYPE) { NODE, DSS_COUNTER , 7, { ENAB,RESET,CLK,NODE_NC,NODE_NC,NODE_NC,NODE_NC }, { ENAB,RESET,CLK,CLKTYPE,1,0,DISC_COUNTER_IS_7492 }, NULL, "DISCRETE_COUNTER_7492" },
#define DISCRETE_COUNTER(NODE,ENAB,RESET,CLK,MIN,MAX,DIR,INIT0,CLKTYPE) { NODE, DSS_COUNTER , 8, { ENAB,RESET,CLK,NODE_NC,NODE_NC,DIR,INIT0,NODE_NC }, { ENAB,RESET,CLK,MIN,MAX,DIR,INIT0,CLKTYPE }, NULL, "DISCRETE_COUNTER" },
#define DISCRETE_COUNTER_7492(NODE,ENAB,RESET,CLK,CLKTYPE) { NODE, DSS_COUNTER , 8, { ENAB,RESET,CLK,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC }, { ENAB,RESET,CLK,CLKTYPE,0,1,0,DISC_COUNTER_IS_7492 }, NULL, "DISCRETE_COUNTER_7492" },
#define DISCRETE_LFSR_NOISE(NODE,ENAB,RESET,CLK,AMPL,FEED,BIAS,LFSRTB) { NODE, DSS_LFSR_NOISE , 6, { ENAB,RESET,CLK,AMPL,FEED,BIAS }, { ENAB,RESET,CLK,AMPL,FEED,BIAS }, LFSRTB, "DISCRETE_LFSR_NOISE" },
#define DISCRETE_NOISE(NODE,ENAB,FREQ,AMPL,BIAS) { NODE, DSS_NOISE , 4, { ENAB,FREQ,AMPL,BIAS }, { ENAB,FREQ,AMPL,BIAS }, NULL, "DISCRETE_NOISE" },
#define DISCRETE_NOTE(NODE,ENAB,CLK,DATA,MAX1,MAX2,CLKTYPE) { NODE, DSS_NOTE , 6, { ENAB,CLK,DATA,NODE_NC,NODE_NC,NODE_NC }, { ENAB,CLK,DATA,MAX1,MAX2,CLKTYPE }, NULL, "DISCRETE_NOTE" },

2
src/mame/audio/8080bw.c
View File

@ -498,7 +498,7 @@ DISCRETE_SOUND_START(polaris)
*
******************************************************************************/
DISCRETE_SQUAREWFIX(NODE_40, 1, 60.0/16, 1, 50, 1.0/2, 0) // IC 5L, pin 6
DISCRETE_COUNTER(NODE_41, 1, 0, NODE_40, 31, 1, 0, DISC_CLK_ON_F_EDGE) // IC 5L & 5F
DISCRETE_COUNTER(NODE_41, 1, 0, NODE_40, 0, 31, 1, 0, DISC_CLK_ON_F_EDGE) // IC 5L & 5F
DISCRETE_TRANSFORM2(NODE_42, NODE_41, 4, "01&") // IC 5L, pin 9
DISCRETE_TRANSFORM2(NODE_43, NODE_41, 16, "01&!") // IC 5F, pin 8
DISCRETE_ONESHOT(NODE_44, NODE_43, 1, 0.0015, DISC_ONESHOT_REDGE | DISC_ONESHOT_NORETRIG | DISC_OUT_ACTIVE_HIGH)

123
src/mame/audio/bzone.c
View File

@ -27,12 +27,15 @@ D0 explosion enable gates a noise generator
#define BZ_NOISE_CLOCK 12000
#define TTL_OUT 3.4
/*************************************
*
* Discrete Sound Defines
*
*************************************/
/* Discrete Sound Input Nodes */
#define BZ_INPUT NODE_01 /* at M2 LS273 */
#define BZ_INP_EXPLO NODE_10_00
#define BZ_INP_EXPLOLS NODE_10_01
@ -43,16 +46,22 @@ D0 explosion enable gates a noise generator
#define BZ_INP_STARTLED NODE_10_06
#define BZ_INP_MOTEN NODE_10_07
#define TTL_OUT 3.4
/* Adjusters */
#define BZ_R11_POT NODE_11
/* Discrete Sound Output Nodes */
#define BZ_NOISE NODE_20
#define BZ_SHELL_SND NODE_21
#define BZ_EXPLOSION_SND NODE_22
#define BZ_ENGINE_SND NODE_23
#define BZ_POKEY_SND NODE_24
/* Parts List - Resistors */
#define BZ_R5 RES_K(1)
#define BZ_R6 RES_K(4.7)
#define BZ_R7 RES_K(1)
#define BZ_R8 RES_K(100)
#define BZ_R9 RES_K(22)
//#define RT (1.0/BZ_R5 + 1.0/BZ_R6 * 1.0/BZ_R7)
#define BZ_R10 RES_K(100)
#define BZ_R11 RES_K(250)
#define BZ_R12 RES_K(33)
@ -63,7 +72,6 @@ D0 explosion enable gates a noise generator
#define BZ_R17 RES_K(22)
#define BZ_R18 RES_K(10)
#define BZ_R19 RES_K(33)
#define BZ_R20 RES_K(33)
#define BZ_R21 RES_K(33)
#define BZ_R25 RES_K(100)
@ -71,18 +79,16 @@ D0 explosion enable gates a noise generator
#define BZ_R27 RES_K(330)
#define BZ_R28 RES_K(100)
#define BZ_R29 RES_K(22)
#define BZ_R32 RES_K(330)
#define BZ_R33 RES_K(330)
#define BZ_R34 RES_K(33)
#define BZ_R35 RES_K(33)
/* Parts List - Capacitors */
#define BZ_C9 CAP_U(4.7)
#define BZ_C11 CAP_U(0.015)
#define BZ_C13 CAP_U(10)
#define BZ_C14 CAP_U(10)
#define BZ_C20 CAP_U(0.1)
#define BZ_C21 CAP_U(0.0047)
#define BZ_C22 CAP_U(0.0047)
@ -272,11 +278,11 @@ static DISCRETE_SOUND_START(bzone)
/* Input register mapping for Battlezone */
/************************************************/
DISCRETE_INPUT_DATA(BZ_INPUT)
/* decode the bits */
DISCRETE_BITS_DECODE(NODE_10, BZ_INPUT, 0, 7, 1) /* QA-QD 74393 */
DISCRETE_BITS_DECODE(NODE_10, BZ_INPUT, 0, 7, 1) /* IC M2, bits 0 - 7 */
/* the pot is 250K, but we will use a smaller range to get a better adjustment range */
DISCRETE_ADJUSTMENT_TAG(NODE_11, RES_K(75), RES_K(10), DISC_LINADJ, "R11")
DISCRETE_ADJUSTMENT_TAG(BZ_R11_POT, RES_K(75), RES_K(10), DISC_LINADJ, "R11")
/************************************************/
@ -284,76 +290,91 @@ static DISCRETE_SOUND_START(bzone)
/************************************************/
/* 12Khz clock is divided by two by B4 74LS109 */
DISCRETE_LFSR_NOISE(NODE_30, 1, 1, BZ_NOISE_CLOCK / 2, 1.0, 0, 0.5, &bzone_lfsr)
DISCRETE_LFSR_NOISE(BZ_NOISE, /* IC H4, pin 13 */
1, 1, BZ_NOISE_CLOCK / 2, 1.0, 0, 0.5, &bzone_lfsr)
/* divide by 2 */
DISCRETE_COUNTER(NODE_31, 1, 0, NODE_30, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE)
DISCRETE_COUNTER(NODE_31, /* IC J5, pin 8 */
1, 0, BZ_NOISE, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE)
DISCRETE_BITS_DECODE(NODE_32_00, NODE_30_01, 11, 14, 1) /* to NAND LS20, J4 */
/* 11-14 */
DISCRETE_LOGIC_NAND4(NODE_33, NODE_32_00, NODE_32_01, NODE_32_02, NODE_32_03)
DISCRETE_BITS_DECODE(NODE_32, NODE_SUB(BZ_NOISE, 1), 11, 14, 1) /* IC H4, pins 6, 10, 11, 12 */
DISCRETE_LOGIC_NAND4(NODE_33, /* IC J4, pin 8 */
NODE_32_00, NODE_32_01, NODE_32_02, NODE_32_03) /* LSFR bits 11-14 */
/* divide by 2 */
DISCRETE_COUNTER(NODE_34, 1, 0, NODE_33, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE)
DISCRETE_COUNTER(NODE_34, /* IC J5, pin 6 */
1, 0, NODE_33, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE)
/************************************************/
/* Shell */
/************************************************/
DISCRETE_RC_CIRCUIT_1(NODE_40, /* IC J3, pin 9 */
BZ_INP_SHELL, NODE_31, /* INP0, INP1 */
BZ_R14 + BZ_R15, BZ_C9)
DISCRETE_CUSTOM9(BZ_SHELL_SND, /* IC K5, pin 1 */
BZ_INP_EXPLOLS, NODE_40, /* IN0, IN1 */
BZ_R12, BZ_R13, BZ_R14, BZ_R15, BZ_R32,
BZ_C21,
22, /* B+ of op-amp */
&bzone_custom_filter)
/************************************************/
/* Explosion */
/************************************************/
DISCRETE_RC_CIRCUIT_1(NODE_40,
BZ_INP_EXPLO, NODE_34, /* INP0, INP1 */
DISCRETE_RC_CIRCUIT_1(NODE_50, /* IC J3, pin 3 */
BZ_INP_EXPLO, NODE_34, /* INP0, INP1 */
BZ_R17 + BZ_R16, BZ_C14)
DISCRETE_CUSTOM9(NODE_45, /* IC K5, pin 1 */
BZ_INP_EXPLOLS, NODE_40, /* IN0, IN1 */
DISCRETE_CUSTOM9(BZ_EXPLOSION_SND, /* IC K5, pin 1 */
BZ_INP_EXPLOLS, NODE_50, /* IN0, IN1 */
BZ_R19, BZ_R18, BZ_R17, BZ_R16, BZ_R33,
BZ_C22,
22, /* B+ of op-amp */
22, /* B+ of op-amp */
&bzone_custom_filter)
/************************************************/
/* Shell */
/************************************************/
DISCRETE_RC_CIRCUIT_1(NODE_50,
BZ_INP_SHELL, NODE_31, /* INP0, INP1 */
BZ_R14 + BZ_R15, BZ_C9)
DISCRETE_MULTIPLY(NODE_51, RES_VOLTAGE_DIVIDER(BZ_R14, BZ_R15), NODE_50)
DISCRETE_CUSTOM9(NODE_55, /* IC K5, pin 1 */
BZ_INP_EXPLOLS, NODE_50, /* IN0, IN1 */
BZ_R12, BZ_R13, BZ_R14, BZ_R15, BZ_R32,
BZ_C21,
22, /* B+ of op-amp */
&bzone_custom_filter)
/************************************************/
/* Engine */
/************************************************/
DISCRETE_SWITCH(NODE_61,
DISCRETE_SWITCH(NODE_61, /* effect of IC L4, pin 2 */
1, BZ_INP_ENGREV, /* ENAB, SWITCH */
5.0 * RES_VOLTAGE_DIVIDER(BZ_R7, BZ_R6), /* INP0 */
5.0 * RES_VOLTAGE_DIVIDER(BZ_R7, RES_2_PARALLEL(CD4066_R_ON + BZ_R5, BZ_R6))) /* INP1 */
DISCRETE_RCDISC3(NODE_62, 1, NODE_61, BZ_R8, BZ_R9, BZ_C13, -0.5)
/* R5, R6, R7 all affect the following circuit charge discharge rates */
/* they are not emulated as their effect is less the the 5% component tolerance */
DISCRETE_RCDISC3(NODE_62, /* IC K5, pin 7 */
1, NODE_61, BZ_R8, BZ_R9, BZ_C13, -0.5)
/* R11 taken from adjuster port */
DISCRETE_555_ASTABLE_CV(NODE_63, 1, BZ_R10, NODE_11, BZ_C11, NODE_62, &bzone_vco_desc)
DISCRETE_555_ASTABLE_CV(NODE_63, /* IC F3, pin 3 */
1, /* RESET */
BZ_R10, BZ_R11_POT, BZ_C11,
NODE_62, /* CV - IC F3, pin 5 */
&bzone_vco_desc)
/* two LS161, reset to 4 resp 6 counting up to 15, QD and ripple carry mixed */
DISCRETE_COUNTER(NODE_65, BZ_INP_MOTEN, 0, NODE_63, 11, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE)
DISCRETE_TRANSFORM2(NODE_66, NODE_65, 3, "01>") /* QD */
DISCRETE_TRANSFORM2(NODE_67, NODE_65, 11, "01=") /* Ripple */
DISCRETE_LOGIC_INVERT(NODE_64, BZ_INP_MOTEN)
DISCRETE_COUNTER(NODE_65, /* IC F4 */
1, NODE_64, NODE_63, /* ENAB, RESET, CLK */
4, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* MIN, MAX, DIR, INIT, CLKTYPE */
DISCRETE_TRANSFORM2(NODE_66, NODE_65, 7, "01>") /* QD - IC F4, pin 11 */
DISCRETE_TRANSFORM2(NODE_67, NODE_65, 15, "01=") /* Ripple - IC F4, pin 15 */
DISCRETE_COUNTER(NODE_68, BZ_INP_MOTEN, 0, NODE_63, 9, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE)
DISCRETE_TRANSFORM2(NODE_69, NODE_68, 1, "01>") /* QD */
DISCRETE_TRANSFORM2(NODE_70, NODE_68, 9, "01=") /* Ripple */
DISCRETE_COUNTER(NODE_68, /* IC F5 */
1, NODE_64, NODE_63, /* ENAB, RESET, CLK */
6, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* MIN, MAX, DIR, INIT, CLKTYPE */
DISCRETE_TRANSFORM2(NODE_69, NODE_68, 7, "01>") /* QD - IC F5, pin 11 */
DISCRETE_TRANSFORM2(NODE_70, NODE_68, 15, "01=") /* Ripple - IC F5, pin 15 */
DISCRETE_MIXER4(NODE_75, 1, NODE_66, NODE_67, NODE_69, NODE_70, &bzone_eng_mixer_desc)
DISCRETE_MIXER4(BZ_ENGINE_SND, 1, NODE_66, NODE_67, NODE_69, NODE_70, &bzone_eng_mixer_desc)
/************************************************/
/* FINAL MIX */
/************************************************/
/* not sure about pokey output levels - below is just a estimate to get a 5V signal */
DISCRETE_INPUTX_STREAM(NODE_85, 0, 5.0 / 11000, 0)
DISCRETE_MIXER4(NODE_280, 1, NODE_55, NODE_45, NODE_75, NODE_85, &bzone_final_mixer_desc)
DISCRETE_INPUTX_STREAM(BZ_POKEY_SND, 0, 5.0 / 11000, 0)
DISCRETE_MIXER4(NODE_280,
BZ_INP_SOUNDEN,
BZ_SHELL_SND, BZ_EXPLOSION_SND, BZ_ENGINE_SND, BZ_POKEY_SND,
&bzone_final_mixer_desc)
DISCRETE_OUTPUT(NODE_280, 50000)
DISCRETE_SOUND_END

6
src/mame/audio/dkong.c
View File

@ -369,7 +369,7 @@ static DISCRETE_SOUND_START(dkong2b)
/* Noise */
DISCRETE_TASK_START(1)
DISCRETE_LFSR_NOISE(NODE_11, 1, 1, CLOCK_2VF, 1.0, 0, 0.5, &dkong_lfsr)
DISCRETE_COUNTER(NODE_12, 1, 0, NODE_11, 7, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* LS161, IC 3J */
DISCRETE_COUNTER(NODE_12, 1, 0, NODE_11, 0, 7, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* LS161, IC 3J */
DISCRETE_TRANSFORM3(NODE_13,NODE_12,3,DK_SUP_V,"01>2*")
/* Stomp */
@ -662,7 +662,7 @@ static DISCRETE_SOUND_START(radarscp)
DISCRETE_LFSR_NOISE(NODE_11, 1, 1, CLOCK_2VF, 1.0, 0, 0.5, &dkong_lfsr)
/* Clear (1) from SOUND6 */
DISCRETE_COUNTER(NODE_12, 1, DS_SOUND6_INV, NODE_11, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* LS161, IC 3J */
DISCRETE_COUNTER(NODE_12, 1, DS_SOUND6_INV, NODE_11, 0, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* LS161, IC 3J */
DISCRETE_TRANSFORM3(NODE_13,NODE_12,0x04,DK_SUP_V,"01&1=2*") /*QC => SND02 */
DISCRETE_TRANSFORM3(NODE_14,NODE_12,0x02,DK_SUP_V,"01&1=2*") /*QB => SND01 */
@ -892,7 +892,7 @@ static DISCRETE_SOUND_START(dkongjr)
DISCRETE_TASK_START(1)
DISCRETE_LOGIC_INVERT(DS_SOUND7,DS_SOUND7_INV)
DISCRETE_COUNTER(NODE_100,1,0,NODE_118,0xFFFF,DISC_COUNT_UP,0,DISC_CLK_BY_COUNT)
DISCRETE_COUNTER(NODE_100, 1, 0, NODE_118, 0, 0xFFFF, DISC_COUNT_UP, 0, DISC_CLK_BY_COUNT)
DISCRETE_BIT_DECODE(NODE_101, NODE_100, 6, 1) /*LS157 2A */
DISCRETE_BIT_DECODE(NODE_102, NODE_100, 3, 1) /*LS157 2B */

10
src/mame/audio/firetrk.c
View File

@ -225,7 +225,7 @@ DISCRETE_SOUND_START(firetrk)
DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC A9, pin 8
DISCRETE_COUNTER(NODE_25, 1, FIRETRUCK_ATTRACT_EN, // IC A9, pin 12
NODE_24, // from IC A9, pin 8
1, 1, 0, DISC_CLK_ON_F_EDGE)
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
DISCRETE_TRANSFORM3(NODE_26, NODE_23, 2, NODE_25, "01*2+") // Mix QA and QB-D together
DISCRETE_DAC_R1(FIRETRUCK_MOTORSND, NODE_26,
DEFAULT_TTL_V_LOGIC_1,
@ -293,7 +293,7 @@ DISCRETE_SOUND_START(firetrk)
DISCRETE_TRANSFORM2(NODE_71, NODE_70,
5.0 * 680 / (RES_K(10) + 680), // vRef = 5V * R64 / (R65 + R64)
"01<") // Output is low until vIn drops below vRef
DISCRETE_COUNTER(NODE_72, 1, NODE_71, FIRETRUCK_HSYNC, 15, 1, 0, DISC_CLK_IS_FREQ) // IC B10
DISCRETE_COUNTER(NODE_72, 1, NODE_71, FIRETRUCK_HSYNC, 0, 15, 1, 0, DISC_CLK_IS_FREQ) // IC B10
DISCRETE_TRANSFORM4(FIRETRUCK_BELLSND, NODE_72,
8, // count 0-7 allow cap voltage to output. 8-15 ground output.
NODE_70, // scale logic to cap voltage
@ -430,7 +430,7 @@ DISCRETE_SOUND_START(superbug)
DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25) // Gate A9, pin 8
DISCRETE_COUNTER(NODE_27, 1, SUPERBUG_ATTRACT_EN, // IC A7, pin 12-QA
NODE_26, // from IC A9, pin 8
1, 1, 0, DISC_CLK_ON_F_EDGE)
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+") // Mix QA and QB-D together
DISCRETE_DAC_R1(SUPERBUG_MOTORSND, NODE_28,
DEFAULT_TTL_V_LOGIC_1,
@ -614,7 +614,7 @@ DISCRETE_SOUND_START(montecar)
DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25) // Gate A9, pin 11
DISCRETE_COUNTER(NODE_27, 1, MONTECAR_ATTRACT_EN, // IC B/C9, pin 12-QA
NODE_26, // from IC A9, pin 11
1, 1, 0, DISC_CLK_ON_F_EDGE)
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+") // Mix QA and QB-D together
DISCRETE_DAC_R1(MONTECAR_MOTORSND, NODE_28,
DEFAULT_TTL_V_LOGIC_1,
@ -649,7 +649,7 @@ DISCRETE_SOUND_START(montecar)
DISCRETE_LOGIC_XOR(NODE_46, NODE_44, NODE_45) // Gate A9, pin 6
DISCRETE_COUNTER(NODE_47, 1, MONTECAR_ATTRACT_EN, // IC A/B9, pin 12-QA
NODE_46, // from IC A9, pin 6
1, 1, 0, DISC_CLK_ON_F_EDGE)
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
DISCRETE_TRANSFORM3(NODE_48, NODE_43, 2, NODE_47, "01*2+") // Mix QA and QB-D together
DISCRETE_DAC_R1(MONTECAR_DRONE_MOTORSND, NODE_48,
DEFAULT_TTL_V_LOGIC_1,

2
src/mame/audio/galaxian.c
View File

@ -311,7 +311,7 @@ static DISCRETE_SOUND_START(galaxian)
*
* One possibility to implement this is
* DISCRETE_TRANSFORM3(NODE_130, SOUND_CLOCK, 256, GAL_INP_PITCH, "012-/")
* DISCRETE_COUNTER(NODE_132, 1, 0, NODE_130, 15, DISC_COUNT_UP, 0, DISC_CLK_IS_FREQ)
* DISCRETE_COUNTER(NODE_132, 1, 0, NODE_130, 0, 15, DISC_COUNT_UP, 0, DISC_CLK_IS_FREQ)
* but there is a native choice:
*/
DISCRETE_NOTE(NODE_132, 1, SOUND_CLOCK, GAL_INP_PITCH, 255, 15, DISC_CLK_IS_FREQ)

2
src/mame/audio/hitme.c
View File

@ -58,7 +58,7 @@ DISCRETE_SOUND_START(hitme)
/* There are 2 cascaded 4-bit downcounters (2R = low, 2P = high), effectively
* making an 8-bit downcounter, clocked by the clock from the 404 chip.
* The initial count is latched by writing OUT0. */
DISCRETE_COUNTER(NODE_20,1,HITME_OUT0,NODE_17,255,0,HITME_DOWNCOUNT_VAL,DISC_CLK_ON_F_EDGE)
DISCRETE_COUNTER(NODE_20,1,HITME_OUT0,NODE_17,0,255,0,HITME_DOWNCOUNT_VAL,DISC_CLK_ON_F_EDGE)
/* When the counter rolls over from 0->255, we clock a D-type flipflop at 2N. */
DISCRETE_TRANSFORM2(NODE_21,NODE_20,255,"01=!")

4
src/mame/audio/madalien.c
View File

@ -219,7 +219,7 @@ DISCRETE_SOUND_START( madalien )
DISCRETE_COUNTER(NODE_54, 1,
NODE_53, // pin 7 in
NODE_52, // pin 1 in
15, 1, 0, DISC_CLK_BY_COUNT) // 4-bit binary up counter
0, 15, 1, 0, DISC_CLK_BY_COUNT) // 4-bit binary up counter
DISCRETE_DAC_R1(NODE_55, NODE_54, DEFAULT_TTL_V_LOGIC_1, &madalien_effect1a_dac)
DISCRETE_DAC_R1(NODE_56, NODE_54, DEFAULT_TTL_V_LOGIC_1, &madalien_effect1b_dac)
DISCRETE_RCFILTER(NODE_57, NODE_56, RES_K(22)/2 + RES_K(22), CAP_U(.033))
@ -246,7 +246,7 @@ DISCRETE_SOUND_START( madalien )
DISCRETE_COUNTER(NODE_67, 1,
NODE_66, // pin 7 in
NODE_65, // pin 1 in
15, 1, 0, DISC_CLK_BY_COUNT) // 4-bit binary up counter
0, 15, 1, 0, DISC_CLK_BY_COUNT) // 4-bit binary up counter
DISCRETE_DAC_R1(NODE_68, NODE_67, DEFAULT_TTL_V_LOGIC_1, &madalien_effect2_dac)
/************************************************

2
src/mame/audio/mario.c
View File

@ -379,7 +379,7 @@ static DISCRETE_SOUND_START(mario)
/************************************************/
DISCRETE_TASK_START(1)
DISCRETE_COUNTER(NODE_100,1,0,NODE_118,0xFFFF,DISC_COUNT_UP,0,DISC_CLK_BY_COUNT)
DISCRETE_COUNTER(NODE_100,1,0,NODE_118,0,0xFFFF,DISC_COUNT_UP,0,DISC_CLK_BY_COUNT)
DISCRETE_BIT_DECODE(NODE_102, NODE_100, 3, 1) //LS157 2B
DISCRETE_BIT_DECODE(NODE_104, NODE_100, 11, TTL_HIGH) //LS157 3B

2
src/mame/audio/mw8080bw.c
View File

@ -4414,7 +4414,7 @@ static DISCRETE_SOUND_START(blueshrk)
DISCRETE_COUNTER(NODE_40, /* IC H3, pin 5 */
1, BLUESHRK_HIT_EN, /* ENAB,RESET */
FREQ_OF_555(BLUESHRK_R601, 0, BLUESHRK_C600), /* CLK - IC H1, pin 9 */
1, DISC_COUNT_UP, 0, /* MAX,DIR,INIT0 */
0,1, DISC_COUNT_UP, 0, /* MIN,MAX,DIR,INIT0 */
DISC_CLK_IS_FREQ)
DISCRETE_SWITCH(NODE_41, /* value of toggled caps */
1, /* ENAB */

8
src/mame/audio/poolshrk.c
View File

@ -92,7 +92,7 @@ DISCRETE_SOUND_START(poolshrk)
NODE_31, // Clock enabled by F8, pin 13
POOLSHRK_SCORE_EN, // Reset/triggered by score
15750.0/2.0/64.0, // 64V signal
15, 1, // 4 bit binary up counter
0, 15, 1, // 4 bit binary up counter
0, DISC_CLK_IS_FREQ) // Cleared to 0
DISCRETE_TRANSFORM2(NODE_31, NODE_30, 15, "01=!") // TC output of E8, pin 15. (inverted)
@ -108,8 +108,8 @@ DISCRETE_SOUND_START(poolshrk)
0, 0, 0, // No rBias, rGnd or rDischarge
&poolshrk_score_vco)
DISCRETE_COUNTER(NODE_34, 1, 0, // IC D9, pin 9
NODE_33, // from IC C9, pin 3
1, 1, 0, DISC_CLK_ON_R_EDGE) // /2 counter on rising edge
NODE_33, // from IC C9, pin 3
0, 1, 1, 0, DISC_CLK_ON_R_EDGE) // /2 counter on rising edge
DISCRETE_GAIN(POOLSHRK_SCORE_SND, NODE_34, 3.4)
@ -136,7 +136,7 @@ DISCRETE_SOUND_START(poolshrk)
NODE_42, // Clock enabled by F8, pin 1
NODE_40, // Reset/triggered by K9, pin 11
15750.0/2.0/2.0, // 2V signal
15, 1, // 4 bit binary up counter
0, 15, 1, // 4 bit binary up counter
0, DISC_CLK_IS_FREQ) // Cleared to 0
DISCRETE_TRANSFORM2(NODE_42, NODE_41, 15, "01=!") // TC output of J9, pin 15. Modified to function as F8 clock enable
DISCRETE_TRANSFORM3(POOLSHRK_CLICK_SND, NODE_41, 1, 3.4, "01&2*") // Q0 output of J9, pin 14. Set to proper amplitude

6
src/mame/audio/sprint2.c
View File

@ -147,7 +147,7 @@ DISCRETE_SOUND_START(sprint2)
DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25)
/* QA of 7492 */
DISCRETE_COUNTER(NODE_27, 1, SPRINT2_ATTRACT_EN, NODE_26, 1, 1, 0, DISC_CLK_ON_F_EDGE)
DISCRETE_COUNTER(NODE_27, 1, SPRINT2_ATTRACT_EN, NODE_26, 0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
/* Mix QA and QB-D together */
DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+")
@ -185,7 +185,7 @@ DISCRETE_SOUND_START(sprint2)
DISCRETE_LOGIC_XOR(NODE_46, NODE_44, NODE_45)
/* QA of 7492 */
DISCRETE_COUNTER(NODE_47, 1, SPRINT2_ATTRACT_EN, NODE_46, 1, 1, 0, DISC_CLK_ON_F_EDGE)
DISCRETE_COUNTER(NODE_47, 1, SPRINT2_ATTRACT_EN, NODE_46, 0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
/* Mix QA and QB-D together */
DISCRETE_TRANSFORM3(NODE_48, NODE_43, 2, NODE_47, "01*2+")
@ -270,7 +270,7 @@ DISCRETE_SOUND_START(sprint1)
DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25)
/* QA of 7492 */
DISCRETE_COUNTER(NODE_27, 1, SPRINT2_ATTRACT_EN, NODE_26, 1, 1, 0, DISC_CLK_ON_F_EDGE)
DISCRETE_COUNTER(NODE_27, 1, SPRINT2_ATTRACT_EN, NODE_26, 0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
/* Mix QA and QB-D together */
DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+")

2
src/mame/audio/sprint4.c
View File

@ -200,7 +200,7 @@ static const discrete_mixer_desc sprint4_mixer =
1, /* ENAB */ \
SPRINT4_ATTRACT_EN, /* RESET */ \
SPRINT4_PLAYER_MOTOR_NODE(5, _plr), /* CLK */ \
1, /* MAX */ \
0, 1, /* MIN, MAX */ \
DISC_COUNT_UP, /* DIR */ \
0, /* INIT0 */ \
DISC_CLK_ON_F_EDGE) /* CLKTYPE */ \

4
src/mame/audio/triplhnt.c
View File

@ -146,14 +146,14 @@ DISCRETE_SOUND_START(triplhnt)
&triplhnt_bear_roar_vco)
DISCRETE_COUNTER(NODE_23, 1, TRIPLHNT_BEAR_EN, // IC B6, QB-QD
NODE_22, // from IC C11, pin 3
5, 1, 0, DISC_CLK_ON_R_EDGE) // /6 counter on rising edge
0, 5, 1, 0, DISC_CLK_ON_R_EDGE) // /6 counter on rising edge
DISCRETE_TRANSFORM2(NODE_24, NODE_23, 2, "01>") // IC B6, pin 8
DISCRETE_LOGIC_INVERT(NODE_25, NODE_22) // IC D9, pin 3
DISCRETE_LOGIC_NAND(NODE_26, NODE_25, TRIPLHNT_NOISE) // IC D9, pin 11
DISCRETE_LOGIC_XOR(NODE_27, NODE_24, NODE_26) // IC B8, pin 6
DISCRETE_COUNTER(NODE_28, 1, TRIPLHNT_BEAR_EN, // IC B6, pin 12
NODE_27, // from IC B8, pin 6
1, 1, 0, DISC_CLK_ON_R_EDGE) // /2 counter on rising edge
0, 1, 1, 0, DISC_CLK_ON_R_EDGE) // /2 counter on rising edge
DISCRETE_TRANSFORM5(NODE_29, NODE_24, NODE_28, NODE_26, 2, 4, "13*24*+0+") // Mix the mess together in binary
DISCRETE_DAC_R1(TRIPLHNT_BEAR_ROAR_SND, NODE_29,
DEFAULT_TTL_V_LOGIC_1,

4
src/mame/audio/turbo.c
View File

@ -670,11 +670,11 @@ DISCRETE_SOUND_START(turbo)
// 5-5-5 counter provides the input clock
DISCRETE_555_ASTABLE(NODE_50,1,470,120,0.1e-6,&turbo_alarm_555)
// which clocks a 74393 dual 4-bit counter, clocked on the falling edge
DISCRETE_COUNTER(NODE_51,1,0,NODE_50,15,1,0,DISC_CLK_ON_F_EDGE)
DISCRETE_COUNTER(NODE_51,1,0,NODE_50,0,15,1,0,DISC_CLK_ON_F_EDGE)
// the high bit of this counter
DISCRETE_TRANSFORM2(NODE_52,NODE_51,8,"01/")
// clocks the other half of the 74393
DISCRETE_COUNTER(NODE_53,1,0,NODE_52,15,1,0,DISC_CLK_ON_F_EDGE)
DISCRETE_COUNTER(NODE_53,1,0,NODE_52,0,15,1,0,DISC_CLK_ON_F_EDGE)
// trig1 triggers a LS123 retriggerable multivibrator
DISCRETE_ONESHOT(NODE_60,TURBO_TRIG1_INV,5.0,(0.33e-9)*47*1e6, DISC_ONESHOT_FEDGE|DISC_ONESHOT_RETRIG|DISC_OUT_ACTIVE_HIGH)

16
src/mame/audio/vicdual.c
View File

@ -351,9 +351,9 @@ static DISCRETE_SOUND_START(headon)
#define HO_C31 CAP_N(100)
DISCRETE_555_CC(NODE_25, HEADON_CAR_ON_EN, NODE_22, HO_R56, HO_C31, 0, 0, HO_R72, &headon_555cc)
DISCRETE_COUNTER(NODE_26, 1, 0, NODE_25, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 2
DISCRETE_COUNTER(NODE_27, 1, 0, NODE_25, 3, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 4
DISCRETE_COUNTER(NODE_28, 1, 0, NODE_25, 2, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 3
DISCRETE_COUNTER(NODE_26, 1, 0, NODE_25, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 2
DISCRETE_COUNTER(NODE_27, 1, 0, NODE_25, 0, 3, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 4
DISCRETE_COUNTER(NODE_28, 1, 0, NODE_25, 0, 2, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 3
DISCRETE_TRANSFORM5(NODE_29,NODE_26,NODE_27,NODE_28,1,2,"13>24=+0+")
DISCRETE_MULTIPLY(HEADON_PLAYER_CAR_OUT, NODE_29, 12 / 3)
@ -370,9 +370,9 @@ static DISCRETE_SOUND_START(headon)
#define HO_C20 CAP_N(100)
DISCRETE_555_CC(NODE_35, HEADON_CAR_ON_EN, NODE_32, HO_R43, HO_C20, 0, 0, HO_R35, &headon_555cc)
DISCRETE_COUNTER(NODE_36, 1, 0, NODE_35, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 2
DISCRETE_COUNTER(NODE_37, 1, 0, NODE_35, 3, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 4
DISCRETE_COUNTER(NODE_38, 1, 0, NODE_35, 2, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 3
DISCRETE_COUNTER(NODE_36, 1, 0, NODE_35, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 2
DISCRETE_COUNTER(NODE_37, 1, 0, NODE_35, 0, 3, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 4
DISCRETE_COUNTER(NODE_38, 1, 0, NODE_35, 0, 2, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 3
DISCRETE_TRANSFORM5(NODE_39,NODE_36,NODE_37,NODE_38,1,2,"13>24=+0+")
DISCRETE_MULTIPLY(HEADON_COMP_CAR_OUT, NODE_39, 12 / 3)
@ -550,8 +550,8 @@ DISCRETE_SOUND_START(brdrline)
RES_K(33), // R153
CAP_U(.1), // C72
OPTIONS)
DISCRETE_COUNTER(NODE_21, 1, 1, NODE_20,MAX,DIR,INIT0, DISC_CLK_BY_COUNT)
DISCRETE_COUNTER(NODE_22, 1, 1, NODE_20,MAX,DIR,INIT0, DISC_CLK_BY_COUNT)
DISCRETE_COUNTER(NODE_21, 1, 1, NODE_20,MIN,MAX,DIR,INIT0, DISC_CLK_BY_COUNT)
DISCRETE_COUNTER(NODE_22, 1, 1, NODE_20,MIN,MAX,DIR,INIT0, DISC_CLK_BY_COUNT)
DISCRETE_TRANSFORM3(NODE,INP0,INP1,INP2,FUNCT)
DISCRETE_DAC_R1(NODE,DATA,VDATA,LADDER)