mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
menghong.cpp, trivrus.cpp: got rid of auto_alloc_array and tagmap lookups
This commit is contained in:
Ivan Vangelista
parent
2e749cdd86
commit
2333683549
@ -70,14 +70,17 @@ Red PCB, very similar to crzyddz2
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#include "emu.h"
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#include "cpu/se3208/se3208.h"
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#include "machine/ds1302.h"
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#include "machine/nvram.h"
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#include "machine/eepromser.h"
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#include "machine/vrender0.h"
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#include "machine/nvram.h"
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#include "machine/timer.h"
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#include "machine/vrender0.h"
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#include "emupal.h"
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#include <algorithm>
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namespace {
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class menghong_state : public driver_device
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{
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public:
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@ -91,48 +94,54 @@ public:
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// m_nvram(*this, "nvram"),
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m_ds1302(*this, "rtc"),
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m_eeprom(*this, "eeprom"),
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m_prot_data(*this, "pic_data")
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m_prot_data(*this, "pic_data"),
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m_keys(*this, "KEY%u", 0U)
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{ }
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void crzyddz2(machine_config &config);
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void menghong(machine_config &config);
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private:
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/* memory pointers */
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required_shared_ptr<uint32_t> m_workram;
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optional_region_ptr<uint32_t> m_flash;
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optional_memory_bank m_mainbank;
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override;
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/* devices */
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private:
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// memory pointers
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required_shared_ptr<uint32_t> m_workram;
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required_region_ptr<uint32_t> m_flash;
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required_memory_bank m_mainbank;
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// devices
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required_device<se3208_device> m_maincpu;
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required_device<vrender0soc_device> m_vr0soc;
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// required_device<nvram_device> m_nvram;
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required_device<ds1302_device> m_ds1302;
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optional_device<eeprom_serial_93cxx_device> m_eeprom;
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required_device<eeprom_serial_93cxx_device> m_eeprom;
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required_region_ptr <uint8_t> m_prot_data;
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uint32_t m_Bank;
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uint32_t m_maxbank;
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uint32_t m_FlashCmd;
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// inputs
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required_ioport_array<5> m_keys;
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void Banksw_w(uint32_t data);
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uint32_t FlashCmd_r();
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void FlashCmd_w(uint32_t data);
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uint32_t m_bank;
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uint32_t m_maxbank;
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uint32_t m_flashcmd;
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uint32_t crzyddz2_key_r();
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void banksw_w(uint32_t data);
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uint32_t flashcmd_r();
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void flashcmd_w(uint32_t data);
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uint32_t key_r();
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virtual void machine_start() override;
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virtual void machine_reset() override;
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void menghong_mem(address_map &map);
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void crzyddz2_mem(address_map &map);
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// PIO
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uint32_t PIOldat_r();
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uint32_t m_PIO;
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void crzyddz2_PIOldat_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
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uint32_t crzyddz2_PIOedat_r();
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uint8_t m_crzyddz2_prot;
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// pio
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uint32_t pioldat_r();
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uint32_t m_pio;
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void pioldat_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
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uint32_t pioedat_r();
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uint8_t m_prot;
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uint8_t menghong_shared_r(offs_t offset);
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void menghong_shared_w(offs_t offset, uint8_t data);
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@ -143,17 +152,17 @@ private:
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void menghong_state::Banksw_w(uint32_t data)
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void menghong_state::banksw_w(uint32_t data)
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{
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m_Bank = (data >> 1) & 7;
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m_mainbank->set_entry(m_Bank);
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m_bank = (data >> 1) & 7;
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m_mainbank->set_entry(m_bank);
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}
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uint32_t menghong_state::FlashCmd_r()
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uint32_t menghong_state::flashcmd_r()
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{
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if ((m_FlashCmd & 0xff) == 0xff)
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if ((m_flashcmd & 0xff) == 0xff)
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{
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if (m_Bank < m_maxbank)
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if (m_bank < m_maxbank)
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{
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uint32_t *ptr = (uint32_t*)(m_mainbank->base());
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return ptr[0];
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@ -161,9 +170,9 @@ uint32_t menghong_state::FlashCmd_r()
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else
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return 0xffffffff;
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}
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if ((m_FlashCmd & 0xff) == 0x90)
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if ((m_flashcmd & 0xff) == 0x90)
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{
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if (m_Bank < m_maxbank)
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if (m_bank < m_maxbank)
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return 0x00180089; //Intel 128MBit
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else
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return 0xffffffff;
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@ -171,9 +180,9 @@ uint32_t menghong_state::FlashCmd_r()
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return 0;
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}
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void menghong_state::FlashCmd_w(uint32_t data)
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void menghong_state::flashcmd_w(uint32_t data)
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{
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m_FlashCmd = data;
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m_flashcmd = data;
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}
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@ -248,14 +257,14 @@ void menghong_state::crzyddz2_shared_w(offs_t offset, uint8_t data)
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}
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}
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uint32_t menghong_state::PIOldat_r()
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uint32_t menghong_state::pioldat_r()
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{
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return m_PIO;
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return m_pio;
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}
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void menghong_state::crzyddz2_PIOldat_w(offs_t offset, uint32_t data, uint32_t mem_mask)
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void menghong_state::pioldat_w(offs_t offset, uint32_t data, uint32_t mem_mask)
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{
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COMBINE_DATA(&m_PIO);
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COMBINE_DATA(&m_pio);
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//uint32_t RST = data & 0x01000000;
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//uint32_t CLK = data & 0x02000000;
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//uint32_t DAT = data & 0x10000000;
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@ -266,30 +275,28 @@ void menghong_state::crzyddz2_PIOldat_w(offs_t offset, uint32_t data, uint32_t m
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if (ACCESSING_BITS_8_15)
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{
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int mux = (m_PIO >> 8) & 0x1f;
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int mux = (m_pio >> 8) & 0x1f;
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if (mux == 0x1f)
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{
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m_crzyddz2_prot = ((m_PIO >> 8) & 0xc0) ^ 0x40;
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logerror("%s: PIO = %08x, prot = %02x\n", machine().describe_context(), m_PIO, m_crzyddz2_prot);
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m_prot = ((m_pio >> 8) & 0xc0) ^ 0x40;
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logerror("%s: pio = %08x, prot = %02x\n", machine().describe_context(), m_pio, m_prot);
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}
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}
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}
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uint32_t menghong_state::crzyddz2_PIOedat_r()
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uint32_t menghong_state::pioedat_r()
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{
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return 0;//m_eeprom->do_read();
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}
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uint32_t menghong_state::crzyddz2_key_r()
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uint32_t menghong_state::key_r()
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{
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static const char *const key_names[] = { "KEY0", "KEY1", "KEY2", "KEY3", "KEY4" };
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int mux = (m_PIO >> 8) & 0x1f;
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int mux = (m_pio >> 8) & 0x1f;
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uint8_t data = 0x3f;
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for (int i = 0; i < sizeof(key_names)/sizeof(key_names[0]); ++i)
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for (int i = 0; i < 5; ++i)
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if (!BIT(mux,i))
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data = ioport(key_names[i])->read();
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data = m_keys[i]->read();
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/*
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crzyddz2 in out
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@ -298,33 +305,33 @@ crzyddz2 in out
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c0 80
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*/
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// menghong Sealy logo pal offset is at 0x3ea7400, relevant code is at 2086034
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// m_crzyddz2_prot = (m_PIO >> 8) & 0xc0) ^ 0x40;
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m_crzyddz2_prot = (machine().rand() & 0xc0);
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// m_prot = (m_pio >> 8) & 0xc0) ^ 0x40;
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m_prot = (machine().rand() & 0xc0);
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return 0xffffff00 | data | m_crzyddz2_prot;
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return 0xffffff00 | data | m_prot;
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}
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void menghong_state::menghong_mem(address_map &map)
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{
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map(0x00000000, 0x003fffff).rom().nopw();
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map(0x01280000, 0x01280003).w(FUNC(menghong_state::Banksw_w));
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map(0x01280000, 0x01280003).w(FUNC(menghong_state::banksw_w));
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// map(0x01400000, 0x0140ffff).ram().share("nvram");
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map(0x01400000, 0x0140ffff).rw(FUNC(menghong_state::menghong_shared_r), FUNC(menghong_state::menghong_shared_w));
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map(0x01500000, 0x01500003).portr("P1_P2");
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map(0x01500004, 0x01500007).r(FUNC(menghong_state::crzyddz2_key_r));
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map(0x01500004, 0x01500007).r(FUNC(menghong_state::key_r));
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map(0x01500008, 0x0150000b).portr("SYSTEM");
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map(0x01800000, 0x01ffffff).m(m_vr0soc, FUNC(vrender0soc_device::regs_map));
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map(0x01802004, 0x01802007).rw(FUNC(menghong_state::PIOldat_r), FUNC(menghong_state::crzyddz2_PIOldat_w));
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map(0x01802008, 0x0180200b).r(FUNC(menghong_state::crzyddz2_PIOedat_r));
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map(0x01802004, 0x01802007).rw(FUNC(menghong_state::pioldat_r), FUNC(menghong_state::pioldat_w));
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map(0x01802008, 0x0180200b).r(FUNC(menghong_state::pioedat_r));
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map(0x02000000, 0x027fffff).ram().share("workram");
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map(0x02000000, 0x027fffff).ram().share(m_workram);
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map(0x03000000, 0x04ffffff).m(m_vr0soc, FUNC(vrender0soc_device::audiovideo_map));
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map(0x05000000, 0x05ffffff).bankr("mainbank");
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map(0x05000000, 0x05000003).rw(FUNC(menghong_state::FlashCmd_r), FUNC(menghong_state::FlashCmd_w));
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map(0x05000000, 0x05ffffff).bankr(m_mainbank);
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map(0x05000000, 0x05000003).rw(FUNC(menghong_state::flashcmd_r), FUNC(menghong_state::flashcmd_w));
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}
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void menghong_state::crzyddz2_mem(address_map &map)
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@ -337,33 +344,31 @@ void menghong_state::machine_start()
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{
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m_sharedram = make_unique_clear<uint8_t []>(0x10000);
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if (m_mainbank)
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m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0;
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std::unique_ptr<uint8_t[]> dummy_region = std::make_unique<uint8_t[]>(0x1000000);
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std::fill_n(&dummy_region[0], 0x1000000, 0xff); // 0xff Filled at Unmapped area
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uint8_t *rom = (m_flash) ? (uint8_t *)&m_flash[0] : dummy_region.get();
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for (int i = 0; i < 8; i++)
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{
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m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0;
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uint8_t *dummy_region = auto_alloc_array(machine(), uint8_t, 0x1000000);
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std::fill_n(&dummy_region[0], 0x1000000, 0xff); // 0xff Filled at Unmapped area
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uint8_t *ROM = (m_flash) ? (uint8_t *)&m_flash[0] : dummy_region;
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for (int i = 0; i < 8; i++)
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{
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if ((i < m_maxbank))
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m_mainbank->configure_entry(i, ROM + i * 0x1000000);
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else
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m_mainbank->configure_entry(i, dummy_region);
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}
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if (i < m_maxbank)
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m_mainbank->configure_entry(i, rom + i * 0x1000000);
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else
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m_mainbank->configure_entry(i, dummy_region.get());
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}
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save_item(NAME(m_Bank));
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save_item(NAME(m_FlashCmd));
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save_item(NAME(m_PIO));
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save_item(NAME(m_bank));
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save_item(NAME(m_flashcmd));
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save_item(NAME(m_pio));
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save_pointer(NAME(m_sharedram), 0x10000);
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}
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void menghong_state::machine_reset()
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{
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m_Bank = 0;
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m_mainbank->set_entry(m_Bank);
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m_FlashCmd = 0xff;
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m_bank = 0;
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m_mainbank->set_entry(m_bank);
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m_flashcmd = 0xff;
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m_crzyddz2_prot = 0x00;
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m_prot = 0x00;
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}
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static INPUT_PORTS_START(crzyddz2)
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@ -473,7 +478,7 @@ void menghong_state::menghong(machine_config &config)
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m_vr0soc->set_external_vclk(28636360); // Assumed from the only available XTal on PCB
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DS1302(config, m_ds1302, 32.768_kHz_XTAL);
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EEPROM_93C46_16BIT(config, "eeprom");
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EEPROM_93C46_16BIT(config, m_eeprom);
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}
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void menghong_state::crzyddz2(machine_config &config)
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@ -510,6 +515,8 @@ ROM_START( crzyddz2 )
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ROM_REGION( 0x0100, "pic_data", ROMREGION_ERASEFF )
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ROM_END
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} // Anonymous namespace
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GAME( 2004?,menghong, 0, menghong, crzyddz2, menghong_state, empty_init, ROT0, "Sealy", "Meng Hong Lou", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION )
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GAME( 2006, crzyddz2, 0, crzyddz2, crzyddz2, menghong_state, empty_init, ROT0, "Sealy", "Crazy Dou Di Zhu II", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION )
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@ -19,15 +19,18 @@
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#include "emu.h"
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#include "cpu/se3208/se3208.h"
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#include "machine/microtch.h"
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#include "machine/nvram.h"
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#include "machine/vrender0.h"
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#include "machine/microtch.h"
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#include "emupal.h"
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#include "screen.h"
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#include "speaker.h"
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#include <algorithm>
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namespace {
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class trivrus_state : public driver_device
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{
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public:
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@ -38,41 +41,48 @@ public:
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m_maincpu(*this, "maincpu"),
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m_mainbank(*this, "mainbank"),
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m_vr0soc(*this, "vr0soc"),
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m_microtouch(*this, "microtouch")
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m_microtouch(*this, "microtouch"),
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m_inputs(*this, "IN%u", 1U),
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m_dsw(*this, "DSW")
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{ }
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void trivrus(machine_config &config);
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private:
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override;
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/* memory pointers */
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private:
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// memory pointers
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required_shared_ptr<uint32_t> m_workram;
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required_region_ptr<uint32_t> m_flash;
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/* devices */
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// devices
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required_device<se3208_device> m_maincpu;
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optional_memory_bank m_mainbank;
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required_memory_bank m_mainbank;
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required_device<vrender0soc_device> m_vr0soc;
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required_device<microtouch_device> m_microtouch;
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uint32_t m_FlashCmd;
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uint32_t m_Bank;
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uint32_t m_maxbank;
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// inputs
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required_ioport_array<5> m_inputs;
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required_ioport m_dsw;
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uint32_t FlashCmd_r();
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void FlashCmd_w(uint32_t data);
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void Banksw_w(uint32_t data);
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uint32_t m_flashcmd;
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uint32_t m_bank;
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uint32_t m_maxbank;
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uint32_t flashcmd_r();
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void flashcmd_w(uint32_t data);
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void banksw_w(uint32_t data);
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virtual void machine_start() override;
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virtual void machine_reset() override;
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void trivrus_mem(address_map &map);
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// PIO
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uint32_t PIOldat_r();
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uint32_t m_PIO;
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void PIOldat_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
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uint32_t PIOedat_r();
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// pio
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uint32_t pioldat_r();
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uint32_t m_pio;
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void pioldat_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
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uint32_t pioedat_r();
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uint8_t trivrus_input_r();
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void trivrus_input_w(uint8_t data);
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@ -80,39 +90,39 @@ private:
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};
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void trivrus_state::FlashCmd_w(uint32_t data)
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void trivrus_state::flashcmd_w(uint32_t data)
|
||||
{
|
||||
m_FlashCmd = data;
|
||||
m_flashcmd = data;
|
||||
}
|
||||
|
||||
uint32_t trivrus_state::PIOedat_r()
|
||||
uint32_t trivrus_state::pioedat_r()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint32_t trivrus_state::PIOldat_r()
|
||||
uint32_t trivrus_state::pioldat_r()
|
||||
{
|
||||
// ...
|
||||
return m_PIO;
|
||||
return m_pio;
|
||||
}
|
||||
|
||||
// PIO Latched output DATa Register
|
||||
void trivrus_state::PIOldat_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
// pio Latched output DATa Register
|
||||
void trivrus_state::pioldat_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
// ...
|
||||
COMBINE_DATA(&m_PIO);
|
||||
COMBINE_DATA(&m_pio);
|
||||
}
|
||||
|
||||
uint8_t trivrus_state::trivrus_input_r()
|
||||
{
|
||||
switch (m_trivrus_input)
|
||||
{
|
||||
case 1: return ioport("IN1")->read();
|
||||
case 2: return ioport("IN2")->read();
|
||||
case 3: return ioport("IN3")->read();
|
||||
case 4: return ioport("IN4")->read();
|
||||
case 5: return ioport("IN5")->read();
|
||||
case 6: return ioport("DSW")->read();
|
||||
case 1: return m_inputs[0]->read();
|
||||
case 2: return m_inputs[1]->read();
|
||||
case 3: return m_inputs[2]->read();
|
||||
case 4: return m_inputs[3]->read();
|
||||
case 5: return m_inputs[4]->read();
|
||||
case 6: return m_dsw->read();
|
||||
}
|
||||
logerror("%s: unknown input %02x read\n", machine().describe_context(), m_trivrus_input);
|
||||
return 0xff;
|
||||
@ -120,14 +130,14 @@ uint8_t trivrus_state::trivrus_input_r()
|
||||
|
||||
void trivrus_state::trivrus_input_w(uint8_t data)
|
||||
{
|
||||
m_trivrus_input = data & 0xff;
|
||||
m_trivrus_input = data;
|
||||
}
|
||||
|
||||
uint32_t trivrus_state::FlashCmd_r()
|
||||
uint32_t trivrus_state::flashcmd_r()
|
||||
{
|
||||
if ((m_FlashCmd & 0xff) == 0xff)
|
||||
if ((m_flashcmd & 0xff) == 0xff)
|
||||
{
|
||||
if (m_Bank < m_maxbank)
|
||||
if (m_bank < m_maxbank)
|
||||
{
|
||||
uint32_t *ptr = (uint32_t*)(m_mainbank->base());
|
||||
return ptr[0];
|
||||
@ -135,9 +145,9 @@ uint32_t trivrus_state::FlashCmd_r()
|
||||
else
|
||||
return 0xffffffff;
|
||||
}
|
||||
if ((m_FlashCmd & 0xff) == 0x90)
|
||||
if ((m_flashcmd & 0xff) == 0x90)
|
||||
{
|
||||
if (m_Bank < m_maxbank)
|
||||
if (m_bank < m_maxbank)
|
||||
return 0x00180089; //Intel 128MBit
|
||||
else
|
||||
return 0xffffffff;
|
||||
@ -146,17 +156,17 @@ uint32_t trivrus_state::FlashCmd_r()
|
||||
}
|
||||
|
||||
|
||||
void trivrus_state::Banksw_w(uint32_t data)
|
||||
void trivrus_state::banksw_w(uint32_t data)
|
||||
{
|
||||
m_Bank = (data >> 1) & 7;
|
||||
m_mainbank->set_entry(m_Bank);
|
||||
m_bank = (data >> 1) & 7;
|
||||
m_mainbank->set_entry(m_bank);
|
||||
}
|
||||
|
||||
void trivrus_state::trivrus_mem(address_map &map)
|
||||
{
|
||||
map(0x00000000, 0x0007ffff).rom().nopw();
|
||||
|
||||
map(0x01280000, 0x01280003).w(FUNC(trivrus_state::Banksw_w));
|
||||
map(0x01280000, 0x01280003).w(FUNC(trivrus_state::banksw_w));
|
||||
|
||||
map(0x01500000, 0x01500000).rw(FUNC(trivrus_state::trivrus_input_r), FUNC(trivrus_state::trivrus_input_w));
|
||||
// reads occurs by SELECTING the given register on successive ODD addresses then reading at 0x01500011
|
||||
@ -172,46 +182,43 @@ void trivrus_state::trivrus_mem(address_map &map)
|
||||
map(0x01600000, 0x01607fff).ram().share("nvram");
|
||||
|
||||
map(0x01800000, 0x01ffffff).m(m_vr0soc, FUNC(vrender0soc_device::regs_map));
|
||||
map(0x01802004, 0x01802007).rw(FUNC(trivrus_state::PIOldat_r), FUNC(trivrus_state::PIOldat_w));
|
||||
map(0x01802008, 0x0180200b).r(FUNC(trivrus_state::PIOedat_r));
|
||||
map(0x01802004, 0x01802007).rw(FUNC(trivrus_state::pioldat_r), FUNC(trivrus_state::pioldat_w));
|
||||
map(0x01802008, 0x0180200b).r(FUNC(trivrus_state::pioedat_r));
|
||||
|
||||
map(0x02000000, 0x027fffff).ram().share("workram");
|
||||
map(0x02000000, 0x027fffff).ram().share(m_workram);
|
||||
|
||||
map(0x03000000, 0x04ffffff).m(m_vr0soc, FUNC(vrender0soc_device::audiovideo_map));
|
||||
|
||||
map(0x05000000, 0x05ffffff).bankr("mainbank");
|
||||
map(0x05000000, 0x05000003).rw(FUNC(trivrus_state::FlashCmd_r), FUNC(trivrus_state::FlashCmd_w));
|
||||
map(0x05000000, 0x05ffffff).bankr(m_mainbank);
|
||||
map(0x05000000, 0x05000003).rw(FUNC(trivrus_state::flashcmd_r), FUNC(trivrus_state::flashcmd_w));
|
||||
// 0x06000000 accessed during POST during above check then discarded, probably a debug left-over
|
||||
}
|
||||
|
||||
void trivrus_state::machine_start()
|
||||
{
|
||||
if (m_mainbank)
|
||||
m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0;
|
||||
std::unique_ptr<uint8_t[]> dummy_region = std::make_unique<uint8_t[]>(0x1000000);
|
||||
std::fill_n(&dummy_region[0], 0x1000000, 0xff); // 0xff Filled at Unmapped area
|
||||
uint8_t *rom = (m_flash) ? (uint8_t *)&m_flash[0] : dummy_region.get();
|
||||
for (int i = 0; i < 8; i++)
|
||||
{
|
||||
m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0;
|
||||
uint8_t *dummy_region = auto_alloc_array(machine(), uint8_t, 0x1000000);
|
||||
std::fill_n(&dummy_region[0], 0x1000000, 0xff); // 0xff Filled at Unmapped area
|
||||
uint8_t *ROM = (m_flash) ? (uint8_t *)&m_flash[0] : dummy_region;
|
||||
for (int i = 0; i < 8; i++)
|
||||
{
|
||||
if ((i < m_maxbank))
|
||||
m_mainbank->configure_entry(i, ROM + i * 0x1000000);
|
||||
else
|
||||
m_mainbank->configure_entry(i, dummy_region);
|
||||
}
|
||||
if (i < m_maxbank)
|
||||
m_mainbank->configure_entry(i, rom + i * 0x1000000);
|
||||
else
|
||||
m_mainbank->configure_entry(i, dummy_region.get());
|
||||
}
|
||||
|
||||
save_item(NAME(m_Bank));
|
||||
save_item(NAME(m_FlashCmd));
|
||||
save_item(NAME(m_PIO));
|
||||
save_item(NAME(m_bank));
|
||||
save_item(NAME(m_flashcmd));
|
||||
save_item(NAME(m_pio));
|
||||
save_item(NAME(m_trivrus_input));
|
||||
}
|
||||
|
||||
void trivrus_state::machine_reset()
|
||||
{
|
||||
m_Bank = 0;
|
||||
m_mainbank->set_entry(m_Bank);
|
||||
m_FlashCmd = 0xff;
|
||||
m_bank = 0;
|
||||
m_mainbank->set_entry(m_bank);
|
||||
m_flashcmd = 0xff;
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START( trivrus )
|
||||
@ -310,4 +317,7 @@ ROM_START( trivrus )
|
||||
ROM_LOAD( "u3", 0x000000, 0x1000010, CRC(ba901707) SHA1(e281ba07024cd19ef1ab72d2197014f7b1f4d30f) )
|
||||
ROM_END
|
||||
|
||||
GAME( 2009, trivrus, 0, trivrus, trivrus, trivrus_state, empty_init, ROT0, "AGT", "Trivia R Us (v1.07)", 0 )
|
||||
} // Anonymous namespace
|
||||
|
||||
|
||||
GAME( 2009, trivrus, 0, trivrus, trivrus, trivrus_state, empty_init, ROT0, "AGT", "Trivia R Us (v1.07)", 0 )
|
||||
|
||||
Loading…
Reference in New Issue
Block a user