z80ctc: converted to use devcb2. nw.

Notes:
- for whatever reason the tlcs_z80 internal CTC fails to recognize/find its owner tag, 
does anyone know how to fix this? it's probably trivial, but I need an helping hand 
or pve500 cannot be launched anymore...
- @Haze: can you check your inder_sb.c code? your CTC interface was wrong,
judging from the comments in the source (the first cb was for the interrupt, and no 
callback was present by default for the ZC/TO3...) and I'm not sure what the code is 
intended to actually do
This commit is contained in:
Fabio Priuli 2014-04-28 18:41:16 +00:00
parent 8cb2897cc1
commit 25b6f6a58d
74 changed files with 465 additions and 887 deletions

View File

@ -71,19 +71,6 @@ const rom_entry *abc_sio_device::device_rom_region() const
}
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc_intf )
//-------------------------------------------------
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
//-------------------------------------------------
// Z80DART_INTERFACE( sio_intf )
//-------------------------------------------------
@ -117,7 +104,7 @@ static Z80DART_INTERFACE( sio_intf )
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( abc_sio )
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_4_9152MHz, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_4_9152MHz)
MCFG_Z80DART_ADD(Z80SIO_TAG, 0, sio_intf)
MACHINE_CONFIG_END

View File

@ -105,7 +105,7 @@ static const z80_daisy_config z80_daisy_chain[] =
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc_intf )
// Z80CTC
//-------------------------------------------------
WRITE_LINE_MEMBER( imi5000h_device::ctc_z0_w )
@ -125,15 +125,6 @@ WRITE_LINE_MEMBER( imi5000h_device::ctc_z2_w )
m_maincpu->set_input_line(INPUT_LINE_NMI, state);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, ctc_z0_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, ctc_z1_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, imi5000h_device, ctc_z2_w)
};
//-------------------------------------------------
// Z80PIO_INTERFACE( pio0_intf )
//-------------------------------------------------
@ -393,7 +384,12 @@ static MACHINE_CONFIG_FRAGMENT( imi5000h )
MCFG_CPU_PROGRAM_MAP(imi5000h_mem)
MCFG_CPU_IO_MAP(imi5000h_io)
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_8MHz/2, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_8MHz / 2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(imi5000h_device, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(imi5000h_device, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(imi5000h_device, ctc_z2_w))
MCFG_Z80PIO_ADD(Z80PIO_0_TAG, XTAL_8MHz/2, pio0_intf)
MCFG_Z80PIO_ADD(Z80PIO_2_TAG, XTAL_8MHz/2, pio2_intf)
MCFG_Z80PIO_ADD(Z80PIO_3_TAG, XTAL_8MHz/2, pio3_intf)

View File

@ -63,21 +63,17 @@ static const z80_daisy_config kc_d004_daisy_chain[] =
{ NULL }
};
static Z80CTC_INTERFACE( kc_d004_ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, 0), /* interrupt callback */
DEVCB_DEVICE_LINE_MEMBER(Z80CTC_TAG, z80ctc_device, trg1), /* ZC/TO0 callback */
DEVCB_DEVICE_LINE_MEMBER(Z80CTC_TAG, z80ctc_device, trg2), /* ZC/TO1 callback */
DEVCB_DEVICE_LINE_MEMBER(Z80CTC_TAG, z80ctc_device, trg3) /* ZC/TO2 callback */
};
static MACHINE_CONFIG_FRAGMENT(kc_d004)
MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_8MHz/2)
MCFG_CPU_PROGRAM_MAP(kc_d004_mem)
MCFG_CPU_IO_MAP(kc_d004_io)
MCFG_CPU_CONFIG(kc_d004_daisy_chain)
MCFG_Z80CTC_ADD( Z80CTC_TAG, XTAL_8MHz/2, kc_d004_ctc_intf )
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_8MHz/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, 0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg1))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg2))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg3))
MCFG_UPD765A_ADD(UPD765_TAG, false, false)
MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(kc_d004_device, fdc_irq))

View File

@ -126,33 +126,6 @@ static I8237_INTERFACE( dmac_intf )
DEVCB_NULL }
};
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc0_intf )
//-------------------------------------------------
static Z80CTC_INTERFACE( ctc0_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc1_intf )
//-------------------------------------------------
static Z80CTC_INTERFACE( ctc1_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
//-------------------------------------------------
// Z80SIO_INTERFACE( sio_intf )
//-------------------------------------------------
@ -192,8 +165,13 @@ static MACHINE_CONFIG_FRAGMENT( wangpc_rtc )
MCFG_CPU_IO_MAP(wangpc_rtc_io)
MCFG_I8237_ADD(AM9517A_TAG, 2000000, dmac_intf)
MCFG_Z80CTC_ADD(Z80CTC_0_TAG, 2000000, ctc0_intf)
MCFG_Z80CTC_ADD(Z80CTC_1_TAG, 2000000, ctc1_intf)
MCFG_DEVICE_ADD(Z80CTC_0_TAG, Z80CTC, 2000000)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(Z80CTC_1_TAG, Z80CTC, 2000000)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80SIO0_ADD(Z80SIO_TAG, 2000000, sio_intf)
MACHINE_CONFIG_END

View File

@ -88,19 +88,6 @@ static ADDRESS_MAP_START( wangpc_wdc_io, AS_IO, 8, wangpc_wdc_device )
ADDRESS_MAP_END
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc_intf )
//-------------------------------------------------
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), // interrupt handler
DEVCB_NULL, // ZC/TO0 callback
DEVCB_NULL, // ZC/TO1 callback
DEVCB_NULL // ZC/TO2 callback
};
//-------------------------------------------------
// MACHINE_CONFIG_FRAGMENT( wangpc_wdc )
//-------------------------------------------------
@ -111,7 +98,8 @@ static MACHINE_CONFIG_FRAGMENT( wangpc_wdc )
MCFG_CPU_PROGRAM_MAP(wangpc_wdc_mem)
MCFG_CPU_IO_MAP(wangpc_wdc_io)
MCFG_Z80CTC_ADD(MK3882_TAG, 2000000, ctc_intf)
MCFG_DEVICE_ADD(MK3882_TAG, Z80CTC, 2000000)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD("harddisk0", SCSIHD, 0)
MACHINE_CONFIG_END

View File

@ -18,14 +18,6 @@
// m_tlcsz80->set_internal_pio_interface (pio_intf);
// m_tlcsz80->set_internal_sio_interface (sio_intf);
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(DEVICE_SELF_OWNER, INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static Z80PIO_INTERFACE( pio_intf )
{
DEVCB_CPU_INPUT_LINE(DEVICE_SELF_OWNER, INPUT_LINE_IRQ0),
@ -73,7 +65,9 @@ ADDRESS_MAP_END
#define TLCS_Z80_CLOCK 8000000
static MACHINE_CONFIG_FRAGMENT( tlcs_z80 )
MCFG_Z80CTC_ADD(TLCSZ80_INTERNAL_CTC_TAG, TLCS_Z80_CLOCK, ctc_intf)
MCFG_DEVICE_ADD(TLCSZ80_INTERNAL_CTC_TAG, Z80CTC, TLCS_Z80_CLOCK)
MCFG_Z80CTC_INTR_CB(INPUTLINE("^", INPUT_LINE_IRQ0))
MCFG_Z80SIO_ADD(TLCSZ80_INTERNAL_SIO_TAG, TLCS_Z80_CLOCK, sio_intf)
MCFG_Z80PIO_ADD(TLCSZ80_INTERNAL_PIO_TAG, TLCS_Z80_CLOCK, pio_intf)
MACHINE_CONFIG_END

View File

@ -77,15 +77,6 @@ static ADDRESS_MAP_START( ldv1000_portmap, AS_IO, 8, pioneer_ldv1000_device )
ADDRESS_MAP_END
static Z80CTC_INTERFACE( ctcintf )
{
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ctc_interrupt),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
static const z80_daisy_config daisy_chain[] =
{
{ "ldvctc" },
@ -99,7 +90,8 @@ static MACHINE_CONFIG_FRAGMENT( ldv1000 )
MCFG_CPU_PROGRAM_MAP(ldv1000_map)
MCFG_CPU_IO_MAP(ldv1000_portmap)
MCFG_Z80CTC_ADD("ldvctc", XTAL_5MHz/2, ctcintf)
MCFG_DEVICE_ADD("ldvctc", Z80CTC, XTAL_5MHz/2)
MCFG_Z80CTC_INTR_CB(WRITELINE(pioneer_ldv1000_device, ctc_interrupt))
MCFG_DEVICE_ADD("ldvppi0", I8255, 0)
MCFG_I8255_OUT_PORTA_CB(WRITE8(pioneer_ldv1000_device, ppi0_porta_w))

View File

@ -81,7 +81,12 @@ const device_type Z80CTC = &device_creator<z80ctc_device>;
z80ctc_device::z80ctc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, Z80CTC, "Z80 CTC", tag, owner, clock, "z80ctc", __FILE__),
device_z80daisy_interface(mconfig, *this)
device_z80daisy_interface(mconfig, *this),
m_intr_cb(*this),
m_zc0_cb(*this),
m_zc1_cb(*this),
m_zc2_cb(*this),
m_zc3_cb(*this)
{
}
@ -117,30 +122,6 @@ WRITE_LINE_MEMBER( z80ctc_device::trg2 ) { m_channel[2].trigger(state); }
WRITE_LINE_MEMBER( z80ctc_device::trg3 ) { m_channel[3].trigger(state); }
//-------------------------------------------------
// device_config_complete - perform any
// operations now that the configuration is
// complete
//-------------------------------------------------
void z80ctc_device::device_config_complete()
{
// inherit a copy of the static data
const z80ctc_interface *intf = reinterpret_cast<const z80ctc_interface *>(static_config());
if (intf != NULL)
*static_cast<z80ctc_interface *>(this) = *intf;
// or initialize to defaults if none provided
else
{
memset(&m_intr_cb, 0, sizeof(m_intr_cb));
memset(&m_zc0_cb, 0, sizeof(m_zc0_cb));
memset(&m_zc1_cb, 0, sizeof(m_zc1_cb));
memset(&m_zc2_cb, 0, sizeof(m_zc2_cb));
}
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
@ -151,14 +132,17 @@ void z80ctc_device::device_start()
m_period256 = attotime::from_hz(m_clock) * 256;
// resolve callbacks
m_intr.resolve(m_intr_cb, *this);
m_intr_cb.resolve_safe();
m_zc0_cb.resolve_safe();
m_zc1_cb.resolve_safe();
m_zc2_cb.resolve_safe();
m_zc3_cb.resolve_safe();
// start each channel
devcb_write_line nullcb = DEVCB_NULL;
m_channel[0].start(this, 0, m_zc0_cb);
m_channel[1].start(this, 1, m_zc1_cb);
m_channel[2].start(this, 2, m_zc2_cb);
m_channel[3].start(this, 3, nullcb);
m_channel[0].start(this, 0);
m_channel[1].start(this, 1);
m_channel[2].start(this, 2);
m_channel[3].start(this, 3);
// register for save states
save_item(NAME(m_vector));
@ -286,7 +270,7 @@ void z80ctc_device::z80daisy_irq_reti()
void z80ctc_device::interrupt_check()
{
int state = (z80daisy_irq_state() & Z80_DAISY_INT) ? ASSERT_LINE : CLEAR_LINE;
m_intr(state);
m_intr_cb(state);
}
@ -307,7 +291,6 @@ z80ctc_device::ctc_channel::ctc_channel()
m_timer(NULL),
m_int_state(0)
{
memset(&m_zc, 0, sizeof(m_zc));
}
@ -315,12 +298,11 @@ z80ctc_device::ctc_channel::ctc_channel()
// start - set up at device start time
//-------------------------------------------------
void z80ctc_device::ctc_channel::start(z80ctc_device *device, int index, const devcb_write_line &write_line)
void z80ctc_device::ctc_channel::start(z80ctc_device *device, int index)
{
// initialize state
m_device = device;
m_index = index;
m_zc.resolve(write_line, *m_device);
m_timer = m_device->machine().scheduler().timer_alloc(FUNC(static_timer_callback), this);
// register for save states
@ -519,9 +501,26 @@ void z80ctc_device::ctc_channel::timer_callback()
}
// generate the clock pulse
m_zc(1);
m_zc(0);
switch (m_index)
{
case 0:
m_device->m_zc0_cb(1);
m_device->m_zc0_cb(0);
break;
case 1:
m_device->m_zc1_cb(1);
m_device->m_zc1_cb(0);
break;
case 2:
m_device->m_zc2_cb(1);
m_device->m_zc2_cb(0);
break;
case 3:
m_device->m_zc3_cb(1);
m_device->m_zc3_cb(0);
break;
}
// reset the down counter
m_down = m_tconst;
}

View File

@ -34,14 +34,17 @@
// DEVICE CONFIGURATION MACROS
//**************************************************************************
#define Z80CTC_INTERFACE(name) \
const z80ctc_interface (name)=
#define MCFG_Z80CTC_INTR_CB(_devcb) \
devcb = &z80ctc_device::set_intr_callback(*device, DEVCB2_##_devcb);
#define MCFG_Z80CTC_ZC0_CB(_devcb) \
devcb = &z80ctc_device::set_zc0_callback(*device, DEVCB2_##_devcb);
#define MCFG_Z80CTC_ADD(_tag, _clock, _intrf) \
MCFG_DEVICE_ADD(_tag, Z80CTC, _clock) \
MCFG_DEVICE_CONFIG(_intrf)
#define MCFG_Z80CTC_ZC1_CB(_devcb) \
devcb = &z80ctc_device::set_zc1_callback(*device, DEVCB2_##_devcb);
#define MCFG_Z80CTC_ZC2_CB(_devcb) \
devcb = &z80ctc_device::set_zc2_callback(*device, DEVCB2_##_devcb);
//**************************************************************************
@ -49,28 +52,20 @@
//**************************************************************************
// ======================> z80ctc_interface
struct z80ctc_interface
{
devcb_write_line m_intr_cb; // callback when change interrupt status
devcb_write_line m_zc0_cb; // ZC/TO0 callback
devcb_write_line m_zc1_cb; // ZC/TO1 callback
devcb_write_line m_zc2_cb; // ZC/TO2 callback
};
// ======================> z80ctc_device
class z80ctc_device : public device_t,
public device_z80daisy_interface,
public z80ctc_interface
public device_z80daisy_interface
{
public:
// construction/destruction
z80ctc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
template<class _Object> static devcb2_base &set_intr_callback(device_t &device, _Object object) { return downcast<z80ctc_device &>(device).m_intr_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_zc0_callback(device_t &device, _Object object) { return downcast<z80ctc_device &>(device).m_zc0_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_zc1_callback(device_t &device, _Object object) { return downcast<z80ctc_device &>(device).m_zc1_cb.set_callback(object); }
template<class _Object> static devcb2_base &set_zc2_callback(device_t &device, _Object object) { return downcast<z80ctc_device &>(device).m_zc2_cb.set_callback(object); }
// read/write handlers
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
@ -81,7 +76,6 @@ public:
protected:
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
@ -101,7 +95,7 @@ private:
public:
ctc_channel();
void start(z80ctc_device *device, int index, const devcb_write_line &write_line);
void start(z80ctc_device *device, int index);
void reset();
UINT8 read();
@ -113,7 +107,6 @@ private:
z80ctc_device * m_device; // pointer back to our device
int m_index; // our channel index
devcb_resolved_write_line m_zc; // zero crossing callbacks
UINT16 m_mode; // current mode
UINT16 m_tconst; // time constant
UINT16 m_down; // down counter (clock mode only)
@ -126,8 +119,12 @@ private:
};
// internal state
devcb_resolved_write_line m_intr; // interrupt callback
devcb2_write_line m_intr_cb; // interrupt callback
devcb2_write_line m_zc0_cb; // channel 0 zero crossing callbacks
devcb2_write_line m_zc1_cb; // channel 1 zero crossing callbacks
devcb2_write_line m_zc2_cb; // channel 2 zero crossing callbacks
devcb2_write_line m_zc3_cb; // channel 3 zero crossing callbacks = NULL ?
UINT8 m_vector; // interrupt vector
attotime m_period16; // 16/system clock
attotime m_period256; // 256/system clock

View File

@ -116,14 +116,6 @@ WRITE_LINE_MEMBER(cchasm_state::ctc_timer_2_w)
}
}
Z80CTC_INTERFACE( cchasm_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_DRIVER_LINE_MEMBER(cchasm_state,ctc_timer_1_w), /* ZC/TO1 callback */
DEVCB_DRIVER_LINE_MEMBER(cchasm_state,ctc_timer_2_w) /* ZC/TO2 callback */
};
void cchasm_state::sound_start()
{
m_coin_flag = 0;

View File

@ -1377,15 +1377,6 @@ static const ay8910_interface demon_ay8910_interface_3 =
};
static Z80CTC_INTERFACE( demon_z80ctc_interface )
{
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
SOUND_RESET_MEMBER( cinemat_state, demon )
{
/* generic init */
@ -1435,7 +1426,8 @@ MACHINE_CONFIG_FRAGMENT( demon_sound )
MCFG_CPU_PROGRAM_MAP(demon_sound_map)
MCFG_CPU_IO_MAP(demon_sound_ports)
MCFG_Z80CTC_ADD("ctc", 3579545 /* same as "audiocpu" */, demon_z80ctc_interface)
MCFG_DEVICE_ADD("ctc", Z80CTC, 3579545 /* same as "audiocpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("audiocpu", INPUT_LINE_IRQ0))
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, demon)

View File

@ -28,15 +28,6 @@ Z80PIO_INTERFACE( senjyo_pio_intf )
DEVCB_NULL
};
/* z80 ctc */
Z80CTC_INTERFACE( senjyo_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg1), /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_DRIVER_LINE_MEMBER(senjyo_state, sound_line_clock) /* ZC/TO2 callback */
};
WRITE_LINE_MEMBER(senjyo_state::sound_line_clock)
{
if (state != 0)

View File

@ -474,15 +474,6 @@ WRITE8_MEMBER(astrocde_state::demndrgn_sound_w)
*
*************************************/
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static const ay8910_interface ay8912_interface =
{
AY8910_LEGACY_OUTPUT,
@ -1481,7 +1472,8 @@ static MACHINE_CONFIG_DERIVED( tenpindx, astrocade_16color_base )
MCFG_CPU_PROGRAM_MAP(tenpin_sub_map)
MCFG_CPU_IO_MAP(tenpin_sub_io_map)
MCFG_Z80CTC_ADD("ctc", ASTROCADE_CLOCK/4 /* same as "sub" */, ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, ASTROCADE_CLOCK/4 /* same as "sub" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("sub", INPUT_LINE_IRQ0))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")

View File

@ -155,15 +155,18 @@ static const z80_daisy_config daisy_chain[] =
static MACHINE_CONFIG_START( cchasm, cchasm_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", M68000,CCHASM_68K_CLOCK) /* 8 MHz (from schematics) */
MCFG_CPU_ADD("maincpu", M68000, CCHASM_68K_CLOCK) /* 8 MHz (from schematics) */
MCFG_CPU_PROGRAM_MAP(memmap)
MCFG_CPU_ADD("audiocpu", Z80,3584229) /* 3.58 MHz (from schematics) */
MCFG_CPU_ADD("audiocpu", Z80, 3584229) /* 3.58 MHz (from schematics) */
MCFG_CPU_CONFIG(daisy_chain)
MCFG_CPU_PROGRAM_MAP(sound_memmap)
MCFG_CPU_IO_MAP(sound_portmap)
MCFG_Z80CTC_ADD("ctc", 3584229 /* same as "audiocpu" */, cchasm_ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, 3584229 /* same as "audiocpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("audiocpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC1_CB(WRITELINE(cchasm_state, ctc_timer_1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(cchasm_state, ctc_timer_2_w))
/* video hardware */
MCFG_VECTOR_ADD("vector")
@ -173,9 +176,7 @@ static MACHINE_CONFIG_START( cchasm, cchasm_state )
MCFG_SCREEN_VISIBLE_AREA(0, 1024-1, 0, 768-1)
MCFG_SCREEN_UPDATE_DEVICE("vector", vector_device, screen_update)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("ay1", AY8910, 1818182)

View File

@ -594,15 +594,6 @@ static GFXDECODE_START( csplayh5 )
GFXDECODE_END
#endif
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0),/* interrupt handler */
DEVCB_DEVICE_LINE_MEMBER("ctc", z80ctc_device, trg3), /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
void csplayh5_state::machine_reset()
{
address_space &space = m_maincpu->space(AS_PROGRAM);
@ -658,7 +649,9 @@ static MACHINE_CONFIG_START( csplayh5, csplayh5_state )
MCFG_CPU_PROGRAM_MAP(csplayh5_sound_map)
MCFG_CPU_IO_MAP(csplayh5_sound_io_map)
MCFG_Z80CTC_ADD("ctc", 8000000, ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, 8000000)
MCFG_Z80CTC_INTR_CB(INPUTLINE("audiocpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("ctc", z80ctc_device, trg3))
MCFG_NVRAM_ADD_0FILL("nvram")

View File

@ -194,15 +194,6 @@ WRITE_LINE_MEMBER(dlair_state::write_speaker)
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DRIVER_LINE_MEMBER(dlair_state, write_speaker), /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static const z80sio_interface sio_intf =
{
DEVCB_DRIVER_LINE_MEMBER(dlair_state, dleuro_interrupt), /* interrupt handler */
@ -762,7 +753,10 @@ static MACHINE_CONFIG_START( dleuro, dlair_state )
MCFG_CPU_PROGRAM_MAP(dleuro_map)
MCFG_CPU_IO_MAP(dleuro_io_map)
MCFG_Z80CTC_ADD("ctc", MASTER_CLOCK_EURO/4 /* same as "maincpu" */, ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, MASTER_CLOCK_EURO/4 /* same as "maincpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(dlair_state, write_speaker))
MCFG_Z80SIO_ADD("sio", MASTER_CLOCK_EURO/4 /* same as "maincpu" */, sio_intf)
MCFG_WATCHDOG_TIME_INIT(attotime::from_hz(MASTER_CLOCK_EURO/(16*16*16*16*16*8)))

View File

@ -290,17 +290,9 @@ INPUT_PORTS_END
/*********************************************
* CTC & Daisy Chain Interrupts Interface *
* Daisy Chain Interrupts Interface *
*********************************************/
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static const z80_daisy_config daisy_chain[] =
{
{ "ctc" },
@ -331,7 +323,8 @@ static MACHINE_CONFIG_START( jankenmn, jankenmn_state )
MCFG_I8255_OUT_PORTB_CB(WRITE8(jankenmn_state, jankenmn_lamps1_w))
MCFG_I8255_OUT_PORTC_CB(WRITE8(jankenmn_state, jankenmn_lamps2_w))
MCFG_Z80CTC_ADD("ctc", MASTER_CLOCK, ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, MASTER_CLOCK)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
/* NO VIDEO */

View File

@ -1834,7 +1834,9 @@ static MACHINE_CONFIG_START( mcr_90009, mcr_state )
MCFG_CPU_IO_MAP(cpu_90009_portmap)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", mcr_state, mcr_interrupt, "screen", 0, 1)
MCFG_Z80CTC_ADD("ctc", MAIN_OSC_MCR_I/8 /* same as "maincpu" */, mcr_ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, MAIN_OSC_MCR_I/8 /* same as "maincpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("ctc", z80ctc_device, trg1))
MCFG_WATCHDOG_VBLANK_INIT(16)
MCFG_MACHINE_START_OVERRIDE(mcr_state,mcr)
@ -1951,7 +1953,9 @@ static MACHINE_CONFIG_DERIVED( mcr_91490_ipu, mcr_91490_snt )
MCFG_TIMER_MODIFY("scantimer")
MCFG_TIMER_DRIVER_CALLBACK(mcr_state, mcr_ipu_interrupt)
MCFG_Z80CTC_ADD("ipu_ctc", 7372800/2 /* same as "ipu" */, nflfoot_ctc_intf)
MCFG_DEVICE_ADD("ipu_ctc", Z80CTC, 7372800/2 /* same as "ipu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("ipu", INPUT_LINE_IRQ0))
MCFG_Z80PIO_ADD("ipu_pio0", 7372800/2, nflfoot_pio_intf)
MCFG_Z80PIO_ADD("ipu_pio1", 7372800/2, nflfoot_pio_intf)
MCFG_Z80SIO_ADD("ipu_sio", 7372800/2 /* same as "ipu" */, nflfoot_sio_intf)

View File

@ -1287,7 +1287,9 @@ static MACHINE_CONFIG_START( mcrmono, mcr3_state )
MCFG_CPU_CONFIG(mcr_daisy_chain)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", mcr3_state, mcr_interrupt, "screen", 0, 1)
MCFG_Z80CTC_ADD("ctc", MASTER_CLOCK/4 /* same as "maincpu" */, mcr_ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, MASTER_CLOCK/4 /* same as "maincpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("ctc", z80ctc_device, trg1))
MCFG_WATCHDOG_VBLANK_INIT(16)
MCFG_MACHINE_START_OVERRIDE(mcr3_state,mcr)
@ -1407,7 +1409,9 @@ static MACHINE_CONFIG_START( spyhuntpr, mcr3_state )
MCFG_CPU_CONFIG(mcr_daisy_chain)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", mcr3_state, mcr_interrupt, "screen", 0, 1)
MCFG_Z80CTC_ADD("ctc", MASTER_CLOCK/4 /* same as "maincpu" */, mcr_ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, MASTER_CLOCK/4 /* same as "maincpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("ctc", z80ctc_device, trg1))
//MCFG_WATCHDOG_VBLANK_INIT(16)
MCFG_MACHINE_START_OVERRIDE(mcr3_state,mcr)

View File

@ -918,22 +918,6 @@ static INPUT_PORTS_START( mlanding )
INPUT_PORTS_END
/*************************************
*
* Device configuration
*
*************************************/
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_NULL, // Interrupt handler
DEVCB_DRIVER_LINE_MEMBER(mlanding_state, z80ctc_to0), // ZC/TO0 callback
DEVCB_NULL, // ZC/TO1 callback
DEVCB_NULL // ZC/TO2 callback
};
/*************************************
*
* Machine driver
@ -963,7 +947,8 @@ static MACHINE_CONFIG_START( mlanding, mlanding_state )
MCFG_CPU_DATA_MAP(dsp_map_data)
MCFG_CPU_IO_MAP(dsp_map_io)
MCFG_Z80CTC_ADD("ctc", 4000000, ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, 4000000)
MCFG_Z80CTC_ZC0_CB(WRITELINE(mlanding_state, z80ctc_to0))
MCFG_DEVICE_ADD("tc0140syt", TC0140SYT, 0)
MCFG_TC0140SYT_MASTER_CPU("maincpu")

View File

@ -612,22 +612,6 @@ INTERRUPT_GEN_MEMBER(nbmj9195_state::ctc0_trg1)
ctc->trg1(0);
}
static Z80CTC_INTERFACE( ctc_intf_main )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),/* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static Z80CTC_INTERFACE( ctc_intf_audio )
{
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0),/* interrupt handler */
DEVCB_DEVICE_LINE_MEMBER("audio_ctc", z80ctc_device, trg3), /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
void nbmj9195_state::machine_reset()
{
address_space &space = m_maincpu->space(AS_PROGRAM);
@ -3166,9 +3150,12 @@ static MACHINE_CONFIG_START( NBMJDRV1, nbmj9195_state )
MCFG_CPU_PROGRAM_MAP(sailorws_sound_map)
MCFG_CPU_IO_MAP(sailorws_sound_io_map)
MCFG_Z80CTC_ADD("main_ctc", 12000000/2 /* same as "maincpu" */, ctc_intf_main)
MCFG_Z80CTC_ADD("audio_ctc", 8000000 /* same as "audiocpu" */, ctc_intf_audio)
MCFG_DEVICE_ADD("main_ctc", Z80CTC, 12000000/2 /* same as "maincpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD("audio_ctc", Z80CTC, 8000000 /* same as "audiocpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("audiocpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("audio_ctc", z80ctc_device, trg3))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

View File

@ -233,14 +233,6 @@ WRITE8_MEMBER(niyanpai_state::tmpz84c011_0_dir_pe_w)
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0),/* interrupt handler */
DEVCB_DEVICE_LINE_MEMBER("ctc", z80ctc_device, trg3), /* ZC/TO0 callback ctc1.zc0 -> ctc1.trg3 */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
void niyanpai_state::machine_reset()
{
address_space &space = m_maincpu->space(AS_PROGRAM);
@ -950,7 +942,9 @@ static MACHINE_CONFIG_START( niyanpai, niyanpai_state )
MCFG_CPU_PROGRAM_MAP(niyanpai_sound_map)
MCFG_CPU_IO_MAP(niyanpai_sound_io_map)
MCFG_Z80CTC_ADD("ctc", 8000000 /* same as "audiocpu" */, ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, 8000000 /* same as "audiocpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("audiocpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg3))
MCFG_NVRAM_ADD_0FILL("nvram")

View File

@ -315,14 +315,6 @@ static GFXDECODE_START( pipeline )
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x3, 0x100, 32 ) // 3bpp tiles
GFXDECODE_END
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0), // interrupt handler
DEVCB_NULL, // ZC/TO0 callback
DEVCB_NULL, // ZC/TO1 callback
DEVCB_NULL // ZC/TO2 callback
};
static const z80_daisy_config daisy_chain_sound[] =
{
{ "ctc" },
@ -370,7 +362,8 @@ static MACHINE_CONFIG_START( pipeline, pipeline_state )
MCFG_CPU_ADD("mcu", M68705, 7372800/2)
MCFG_CPU_PROGRAM_MAP(mcu_mem)
MCFG_Z80CTC_ADD( "ctc", 7372800/2 /* same as "audiocpu" */, ctc_intf )
MCFG_DEVICE_ADD("ctc", Z80CTC, 7372800/2 /* same as "audiocpu" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("audiocpu", INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD("ppi8255_0", I8255A, 0)
MCFG_I8255_IN_PORTA_CB(IOPORT("P1"))

View File

@ -321,14 +321,6 @@ static Z80PIO_INTERFACE( pio_interface_5 )
};
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, // ZC/TO0 callback
DEVCB_NULL, // ZC/TO1 callback
DEVCB_NULL // ZC/TO2 callback
};
WRITE16_MEMBER(proconn_state::serial_transmit)
{
//Don't like the look of this, should be a clock somewhere
@ -410,7 +402,10 @@ static MACHINE_CONFIG_START( proconn, proconn_state )
MCFG_Z80PIO_ADD( "z80pio_3", 4000000, pio_interface_3 ) /* ?? Mhz */
MCFG_Z80PIO_ADD( "z80pio_4", 4000000, pio_interface_4 ) /* ?? Mhz */
MCFG_Z80PIO_ADD( "z80pio_5", 4000000, pio_interface_5 ) /* ?? Mhz */
MCFG_Z80CTC_ADD( "z80ctc", 4000000, ctc_intf ) /* ?? Mhz */
MCFG_DEVICE_ADD("z80ctc", Z80CTC, 4000000)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80SIO_ADD( "z80sio", 4000000, sio_intf ) /* ?? Mhz */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")

View File

@ -561,9 +561,12 @@ static MACHINE_CONFIG_START( senjyo, senjyo_state )
MCFG_CPU_PROGRAM_MAP(senjyo_sound_map)
MCFG_CPU_IO_MAP(senjyo_sound_io_map)
MCFG_Z80PIO_ADD( "z80pio", 2000000, senjyo_pio_intf )
MCFG_Z80CTC_ADD( "z80ctc", 2000000 /* same as "sub" */, senjyo_ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, 2000000 /* same as "sub" */)
MCFG_Z80CTC_INTR_CB(INPUTLINE("sub", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg1))
MCFG_Z80CTC_ZC2_CB(WRITELINE(senjyo_state, sound_line_clock))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

View File

@ -521,19 +521,6 @@ static GFXDECODE_START( topspeed )
GFXDECODE_END
/***********************************************************
DEVICES
***********************************************************/
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_NULL, // Interrupt handler
DEVCB_DRIVER_LINE_MEMBER(topspeed_state, z80ctc_to0), // ZC/TO0 callback
DEVCB_NULL, // ZC/TO1 callback
DEVCB_NULL // ZC/TO2 callback
};
/***********************************************************
MACHINE DRIVERS
***********************************************************/
@ -583,7 +570,8 @@ static MACHINE_CONFIG_START( topspeed, topspeed_state )
MCFG_CPU_PROGRAM_MAP(z80_prg)
MCFG_CPU_IO_MAP(z80_io)
MCFG_Z80CTC_ADD("ctc", XTAL_16MHz / 4, ctc_intf)
MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_16MHz / 4)
MCFG_Z80CTC_ZC0_CB(WRITELINE(topspeed_state, z80ctc_to0))
MCFG_DEVICE_ADD("pc080sn_1", PC080SN, 0)
MCFG_PC080SN_GFX_REGION(1)

View File

@ -61,7 +61,3 @@ public:
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
};
/*----------- defined in audio/cchasm.c -----------*/
extern const z80ctc_interface cchasm_ctc_intf;

View File

@ -133,8 +133,6 @@ public:
extern const z80_daisy_config mcr_daisy_chain[];
extern const z80_daisy_config mcr_ipu_daisy_chain[];
extern const z80ctc_interface mcr_ctc_intf;
extern const z80ctc_interface nflfoot_ctc_intf;
extern const z80pio_interface nflfoot_pio_intf;
extern const z80sio_interface nflfoot_sio_intf;
extern UINT8 mcr_cocktail_flip;

View File

@ -100,4 +100,3 @@ public:
/*----------- defined in audio/senjyo.c -----------*/
extern const z80_daisy_config senjyo_daisy_chain[];
extern const z80pio_interface senjyo_pio_intf;
extern const z80ctc_interface senjyo_ctc_intf;

View File

@ -115,14 +115,6 @@ WRITE_LINE_MEMBER(inder_sb_device::z80ctc_ch3)
static Z80CTC_INTERFACE( z80ctc_intf ) // runs in IM2 , vector set to 0x20 , values there are 0xCC, 0x02, 0xE6, 0x02, 0x09, 0x03, 0x23, 0x03 (so 02cc, 02e6, 0309, 0323, all of which are valid irq handlers)
{
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, inder_sb_device, z80ctc_ch0), // for channel 0
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, inder_sb_device, z80ctc_ch1), // for channel 1
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, inder_sb_device, z80ctc_ch2), // for channel 2
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, inder_sb_device, z80ctc_ch3), // for channel 3
};
static const z80_daisy_config daisy_chain[] =
{
{ "ctc" },
@ -269,7 +261,13 @@ static MACHINE_CONFIG_FRAGMENT( inder_sb )
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_io)
MCFG_Z80CTC_ADD( "ctc", 4000000, z80ctc_intf ) // unk freq
MCFG_DEVICE_ADD("ctc", Z80CTC, 4000000) // unk freq
// runs in IM2 , vector set to 0x20 , values there are 0xCC, 0x02, 0xE6, 0x02, 0x09, 0x03, 0x23, 0x03 (so 02cc, 02e6, 0309, 0323, all of which are valid irq handlers)
MCFG_Z80CTC_INTR_CB(WRITELINE(inder_sb_device, z80ctc_ch0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(inder_sb_device, z80ctc_ch1))
MCFG_Z80CTC_ZC1_CB(WRITELINE(inder_sb_device, z80ctc_ch2))
MCFG_Z80CTC_ZC2_CB(WRITELINE(inder_sb_device, z80ctc_ch3))
// was this correct?!?
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_DAC_ADD("dac0")
@ -280,8 +278,6 @@ static MACHINE_CONFIG_FRAGMENT( inder_sb )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MCFG_DAC_ADD("dac3")
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MACHINE_CONFIG_END
machine_config_constructor inder_sb_device::device_mconfig_additions() const

View File

@ -92,24 +92,6 @@ const z80_daisy_config mcr_ipu_daisy_chain[] =
};
Z80CTC_INTERFACE( mcr_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DEVICE_LINE_MEMBER("ctc", z80ctc_device, trg1), /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
Z80CTC_INTERFACE( nflfoot_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("ipu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
Z80PIO_INTERFACE( nflfoot_pio_intf )
{
DEVCB_CPU_INPUT_LINE("ipu", INPUT_LINE_IRQ0), /* interrupt handler */

View File

@ -552,14 +552,6 @@ static SLOT_INTERFACE_START( a5105_floppies )
SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
SLOT_INTERFACE_END
static Z80CTC_INTERFACE( a5105_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", 0), /* interrupt callback */
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg2), /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg3) /* ZC/TO2 callback */
};
static Z80PIO_INTERFACE( a5105_pio_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", 0), /* callback when change interrupt status */
@ -609,7 +601,11 @@ static MACHINE_CONFIG_START( a5105, a5105_state )
MCFG_UPD7220_DISPLAY_PIXELS_CALLBACK_OWNER(a5105_state, hgdc_display_pixels)
MCFG_UPD7220_DRAW_TEXT_CALLBACK_OWNER(a5105_state, hgdc_draw_text)
MCFG_Z80CTC_ADD( "z80ctc", XTAL_15MHz / 4, a5105_ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_15MHz / 4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", 0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg2))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg3))
MCFG_Z80PIO_ADD( "z80pio", XTAL_15MHz / 4, a5105_pio_intf )
MCFG_CASSETTE_ADD( "cassette", default_cassette_interface )

View File

@ -627,7 +627,7 @@ INPUT_PORTS_END
//**************************************************************************
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc_intf )
// Z80CTC
//-------------------------------------------------
WRITE_LINE_MEMBER( abc800_state::ctc_z0_w )
@ -661,15 +661,6 @@ WRITE_LINE_MEMBER( abc800_state::ctc_z2_w )
m_dart->txca_w(state);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), // interrupt handler
DEVCB_DRIVER_LINE_MEMBER(abc800_state, ctc_z0_w), // ZC/TO0 callback
DEVCB_DRIVER_LINE_MEMBER(abc800_state, ctc_z1_w), // ZC/TO1 callback
DEVCB_DRIVER_LINE_MEMBER(abc800_state, ctc_z2_w), // ZC/TO2 callback
};
//-------------------------------------------------
// Z80SIO_INTERFACE( sio_intf )
//-------------------------------------------------
@ -1141,7 +1132,12 @@ static MACHINE_CONFIG_START( abc800c, abc800c_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
// peripheral hardware
MCFG_Z80CTC_ADD(Z80CTC_TAG, ABC800_X01/2/2, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, ABC800_X01/2/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(abc800_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(abc800_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(abc800_state, ctc_z2_w))
MCFG_Z80SIO2_ADD(Z80SIO_TAG, ABC800_X01/2/2, sio_intf)
MCFG_Z80DART_ADD(Z80DART_TAG, ABC800_X01/2/2, abc800_dart_intf)
MCFG_CASSETTE_ADD("cassette", cass_intf)
@ -1196,7 +1192,12 @@ static MACHINE_CONFIG_START( abc800m, abc800m_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
// peripheral hardware
MCFG_Z80CTC_ADD(Z80CTC_TAG, ABC800_X01/2/2, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, ABC800_X01/2/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(abc800_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(abc800_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(abc800_state, ctc_z2_w))
MCFG_Z80SIO2_ADD(Z80SIO_TAG, ABC800_X01/2/2, sio_intf)
MCFG_Z80DART_ADD(Z80DART_TAG, ABC800_X01/2/2, abc800_dart_intf)
MCFG_CASSETTE_ADD("cassette", cass_intf)
@ -1251,7 +1252,12 @@ static MACHINE_CONFIG_START( abc802, abc802_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
// peripheral hardware
MCFG_Z80CTC_ADD(Z80CTC_TAG, ABC800_X01/2/2, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, ABC800_X01/2/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(abc800_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(abc800_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(abc800_state, ctc_z2_w))
MCFG_Z80SIO2_ADD(Z80SIO_TAG, ABC800_X01/2/2, sio_intf)
MCFG_Z80DART_ADD(Z80DART_TAG, ABC800_X01/2/2, abc802_dart_intf)
MCFG_CASSETTE_ADD("cassette", cass_intf)
@ -1300,7 +1306,13 @@ static MACHINE_CONFIG_START( abc806, abc806_state )
// peripheral hardware
MCFG_E0516_ADD(E0516_TAG, ABC806_X02)
MCFG_Z80CTC_ADD(Z80CTC_TAG, ABC800_X01/2/2, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, ABC800_X01/2/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(abc800_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(abc800_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(abc800_state, ctc_z2_w))
MCFG_Z80SIO2_ADD(Z80SIO_TAG, ABC800_X01/2/2, sio_intf)
MCFG_Z80DART_ADD(Z80DART_TAG, ABC800_X01/2/2, abc806_dart_intf)

View File

@ -277,14 +277,6 @@ WRITE_LINE_MEMBER( altos5_state::ctc_z1_w )
m_sio->txca_w(state);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
DEVCB_DEVICE_LINE_MEMBER("z80sio", z80dart_device, rxtxcb_w), /* ZC/TO0 callback - SIO Ch B */
DEVCB_DRIVER_LINE_MEMBER(altos5_state, ctc_z1_w), /* ZC/TO1 callback - Z80DART Ch A, SIO Ch A */
DEVCB_DEVICE_LINE_MEMBER("z80dart", z80dart_device, rxtxcb_w), /* ZC/TO2 callback - Z80DART Ch B */
};
// system functions
static Z80PIO_INTERFACE( pio0_intf )
{
@ -482,10 +474,15 @@ static MACHINE_CONFIG_START( altos5, altos5_state )
MCFG_Z80DMA_ADD( "z80dma", XTAL_8MHz / 2, dma_intf)
MCFG_Z80PIO_ADD( "z80pio_0", XTAL_8MHz / 2, pio0_intf )
MCFG_Z80PIO_ADD( "z80pio_1", XTAL_8MHz / 2, pio1_intf )
MCFG_Z80CTC_ADD( "z80ctc", XTAL_8MHz / 2, ctc_intf )
MCFG_Z80DART_ADD("z80dart", XTAL_8MHz / 2, dart_intf )
MCFG_Z80SIO0_ADD("z80sio", XTAL_8MHz / 2, sio_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_8MHz / 2)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80sio", z80dart_device, rxtxcb_w)) // SIO Ch B
MCFG_Z80CTC_ZC1_CB(WRITELINE(altos5_state, ctc_z1_w)) // Z80DART Ch A, SIO Ch A
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE("z80dart", z80dart_device, rxtxcb_w)) // Z80DART Ch B
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("z80sio", z80dart_device, rxb_w))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("z80sio", z80dart_device, dcdb_w))

View File

@ -155,14 +155,6 @@ WRITE_LINE_MEMBER( ampro_state::ctc_z0_w )
m_dart->txca_w(state);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
DEVCB_DRIVER_LINE_MEMBER(ampro_state, ctc_z0_w), /* ZC/TO0 callback - Z80DART Ch A, SIO Ch A */
DEVCB_DEVICE_LINE_MEMBER("z80dart", z80dart_device, rxtxcb_w), /* ZC/TO1 callback - SIO Ch B */
DEVCB_NULL /* ZC/TO2 callback */
};
static SLOT_INTERFACE_START( ampro_floppies )
SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
SLOT_INTERFACE_END
@ -195,7 +187,11 @@ static MACHINE_CONFIG_START( ampro, ampro_state )
MCFG_MACHINE_RESET_OVERRIDE(ampro_state, ampro)
/* Devices */
MCFG_Z80CTC_ADD( "z80ctc", XTAL_16MHz / 4, ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_16MHz / 4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(ampro_state, ctc_z0_w)) // Z80DART Ch A, SIO Ch A
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE("z80dart", z80dart_device, rxtxcb_w)) // SIO Ch B
MCFG_Z80DART_ADD("z80dart", XTAL_16MHz / 4, dart_intf )
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("z80dart", z80dart_device, rxa_w))

View File

@ -249,7 +249,7 @@ static Z80SIO_INTERFACE( sio_intf )
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc_intf )
// Z80CTC
//-------------------------------------------------
WRITE_LINE_MEMBER( f1_state::ctc_int_w )
@ -270,15 +270,6 @@ WRITE_LINE_MEMBER( f1_state::ctc_z2_w )
m_sio->txca_w(state);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_DRIVER_LINE_MEMBER(f1_state, ctc_int_w), // interrupt handler
DEVCB_NULL, // ZC/TO0 callback
DEVCB_DRIVER_LINE_MEMBER(f1_state, ctc_z1_w), // ZC/TO1 callback
DEVCB_DRIVER_LINE_MEMBER(f1_state, ctc_z2_w), // ZC/TO2 callback
};
//-------------------------------------------------
// floppy
//-------------------------------------------------
@ -319,7 +310,11 @@ static MACHINE_CONFIG_START( act_f1, f1_state )
/* Devices */
MCFG_DEVICE_ADD(APRICOT_KEYBOARD_TAG, APRICOT_KEYBOARD, 0)
MCFG_Z80SIO2_ADD(Z80SIO2_TAG, 2500000, sio_intf)
MCFG_Z80CTC_ADD(Z80CTC_TAG, 2500000, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, 2500000)
MCFG_Z80CTC_INTR_CB(WRITELINE(f1_state, ctc_int_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(f1_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(f1_state, ctc_z2_w))
MCFG_CENTRONICS_ADD("centronics", centronics_printers, "printer")
MCFG_CENTRONICS_BUSY_HANDLER(DEVWRITELINE(Z80SIO2_TAG, z80dart_device, ctsa_w))

View File

@ -905,14 +905,6 @@ static Z80SIO_INTERFACE( sio_interface )
DEVCB_NULL
};
static const z80ctc_interface ctc_interface =
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
DEVCB_NULL, // zc0_cb
DEVCB_NULL, // zc1_cb
DEVCB_NULL // zc2_cb
};
static const am9517a_interface dma_interface =
{
DEVCB_DRIVER_LINE_MEMBER(attache_state,hreq_w), // out_hreq_cb
@ -1018,7 +1010,9 @@ static MACHINE_CONFIG_START( attache, attache_state )
MCFG_Z80PIO_ADD("pio",XTAL_8MHz / 26, pio_interface)
MCFG_Z80SIO0_ADD("sio",XTAL_8MHz / 26, sio_interface)
MCFG_Z80CTC_ADD("ctc",XTAL_8MHz / 4, ctc_interface)
MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_8MHz / 4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_AM9517A_ADD("dma",XTAL_8MHz / 4, dma_interface)

View File

@ -151,14 +151,6 @@ WRITE_LINE_MEMBER( babbage_state::ctc_z2_w )
{
}
static Z80CTC_INTERFACE( babbage_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DRIVER_LINE_MEMBER(babbage_state, ctc_z0_w), /* ZC/TO0 callback */
DEVCB_DRIVER_LINE_MEMBER(babbage_state, ctc_z1_w), /* ZC/TO1 callback */
DEVCB_DRIVER_LINE_MEMBER(babbage_state, ctc_z2_w) /* ZC/TO2 callback */
};
/* Z80-PIO Interface */
// The 8 LEDs
@ -273,7 +265,12 @@ static MACHINE_CONFIG_START( babbage, babbage_state )
MCFG_DEFAULT_LAYOUT(layout_babbage)
/* Devices */
MCFG_Z80CTC_ADD( "z80ctc", MAIN_CLOCK, babbage_ctc_intf)
MCFG_DEVICE_ADD("z80ctc", Z80CTC, MAIN_CLOCK)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(babbage_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(babbage_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(babbage_state, ctc_z2_w))
MCFG_Z80PIO_ADD( "z80pio_1", MAIN_CLOCK, babbage_z80pio1_intf )
MCFG_Z80PIO_ADD( "z80pio_2", MAIN_CLOCK, babbage_z80pio2_intf )

View File

@ -469,27 +469,6 @@ WRITE_LINE_MEMBER( bigbord2_state::frame )
}
// other inputs of ctca:
// trg0 = KBDSTB; trg1 = index pulse from fdc; trg2 = synca output from sio
static Z80CTC_INTERFACE( ctca_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback - KBDCLK */
DEVCB_NULL, /* ZC/TO1 callback - not connected */
DEVCB_NULL /* ZC/TO2 callback - not connected */
};
static Z80CTC_INTERFACE( ctcb_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback - SIO channel B clock */
DEVCB_NULL, /* ZC/TO1 callback - SIO channel A clock */
DEVCB_DEVICE_LINE_MEMBER(Z80CTCB_TAG, z80ctc_device, trg3) /* ZC/TO2 callback */
};
/* Z80 Daisy Chain */
static const z80_daisy_config bigbord2_daisy_chain[] =
@ -640,8 +619,17 @@ static MACHINE_CONFIG_START( bigbord2, bigbord2_state )
/* devices */
MCFG_Z80DMA_ADD(Z80DMA_TAG, MAIN_CLOCK, dma_intf)
MCFG_Z80SIO0_ADD(Z80SIO_TAG, MAIN_CLOCK, sio_intf)
MCFG_Z80CTC_ADD(Z80CTCA_TAG, MAIN_CLOCK, ctca_intf)
MCFG_Z80CTC_ADD(Z80CTCB_TAG, MAIN_CLOCK / 6, ctcb_intf)
MCFG_DEVICE_ADD(Z80CTCA_TAG, Z80CTC, MAIN_CLOCK)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
// other inputs of ctca:
// trg0 = KBDSTB; trg1 = index pulse from fdc; trg2 = synca output from sio
MCFG_DEVICE_ADD(Z80CTCB_TAG, Z80CTC, MAIN_CLOCK / 6)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
// ZC0 = SIO channel B clock, ZC1 = SIO channel A clock
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(Z80CTCB_TAG, z80ctc_device, trg3))
MCFG_MB8877x_ADD("fdc", XTAL_16MHz / 16)
MCFG_FLOPPY_DRIVE_ADD("fdc:0", bigbord2_floppies, "525dd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", bigbord2_floppies, "525dd", floppy_image_device::default_floppy_formats)

View File

@ -537,14 +537,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(dg680_state::uart_tick)
m_ctc->trg3(0);
}
static Z80CTC_INTERFACE( z80ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt handler
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg1), // ZC/TO0 callback
DEVCB_NULL, // ZC/TO1 callback
DEVCB_NULL // ZC/TO2 callback
};
static MACHINE_CONFIG_START( dg680, dg680_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",Z80, XTAL_8MHz / 4)
@ -575,7 +567,10 @@ static MACHINE_CONFIG_START( dg680, dg680_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
/* Devices */
MCFG_Z80CTC_ADD( "z80ctc", XTAL_8MHz / 4, z80ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_8MHz / 4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg1))
MCFG_Z80PIO_ADD( "z80pio", XTAL_8MHz / 4, z80pio_intf )
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc0", dg680_state, time_tick, attotime::from_hz(200))
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc3", dg680_state, uart_tick, attotime::from_hz(4800))

View File

@ -711,7 +711,7 @@ INPUT_PORTS_END
//**************************************************************************
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc_intf )
// Z80CTC
//-------------------------------------------------
TIMER_DEVICE_CALLBACK_MEMBER(bullet_state::ctc_tick)
@ -732,15 +732,6 @@ WRITE_LINE_MEMBER( bullet_state::dart_rxtxca_w )
m_dart->rxca_w(state);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_DRIVER_LINE_MEMBER(bullet_state, dart_rxtxca_w),
DEVCB_DEVICE_LINE_MEMBER(Z80DART_TAG, z80dart_device, rxtxcb_w),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF, z80ctc_device, trg3)
};
//-------------------------------------------------
// Z80DART_INTERFACE( dart_intf )
//-------------------------------------------------
@ -1191,8 +1182,14 @@ static MACHINE_CONFIG_START( bullet, bullet_state )
MCFG_CPU_CONFIG(daisy_chain)
// devices
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_16MHz/4, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_16MHz/4)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(bullet_state, dart_rxtxca_w))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(Z80DART_TAG, z80dart_device, rxtxcb_w))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg3))
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc", bullet_state, ctc_tick, attotime::from_hz(XTAL_4_9152MHz/4))
MCFG_Z80DART_ADD(Z80DART_TAG, XTAL_16MHz/4, dart_intf)
MCFG_Z80DMA_ADD(Z80DMA_TAG, XTAL_16MHz/4, dma_intf)
MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_16MHz/4, pio_intf)
@ -1244,8 +1241,14 @@ static MACHINE_CONFIG_START( bulletf, bulletf_state )
MCFG_CPU_CONFIG(daisy_chain)
// devices
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_16MHz/4, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_16MHz/4)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(bullet_state, dart_rxtxca_w))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(Z80DART_TAG, z80dart_device, rxtxcb_w))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg3))
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc", bullet_state, ctc_tick, attotime::from_hz(XTAL_4_9152MHz/4))
MCFG_Z80DART_ADD(Z80DART_TAG, XTAL_16MHz/4, dart_intf)
MCFG_Z80DMA_ADD(Z80DMA_TAG, XTAL_16MHz/4, dma_intf)
MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_16MHz/4, bulletf_pio_intf)

View File

@ -151,14 +151,6 @@ WRITE_LINE_MEMBER( czk80_state::ctc_z2_w )
{
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DRIVER_LINE_MEMBER(czk80_state, ctc_z0_w), /* ZC/TO0 callback */
DEVCB_DRIVER_LINE_MEMBER(czk80_state, ctc_z1_w), /* ZC/TO1 callback */
DEVCB_DRIVER_LINE_MEMBER(czk80_state, ctc_z2_w) /* ZC/TO2 callback */
};
static Z80DART_INTERFACE( dart_intf )
{
0, 0, 0, 0,
@ -242,7 +234,13 @@ static MACHINE_CONFIG_START( czk80, czk80_state )
MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(czk80_state, kbd_put))
MCFG_UPD765A_ADD("fdc", false, true)
MCFG_FLOPPY_DRIVE_ADD("fdc:0", czk80_floppies, "525dd", floppy_image_device::default_floppy_formats)
MCFG_Z80CTC_ADD( "z80ctc", XTAL_16MHz / 4, ctc_intf)
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_16MHz / 4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(czk80_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(czk80_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(czk80_state, ctc_z2_w))
MCFG_Z80DART_ADD("z80dart", XTAL_16MHz / 4, dart_intf)
MCFG_Z80PIO_ADD( "z80pio", XTAL_16MHz / 4, pio_intf)
MACHINE_CONFIG_END

View File

@ -666,14 +666,6 @@ INPUT_PORTS_END
MACHINE DRIVERS
***************************************************************************/
static Z80CTC_INTERFACE( einstein_ctc_intf )
{
DEVCB_NULL,
DEVCB_DRIVER_LINE_MEMBER(einstein_state,einstein_serial_transmit_clock),
DEVCB_DRIVER_LINE_MEMBER(einstein_state,einstein_serial_receive_clock),
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF, z80ctc_device, trg3)
};
static Z80PIO_INTERFACE( einstein_pio_intf )
{
DEVCB_NULL,
@ -747,7 +739,11 @@ static MACHINE_CONFIG_START( einstein, einstein_state )
MCFG_Z80PIO_ADD(IC_I063, XTAL_X002 / 2, einstein_pio_intf)
MCFG_Z80CTC_ADD(IC_I058, XTAL_X002 / 2, einstein_ctc_intf)
MCFG_DEVICE_ADD(IC_I058, Z80CTC, XTAL_X002 / 2)
MCFG_Z80CTC_ZC0_CB(WRITELINE(einstein_state, einstein_serial_transmit_clock))
MCFG_Z80CTC_ZC1_CB(WRITELINE(einstein_state, einstein_serial_receive_clock))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(IC_I058, z80ctc_device, trg3))
/* the input to channel 0 and 1 of the ctc is a 2 MHz clock */
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc", einstein_state, einstein_ctc_trigger_callback, attotime::from_hz(XTAL_X002 /4))

View File

@ -251,14 +251,6 @@ WRITE_LINE_MEMBER(amu880_state::ctc_z2_w)
/* cassette transmit/receive clock */
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DRIVER_LINE_MEMBER(amu880_state,ctc_z0_w), /* ZC/TO0 callback */
DEVCB_DEVICE_LINE_MEMBER(Z80SIO_TAG, z80dart_device, rxtxcb_w), /* ZC/TO1 callback */
DEVCB_DRIVER_LINE_MEMBER(amu880_state,ctc_z2_w) /* ZC/TO2 callback */
};
/* Z80-PIO Interface */
static Z80PIO_INTERFACE( pio1_intf )
@ -407,7 +399,12 @@ static MACHINE_CONFIG_START( amu880, amu880_state )
MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
/* devices */
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_10MHz/4, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_10MHz/4)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(amu880_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(Z80SIO_TAG, z80dart_device, rxtxcb_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(amu880_state, ctc_z2_w))
MCFG_Z80PIO_ADD(Z80PIO1_TAG, XTAL_10MHz/4, pio1_intf)
MCFG_Z80PIO_ADD(Z80PIO2_TAG, XTAL_10MHz/4, pio2_intf)
MCFG_Z80SIO0_ADD(Z80SIO_TAG, XTAL_10MHz/4, sio_intf) // U856

View File

@ -98,14 +98,6 @@ Z80PIO_INTERFACE( kc85_pio_intf )
DEVCB_DRIVER_LINE_MEMBER(kc_state, pio_brdy_cb) /* portB ready active callback */
};
Z80CTC_INTERFACE( kc85_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", 0),
DEVCB_DRIVER_LINE_MEMBER(kc_state, ctc_zc0_callback),
DEVCB_DRIVER_LINE_MEMBER(kc_state, ctc_zc1_callback),
DEVCB_DRIVER_LINE_MEMBER(kc_state, video_toggle_blink_state)
};
static const cassette_interface kc_cassette_interface =
{
kc_cassette_formats,
@ -124,7 +116,12 @@ static MACHINE_CONFIG_START( kc85_3, kc_state )
MCFG_QUANTUM_TIME(attotime::from_hz(60))
MCFG_Z80PIO_ADD( "z80pio", KC85_3_CLOCK, kc85_pio_intf )
MCFG_Z80CTC_ADD( "z80ctc", KC85_3_CLOCK, kc85_ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, KC85_3_CLOCK)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", 0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(kc_state, ctc_zc0_callback))
MCFG_Z80CTC_ZC1_CB(WRITELINE(kc_state, ctc_zc1_callback))
MCFG_Z80CTC_ZC2_CB(WRITELINE(kc_state, video_toggle_blink_state))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -193,7 +190,12 @@ static MACHINE_CONFIG_START( kc85_4, kc85_4_state )
MCFG_QUANTUM_TIME(attotime::from_hz(60))
MCFG_Z80PIO_ADD( "z80pio", KC85_4_CLOCK, kc85_pio_intf )
MCFG_Z80CTC_ADD( "z80ctc", KC85_4_CLOCK, kc85_ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, KC85_4_CLOCK)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", 0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(kc_state, ctc_zc0_callback))
MCFG_Z80CTC_ZC1_CB(WRITELINE(kc_state, ctc_zc1_callback))
MCFG_Z80CTC_ZC2_CB(WRITELINE(kc_state, video_toggle_blink_state))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

View File

@ -133,14 +133,6 @@ WRITE_LINE_MEMBER( lc80_state::ctc_z2_w )
{
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DRIVER_LINE_MEMBER(lc80_state, ctc_z0_w), /* ZC/TO0 callback */
DEVCB_DRIVER_LINE_MEMBER(lc80_state, ctc_z1_w), /* ZC/TO1 callback */
DEVCB_DRIVER_LINE_MEMBER(lc80_state, ctc_z2_w) /* ZC/TO2 callback */
};
/* Z80-PIO Interface */
void lc80_state::update_display()
@ -375,7 +367,12 @@ static MACHINE_CONFIG_START( lc80, lc80_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
/* devices */
MCFG_Z80CTC_ADD(Z80CTC_TAG, 900000, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, 900000)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(lc80_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(lc80_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(lc80_state, ctc_z2_w))
MCFG_Z80PIO_ADD(Z80PIO1_TAG, 900000, pio1_intf)
MCFG_Z80PIO_ADD(Z80PIO2_TAG, 900000, pio2_intf)
@ -401,7 +398,12 @@ static MACHINE_CONFIG_START( lc80_2, lc80_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
/* devices */
MCFG_Z80CTC_ADD(Z80CTC_TAG, 900000, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, 900000)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(lc80_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(lc80_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(lc80_state, ctc_z2_w))
MCFG_Z80PIO_ADD(Z80PIO1_TAG, 900000, pio1_intf)
MCFG_Z80PIO_ADD(Z80PIO2_TAG, 900000, pio2_intf)

View File

@ -219,7 +219,15 @@ static MACHINE_CONFIG_START( llc1, llc_state )
MCFG_Z80PIO_ADD( "z80pio1", XTAL_3MHz, llc1_z80pio1_intf )
MCFG_Z80PIO_ADD( "z80pio2", XTAL_3MHz, llc1_z80pio2_intf )
MCFG_Z80CTC_ADD( "z80ctc", XTAL_3MHz, llc1_ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_3MHz)
// timer 0 irq does digit display, and timer 3 irq does scan of the
// monitor keyboard.
// No idea how the CTC is connected, so guessed.
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg1))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg3))
MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
MCFG_GENERIC_KEYBOARD_CB(WRITE8(llc_state, kbd_put))
MACHINE_CONFIG_END
@ -252,7 +260,9 @@ static MACHINE_CONFIG_START( llc2, llc_state )
MCFG_Z80PIO_ADD( "z80pio1", XTAL_3MHz, llc2_z80pio1_intf )
MCFG_Z80PIO_ADD( "z80pio2", XTAL_3MHz, llc2_z80pio2_intf )
MCFG_Z80CTC_ADD( "z80ctc", XTAL_3MHz, llc2_ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_3MHz)
MCFG_K7659_KEYBOARD_ADD()
/* internal ram */

View File

@ -401,21 +401,6 @@ INPUT_PORTS_END
// DEVICE CONFIGURATION
//**************************************************************************
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc_intf )
//-------------------------------------------------
// CK0 = EXINT, CK1 = GND, CK2 = TCK, CK3 = VDP INT
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL // EXCLK
};
//-------------------------------------------------
// cassette_interface cassette_intf
//-------------------------------------------------
@ -621,7 +606,10 @@ static MACHINE_CONFIG_START( m5, m5_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
// devices
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_14_31818MHz/4, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_14_31818MHz/4)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
// CK0 = EXINT, CK1 = GND, CK2 = TCK, CK3 = VDP INT
// ZC2 = EXCLK
MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "printer")
MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(m5_state, write_centronics_busy))

View File

@ -180,7 +180,13 @@ static MACHINE_CONFIG_START( mc8020, mc80_state )
/* Devices */
MCFG_Z80PIO_ADD( "z80pio", XTAL_2_4576MHz, mc8020_z80pio_intf )
MCFG_Z80CTC_ADD( "z80ctc", XTAL_2_4576MHz / 100, mc8020_ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_2_4576MHz / 100)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(mc80_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(mc80_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(mc80_state, ctc_z2_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("mc8020_kbd", mc80_state, mc8020_kbd, attotime::from_hz(50))
MACHINE_CONFIG_END
@ -208,9 +214,19 @@ static MACHINE_CONFIG_START( mc8030, mc80_state )
/* Devices */
MCFG_Z80PIO_ADD( "zve_pio", XTAL_2_4576MHz, mc8030_zve_z80pio_intf )
MCFG_Z80CTC_ADD( "zve_ctc", XTAL_2_4576MHz, mc8030_zve_z80ctc_intf )
MCFG_DEVICE_ADD("zve_ctc", Z80CTC, XTAL_2_4576MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// ZC0, ZC1, ZC2 for user
MCFG_Z80PIO_ADD( "asp_pio", XTAL_2_4576MHz, mc8030_asp_z80pio_intf )
MCFG_Z80CTC_ADD( "asp_ctc", XTAL_2_4576MHz, mc8030_asp_z80ctc_intf )
MCFG_DEVICE_ADD("asp_ctc", Z80CTC, XTAL_2_4576MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// ZC0: to SIO CLK CH A
// ZC1: to SIO CLK CH B
// ZC2: KMBG (??)
MCFG_Z80SIO0_ADD( "asp_sio", 4800, mc8030_asp_z80sio_intf )
MACHINE_CONFIG_END

View File

@ -264,16 +264,6 @@ WRITE8_MEMBER( mpf1_state::ppi_pc_w )
m_cassette->output( BIT(data, 7));
}
/* Z80CTC Interface */
static Z80CTC_INTERFACE( mpf1_ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
/* Z80PIO Interface */
static Z80PIO_INTERFACE( mpf1_pio_intf )
@ -344,7 +334,9 @@ static MACHINE_CONFIG_START( mpf1, mpf1_state )
/* devices */
MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_3_579545MHz/2, mpf1_pio_intf)
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_3_579545MHz/2, mpf1_ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_3_579545MHz/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(I8255A_TAG, I8255A, 0)
MCFG_I8255_IN_PORTA_CB(READ8(mpf1_state, ppi_pa_r))
@ -373,7 +365,9 @@ static MACHINE_CONFIG_START( mpf1b, mpf1_state )
/* devices */
MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_3_579545MHz/2, mpf1_pio_intf)
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_3_579545MHz/2, mpf1_ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_3_579545MHz/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(I8255A_TAG, I8255A, 0)
MCFG_I8255_IN_PORTA_CB(READ8(mpf1_state, ppi_pa_r))
@ -408,7 +402,9 @@ static MACHINE_CONFIG_START( mpf1p, mpf1_state )
/* devices */
MCFG_Z80PIO_ADD(Z80PIO_TAG, 2500000, mpf1_pio_intf)
MCFG_Z80CTC_ADD(Z80CTC_TAG, 2500000, mpf1_ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, 2500000)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD(I8255A_TAG, I8255A, 0)
MCFG_I8255_IN_PORTA_CB(READ8(mpf1_state, ppi_pa_r))

View File

@ -207,7 +207,7 @@ INPUT_PORTS_END
***************************************************************************/
/*-------------------------------------------------
Z80CTC_INTERFACE( ctc_intf )
Z80CTC
-------------------------------------------------*/
TIMER_DEVICE_CALLBACK_MEMBER(mtx_state::ctc_tick)
@ -235,14 +235,6 @@ WRITE_LINE_MEMBER(mtx_state::ctc_trg2_w)
}
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_NULL,
DEVCB_DRIVER_LINE_MEMBER(mtx_state,ctc_trg1_w),
DEVCB_DRIVER_LINE_MEMBER(mtx_state,ctc_trg2_w)
};
/*-------------------------------------------------
Z80DART_INTERFACE( dart_intf )
-------------------------------------------------*/
@ -355,7 +347,11 @@ static MACHINE_CONFIG_START( mtx512, mtx_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
/* devices */
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_4MHz, ctc_intf )
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_4MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC1_CB(WRITELINE(mtx_state, ctc_trg1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(mtx_state, ctc_trg2_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("z80ctc_timer", mtx_state, ctc_tick, attotime::from_hz(XTAL_4MHz/13))
MCFG_CENTRONICS_ADD(CENTRONICS_TAG, centronics_printers, "printer")

View File

@ -120,14 +120,6 @@ WRITE_LINE_MEMBER( nanos_state::ctc_z2_w )
{
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DRIVER_LINE_MEMBER(nanos_state, ctc_z0_w), /* ZC/TO0 callback */
DEVCB_DRIVER_LINE_MEMBER(nanos_state, ctc_z1_w), /* ZC/TO1 callback */
DEVCB_DRIVER_LINE_MEMBER(nanos_state, ctc_z2_w) /* ZC/TO2 callback */
};
/* Z80-PIO Interface */
static Z80PIO_INTERFACE( pio1_intf )
@ -575,8 +567,18 @@ static MACHINE_CONFIG_START( nanos, nanos_state )
MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
/* devices */
MCFG_Z80CTC_ADD( "z80ctc_0", XTAL_4MHz, ctc_intf)
MCFG_Z80CTC_ADD( "z80ctc_1", XTAL_4MHz, ctc_intf)
MCFG_DEVICE_ADD("z80ctc_0", Z80CTC, XTAL_4MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(nanos_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(nanos_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(nanos_state, ctc_z2_w))
MCFG_DEVICE_ADD("z80ctc_1", Z80CTC, XTAL_4MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(nanos_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(nanos_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(nanos_state, ctc_z2_w))
MCFG_Z80PIO_ADD( "z80pio_0", XTAL_4MHz, pio1_intf)
MCFG_Z80PIO_ADD( "z80pio_1", XTAL_4MHz, pio2_intf)
MCFG_Z80SIO0_ADD( "z80sio_0", XTAL_4MHz, sio1_intf)

View File

@ -1175,14 +1175,6 @@ WRITE_LINE_MEMBER( newbrain_eim_state::ctc_z2_w )
m_ctc->trg1(state);
}
static Z80CTC_INTERFACE( newbrain_ctc_intf )
{
DEVCB_NULL, /* interrupt handler */
DEVCB_DEVICE_LINE_MEMBER(MC6850_TAG, acia6850_device, write_rxc), /* ZC/TO0 callback */
DEVCB_DEVICE_LINE_MEMBER(MC6850_TAG, acia6850_device, write_txc), /* ZC/TO1 callback */
DEVCB_DRIVER_LINE_MEMBER(newbrain_eim_state, ctc_z2_w) /* ZC/TO2 callback */
};
TIMER_DEVICE_CALLBACK_MEMBER(newbrain_eim_state::ctc_c2_tick)
{
m_ctc->trg2(1);
@ -1380,7 +1372,11 @@ static MACHINE_CONFIG_DERIVED_CLASS( newbrain_eim, newbrain_a, newbrain_eim_stat
MCFG_CPU_IO_MAP(newbrain_fdc_io_map)
// devices
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_16MHz/8, newbrain_ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_16MHz/8)
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE(MC6850_TAG, acia6850_device, write_rxc))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(MC6850_TAG, acia6850_device, write_txc))
MCFG_Z80CTC_ZC2_CB(WRITELINE(newbrain_eim_state, ctc_z2_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("z80ctc_c2", newbrain_eim_state, ctc_c2_tick, attotime::from_hz(XTAL_16MHz/4/13))
MCFG_ADC0808_ADD(ADC0809_TAG, 500000, adc_intf)

View File

@ -69,10 +69,6 @@ WRITE8_MEMBER( onyx_state::kbd_put )
}
#if 0
WRITE_LINE_MEMBER( onyx_state::p8k_daisy_interrupt )
{
m_maincpu->set_input_line(0, state);
}
/* Z80 DMA */
@ -119,32 +115,6 @@ static Z80DMA_INTERFACE( p8k_dma_intf )
DEVCB_DRIVER_MEMBER(onyx_state, io_write_byte)
};
/* Z80 CTC 0 */
// to implement: callbacks!
// manual states the callbacks should go to
// Baud Gen 3, FDC, System-Kanal
static Z80CTC_INTERFACE( p8k_ctc_0_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
/* Z80 CTC 1 */
// to implement: callbacks!
// manual states the callbacks should go to
// Baud Gen 0, Baud Gen 1, Baud Gen 2,
static Z80CTC_INTERFACE( p8k_ctc_1_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL, /* ZC/TO2 callback */
};
/* Z80 PIO 0 */
static Z80PIO_INTERFACE( p8k_pio_0_intf )
@ -271,30 +241,6 @@ ADDRESS_MAP_END
#if 0
WRITE_LINE_MEMBER( onyx_state::p8k_16_daisy_interrupt )
{
// this must be studied a little bit more :-)
}
/* Z80 CTC 0 */
static Z80CTC_INTERFACE( p8k_16_ctc_0_intf )
{
DEVCB_DRIVER_LINE_MEMBER(onyx_state, p8k_16_daisy_interrupt), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
/* Z80 CTC 1 */
static Z80CTC_INTERFACE( p8k_16_ctc_1_intf )
{
DEVCB_DRIVER_LINE_MEMBER(onyx_state, p8k_16_daisy_interrupt), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
/* Z80 PIO 0 */
@ -406,8 +352,8 @@ static MACHINE_CONFIG_START( c8002, onyx_state )
MCFG_MACHINE_RESET_OVERRIDE(onyx_state, c8002)
/* peripheral hardware */
//MCFG_Z80CTC_ADD("z80ctc_0", XTAL_4MHz, p8k_16_ctc_0_intf)
//MCFG_Z80CTC_ADD("z80ctc_1", XTAL_4MHz, p8k_16_ctc_1_intf)
//MCFG_DEVICE_ADD("z80ctc_0", Z80CTC, XTAL_4MHz)
//MCFG_DEVICE_ADD("z80ctc_1", Z80CTC, XTAL_4MHz)
//MCFG_Z80SIO_ADD("z80sio_0", 9600, p8k_16_sio_0_intf)
//MCFG_Z80SIO_ADD("z80sio_1", 9600, p8k_16_sio_1_intf)
//MCFG_Z80PIO_ADD("z80pio_0", XTAL_4MHz, p8k_16_pio_0_intf )

View File

@ -276,32 +276,6 @@ static Z80DMA_INTERFACE( p8k_dma_intf )
DEVCB_DRIVER_MEMBER(p8k_state, io_write_byte)
};
/* Z80 CTC 0 */
// to implement: callbacks!
// manual states the callbacks should go to
// Baud Gen 3, FDC, System-Kanal
static Z80CTC_INTERFACE( p8k_ctc_0_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
/* Z80 CTC 1 */
// to implement: callbacks!
// manual states the callbacks should go to
// Baud Gen 0, Baud Gen 1, Baud Gen 2,
static Z80CTC_INTERFACE( p8k_ctc_1_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL, /* ZC/TO2 callback */
};
/* Z80 PIO 0 */
static Z80PIO_INTERFACE( p8k_pio_0_intf )
@ -635,26 +609,6 @@ WRITE_LINE_MEMBER( p8k_state::p8k_16_daisy_interrupt )
// this must be studied a little bit more :-)
}
/* Z80 CTC 0 */
static Z80CTC_INTERFACE( p8k_16_ctc_0_intf )
{
DEVCB_DRIVER_LINE_MEMBER(p8k_state, p8k_16_daisy_interrupt), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
/* Z80 CTC 1 */
static Z80CTC_INTERFACE( p8k_16_ctc_1_intf )
{
DEVCB_DRIVER_LINE_MEMBER(p8k_state, p8k_16_daisy_interrupt), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
/* Z80 PIO 0 */
static const z80pio_interface p8k_16_pio_0_intf =
@ -781,8 +735,19 @@ static MACHINE_CONFIG_START( p8k, p8k_state )
/* peripheral hardware */
MCFG_Z80DMA_ADD("z80dma", XTAL_4MHz, p8k_dma_intf)
MCFG_Z80CTC_ADD("z80ctc_0", 1229000, p8k_ctc_0_intf) /* 1.22MHz clock */
MCFG_Z80CTC_ADD("z80ctc_1", 1229000, p8k_ctc_1_intf) /* 1.22MHz clock */
MCFG_DEVICE_ADD("z80ctc_0", Z80CTC, 1229000) /* 1.22MHz clock */
// to implement: callbacks!
// manual states the callbacks should go to
// Baud Gen 3, FDC, System-Kanal
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD("z80ctc_1", Z80CTC, 1229000) /* 1.22MHz clock */
// to implement: callbacks!
// manual states the callbacks should go to
// Baud Gen 0, Baud Gen 1, Baud Gen 2,
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80SIO_ADD("z80sio_0", 9600, p8k_sio_0_intf) /* 9.6kBaud default */
MCFG_Z80SIO_ADD("z80sio_1", 9600, p8k_sio_1_intf) /* 9.6kBaud default */
MCFG_Z80PIO_ADD("z80pio_0", 1229000, p8k_pio_0_intf)
@ -814,8 +779,12 @@ static MACHINE_CONFIG_START( p8k_16, p8k_state )
MCFG_MACHINE_RESET_OVERRIDE(p8k_state,p8k_16)
/* peripheral hardware */
MCFG_Z80CTC_ADD("z80ctc_0", XTAL_4MHz, p8k_16_ctc_0_intf)
MCFG_Z80CTC_ADD("z80ctc_1", XTAL_4MHz, p8k_16_ctc_1_intf)
MCFG_DEVICE_ADD("z80ctc_0", Z80CTC, XTAL_4MHz)
MCFG_Z80CTC_INTR_CB(WRITELINE(p8k_state, p8k_16_daisy_interrupt))
MCFG_DEVICE_ADD("z80ctc_1", Z80CTC, XTAL_4MHz)
MCFG_Z80CTC_INTR_CB(WRITELINE(p8k_state, p8k_16_daisy_interrupt))
MCFG_Z80SIO_ADD("z80sio_0", 9600, p8k_16_sio_0_intf)
MCFG_Z80SIO_ADD("z80sio_1", 9600, p8k_16_sio_1_intf)
MCFG_Z80PIO_ADD("z80pio_0", XTAL_4MHz, p8k_16_pio_0_intf )

View File

@ -219,14 +219,6 @@ READ8_MEMBER( pasopia_state::rombank_r )
return (m_ram_bank) ? 4 : 0;
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt handler
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg1), // ZC/TO0 callback
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg2), // ZC/TO1 callback, beep interface
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg3) // ZC/TO2 callback
};
READ8_MEMBER( pasopia_state::mux_r )
{
return m_mux_data;
@ -359,7 +351,12 @@ static MACHINE_CONFIG_START( pasopia, pasopia_state )
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0)
MCFG_I8255_IN_PORTC_CB(READ8(pasopia_state, rombank_r))
MCFG_Z80CTC_ADD( "z80ctc", XTAL_4MHz, ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_4MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg1))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg2))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg3))
MCFG_Z80PIO_ADD( "z80pio", XTAL_4MHz, z80pio_intf )
MACHINE_CONFIG_END

View File

@ -744,15 +744,6 @@ static MC6845_INTERFACE( mc6845_intf )
NULL /* update address callback */
};
static Z80CTC_INTERFACE( z80ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt handler
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg1), // ZC/TO0 callback
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg2), // ZC/TO1 callback, beep interface
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg3) // ZC/TO2 callback
};
READ8_MEMBER( pasopia7_state::mux_r )
{
return m_mux_data;
@ -970,7 +961,12 @@ static MACHINE_CONFIG_START( p7_base, pasopia7_state )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
/* Devices */
MCFG_Z80CTC_ADD( "z80ctc", XTAL_4MHz, z80ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_4MHz)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg1))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg2)) // beep interface
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg3))
MCFG_Z80PIO_ADD( "z80pio", XTAL_4MHz, z80pio_intf )
MCFG_DEVICE_ADD("ppi8255_0", I8255, 0)

View File

@ -231,22 +231,6 @@ static const z80_daisy_config pcm_daisy_chain[] =
{ NULL }
};
static Z80CTC_INTERFACE( ctc_u_intf ) // all pins go to expansion socket
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static Z80CTC_INTERFACE( ctc_s_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
DEVCB_NULL, /* ZC/TO0 callback - SIO channel A clock */
DEVCB_NULL, /* ZC/TO1 callback - SIO channel B clock */
DEVCB_DRIVER_LINE_MEMBER(pcm_state, pcm_82_w) /* ZC/TO2 callback - speaker */
};
static Z80PIO_INTERFACE( pio_u_intf ) // all pins go to expansion socket
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
@ -344,8 +328,15 @@ static MACHINE_CONFIG_START( pcm, pcm_state )
MCFG_Z80PIO_ADD( "z80pio_u", XTAL_10MHz /4, pio_u_intf )
MCFG_Z80PIO_ADD( "z80pio_s", XTAL_10MHz /4, pio_s_intf )
MCFG_Z80SIO0_ADD( "z80sio", 4800, sio_intf ) // clocks come from the system ctc
MCFG_Z80CTC_ADD( "z80ctc_u", XTAL_10MHz /4, ctc_u_intf )
MCFG_Z80CTC_ADD( "z80ctc_s", XTAL_10MHz /4, ctc_s_intf )
MCFG_DEVICE_ADD("z80ctc_u", Z80CTC, XTAL_10MHz /4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD("z80ctc_s", Z80CTC, XTAL_10MHz /4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// ZC0 : SIO channel A clock
// ZC1 : SIO channel B clock
MCFG_Z80CTC_ZC2_CB(WRITELINE(pcm_state, pcm_82_w)) // speaker
MACHINE_CONFIG_END
/* ROM definition */

View File

@ -140,14 +140,6 @@ WRITE_LINE_MEMBER( poly880_state::ctc_z1_w )
{
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DRIVER_LINE_MEMBER(poly880_state, ctc_z0_w), /* ZC/TO0 callback */
DEVCB_DRIVER_LINE_MEMBER(poly880_state, ctc_z1_w), /* ZC/TO1 callback */
DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF,z80ctc_device, trg3) /* ZC/TO2 callback */
};
/* Z80-PIO Interface */
WRITE8_MEMBER( poly880_state::pio1_pa_w )
@ -290,7 +282,12 @@ static MACHINE_CONFIG_START( poly880, poly880_state )
MCFG_DEFAULT_LAYOUT( layout_poly880 )
/* devices */
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_7_3728MHz/16, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_7_3728MHz/16)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(poly880_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(poly880_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg3))
MCFG_Z80PIO_ADD(Z80PIO1_TAG, XTAL_7_3728MHz/16, pio1_intf)
MCFG_Z80PIO_ADD(Z80PIO2_TAG, XTAL_7_3728MHz/16, pio2_intf)

View File

@ -62,14 +62,6 @@ private:
};
static Z80CTC_INTERFACE( external_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_NULL /* ZC/TO2 callback */
};
static const z80sio_interface external_sio_intf =
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
@ -312,7 +304,10 @@ static MACHINE_CONFIG_START( pve500, pve500_state )
MCFG_CPU_PROGRAM_MAP(maincpu_prg)
MCFG_CPU_IO_MAP(maincpu_io)
MCFG_CPU_CONFIG(maincpu_daisy_chain)
MCFG_Z80CTC_ADD("external_ctc", XTAL_12MHz / 2, external_ctc_intf)
MCFG_DEVICE_ADD("external_ctc", Z80CTC, XTAL_12MHz / 2)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80SIO_ADD("external_sio", XTAL_12MHz / 2, external_sio_intf)
MCFG_CPU_ADD("subcpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */

View File

@ -263,14 +263,6 @@ INPUT_PORTS_END
MACHINE DRIVERS
***************************************************************************/
static const z80ctc_interface rt1715_ctc_intf =
{
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
static Z80SIO_INTERFACE( rt1715_sio_intf )
{
0, 0, 0, 0,
@ -352,7 +344,9 @@ static MACHINE_CONFIG_START( rt1715, rt1715_state )
MCFG_PALETTE_INIT_OWNER(rt1715_state, rt1715)
MCFG_I8275_ADD("a26", rt1715_i8275_intf)
MCFG_Z80CTC_ADD("a30", XTAL_10MHz/4 /* ? */, rt1715_ctc_intf)
MCFG_DEVICE_ADD("a30", Z80CTC, XTAL_10MHz/4 /* ? */)
MCFG_Z80SIO0_ADD("a29", XTAL_10MHz/4 /* ? */, rt1715_sio_intf)
/* floppy */

View File

@ -346,7 +346,7 @@ INPUT_PORTS_END
//**************************************************************************
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc_intf )
// Z80CTC
//-------------------------------------------------
TIMER_DEVICE_CALLBACK_MEMBER( super6_state::ctc_tick )
@ -355,15 +355,6 @@ TIMER_DEVICE_CALLBACK_MEMBER( super6_state::ctc_tick )
m_ctc->trg0(0);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
//-------------------------------------------------
// Z80DART_INTERFACE( dart_intf )
//-------------------------------------------------
@ -555,8 +546,11 @@ static MACHINE_CONFIG_START( super6, super6_state )
MCFG_CPU_CONFIG(super6_daisy_chain)
// devices
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_24MHz/4, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_24MHz/4)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc", super6_state, ctc_tick, attotime::from_hz(XTAL_24MHz/16))
MCFG_Z80DMA_ADD(Z80DMA_TAG, XTAL_24MHz/6, dma_intf)
MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_24MHz/4, pio_intf)
MCFG_WD2793x_ADD(WD2793_TAG, 1000000)

View File

@ -593,14 +593,6 @@ WRITE_LINE_MEMBER( tiki100_state::ctc_z2_w )
m_ctc->trg3(state);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0),
DEVCB_DRIVER_LINE_MEMBER(tiki100_state, ctc_z0_w),
DEVCB_DEVICE_LINE_MEMBER(Z80DART_TAG, z80dart_device, rxtxcb_w),
DEVCB_DRIVER_LINE_MEMBER(tiki100_state, ctc_z2_w),
};
/* FD1797 Interface */
FLOPPY_FORMATS_MEMBER( tiki100_state::floppy_formats )
@ -719,8 +711,15 @@ static MACHINE_CONFIG_START( tiki100, tiki100_state )
/* devices */
MCFG_Z80DART_ADD(Z80DART_TAG, XTAL_8MHz/4, dart_intf)
MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_8MHz/4, pio_intf)
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_8MHz/4, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_8MHz/4)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(tiki100_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(Z80DART_TAG, z80dart_device, rxtxcb_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(tiki100_state, ctc_z2_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc", tiki100_state, ctc_tick, attotime::from_hz(XTAL_8MHz/4))
MCFG_FD1797x_ADD(FD1797_TAG, XTAL_8MHz/8) // FD1767PL-02 or FD1797-PL
MCFG_FLOPPY_DRIVE_ADD(FD1797_TAG":0", tiki100_floppies, "525qd", tiki100_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(FD1797_TAG":1", tiki100_floppies, "525qd", tiki100_state::floppy_formats)

View File

@ -665,7 +665,7 @@ static Z80SIO_INTERFACE( sio_intf )
//-------------------------------------------------
// Z80CTC_INTERFACE( ctc_intf )
// Z80CTC
//-------------------------------------------------
TIMER_DEVICE_CALLBACK_MEMBER(trs80m2_state::ctc_tick)
@ -680,15 +680,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(trs80m2_state::ctc_tick)
m_ctc->trg2(0);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), // interrupt handler
DEVCB_DEVICE_LINE_MEMBER(Z80SIO_TAG, z80dart_device, rxca_w), // ZC/TO0 callback
DEVCB_DEVICE_LINE_MEMBER(Z80SIO_TAG, z80dart_device, txca_w), // ZC/TO1 callback
DEVCB_DEVICE_LINE_MEMBER(Z80SIO_TAG, z80dart_device, rxtxcb_w) // ZC/TO2 callback
};
//-------------------------------------------------
// wd17xx_interface fdc_intf
//-------------------------------------------------
@ -806,8 +797,14 @@ static MACHINE_CONFIG_START( trs80m2, trs80m2_state )
MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":2", trs80m2_floppies, NULL, floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":3", trs80m2_floppies, NULL, floppy_image_device::default_floppy_formats)
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_8MHz/2, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_8MHz/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE(Z80SIO_TAG, z80dart_device, rxca_w))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(Z80SIO_TAG, z80dart_device, txca_w))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(Z80SIO_TAG, z80dart_device, rxtxcb_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc", trs80m2_state, ctc_tick, attotime::from_hz(XTAL_8MHz/2/2))
MCFG_Z80DMA_ADD(Z80DMA_TAG, XTAL_8MHz/2, dma_intf)
MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_8MHz/2, pio_intf)
MCFG_Z80SIO0_ADD(Z80SIO_TAG, XTAL_8MHz/2, sio_intf)
@ -871,8 +868,14 @@ static MACHINE_CONFIG_START( trs80m16, trs80m16_state )
MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":2", trs80m2_floppies, NULL, floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(FD1791_TAG":3", trs80m2_floppies, NULL, floppy_image_device::default_floppy_formats)
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_8MHz/2, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_8MHz/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE(Z80SIO_TAG, z80dart_device, rxca_w))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(Z80SIO_TAG, z80dart_device, txca_w))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(Z80SIO_TAG, z80dart_device, rxtxcb_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc", trs80m2_state, ctc_tick, attotime::from_hz(XTAL_8MHz/2/2))
MCFG_Z80DMA_ADD(Z80DMA_TAG, XTAL_8MHz/2, dma_intf)
MCFG_Z80PIO_ADD(Z80PIO_TAG, XTAL_8MHz/2, pio_intf)
MCFG_Z80SIO0_ADD(Z80SIO_TAG, XTAL_8MHz/2, sio_intf)

View File

@ -193,14 +193,6 @@ static Z80DART_INTERFACE( dart1_intf )
DEVCB_NULL
};
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback - */
DEVCB_NULL, /* ZC/TO1 callback - */
DEVCB_NULL /* ZC/TO2 callback - */
};
static SLOT_INTERFACE_START( ts802_floppies )
SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
SLOT_INTERFACE_END
@ -261,7 +253,10 @@ static MACHINE_CONFIG_START( ts802, ts802_state )
MCFG_Z80DMA_ADD("z80dma", XTAL_16MHz / 4, dma_intf)
MCFG_Z80DART_ADD("z80dart1", XTAL_16MHz / 4, dart0_intf )
MCFG_Z80DART_ADD("z80dart2", XTAL_16MHz / 4, dart1_intf )
MCFG_Z80CTC_ADD("z80ctc", XTAL_16MHz / 4, ctc_intf)
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_16MHz / 4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_FD1793x_ADD("fdc", XTAL_4MHz / 2) // unknown clock
MCFG_FLOPPY_DRIVE_ADD("fdc:0", ts802_floppies, "525dd", floppy_image_device::default_floppy_formats)
MACHINE_CONFIG_END

View File

@ -2252,20 +2252,6 @@ static GFXDECODE_START( x1 )
// GFXDECODE_ENTRY( "pcg", 0x00000, x1_pcg_8x8, 0, 1 )
GFXDECODE_END
/*************************************
*
* CTC
*
*************************************/
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("x1_cpu", INPUT_LINE_IRQ0), // interrupt handler
DEVCB_DEVICE_LINE_MEMBER("ctc", z80ctc_device, trg3), // ZC/TO0 callback
DEVCB_DEVICE_LINE_MEMBER("ctc", z80ctc_device, trg1), // ZC/TO1 callback
DEVCB_DEVICE_LINE_MEMBER("ctc", z80ctc_device, trg2), // ZC/TO2 callback
};
static Z80SIO_INTERFACE( sio_intf )
{
0, 0, 0, 0,
@ -2556,7 +2542,11 @@ static MACHINE_CONFIG_START( x1, x1_state )
MCFG_CPU_IO_MAP(x1_io)
MCFG_CPU_CONFIG(x1_daisy)
MCFG_Z80CTC_ADD( "ctc", MAIN_CLOCK/4, ctc_intf )
MCFG_DEVICE_ADD("ctc", Z80CTC, MAIN_CLOCK/4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("x1_cpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg3))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg1))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg2))
MCFG_DEVICE_ADD("x1kb", X1_KEYBOARD, 0)

View File

@ -410,14 +410,6 @@ static GFXDECODE_START( x1 )
GFXDECODE_ENTRY( "kanji", 0x00000, x1_chars_16x16, 0, 1 )
GFXDECODE_END
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("x1_cpu", INPUT_LINE_IRQ0), // interrupt handler
DEVCB_DEVICE_LINE_MEMBER("ctc", z80ctc_device, trg3), // ZC/TO0 callback
DEVCB_DEVICE_LINE_MEMBER("ctc", z80ctc_device, trg1), // ZC/TO1 callback
DEVCB_DEVICE_LINE_MEMBER("ctc", z80ctc_device, trg2), // ZC/TO2 callback
};
#if 0
static const z80sio_interface sio_intf =
{
@ -512,7 +504,11 @@ static MACHINE_CONFIG_START( x1twin, x1twin_state )
MCFG_CPU_IO_MAP(x1_io)
MCFG_CPU_CONFIG(x1_daisy)
MCFG_Z80CTC_ADD( "ctc", MAIN_CLOCK/4 , ctc_intf )
MCFG_DEVICE_ADD("ctc", Z80CTC, MAIN_CLOCK/4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("x1_cpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg3))
MCFG_Z80CTC_ZC1_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg1))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg2))
MCFG_DEVICE_ADD("x1kb", X1_KEYBOARD, 0)

View File

@ -425,14 +425,6 @@ TIMER_DEVICE_CALLBACK_MEMBER( xerox820_state::ctc_tick )
m_ctc->trg0(0);
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DEVICE_LINE_MEMBER(Z80CTC_TAG, z80ctc_device, trg1), /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_DEVICE_LINE_MEMBER(Z80CTC_TAG, z80ctc_device, trg3) /* ZC/TO2 callback */
};
/* Z80 Daisy Chain */
static const z80_daisy_config xerox820_daisy_chain[] =
@ -665,8 +657,13 @@ static MACHINE_CONFIG_START( xerox820, xerox820_state )
/* devices */
MCFG_Z80PIO_ADD(Z80PIO_KB_TAG, XTAL_20MHz/8, xerox820_kbpio_intf)
MCFG_Z80PIO_ADD(Z80PIO_GP_TAG, XTAL_20MHz/8, gppio_intf)
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_20MHz/8, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_20MHz/8)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg1))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg3))
//MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc", xerox820_state, ctc_tick, attotime::from_hz(XTAL_20MHz/8))
MCFG_FD1771x_ADD(FD1771_TAG, XTAL_20MHz/20)
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(xerox820_state, fdc_intrq_w))
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(xerox820_state, fdc_drq_w))
@ -727,8 +724,13 @@ static MACHINE_CONFIG_START( xerox820ii, xerox820ii_state )
MCFG_Z80PIO_ADD(Z80PIO_KB_TAG, XTAL_16MHz/4, xerox820ii_kbpio_intf)
MCFG_Z80PIO_ADD(Z80PIO_GP_TAG, XTAL_16MHz/4, gppio_intf)
MCFG_Z80PIO_ADD(Z80PIO_RD_TAG, XTAL_20MHz/8, rdpio_intf)
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_16MHz/4, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_16MHz/4)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg1))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE(Z80CTC_TAG, z80ctc_device, trg3))
//MCFG_TIMER_DRIVER_ADD_PERIODIC("ctc", xerox820_state, ctc_tick, attotime::from_hz(XTAL_16MHz/4))
MCFG_FD1797x_ADD(FD1797_TAG, XTAL_16MHz/8)
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(xerox820_state, fdc_intrq_w))
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(xerox820_state, fdc_drq_w))

View File

@ -425,14 +425,6 @@ WRITE_LINE_MEMBER( xor100_state::ctc_z2_w )
{
}
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE(Z80_TAG, INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_DRIVER_LINE_MEMBER(xor100_state, ctc_z0_w), /* ZC/TO0 callback */
DEVCB_DRIVER_LINE_MEMBER(xor100_state, ctc_z1_w), /* ZC/TO1 callback */
DEVCB_DRIVER_LINE_MEMBER(xor100_state, ctc_z2_w) /* ZC/TO2 callback */
};
/* WD1795-02 Interface */
static SLOT_INTERFACE_START( xor100_floppies )
@ -543,7 +535,12 @@ static MACHINE_CONFIG_START( xor100, xor100_state )
MCFG_I8255_OUT_PORTB_CB(DEVWRITELINE(CENTRONICS_TAG, centronics_device, write_strobe))
MCFG_I8255_IN_PORTC_CB(READ8(xor100_state, i8255_pc_r))
MCFG_Z80CTC_ADD(Z80CTC_TAG, XTAL_8MHz/2, ctc_intf)
MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_8MHz/2)
MCFG_Z80CTC_INTR_CB(INPUTLINE(Z80_TAG, INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(xor100_state, ctc_z0_w))
MCFG_Z80CTC_ZC1_CB(WRITELINE(xor100_state, ctc_z1_w))
MCFG_Z80CTC_ZC2_CB(WRITELINE(xor100_state, ctc_z2_w))
MCFG_FD1795x_ADD(WD1795_TAG, XTAL_8MHz/4)
MCFG_FLOPPY_DRIVE_ADD(WD1795_TAG":0", xor100_floppies, "8ssdd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(WD1795_TAG":1", xor100_floppies, "8ssdd", floppy_image_device::default_floppy_formats)

View File

@ -101,14 +101,6 @@ static const z80_daisy_config z9001_daisy_chain[] =
{ NULL }
};
static Z80CTC_INTERFACE( ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
DEVCB_DRIVER_LINE_MEMBER(z9001_state, cass_w), /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg3) /* ZC/TO2 callback */
};
static Z80PIO_INTERFACE( pio1_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
@ -263,7 +255,12 @@ static MACHINE_CONFIG_START( z9001, z9001_state )
MCFG_TIMER_DRIVER_ADD_PERIODIC("z9001_timer", z9001_state, timer_callback, attotime::from_msec(10))
MCFG_Z80PIO_ADD( "z80pio1", XTAL_9_8304MHz / 4, pio1_intf )
MCFG_Z80PIO_ADD( "z80pio2", XTAL_9_8304MHz / 4, pio2_intf )
MCFG_Z80CTC_ADD( "z80ctc", XTAL_9_8304MHz / 4, ctc_intf )
MCFG_DEVICE_ADD("z80ctc", Z80CTC, XTAL_9_8304MHz / 4)
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(WRITELINE(z9001_state, cass_w))
MCFG_Z80CTC_ZC2_CB(DEVWRITELINE("z80ctc", z80ctc_device, trg3))
MCFG_CASSETTE_ADD( "cassette", default_cassette_interface )
MACHINE_CONFIG_END

View File

@ -66,7 +66,4 @@ extern const z80pio_interface llc1_z80pio2_intf;
extern const z80pio_interface llc2_z80pio1_intf;
extern const z80pio_interface llc2_z80pio2_intf;
extern const z80ctc_interface llc1_ctc_intf;
extern const z80ctc_interface llc2_ctc_intf;
#endif

View File

@ -59,7 +59,6 @@ public:
/* Implementation for MC80.2x */
/*****************************************************************************/
extern const z80ctc_interface mc8020_ctc_intf;
extern const z80pio_interface mc8020_z80pio_intf;
/*****************************************************************************/
@ -69,8 +68,6 @@ extern const z80pio_interface mc8020_z80pio_intf;
extern const z80pio_interface mc8030_zve_z80pio_intf;
extern const z80pio_interface mc8030_asp_z80pio_intf;
extern const z80ctc_interface mc8030_zve_z80ctc_intf;
extern const z80ctc_interface mc8030_asp_z80ctc_intf;
extern const z80dart_interface mc8030_asp_z80sio_intf;
#endif /* MC80_H_ */

View File

@ -88,17 +88,6 @@ WRITE8_MEMBER(llc_state::llc1_port1_b_w)
}
}
// timer 0 irq does digit display, and timer 3 irq does scan of the
// monitor keyboard.
// No idea how the CTC is connected, so guessed.
Z80CTC_INTERFACE( llc1_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg1),
DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg3),
DEVCB_NULL
};
Z80PIO_INTERFACE( llc1_z80pio1_intf )
{
DEVCB_NULL, /* callback when change interrupt status */
@ -135,15 +124,6 @@ MACHINE_START_MEMBER(llc_state,llc1)
{
}
Z80CTC_INTERFACE( llc2_ctc_intf )
{
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
};
/* Driver initialization */
DRIVER_INIT_MEMBER(llc_state,llc2)
{

View File

@ -36,15 +36,6 @@ WRITE_LINE_MEMBER(mc80_state::ctc_z2_w)
downcast<z80ctc_device *>(machine().device("z80ctc"))->trg1(state);
}
Z80CTC_INTERFACE( mc8020_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
DEVCB_DRIVER_LINE_MEMBER(mc80_state, ctc_z0_w),
DEVCB_DRIVER_LINE_MEMBER(mc80_state, ctc_z1_w),
DEVCB_DRIVER_LINE_MEMBER(mc80_state,ctc_z2_w)
};
READ8_MEMBER( mc80_state::mc80_port_b_r )
{
return 0;
@ -173,22 +164,6 @@ Z80PIO_INTERFACE( mc8030_asp_z80pio_intf )
DEVCB_NULL
};
Z80CTC_INTERFACE( mc8030_zve_z80ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
DEVCB_NULL, // for user
DEVCB_NULL, // for user
DEVCB_NULL // for user
};
Z80CTC_INTERFACE( mc8030_asp_z80ctc_intf )
{
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
DEVCB_NULL, // to SIO CLK CH A
DEVCB_NULL, // to SIO CLK CH B
DEVCB_NULL // KMBG (??)
};
// SIO CH A in = keyboard; out = beeper; CH B = IFSS (??)
Z80SIO_INTERFACE( mc8030_asp_z80sio_intf )
{