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https://github.com/holub/mame
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Merge pull request #2145 from Happy-yappH/master
N64 - some improvements to DRC stability
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commit
29ebbf48d0
@ -492,7 +492,7 @@ void rsp_device::device_start()
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state_add( RSP_V31, "V31", m_debugger_temp).formatstr("%39s");
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state_add( STATE_GENPC, "GENPC", m_debugger_temp).callimport().callexport().noshow();
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state_add( STATE_GENPCBASE, "CURPC", m_debugger_temp).callimport().callexport().noshow();
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state_add( STATE_GENPCBASE, "CURPC", m_rsp_state->pc).noshow();
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state_add( STATE_GENFLAGS, "GENFLAGS", m_debugger_temp).formatstr("%1s").noshow();
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state_add( STATE_GENSP, "GENSP", m_rsp_state->r[31]).noshow();
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@ -105,6 +105,7 @@ public:
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DECLARE_WRITE32_MEMBER( pif_ram_w );
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TIMER_CALLBACK_MEMBER(reset_timer_callback);
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TIMER_CALLBACK_MEMBER(vi_scanline_callback);
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TIMER_CALLBACK_MEMBER(dp_delay_callback);
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TIMER_CALLBACK_MEMBER(ai_timer_callback);
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TIMER_CALLBACK_MEMBER(pi_dma_callback);
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TIMER_CALLBACK_MEMBER(si_dma_callback);
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@ -116,6 +117,7 @@ public:
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void signal_rcp_interrupt(int interrupt);
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void check_interrupts();
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void dp_full_sync();
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void ai_timer_tick();
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void pi_dma_tick();
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void si_dma_tick();
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@ -178,6 +180,7 @@ private:
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bool reset_held;
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emu_timer *reset_timer;
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emu_timer *dp_delay_timer;
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uint8_t is64_buffer[0x10000];
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@ -399,6 +402,4 @@ const unsigned int ddStartOffset[16] =
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{0x0,0x5F15E0,0xB79D00,0x10801A0,0x1523720,0x1963D80,0x1D414C0,0x20BBCE0,
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0x23196E0,0x28A1E00,0x2DF5DC0,0x3299340,0x36D99A0,0x3AB70E0,0x3E31900,0x4149200};
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extern void dp_full_sync(running_machine &machine);
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#endif
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@ -114,6 +114,7 @@ void n64_periphs::device_start()
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pi_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::pi_dma_callback),this));
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si_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::si_dma_callback),this));
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vi_scanline_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::vi_scanline_callback),this));
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dp_delay_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::dp_delay_callback),this));
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reset_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::reset_timer_callback),this));
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m_n64 = machine().driver_data<n64_state>();
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}
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@ -218,6 +219,8 @@ void n64_periphs::device_reset()
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dp_clock = 0;
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dp_delay_timer->adjust(attotime::never);
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cic_status = 0;
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reset_held = false;
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@ -417,11 +420,6 @@ WRITE32_MEMBER( n64_periphs::mi_reg_w )
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}
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}
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void signal_rcp_interrupt(running_machine &machine, int interrupt)
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{
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machine.device<n64_periphs>("rcp")->signal_rcp_interrupt(interrupt);
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}
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void n64_periphs::check_interrupts()
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{
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if (mi_intr_mask & mi_interrupt)
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@ -571,6 +569,10 @@ void n64_periphs::sp_dma(int direction)
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uint32_t *sp_mem[2] = { m_rsp_dmem, m_rsp_imem };
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int sp_mem_page = (sp_mem_addr >> 12) & 1;
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if(sp_mem_page == 1)
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m_rsp->rspdrc_flush_drc_cache();
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if(direction == 0)// RDRAM -> I/DMEM
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{
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for(int c = 0; c <= sp_dma_count; c++)
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@ -881,9 +883,15 @@ WRITE32_MEMBER(n64_periphs::sp_reg_w )
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// RDP Interface
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void dp_full_sync(running_machine &machine)
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void n64_periphs::dp_full_sync()
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{
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signal_rcp_interrupt(machine, DP_INTERRUPT);
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dp_delay_timer->adjust(attotime::from_hz(62500000 / 100));
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}
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TIMER_CALLBACK_MEMBER(n64_periphs::dp_delay_callback)
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{
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dp_delay_timer->adjust(attotime::never);
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signal_rcp_interrupt(DP_INTERRUPT);
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}
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READ32_MEMBER( n64_periphs::dp_reg_r )
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@ -95,6 +95,7 @@ void n64_state::video_start()
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m_rdp->set_machine(machine());
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m_rdp->init_internal_state();
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m_rdp->set_n64_periphs(machine().device<n64_periphs>("rcp"));
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m_rdp->m_blender.set_machine(machine());
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m_rdp->m_blender.set_processor(m_rdp);
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@ -2356,7 +2357,7 @@ void n64_rdp::cmd_sync_tile(uint64_t w1)
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void n64_rdp::cmd_sync_full(uint64_t w1)
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{
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//wait("SyncFull");
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dp_full_sync(*m_machine);
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m_n64_periphs->dp_full_sync();
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}
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void n64_rdp::cmd_set_key_gb(uint64_t w1)
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@ -3169,6 +3170,7 @@ n64_rdp::n64_rdp(n64_state &state, uint32_t* rdram, uint32_t* dmem) : poly_manag
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m_tmem = nullptr;
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m_machine = nullptr;
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m_n64_periphs = nullptr;
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//memset(m_hidden_bits, 3, 8388608);
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@ -167,6 +167,7 @@ public:
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void disassemble(char* buffer);
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void set_machine(running_machine& machine) { m_machine = &machine; }
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void set_n64_periphs(n64_periphs* periphs) { m_n64_periphs = periphs; }
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// CPU-visible registers
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void set_start(uint32_t val) { m_start = val; }
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@ -335,6 +336,7 @@ private:
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running_machine* m_machine;
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uint32_t* m_rdram;
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uint32_t* m_dmem;
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n64_periphs* m_n64_periphs;
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combine_modes_t m_combine;
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bool m_pending_mode_block;
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