drcbex64: map F0-F3 to SSE registers (nw)

2025-07-06 18:39:28 +03:00 · 2016-04-14 00:44:15 +03:00 · 2016-04-14 00:44:15 +03:00 · 2c70bf1e92
commit 2c70bf1e92
parent af570db2d0
2 changed files with 1 additions and 4 deletions
--- a/src/devices/cpu/drcbex64.cpp
+++ b/src/devices/cpu/drcbex64.cpp
@ -263,7 +263,7 @@ static const UINT8 int_register_map[REG_I_COUNT] =

 static UINT8 float_register_map[REG_F_COUNT] =
 {
-	0
+	REG_XMM6, REG_XMM7, REG_XMM8, REG_XMM9
 };

 // condition mapping table
--- a/src/devices/cpu/drcuml.cpp
+++ b/src/devices/cpu/drcuml.cpp
@ -22,9 +22,6 @@
    * Support for FPU exceptions

    * New instructions?
-        - FCOPYI, ICOPYF
-            copy raw between float and integer registers
-
        - VALID opcode_desc,handle,param
            checksum/compare code referenced by opcode_desc; if not
            matching, generate exception with handle,param