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Moved some of the CPU cores over to use get_safe_token like other devices.

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Also cleaned them so they compile.
This commit is contained in:
Aaron Giles 2009-03-12 16:54:49 +00:00
parent 1d85ed1509
commit 32bc986ec0
44 changed files with 701 additions and 337 deletions
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43
src/emu/cpu/adsp2100/adsp2100.c
View File

@ -420,6 +420,27 @@ static int create_tables(void);
static void check_irqs(adsp2100_state *adsp);
/***************************************************************************
STATE ACCESSORS
***************************************************************************/
INLINE adsp2100_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_ADSP2100 ||
cpu_get_type(device) == CPU_ADSP2101 ||
cpu_get_type(device) == CPU_ADSP2104 ||
cpu_get_type(device) == CPU_ADSP2105 ||
cpu_get_type(device) == CPU_ADSP2115 ||
cpu_get_type(device) == CPU_ADSP2181);
return (adsp2100_state *)device->token;
}
/***************************************************************************
MEMORY ACCESSORS
***************************************************************************/
@ -672,8 +693,8 @@ static void set_irq_line(adsp2100_state *adsp, int irqline, int state)
static adsp2100_state *adsp21xx_init(const device_config *device, cpu_irq_callback irqcallback, int chiptype)
{
const adsp21xx_config *config = device->static_config;
adsp2100_state *adsp = device->token;
const adsp21xx_config *config = (const adsp21xx_config *)device->static_config;
adsp2100_state *adsp = get_safe_token(device);
/* create the tables */
if (!create_tables())
@ -828,7 +849,7 @@ static adsp2100_state *adsp21xx_init(const device_config *device, cpu_irq_callba
static CPU_RESET( adsp21xx )
{
adsp2100_state *adsp = device->token;
adsp2100_state *adsp = get_safe_token(device);
int irq;
/* ensure that zero is zero */
@ -1030,7 +1051,7 @@ static CPU_EXIT( adsp21xx )
static CPU_EXECUTE( adsp21xx )
{
int check_debugger = ((device->machine->debug_flags & DEBUG_FLAG_ENABLED) != 0);
adsp2100_state *adsp = device->token;
adsp2100_state *adsp = get_safe_token(device);
check_irqs(adsp);
@ -1785,7 +1806,7 @@ extern CPU_DISASSEMBLE( adsp21xx );
static CPU_IMPORT_STATE( adsp21xx )
{
adsp2100_state *adsp = device->token;
adsp2100_state *adsp = get_safe_token(device);
switch (entry->index)
{
case ADSP2100_MSTAT:
@ -1837,7 +1858,7 @@ static CPU_IMPORT_STATE( adsp21xx )
static CPU_SET_INFO( adsp21xx )
{
adsp2100_state *adsp = device->token;
adsp2100_state *adsp = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -1864,7 +1885,7 @@ static CPU_SET_INFO( adsp21xx )
static CPU_GET_INFO( adsp21xx )
{
adsp2100_state *adsp = (device != NULL) ? device->token : NULL;
adsp2100_state *adsp = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@ -2152,20 +2173,20 @@ CPU_GET_INFO( adsp2181 )
void adsp2181_idma_addr_w(const device_config *device, UINT16 data)
{
adsp2100_state *adsp = device->token;
adsp2100_state *adsp = get_safe_token(device);
adsp->idma_addr = data;
adsp->idma_offs = 0;
}
UINT16 adsp2181_idma_addr_r(const device_config *device)
{
adsp2100_state *adsp = device->token;
adsp2100_state *adsp = get_safe_token(device);
return adsp->idma_addr;
}
void adsp2181_idma_data_w(const device_config *device, UINT16 data)
{
adsp2100_state *adsp = device->token;
adsp2100_state *adsp = get_safe_token(device);
/* program memory? */
if (!(adsp->idma_addr & 0x4000))
@ -2192,7 +2213,7 @@ void adsp2181_idma_data_w(const device_config *device, UINT16 data)
UINT16 adsp2181_idma_data_r(const device_config *device)
{
adsp2100_state *adsp = device->token;
adsp2100_state *adsp = get_safe_token(device);
UINT16 result = 0xffff;
/* program memory? */

20
src/emu/cpu/alph8201/alph8201.c
View File

@ -223,6 +223,16 @@ typedef struct {
#define LP1 lp1
#define LP2 lp2
INLINE alpha8201_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_ALPHA8201 ||
cpu_get_type(device) == CPU_ALPHA8301);
return (alpha8201_state *)device->token;
}
/* Get next opcode argument and increment program counter */
INLINE unsigned M_RDMEM_OPCODE (alpha8201_state *cpustate)
{
@ -660,7 +670,7 @@ static const s_opcode opcode_8301[256]=
****************************************************************************/
static CPU_INIT( alpha8201 )
{
alpha8201_state *cpustate = device->token;
alpha8201_state *cpustate = get_safe_token(device);
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -692,7 +702,7 @@ static CPU_INIT( alpha8201 )
****************************************************************************/
static CPU_RESET( alpha8201 )
{
alpha8201_state *cpustate = device->token;
alpha8201_state *cpustate = get_safe_token(device);
cpustate->PC = 0;
cpustate->regPtr = 0;
cpustate->zf = 0;
@ -725,7 +735,7 @@ static CPU_EXIT( alpha8201 )
static int alpha8xxx_execute(const device_config *device,const s_opcode *op_map,int cycles)
{
alpha8201_state *cpustate = device->token;
alpha8201_state *cpustate = get_safe_token(device);
unsigned opcode;
UINT8 pcptr;
@ -832,7 +842,7 @@ static void set_irq_line(alpha8201_state *cpustate, int irqline, int state)
static CPU_SET_INFO( alpha8201 )
{
alpha8201_state *cpustate = device->token;
alpha8201_state *cpustate = get_safe_token(device);
switch (state)
{
#if HANDLE_HALT_LINE
@ -876,7 +886,7 @@ static CPU_SET_INFO( alpha8201 )
/* 8201 and 8301 */
static CPU_GET_INFO( alpha8xxx )
{
alpha8201_state *cpustate = (device != NULL) ? device->token : NULL;
alpha8201_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

20
src/emu/cpu/apexc/apexc.c
View File

@ -367,6 +367,16 @@ struct _apexc_state
#define DELAY(n) {cpustate->icount -= (n); cpustate->current_word = (cpustate->current_word + (n)) & 0x1f;}
INLINE apexc_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_APEXC);
return (apexc_state *)device->token;
}
/*
word accessor functions
@ -787,7 +797,7 @@ special_fetch:
static CPU_INIT( apexc )
{
apexc_state *cpustate = device->token;
apexc_state *cpustate = get_safe_token(device);
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -796,7 +806,7 @@ static CPU_INIT( apexc )
static CPU_RESET( apexc )
{
apexc_state *cpustate = device->token;
apexc_state *cpustate = get_safe_token(device);
/* mmmh... I don't know what happens on reset with an actual APEXC. */
@ -811,7 +821,7 @@ static CPU_RESET( apexc )
static CPU_EXECUTE( apexc )
{
apexc_state *cpustate = device->token;
apexc_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -832,7 +842,7 @@ static CPU_EXECUTE( apexc )
static CPU_SET_INFO( apexc )
{
apexc_state *cpustate = device->token;
apexc_state *cpustate = get_safe_token(device);
switch (state)
{
@ -867,7 +877,7 @@ static CPU_SET_INFO( apexc )
CPU_GET_INFO( apexc )
{
apexc_state *cpustate = (device != NULL) ? device->token : NULL;
apexc_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

19
src/emu/cpu/arm/arm.c
View File

@ -247,6 +247,15 @@ static void arm_check_irq_state(ARM_REGS* cpustate);
/***************************************************************************/
INLINE ARM_REGS *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_ARM);
return (ARM_REGS *)device->token;
}
INLINE void cpu_write32( ARM_REGS* cpustate, int addr, UINT32 data )
{
/* Unaligned writes are treated as normal writes */
@ -298,7 +307,7 @@ INLINE void SetRegister( ARM_REGS* cpustate, int rIndex, UINT32 value )
static CPU_RESET( arm )
{
ARM_REGS *cpustate = device->token;
ARM_REGS *cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback = cpustate->irq_callback;
memset(cpustate, 0, sizeof(ARM_REGS));
@ -319,7 +328,7 @@ static CPU_EXECUTE( arm )
{
UINT32 pc;
UINT32 insn;
ARM_REGS *cpustate = device->token;
ARM_REGS *cpustate = get_safe_token(device);
cpustate->icount = cycles;
do
@ -491,7 +500,7 @@ static CPU_DISASSEMBLE( arm )
static CPU_INIT( arm )
{
ARM_REGS *cpustate = device->token;
ARM_REGS *cpustate = get_safe_token(device);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
@ -1392,7 +1401,7 @@ static void HandleCoPro( ARM_REGS* cpustate, UINT32 insn )
static CPU_SET_INFO( arm )
{
ARM_REGS *cpustate = device->token;
ARM_REGS *cpustate = get_safe_token(device);
switch (state)
{
@ -1442,7 +1451,7 @@ static CPU_SET_INFO( arm )
CPU_GET_INFO( arm )
{
ARM_REGS *cpustate = (device != NULL) ? device->token : NULL;
ARM_REGS *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

17
src/emu/cpu/arm7/arm7.c
View File

@ -66,6 +66,15 @@ static void test_dt_w_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, vo
#define ARM7REG(reg) cpustate->sArmRegister[reg]
#define ARM7_ICOUNT cpustate->iCount
INLINE arm_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_ARM7);
return (arm_state *)device->token;
}
/* include the arm7 core */
#include "arm7core.c"
@ -74,7 +83,7 @@ static void test_dt_w_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, vo
**************************************************************************/
static CPU_INIT( arm7 )
{
arm_state *cpustate = device->token;
arm_state *cpustate = get_safe_token(device);
// must call core
arm7_core_init("arm7", device);
@ -119,7 +128,7 @@ static void set_irq_line(arm_state *cpustate, int irqline, int state)
static CPU_DISASSEMBLE( arm7 )
{
arm_state *cpustate = device->token;
arm_state *cpustate = get_safe_token(device);
if (T_IS_SET(GET_CPSR))
{
@ -138,7 +147,7 @@ static CPU_DISASSEMBLE( arm7 )
static CPU_SET_INFO( arm7 )
{
arm_state *cpustate = device->token;
arm_state *cpustate = get_safe_token(device);
switch (state)
{
@ -214,7 +223,7 @@ static CPU_SET_INFO( arm7 )
CPU_GET_INFO( arm7 )
{
arm_state *cpustate = (device != NULL) ? device->token : NULL;
arm_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

4
src/emu/cpu/arm7/arm7core.c
View File

@ -509,7 +509,7 @@ static int storeDec(arm_state *cpustate, UINT32 pat, UINT32 rbv)
// CPU INIT
static void arm7_core_init(const char *cpuname, const device_config *device)
{
arm_state *cpustate = device->token;
arm_state *cpustate = get_safe_token(device);
state_save_register_device_item_array(device, 0, cpustate->sArmRegister);
state_save_register_device_item(device, 0, cpustate->pendingIrq);
@ -523,7 +523,7 @@ static void arm7_core_init(const char *cpuname, const device_config *device)
// CPU RESET
static void arm7_core_reset(const device_config *device)
{
arm_state *cpustate = device->token;
arm_state *cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback = cpustate->irq_callback;

2
src/emu/cpu/arm7/arm7exec.c
View File

@ -43,7 +43,7 @@
{
UINT32 pc;
UINT32 insn;
arm_state *cpustate = device->token;
arm_state *cpustate = get_safe_token(device);
ARM7_ICOUNT = cycles;
do

27
src/emu/cpu/asap/asap.c
View File

@ -261,6 +261,21 @@ static void (*const conditiontable[16])(asap_state *) =
/***************************************************************************
STATE ACCESSORS
***************************************************************************/
INLINE asap_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_ASAP);
return (asap_state *)device->token;
}
/***************************************************************************
MEMORY ACCESSORS
***************************************************************************/
@ -396,7 +411,7 @@ static void init_tables(void)
{
/* allocate opcode table */
if (!opcode)
opcode = auto_malloc(32 * 32 * 2 * sizeof(void *));
opcode = (void (**)(asap_state *))auto_malloc(32 * 32 * 2 * sizeof(void *));
/* fill opcode table */
if (opcode)
@ -421,7 +436,7 @@ static void init_tables(void)
static CPU_INIT( asap )
{
asap_state *asap = device->token;
asap_state *asap = get_safe_token(device);
int i;
init_tables();
@ -434,7 +449,7 @@ static CPU_INIT( asap )
static CPU_RESET( asap )
{
asap_state *asap = device->token;
asap_state *asap = get_safe_token(device);
/* initialize the state */
asap->src2val[REGBASE + 0] = 0;
@ -488,7 +503,7 @@ INLINE void execute_instruction(asap_state *asap)
static CPU_EXECUTE( asap )
{
asap_state *asap = device->token;
asap_state *asap = get_safe_token(device);
/* check for IRQs */
asap->icount = cycles;
@ -1643,7 +1658,7 @@ static void trapf(asap_state *asap)
static CPU_SET_INFO( asap )
{
asap_state *asap = device->token;
asap_state *asap = get_safe_token(device);
switch (state)
{
@ -1698,7 +1713,7 @@ static CPU_SET_INFO( asap )
CPU_GET_INFO( asap )
{
asap_state *asap = (device != NULL) ? device->token : NULL;
asap_state *asap = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

25
src/emu/cpu/ccpu/ccpu.c
View File

@ -49,6 +49,15 @@ struct _ccpu_state
};
INLINE ccpu_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_CCPU);
return (ccpu_state *)device->token;
}
/***************************************************************************
MACROS
@ -98,14 +107,14 @@ static UINT8 read_jmi(const device_config *device)
{
/* this routine is called when there is no external input */
/* and the JMI jumper is present */
ccpu_state *cpustate = device->token;
ccpu_state *cpustate = get_safe_token(device);
return TEST_MI(cpustate);
}
void ccpu_wdt_timer_trigger(const device_config *device)
{
ccpu_state *cpustate = device->token;
ccpu_state *cpustate = get_safe_token(device);
cpustate->waiting = FALSE;
cpustate->watchdog++;
if (cpustate->watchdog >= 3)
@ -115,8 +124,8 @@ void ccpu_wdt_timer_trigger(const device_config *device)
static CPU_INIT( ccpu )
{
const ccpu_config *configdata = device->static_config;
ccpu_state *cpustate = device->token;
const ccpu_config *configdata = (const ccpu_config *)device->static_config;
ccpu_state *cpustate = get_safe_token(device);
/* copy input params */
cpustate->external_input = configdata->external_input ? configdata->external_input : read_jmi;
@ -150,7 +159,7 @@ static CPU_INIT( ccpu )
static CPU_RESET( ccpu )
{
ccpu_state *cpustate = device->token;
ccpu_state *cpustate = get_safe_token(device);
/* zero registers */
cpustate->PC = 0;
@ -184,7 +193,7 @@ static CPU_RESET( ccpu )
static CPU_EXECUTE( ccpu )
{
ccpu_state *cpustate = device->token;
ccpu_state *cpustate = get_safe_token(device);
if (cpustate->waiting)
return cycles;
@ -686,7 +695,7 @@ static CPU_EXECUTE( ccpu )
static CPU_SET_INFO( ccpu )
{
ccpu_state *cpustate = device->token;
ccpu_state *cpustate = get_safe_token(device);
switch (state)
{
@ -721,7 +730,7 @@ static CPU_SET_INFO( ccpu )
CPU_GET_INFO( ccpu )
{
ccpu_state *cpustate = (device != NULL) ? device->token : NULL;
ccpu_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

29
src/emu/cpu/cdp1802/cdp1802.c
View File

@ -110,6 +110,15 @@ static const cpu_state_table state_table_template =
state_array /* array of entries */
};
INLINE cdp1802_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_CDP1802);
return (cdp1802_state *)device->token;
}
#define OPCODE_R(addr) memory_decrypted_read_byte(cpustate->program, addr)
#define RAM_R(addr) memory_read_byte_8be(cpustate->program, addr)
#define RAM_W(addr, data) memory_write_byte_8be(cpustate->program, addr, data)
@ -211,7 +220,7 @@ INLINE void cdp1802_long_skip(cdp1802_state *cpustate, int taken)
static void cdp1802_sample_ef(const device_config *device)
{
cdp1802_state *cpustate = device->token;
cdp1802_state *cpustate = get_safe_token(device);
if (cpustate->intf->ef_r)
{
@ -225,7 +234,7 @@ static void cdp1802_sample_ef(const device_config *device)
static void cdp1802_output_state_code(const device_config *device)
{
cdp1802_state *cpustate = device->token;
cdp1802_state *cpustate = get_safe_token(device);
if (cpustate->intf->sc_w)
{
@ -259,7 +268,7 @@ static void cdp1802_output_state_code(const device_config *device)
static void cdp1802_run(const device_config *device)
{
cdp1802_state *cpustate = device->token;
cdp1802_state *cpustate = get_safe_token(device);
cdp1802_output_state_code(device);
@ -872,7 +881,7 @@ static void cdp1802_run(const device_config *device)
static CPU_EXECUTE( cdp1802 )
{
cdp1802_state *cpustate = device->token;
cdp1802_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -933,14 +942,14 @@ static CPU_EXECUTE( cdp1802 )
static CPU_RESET( cdp1802 )
{
cdp1802_state *cpustate = device->token;
cdp1802_state *cpustate = get_safe_token(device);
cpustate->mode = CDP1802_MODE_RESET;
}
static CPU_INIT( cdp1802 )
{
cdp1802_state *cpustate = device->token;
cdp1802_state *cpustate = get_safe_token(device);
int i;
cpustate->intf = (cdp1802_interface *) device->static_config;
@ -1005,7 +1014,7 @@ static CPU_INIT( cdp1802 )
static CPU_IMPORT_STATE( cdp1802 )
{
cdp1802_state *cpustate = device->token;
cdp1802_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -1021,7 +1030,7 @@ static CPU_IMPORT_STATE( cdp1802 )
static CPU_EXPORT_STATE( cdp1802 )
{
cdp1802_state *cpustate = device->token;
cdp1802_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -1041,7 +1050,7 @@ static CPU_EXPORT_STATE( cdp1802 )
static CPU_SET_INFO( cdp1802 )
{
cdp1802_state *cpustate = device->token;
cdp1802_state *cpustate = get_safe_token(device);
switch (state)
{
@ -1057,7 +1066,7 @@ static CPU_SET_INFO( cdp1802 )
CPU_GET_INFO( cdp1802 )
{
cdp1802_state *cpustate = (device != NULL) ? device->token : NULL;
cdp1802_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

49
src/emu/cpu/cop400/cop400.c
View File

@ -252,6 +252,27 @@ static const cpu_state_table state_table_template =
INLINE FUNCTIONS
***************************************************************************/
INLINE cop400_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_COP401 ||
cpu_get_type(device) == CPU_COP410 ||
cpu_get_type(device) == CPU_COP411 ||
cpu_get_type(device) == CPU_COP402 ||
cpu_get_type(device) == CPU_COP420 ||
cpu_get_type(device) == CPU_COP421 ||
cpu_get_type(device) == CPU_COP422 ||
cpu_get_type(device) == CPU_COP404 ||
cpu_get_type(device) == CPU_COP424 ||
cpu_get_type(device) == CPU_COP425 ||
cpu_get_type(device) == CPU_COP426 ||
cpu_get_type(device) == CPU_COP444 ||
cpu_get_type(device) == CPU_COP445);
return (cop400_state *)device->token;
}
INLINE void PUSH(cop400_state *cpustate, UINT16 data)
{
if (cpustate->state_table.subtypemask != COP410_FEATURE)
@ -712,7 +733,7 @@ static const cop400_opcode_map COP444_OPCODE_MAP[256] =
static TIMER_CALLBACK( serial_tick )
{
cop400_state *cpustate = ptr;
cop400_state *cpustate = (cop400_state *)ptr;
if (BIT(EN, 0))
{
@ -787,7 +808,7 @@ static TIMER_CALLBACK( serial_tick )
static TIMER_CALLBACK( counter_tick )
{
cop400_state *cpustate = ptr;
cop400_state *cpustate = (cop400_state *)ptr;
T++;
@ -805,7 +826,7 @@ static TIMER_CALLBACK( counter_tick )
static TIMER_CALLBACK( inil_tick )
{
cop400_state *cpustate = ptr;
cop400_state *cpustate = (cop400_state *)ptr;
UINT8 in;
int i;
@ -824,7 +845,7 @@ static TIMER_CALLBACK( inil_tick )
static TIMER_CALLBACK( microbus_tick )
{
cop400_state *cpustate = ptr;
cop400_state *cpustate = (cop400_state *)ptr;
UINT8 in;
in = IN_IN();
@ -858,7 +879,7 @@ static TIMER_CALLBACK( microbus_tick )
static void cop400_init(const device_config *device, UINT8 g_mask, UINT8 d_mask, UINT8 in_mask, int has_counter, int has_inil)
{
cop400_state *cpustate = device->token;
cop400_state *cpustate = get_safe_token(device);
cpustate->intf = (cop400_interface *) device->static_config;
@ -939,7 +960,7 @@ static void cop400_init(const device_config *device, UINT8 g_mask, UINT8 d_mask,
static void cop410_init_opcodes(const device_config *device)
{
cop400_state *cpustate = device->token;
cop400_state *cpustate = get_safe_token(device);
int i;
/* set up the state table */
@ -970,7 +991,7 @@ static void cop410_init_opcodes(const device_config *device)
static void cop420_init_opcodes(const device_config *device)
{
cop400_state *cpustate = device->token;
cop400_state *cpustate = get_safe_token(device);
int i;
/* set up the state table */
@ -1005,7 +1026,7 @@ static void cop420_init_opcodes(const device_config *device)
static void cop444_init_opcodes(const device_config *device)
{
cop400_state *cpustate = device->token;
cop400_state *cpustate = get_safe_token(device);
int i;
/* set up the state table */
@ -1098,7 +1119,7 @@ static CPU_INIT( cop445 )
static CPU_RESET( cop400 )
{
cop400_state *cpustate = device->token;
cop400_state *cpustate = get_safe_token(device);
PC = 0;
A = 0;
@ -1122,7 +1143,7 @@ static CPU_RESET( cop400 )
static CPU_EXECUTE( cop400 )
{
cop400_state *cpustate = device->token;
cop400_state *cpustate = get_safe_token(device);
UINT8 opcode;
@ -1336,7 +1357,7 @@ static CPU_SET_INFO( cop400 )
static CPU_GET_INFO( cop400 )
{
cop400_state *cpustate = (device != NULL) ? device->token : NULL;
cop400_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -1391,7 +1412,7 @@ static CPU_GET_INFO( cop400 )
CPU_GET_INFO( cop410 )
{
cop400_state *cpustate = (device != NULL) ? device->token : NULL;
cop400_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -1454,7 +1475,7 @@ CPU_GET_INFO( cop401 )
CPU_GET_INFO( cop420 )
{
cop400_state *cpustate = (device != NULL) ? device->token : NULL;
cop400_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -1535,7 +1556,7 @@ CPU_GET_INFO( cop402 )
CPU_GET_INFO( cop444 )
{
cop400_state *cpustate = (device != NULL) ? device->token : NULL;
cop400_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

17
src/emu/cpu/cp1610/cp1610.c
View File

@ -51,6 +51,15 @@ struct _cp1610_state
int icount;
};
INLINE cp1610_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_CP1610);
return (cp1610_state *)device->token;
}
#define cp1610_readop(A) memory_read_word_16be(cpustate->program, (A)<<1)
#define cp1610_readmem16(A) memory_read_word_16be(cpustate->program, (A)<<1)
#define cp1610_writemem16(A,B) memory_write_word_16be(cpustate->program, (A)<<1,B)
@ -2165,7 +2174,7 @@ static void cp1610_do_jumps(cp1610_state *cpustate)
/* Execute cycles - returns number of cycles actually run */
static CPU_EXECUTE( cp1610 )
{
cp1610_state *cpustate = device->token;
cp1610_state *cpustate = get_safe_token(device);
UINT16 opcode;
cpustate->icount = cycles;
@ -3379,7 +3388,7 @@ static CPU_EXECUTE( cp1610 )
static CPU_INIT( cp1610 )
{
cp1610_state *cpustate = device->token;
cp1610_state *cpustate = get_safe_token(device);
cpustate->intr_enabled = 0;
cpustate->reset_pending = 0;
cpustate->intr_pending = 0;
@ -3413,7 +3422,7 @@ static void cp1610_set_irq_line(cp1610_state *cpustate, UINT32 irqline, int stat
static CPU_SET_INFO( cp1610 )
{
cp1610_state *cpustate = device->token;
cp1610_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@ -3439,7 +3448,7 @@ static CPU_SET_INFO( cp1610 )
CPU_GET_INFO( cp1610 )
{
cp1610_state *cpustate = (device != NULL) ? device->token : NULL;
cp1610_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

105
src/emu/cpu/cubeqcpu/cubeqcpu.c
View File

@ -220,32 +220,63 @@ typedef struct
int icount;
} cquestlin_state;
/***************************************************************************
STATE ACCESSORS
***************************************************************************/
INLINE cquestsnd_state *get_safe_token_snd(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_CQUESTSND);
return (cquestsnd_state *)device->token;
}
INLINE cquestrot_state *get_safe_token_rot(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_CQUESTROT);
return (cquestrot_state *)device->token;
}
INLINE cquestlin_state *get_safe_token_lin(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_CQUESTLIN);
return (cquestlin_state *)device->token;
}
/***************************************************************************
MEMORY ACCESSORS FOR 68000
***************************************************************************/
WRITE16_DEVICE_HANDLER( cubeqcpu_sndram_w )
{
cquestsnd_state *cpustate = device->token;
cquestsnd_state *cpustate = get_safe_token_snd(device);
COMBINE_DATA(&cpustate->sram[offset]);
}
READ16_DEVICE_HANDLER( cubeqcpu_sndram_r )
{
cquestsnd_state *cpustate = device->token;
cquestsnd_state *cpustate = get_safe_token_snd(device);
return cpustate->sram[offset];
}
WRITE16_DEVICE_HANDLER( cubeqcpu_rotram_w )
{
cquestrot_state *cpustate = device->token;
cquestrot_state *cpustate = get_safe_token_rot(device);
COMBINE_DATA(&cpustate->dram[offset]);
}
READ16_DEVICE_HANDLER( cubeqcpu_rotram_r )
{
cquestrot_state *cpustate = device->token;
cquestrot_state *cpustate = get_safe_token_rot(device);
return cpustate->dram[offset];
}
@ -260,7 +291,7 @@ static STATE_POSTLOAD( cquestsnd_postload )
static void cquestsnd_state_register(const device_config *device)
{
cquestsnd_state *cpustate = device->token;
cquestsnd_state *cpustate = get_safe_token_snd(device);
state_save_register_device_item_array(device, 0, cpustate->ram);
state_save_register_device_item(device, 0, cpustate->q);
state_save_register_device_item(device, 0, cpustate->f);
@ -283,7 +314,7 @@ static void cquestsnd_state_register(const device_config *device)
static CPU_INIT( cquestsnd )
{
cquestsnd_state *cpustate = device->token;
cquestsnd_state *cpustate = get_safe_token_snd(device);
cubeqst_snd_config* _config = (cubeqst_snd_config*)device->static_config;
memset(cpustate, 0, sizeof(*cpustate));
@ -295,7 +326,7 @@ static CPU_INIT( cquestsnd )
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
/* Allocate RAM shared with 68000 */
cpustate->sram = auto_malloc(4096);
cpustate->sram = (UINT16 *)auto_malloc(4096);
cquestsnd_state_register(device);
}
@ -303,7 +334,7 @@ static CPU_INIT( cquestsnd )
static CPU_RESET( cquestsnd )
{
cquestsnd_state *cpustate = device->token;
cquestsnd_state *cpustate = get_safe_token_snd(device);
cpustate->pc = 0;
}
@ -324,7 +355,7 @@ static STATE_POSTLOAD( cquestrot_postload )
static void cquestrot_state_register(const device_config *device)
{
cquestrot_state *cpustate = device->token;
cquestrot_state *cpustate = get_safe_token_rot(device);
state_save_register_device_item_array(device, 0, cpustate->ram);
state_save_register_device_item(device, 0, cpustate->q);
state_save_register_device_item(device, 0, cpustate->f);
@ -356,13 +387,13 @@ static void cquestrot_state_register(const device_config *device)
static CPU_INIT( cquestrot )
{
const cubeqst_rot_config *rotconfig = device->static_config;
cquestrot_state *cpustate = device->token;
const cubeqst_rot_config *rotconfig = (const cubeqst_rot_config *)device->static_config;
cquestrot_state *cpustate = get_safe_token_rot(device);
memset(cpustate, 0, sizeof(*cpustate));
/* Allocate RAM */
cpustate->dram = auto_malloc(16384 * sizeof(UINT16)); /* Shared with 68000 */
cpustate->sram = auto_malloc(2048 * sizeof(UINT16)); /* Private */
cpustate->dram = (UINT16 *)auto_malloc(16384 * sizeof(UINT16)); /* Shared with 68000 */
cpustate->sram = (UINT16 *)auto_malloc(2048 * sizeof(UINT16)); /* Private */
cpustate->device = device;
cpustate->lindevice = cputag_get_cpu(device->machine, rotconfig->lin_cpu_tag);
@ -374,7 +405,7 @@ static CPU_INIT( cquestrot )
static CPU_RESET( cquestrot )
{
cquestrot_state *cpustate = device->token;
cquestrot_state *cpustate = get_safe_token_rot(device);
cpustate->pc = 0;
cpustate->wc = 0;
cpustate->prev_dred = 1;
@ -402,7 +433,7 @@ static STATE_POSTLOAD( cquestlin_postload )
static void cquestlin_state_register(const device_config *device)
{
cquestlin_state *cpustate = device->token;
cquestlin_state *cpustate = get_safe_token_lin(device);
state_save_register_device_item_array(device, 0, cpustate->ram);
state_save_register_device_item(device, 0, cpustate->q);
@ -439,15 +470,15 @@ static void cquestlin_state_register(const device_config *device)
static CPU_INIT( cquestlin )
{
const cubeqst_lin_config *linconfig = device->static_config;
cquestlin_state *cpustate = device->token;
const cubeqst_lin_config *linconfig = (const cubeqst_lin_config *)device->static_config;
cquestlin_state *cpustate = get_safe_token_lin(device);
memset(cpustate, 0, sizeof(*cpustate));
/* Allocate RAM */
cpustate->sram = auto_malloc(4096 * sizeof(UINT16)); /* Shared with rotate CPU */
cpustate->ptr_ram = auto_malloc(1024); /* Pointer RAM */
cpustate->e_stack = auto_malloc(32768 * sizeof(UINT32)); /* Stack DRAM: 32kx20 */
cpustate->o_stack = auto_malloc(32768 * sizeof(UINT32)); /* Stack DRAM: 32kx20 */
cpustate->sram = (UINT16 *)auto_malloc(4096 * sizeof(UINT16)); /* Shared with rotate CPU */
cpustate->ptr_ram = (UINT8 *)auto_malloc(1024); /* Pointer RAM */
cpustate->e_stack = (UINT32 *)auto_malloc(32768 * sizeof(UINT32)); /* Stack DRAM: 32kx20 */
cpustate->o_stack = (UINT32 *)auto_malloc(32768 * sizeof(UINT32)); /* Stack DRAM: 32kx20 */
cpustate->device = device;
cpustate->rotdevice = cputag_get_cpu(device->machine, linconfig->rot_cpu_tag);
@ -459,7 +490,7 @@ static CPU_INIT( cquestlin )
static CPU_RESET( cquestlin )
{
cquestlin_state *cpustate = device->token;
cquestlin_state *cpustate = get_safe_token_lin(device);
cpustate->clkcnt = 0;
cpustate->pc[FOREGROUND] = 0;
cpustate->pc[BACKGROUND] = 0x80;
@ -502,7 +533,7 @@ static int do_sndjmp(cquestsnd_state *cpustate, int jmp)
static CPU_EXECUTE( cquestsnd )
{
cquestsnd_state *cpustate = device->token;
cquestsnd_state *cpustate = get_safe_token_snd(device);
int calldebugger = ((device->machine->debug_flags & DEBUG_FLAG_ENABLED) != 0);
cpustate->icount = cycles;
@ -837,8 +868,8 @@ INLINE int do_rotjmp(cquestrot_state *cpustate, int jmp)
static CPU_EXECUTE( cquestrot )
{
cquestrot_state *cpustate = device->token;
cquestlin_state *lincpustate = cpustate->lindevice->token;
cquestrot_state *cpustate = get_safe_token_rot(device);
cquestlin_state *lincpustate = get_safe_token_lin(cpustate->lindevice);
int calldebugger = ((device->machine->debug_flags & DEBUG_FLAG_ENABLED) != 0);
cpustate->icount = cycles;
@ -1318,26 +1349,26 @@ INLINE int do_linjmp(cquestlin_state *cpustate, int jmp)
void cubeqcpu_swap_line_banks(const device_config *device)
{
cquestlin_state *cpustate = device->token;
cquestlin_state *cpustate = get_safe_token_lin(device);
cpustate->field = cpustate->field ^ 1;
}
void cubeqcpu_clear_stack(const device_config *device)
{
cquestlin_state *cpustate = device->token;
cquestlin_state *cpustate = get_safe_token_lin(device);
memset(&cpustate->ptr_ram[cpustate->field * 256], 0, 256);
}
UINT8 cubeqcpu_get_ptr_ram_val(const device_config *device, int i)
{
cquestlin_state *cpustate = device->token;
cquestlin_state *cpustate = get_safe_token_lin(device);
return cpustate->ptr_ram[(VISIBLE_FIELD * 256) + i];
}
UINT32* cubeqcpu_get_stack_ram(const device_config *device)
{
cquestlin_state *cpustate = device->token;
cquestlin_state *cpustate = get_safe_token_lin(device);
if (VISIBLE_FIELD == ODD_FIELD)
return cpustate->o_stack;
else
@ -1349,8 +1380,8 @@ static CPU_EXECUTE( cquestlin )
{
#define LINE_PC ((cpustate->pc[prog] & 0x7f) | ((prog == BACKGROUND) ? 0x80 : 0))
cquestlin_state *cpustate = device->token;
cquestrot_state *rotcpustate = cpustate->rotdevice->token;
cquestlin_state *cpustate = get_safe_token_lin(device);
cquestrot_state *rotcpustate = get_safe_token_rot(cpustate->rotdevice);
int calldebugger = ((device->machine->debug_flags & DEBUG_FLAG_ENABLED) != 0);
UINT32 *stack_ram;
UINT8 *ptr_ram;
@ -1815,7 +1846,7 @@ static CPU_DISASSEMBLE( cquestlin )
static CPU_SET_INFO( cquestsnd )
{
cquestsnd_state *cpustate = device->token;
cquestsnd_state *cpustate = get_safe_token_snd(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -1851,7 +1882,7 @@ static CPU_SET_INFO( cquestsnd )
CPU_GET_INFO( cquestsnd )
{
cquestsnd_state *cpustate = (device != NULL) ? device->token : NULL;
cquestsnd_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token_snd(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@ -1928,7 +1959,7 @@ CPU_GET_INFO( cquestsnd )
static CPU_SET_INFO( cquestrot )
{
cquestrot_state *cpustate = device->token;
cquestrot_state *cpustate = get_safe_token_rot(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -1969,7 +2000,7 @@ static CPU_SET_INFO( cquestrot )
CPU_GET_INFO( cquestrot )
{
cquestrot_state *cpustate = (device != NULL) ? device->token : NULL;
cquestrot_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token_rot(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@ -2053,7 +2084,7 @@ CPU_GET_INFO( cquestrot )
static CPU_SET_INFO( cquestlin )
{
cquestlin_state *cpustate = device->token;
cquestlin_state *cpustate = get_safe_token_lin(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -2087,7 +2118,7 @@ static CPU_SET_INFO( cquestlin )
CPU_GET_INFO( cquestlin )
{
cquestlin_state *cpustate = (device != NULL) ? device->token : NULL;
cquestlin_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token_lin(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

26
src/emu/cpu/drcbec.c
View File

@ -310,7 +310,7 @@ static drcbe_state *drcbec_alloc(drcuml_state *drcuml, drccache *cache, const de
int spacenum;
/* allocate space in the cache for our state */
drcbe_state *drcbe = drccache_memory_alloc(cache, sizeof(*drcbe));
drcbe_state *drcbe = (drcbe_state *)drccache_memory_alloc(cache, sizeof(*drcbe));
if (drcbe == NULL)
return NULL;
memset(drcbe, 0, sizeof(*drcbe));
@ -474,27 +474,27 @@ static void drcbec_generate(drcbe_state *drcbe, drcuml_block *block, const drcum
/* pre-expand opcodes that encode size in them */
if (opcode == DRCUML_OP_LOAD)
opcode = DRCUML_OP_LOAD1 + (inst->param[3].value & 3);
opcode = (drcuml_opcode)(DRCUML_OP_LOAD1 + (inst->param[3].value & 3));
if (opcode == DRCUML_OP_LOADS)
opcode = DRCUML_OP_LOADS1 + (inst->param[3].value & 3);
opcode = (drcuml_opcode)(DRCUML_OP_LOADS1 + (inst->param[3].value & 3));
if (opcode == DRCUML_OP_STORE)
opcode = DRCUML_OP_STORE1 + (inst->param[3].value & 3);
opcode = (drcuml_opcode)(DRCUML_OP_STORE1 + (inst->param[3].value & 3));
if (opcode == DRCUML_OP_READ)
opcode = DRCUML_OP_READ1 + (inst->param[2].value & 3);
opcode = (drcuml_opcode)(DRCUML_OP_READ1 + (inst->param[2].value & 3));
if (opcode == DRCUML_OP_READM)
opcode = DRCUML_OP_READM1 + (inst->param[3].value & 3);
opcode = (drcuml_opcode)(DRCUML_OP_READM1 + (inst->param[3].value & 3));
if (opcode == DRCUML_OP_WRITE)
opcode = DRCUML_OP_WRITE1 + (inst->param[2].value & 3);
opcode = (drcuml_opcode)(DRCUML_OP_WRITE1 + (inst->param[2].value & 3));
if (opcode == DRCUML_OP_WRITEM)
opcode = DRCUML_OP_WRITEM1 + (inst->param[3].value & 3);
opcode = (drcuml_opcode)(DRCUML_OP_WRITEM1 + (inst->param[3].value & 3));
if (opcode == DRCUML_OP_SEXT)
opcode = DRCUML_OP_SEXT1 + (inst->param[2].value & 3);
opcode = (drcuml_opcode)(DRCUML_OP_SEXT1 + (inst->param[2].value & 3));
if (opcode == DRCUML_OP_FTOINT)
opcode = DRCUML_OP_FTOI4T + 5 * ((inst->param[2].value & 3) - 2) + inst->param[3].value;
opcode = (drcuml_opcode)(DRCUML_OP_FTOI4T + 5 * ((inst->param[2].value & 3) - 2) + inst->param[3].value);
if (opcode == DRCUML_OP_FFRINT)
opcode = DRCUML_OP_FFRI4 + ((inst->param[2].value & 3) - 2);
opcode = (drcuml_opcode)(DRCUML_OP_FFRI4 + ((inst->param[2].value & 3) - 2));
if (opcode == DRCUML_OP_FFRFLT)
opcode = DRCUML_OP_FFRFS + ((inst->param[2].value & 3) - 2);
opcode = (drcuml_opcode)(DRCUML_OP_FFRFS + ((inst->param[2].value & 3) - 2));
/* count how many bytes of immediates we need */
immedbytes = 0;
@ -1955,7 +1955,7 @@ static void output_parameter(drcbe_state *drcbe, drcbec_instruction **dstptr, vo
static void fixup_label(void *parameter, drccodeptr labelcodeptr)
{
drcbec_instruction *dst = parameter;
drcbec_instruction *dst = (drcbec_instruction *)parameter;
dst->inst = (drcbec_instruction *)labelcodeptr;
}

22
src/emu/cpu/drcbeut.c
View File

@ -92,7 +92,7 @@ drchash_state *drchash_alloc(drccache *cache, int modes, int addrbits, int ignor
drchash_state *drchash;
/* allocate permanent state from the cache */
drchash = drccache_memory_alloc(cache, sizeof(*drchash) + modes * sizeof(drchash->base[0]));
drchash = (drchash_state *)drccache_memory_alloc(cache, sizeof(*drchash) + modes * sizeof(drchash->base[0]));
if (drchash == NULL)
return NULL;
memset(drchash, 0, sizeof(*drchash) + modes * sizeof(drchash->base[0]));
@ -127,7 +127,7 @@ int drchash_reset(drchash_state *drchash)
int modenum, entry;
/* allocate an empty l2 hash table */
drchash->emptyl2 = drccache_memory_alloc_temporary(drchash->cache, sizeof(drccodeptr) << drchash->l2bits);
drchash->emptyl2 = (drccodeptr *)drccache_memory_alloc_temporary(drchash->cache, sizeof(drccodeptr) << drchash->l2bits);
if (drchash->emptyl2 == NULL)
return FALSE;
@ -136,7 +136,7 @@ int drchash_reset(drchash_state *drchash)
drchash->emptyl2[entry] = drchash->nocodeptr;
/* allocate an empty l1 hash table */
drchash->emptyl1 = drccache_memory_alloc_temporary(drchash->cache, sizeof(drccodeptr *) << drchash->l1bits);
drchash->emptyl1 = (drccodeptr **)drccache_memory_alloc_temporary(drchash->cache, sizeof(drccodeptr *) << drchash->l1bits);
if (drchash->emptyl1 == NULL)
return FALSE;
@ -245,7 +245,7 @@ int drchash_set_codeptr(drchash_state *drchash, UINT32 mode, UINT32 pc, drccodep
/* copy-on-write for the l1 hash table */
if (drchash->base[mode] == drchash->emptyl1)
{
drccodeptr **newtable = drccache_memory_alloc_temporary(drchash->cache, sizeof(drccodeptr *) << drchash->l1bits);
drccodeptr **newtable = (drccodeptr **)drccache_memory_alloc_temporary(drchash->cache, sizeof(drccodeptr *) << drchash->l1bits);
if (newtable == NULL)
return FALSE;
memcpy(newtable, drchash->emptyl1, sizeof(drccodeptr *) << drchash->l1bits);
@ -255,7 +255,7 @@ int drchash_set_codeptr(drchash_state *drchash, UINT32 mode, UINT32 pc, drccodep
/* copy-on-write for the l2 hash table */
if (drchash->base[mode][l1] == drchash->emptyl2)
{
drccodeptr *newtable = drccache_memory_alloc_temporary(drchash->cache, sizeof(drccodeptr) << drchash->l2bits);
drccodeptr *newtable = (drccodeptr *)drccache_memory_alloc_temporary(drchash->cache, sizeof(drccodeptr) << drchash->l2bits);
if (newtable == NULL)
return FALSE;
memcpy(newtable, drchash->emptyl2, sizeof(drccodeptr) << drchash->l2bits);
@ -284,7 +284,7 @@ drcmap_state *drcmap_alloc(drccache *cache, UINT64 uniquevalue)
drcmap_state *drcmap;
/* allocate permanent state from the cache */
drcmap = drccache_memory_alloc(cache, sizeof(*drcmap));
drcmap = (drcmap_state *)drccache_memory_alloc(cache, sizeof(*drcmap));
if (drcmap == NULL)
return NULL;
memset(drcmap, 0, sizeof(*drcmap));
@ -427,7 +427,7 @@ void drcmap_set_value(drcmap_state *drcmap, drccodeptr codebase, UINT32 mapvar,
return;
/* allocate a new entry and fill it in */
entry = drccache_memory_alloc(drcmap->cache, sizeof(*entry));
entry = (drcmap_entry *)drccache_memory_alloc(drcmap->cache, sizeof(*entry));
entry->next = NULL;
entry->codeptr = codebase;
entry->mapvar = mapvar - DRCUML_MAPVAR_M0;
@ -542,7 +542,7 @@ drclabel_list *drclabel_list_alloc(drccache *cache)
drclabel_list *list;
/* allocate permanent state from the cache */
list = drccache_memory_alloc(cache, sizeof(*list));
list = (drclabel_list *)drccache_memory_alloc(cache, sizeof(*list));
if (list == NULL)
return NULL;
memset(list, 0, sizeof(*list));
@ -655,7 +655,7 @@ static drclabel *label_find_or_allocate(drclabel_list *list, drcuml_codelabel la
/* if none found, allocate */
if (curlabel == NULL)
{
curlabel = drccache_memory_alloc(list->cache, sizeof(*curlabel));
curlabel = (drclabel *)drccache_memory_alloc(list->cache, sizeof(*curlabel));
curlabel->next = list->head;
curlabel->label = label;
curlabel->codeptr = NULL;
@ -673,8 +673,8 @@ static drclabel *label_find_or_allocate(drclabel_list *list, drcuml_codelabel la
static void label_oob_callback(drccodeptr *codeptr, void *param1, void *param2, void *param3)
{
drclabel *label = param1;
drclabel_fixup_func callback = param2;
drclabel *label = (drclabel *)param1;
drclabel_fixup_func callback = (drclabel_fixup_func)param2;
(*callback)(param3, label->codeptr);
}

14
src/emu/cpu/drcbex64.c
View File

@ -697,7 +697,7 @@ static drcbe_state *drcbex64_alloc(drcuml_state *drcuml, drccache *cache, const
int spacenum;
/* allocate space in the cache for our state */
drcbe = drccache_memory_alloc_near(cache, sizeof(*drcbe));
drcbe = (drcbe_state *)drccache_memory_alloc_near(cache, sizeof(*drcbe));
if (drcbe == NULL)
return NULL;
memset(drcbe, 0, sizeof(*drcbe));
@ -718,8 +718,8 @@ static drcbe_state *drcbex64_alloc(drcuml_state *drcuml, drccache *cache, const
/* build up necessary arrays */
memcpy(drcbe->ssecontrol, sse_control, sizeof(drcbe->ssecontrol));
drcbe->absmask32 = drccache_memory_alloc_near(cache, 16*2 + 15);
drcbe->absmask32 = (void *)(((FPTR)drcbe->absmask32 + 15) & ~15);
drcbe->absmask32 = (UINT32 *)drccache_memory_alloc_near(cache, 16*2 + 15);
drcbe->absmask32 = (UINT32 *)(((FPTR)drcbe->absmask32 + 15) & ~15);
drcbe->absmask32[0] = drcbe->absmask32[1] = drcbe->absmask32[2] = drcbe->absmask32[3] = 0x7fffffff;
drcbe->absmask64 = (UINT64 *)&drcbe->absmask32[4];
drcbe->absmask64[0] = drcbe->absmask64[1] = U64(0x7fffffffffffffff);
@ -2885,7 +2885,7 @@ static void emit_movsd_p64_r128(drcbe_state *drcbe, x86code **dst, const drcuml_
static void fixup_label(void *parameter, drccodeptr labelcodeptr)
{
drccodeptr src = parameter;
drccodeptr src = (drccodeptr)parameter;
/* find the end of the instruction */
if (src[0] == 0xe3)
@ -2916,9 +2916,9 @@ static void fixup_label(void *parameter, drccodeptr labelcodeptr)
static void fixup_exception(drccodeptr *codeptr, void *param1, void *param2, void *param3)
{
drcuml_parameter handp, exp;
drcbe_state *drcbe = param1;
drccodeptr src = param2;
const drcuml_instruction *inst = param3;
drcbe_state *drcbe = (drcbe_state *)param1;
drccodeptr src = (drccodeptr)param2;
const drcuml_instruction *inst = (const drcuml_instruction *)param3;
drccodeptr dst = *codeptr;
drccodeptr *targetptr;

16
src/emu/cpu/drccache.c
View File

@ -107,7 +107,7 @@ drccache *drccache_alloc(size_t bytes)
/* build a local structure first */
memset(&cache, 0, sizeof(cache));
cache.near = osd_alloc_executable(bytes);
cache.near = (drccodeptr)osd_alloc_executable(bytes);
cache.neartop = cache.near;
cache.base = cache.near + NEAR_CACHE_SIZE;
cache.top = cache.base;
@ -115,7 +115,7 @@ drccache *drccache_alloc(size_t bytes)
cache.size = bytes;
/* now allocate the cache structure itself from that */
cacheptr = drccache_memory_alloc(&cache, sizeof(cache));
cacheptr = (drccache *)drccache_memory_alloc(&cache, sizeof(cache));
*cacheptr = cache;
/* return the allocated result */
@ -237,7 +237,7 @@ void *drccache_memory_alloc(drccache *cache, size_t bytes)
}
/* if no space, we just fail */
ptr = ALIGN_PTR_DOWN(cache->end - bytes);
ptr = (drccodeptr)ALIGN_PTR_DOWN(cache->end - bytes);
if (cache->top > ptr)
return NULL;
@ -272,7 +272,7 @@ void *drccache_memory_alloc_near(drccache *cache, size_t bytes)
}
/* if no space, we just fail */
ptr = ALIGN_PTR_UP(cache->neartop);
ptr = (drccodeptr)ALIGN_PTR_UP(cache->neartop);
if (ptr + bytes > cache->base)
return NULL;
@ -290,7 +290,7 @@ void *drccache_memory_alloc_near(drccache *cache, size_t bytes)
void drccache_memory_free(drccache *cache, void *memory, size_t bytes)
{
free_link **linkptr;
free_link *link = memory;
free_link *link = (free_link *)memory;
assert(bytes < MAX_PERMANENT_ALLOC);
assert(((drccodeptr)memory >= cache->near && (drccodeptr)memory < cache->base) || ((drccodeptr)memory >= cache->end && (drccodeptr)memory < cache->near + cache->size));
@ -324,7 +324,7 @@ void *drccache_memory_alloc_temporary(drccache *cache, size_t bytes)
return NULL;
/* otherwise, update the cache top */
cache->top = ALIGN_PTR_UP(ptr + bytes);
cache->top = (drccodeptr)ALIGN_PTR_UP(ptr + bytes);
return ptr;
}
@ -383,7 +383,7 @@ drccodeptr drccache_end_codegen(drccache *cache)
}
/* update the cache top */
cache->top = ALIGN_PTR_UP(cache->top);
cache->top = (drccodeptr)ALIGN_PTR_UP(cache->top);
cache->codegen = NULL;
return result;
@ -402,7 +402,7 @@ void drccache_request_oob_codegen(drccache *cache, drccache_oob_func callback, v
assert(cache->codegen != NULL);
/* pull an item from the free list */
oob = drccache_memory_alloc(cache, sizeof(*oob));
oob = (oob_handler *)drccache_memory_alloc(cache, sizeof(*oob));
assert(oob != NULL);
/* fill it in */

6
src/emu/cpu/drcfe.c
View File

@ -97,7 +97,7 @@ INLINE opcode_desc *desc_alloc(drcfe_state *drcfe)
if (desc != NULL)
drcfe->desc_free_list = desc->next;
else
desc = malloc_or_die(sizeof(*desc));
desc = (opcode_desc *)malloc_or_die(sizeof(*desc));
return desc;
}
@ -128,11 +128,11 @@ drcfe_state *drcfe_init(const device_config *cpu, const drcfe_config *config, vo
drcfe_state *drcfe;
/* allocate some memory to hold the state */
drcfe = malloc_or_die(sizeof(*drcfe));
drcfe = (drcfe_state *)malloc_or_die(sizeof(*drcfe));
memset(drcfe, 0, sizeof(*drcfe));
/* allocate the description array */
drcfe->desc_array = malloc_or_die((config->window_end + config->window_start + 2) * sizeof(*drcfe->desc_array));
drcfe->desc_array = (opcode_desc **)malloc_or_die((config->window_end + config->window_start + 2) * sizeof(*drcfe->desc_array));
memset(drcfe->desc_array, 0, (config->window_end + config->window_start + 2) * sizeof(*drcfe->desc_array));
/* copy in configuration information */

28
src/emu/cpu/drcuml.c
View File

@ -545,7 +545,7 @@ drcuml_state *drcuml_alloc(const device_config *device, drccache *cache, UINT32
int opnum;
/* allocate state */
drcuml = drccache_memory_alloc(cache, sizeof(*drcuml));
drcuml = (drcuml_state *)drccache_memory_alloc(cache, sizeof(*drcuml));
if (drcuml == NULL)
return NULL;
memset(drcuml, 0, sizeof(*drcuml));
@ -686,7 +686,7 @@ drcuml_block *drcuml_block_begin(drcuml_state *drcuml, UINT32 maxinst, jmp_buf *
if (bestblock == NULL)
{
/* allocate the block structure itself */
bestblock = malloc(sizeof(*bestblock));
bestblock = (drcuml_block *)malloc(sizeof(*bestblock));
if (bestblock == NULL)
fatalerror("Out of memory allocating block in drcuml_block_begin");
memset(bestblock, 0, sizeof(*bestblock));
@ -695,7 +695,7 @@ drcuml_block *drcuml_block_begin(drcuml_state *drcuml, UINT32 maxinst, jmp_buf *
bestblock->drcuml = drcuml;
bestblock->next = drcuml->blocklist;
bestblock->maxinst = maxinst * 3 / 2;
bestblock->inst = malloc(sizeof(drcuml_instruction) * bestblock->maxinst);
bestblock->inst = (drcuml_instruction *)malloc(sizeof(drcuml_instruction) * bestblock->maxinst);
if (bestblock->inst == NULL)
fatalerror("Out of memory allocating instruction array in drcuml_block_begin");
@ -728,7 +728,7 @@ void drcuml_block_append_0(drcuml_block *block, drcuml_opcode op, UINT8 size, UI
fatalerror("Overran maxinst in drcuml_block_append");
/* fill in the instruction */
inst->opcode = (UINT8)op;
inst->opcode = (drcuml_opcode)(UINT8)op;
inst->size = size;
inst->condition = condition;
inst->flags = 0;
@ -755,7 +755,7 @@ void drcuml_block_append_1(drcuml_block *block, drcuml_opcode op, UINT8 size, UI
fatalerror("Overran maxinst in drcuml_block_append");
/* fill in the instruction */
inst->opcode = (UINT8)op;
inst->opcode = (drcuml_opcode)(UINT8)op;
inst->size = size;
inst->condition = condition;
inst->flags = 0;
@ -784,7 +784,7 @@ void drcuml_block_append_2(drcuml_block *block, drcuml_opcode op, UINT8 size, UI
fatalerror("Overran maxinst in drcuml_block_append");
/* fill in the instruction */
inst->opcode = (UINT8)op;
inst->opcode = (drcuml_opcode)(UINT8)op;
inst->size = size;
inst->condition = condition;
inst->flags = 0;
@ -815,7 +815,7 @@ void drcuml_block_append_3(drcuml_block *block, drcuml_opcode op, UINT8 size, UI
fatalerror("Overran maxinst in drcuml_block_append");
/* fill in the instruction */
inst->opcode = (UINT8)op;
inst->opcode = (drcuml_opcode)(UINT8)op;
inst->size = size;
inst->condition = condition;
inst->flags = 0;
@ -848,7 +848,7 @@ void drcuml_block_append_4(drcuml_block *block, drcuml_opcode op, UINT8 size, UI
fatalerror("Overran maxinst in drcuml_block_append");
/* fill in the instruction */
inst->opcode = (UINT8)op;
inst->opcode = (drcuml_opcode)(UINT8)op;
inst->size = size;
inst->condition = condition;
inst->flags = 0;
@ -952,13 +952,13 @@ drcuml_codehandle *drcuml_handle_alloc(drcuml_state *drcuml, const char *name)
char *string;
/* allocate space for a copy of the string */
string = drccache_memory_alloc(drcuml->cache, strlen(name) + 1);
string = (char *)drccache_memory_alloc(drcuml->cache, strlen(name) + 1);
if (string == NULL)
return NULL;
strcpy(string, name);
/* allocate a new handle info */
handle = drccache_memory_alloc_near(drcuml->cache, sizeof(*handle));
handle = (drcuml_codehandle *)drccache_memory_alloc_near(drcuml->cache, sizeof(*handle));
if (handle == NULL)
{
drccache_memory_free(drcuml->cache, string, strlen(name) + 1);
@ -1036,7 +1036,7 @@ void drcuml_symbol_add(drcuml_state *drcuml, void *base, UINT32 length, const ch
drcuml_symbol *symbol;
/* allocate memory to hold the symbol */
symbol = malloc(sizeof(*symbol) + strlen(name));
symbol = (drcuml_symbol *)malloc(sizeof(*symbol) + strlen(name));
if (symbol == NULL)
fatalerror("Out of memory allocating symbol in drcuml_symbol_add");
@ -1060,7 +1060,7 @@ void drcuml_symbol_add(drcuml_state *drcuml, void *base, UINT32 length, const ch
const char *drcuml_symbol_find(drcuml_state *drcuml, void *base, UINT32 *offset)
{
drccodeptr search = base;
drccodeptr search = (drccodeptr)base;
drcuml_symbol *symbol;
/* simple linear search */
@ -1121,7 +1121,7 @@ void drcuml_add_comment(drcuml_block *block, const char *format, ...)
va_end(va);
/* allocate space in the cache to hold the comment */
comment = drccache_memory_alloc_temporary(block->drcuml->cache, strlen(buffer) + 1);
comment = (char *)drccache_memory_alloc_temporary(block->drcuml->cache, strlen(buffer) + 1);
if (comment == NULL)
return;
strcpy(comment, buffer);
@ -2177,7 +2177,7 @@ static void bevalidate_execute(drcuml_state *drcuml, drcuml_codehandle **handles
int numparams;
/* allocate memory for parameters */
parammem = drccache_memory_alloc_near(drcuml->cache, sizeof(UINT64) * (ARRAY_LENGTH(test->param) + 1));
parammem = (UINT64 *)drccache_memory_alloc_near(drcuml->cache, sizeof(UINT64) * (ARRAY_LENGTH(test->param) + 1));
/* flush the cache */
drcuml_reset(drcuml);

1
src/emu/cpu/drcuml.h
View File

@ -42,6 +42,7 @@ enum _drcuml_ptype
DRCUML_PTYPE_MAX
};
typedef enum _drcuml_ptype drcuml_ptype;
DECLARE_ENUM_OPERATORS(drcuml_ptype)
/* these define the registers for the UML */

31
src/emu/cpu/dsp32/dsp32.c
View File

@ -196,6 +196,21 @@ static CPU_RESET( dsp32c );
/***************************************************************************
STATE ACCESSORS
***************************************************************************/
INLINE dsp32_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_DSP32C);
return (dsp32_state *)device->token;
}
/***************************************************************************
MEMORY ACCESSORS
***************************************************************************/
@ -296,8 +311,8 @@ static void update_pcr(dsp32_state *cpustate, UINT16 newval)
static CPU_INIT( dsp32c )
{
const dsp32_config *configdata = device->static_config;
dsp32_state *cpustate = device->token;
const dsp32_config *configdata = (const dsp32_config *)device->static_config;
dsp32_state *cpustate = get_safe_token(device);
/* copy in config data */
if (configdata != NULL)
@ -310,7 +325,7 @@ static CPU_INIT( dsp32c )
static CPU_RESET( dsp32c )
{
dsp32_state *cpustate = device->token;
dsp32_state *cpustate = get_safe_token(device);
/* reset goes to 0 */
cpustate->PC = 0;
@ -354,7 +369,7 @@ static CPU_EXIT( dsp32c )
static CPU_EXECUTE( dsp32c )
{
dsp32_state *cpustate = device->token;
dsp32_state *cpustate = get_safe_token(device);
/* skip if halted */
if ((cpustate->pcr & PCR_RESET) == 0)
@ -496,7 +511,7 @@ INLINE void dma_store(dsp32_state *cpustate)
void dsp32c_pio_w(const device_config *device, int reg, int data)
{
dsp32_state *cpustate = device->token;
dsp32_state *cpustate = get_safe_token(device);
UINT16 mask;
UINT8 mode;
@ -575,7 +590,7 @@ void dsp32c_pio_w(const device_config *device, int reg, int data)
int dsp32c_pio_r(const device_config *device, int reg)
{
dsp32_state *cpustate = device->token;
dsp32_state *cpustate = get_safe_token(device);
UINT16 mask, result = 0xffff;
UINT8 mode, shift = 0;
@ -648,7 +663,7 @@ int dsp32c_pio_r(const device_config *device, int reg)
static CPU_SET_INFO( dsp32c )
{
dsp32_state *cpustate = device->token;
dsp32_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -720,7 +735,7 @@ static CPU_SET_INFO( dsp32c )
CPU_GET_INFO( dsp32c )
{
dsp32_state *cpustate = (device != NULL) ? device->token : NULL;
dsp32_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

40
src/emu/cpu/e132xs/e132xs.c
View File

@ -429,6 +429,28 @@ ADDRESS_MAP_END
#endif
INLINE hyperstone_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_E116T ||
cpu_get_type(device) == CPU_E116XT ||
cpu_get_type(device) == CPU_E116XS ||
cpu_get_type(device) == CPU_E116XSR ||
cpu_get_type(device) == CPU_E132N ||
cpu_get_type(device) == CPU_E132T ||
cpu_get_type(device) == CPU_E132XN ||
cpu_get_type(device) == CPU_E132XT ||
cpu_get_type(device) == CPU_E132XS ||
cpu_get_type(device) == CPU_E132XSR ||
cpu_get_type(device) == CPU_GMS30C2116 ||
cpu_get_type(device) == CPU_GMS30C2132 ||
cpu_get_type(device) == CPU_GMS30C2216 ||
cpu_get_type(device) == CPU_GMS30C2232);
return (hyperstone_state *)device->token;
}
/* Return the entry point for a determinated trap */
static UINT32 get_trap_addr(hyperstone_state *cpustate, UINT8 trapno)
{
@ -632,7 +654,7 @@ static void adjust_timer_interrupt(hyperstone_state *cpustate)
static TIMER_CALLBACK( e132xs_timer_callback )
{
const device_config *device = (const device_config *)ptr;
hyperstone_state *cpustate = device->token;
hyperstone_state *cpustate = get_safe_token(device);
int update = param;
/* update the values if necessary */
@ -1523,7 +1545,7 @@ static void set_irq_line(hyperstone_state *cpustate, int irqline, int state)
static void hyperstone_init(const device_config *device, cpu_irq_callback irqcallback, int scale_mask)
{
hyperstone_state *cpustate = device->token;
hyperstone_state *cpustate = get_safe_token(device);
state_save_register_device_item_array(device, 0, cpustate->global_regs);
state_save_register_device_item_array(device, 0, cpustate->local_regs);
@ -1546,7 +1568,7 @@ static void hyperstone_init(const device_config *device, cpu_irq_callback irqcal
#if (HAS_E116T || HAS_E116XT || HAS_E116XS || HAS_E116XSR || HAS_GMS30C2116 || HAS_GMS30C2216)
static void e116_init(const device_config *device, cpu_irq_callback irqcallback, int scale_mask)
{
hyperstone_state *cpustate = device->token;
hyperstone_state *cpustate = get_safe_token(device);
hyperstone_init(device, irqcallback, scale_mask);
cpustate->opcodexor = 0;
}
@ -1597,7 +1619,7 @@ static CPU_INIT( gms30c2216 )
#if (HAS_E132N || HAS_E132T || HAS_E132XN || HAS_E132XT || HAS_E132XS || HAS_E132XSR || HAS_GMS30C2132 || HAS_GMS30C2232)
static void e132_init(const device_config *device, cpu_irq_callback irqcallback, int scale_mask)
{
hyperstone_state *cpustate = device->token;
hyperstone_state *cpustate = get_safe_token(device);
hyperstone_init(device, irqcallback, scale_mask);
cpustate->opcodexor = WORD_XOR_BE(0);
}
@ -1661,7 +1683,7 @@ static CPU_INIT( gms30c2232 )
static CPU_RESET( hyperstone )
{
hyperstone_state *cpustate = device->token;
hyperstone_state *cpustate = get_safe_token(device);
//TODO: Add different reset initializations for BCR, MCR, FCR, TPR
@ -1712,7 +1734,7 @@ static CPU_EXIT( hyperstone )
static CPU_DISASSEMBLE( hyperstone )
{
hyperstone_state *cpustate = device->token;
hyperstone_state *cpustate = get_safe_token(device);
return dasm_hyperstone( buffer, pc, oprom, GET_H, GET_FP );
}
@ -4683,7 +4705,7 @@ INLINE void hyperstone_trap(hyperstone_state *cpustate, struct regs_decode *deco
static CPU_EXECUTE( hyperstone )
{
hyperstone_state *cpustate = device->token;
hyperstone_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -4733,7 +4755,7 @@ static CPU_EXECUTE( hyperstone )
static CPU_SET_INFO( hyperstone )
{
hyperstone_state *cpustate = device->token;
hyperstone_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -4870,7 +4892,7 @@ static CPU_SET_INFO( hyperstone )
static CPU_GET_INFO( hyperstone )
{
hyperstone_state *cpustate = (device != NULL) ? device->token : NULL;
hyperstone_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

26
src/emu/cpu/esrip/esrip.c
View File

@ -118,13 +118,23 @@ typedef struct
} esrip_state;
INLINE esrip_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_ESRIP);
return (esrip_state *)device->token;
}
/***************************************************************************
PUBLIC FUNCTIONS
***************************************************************************/
UINT8 get_rip_status(const device_config *cpu)
{
esrip_state *cpustate = cpu->token;
esrip_state *cpustate = get_safe_token(cpu);
return cpustate->status_out;
}
@ -237,7 +247,7 @@ static void make_ops(esrip_state *cpustate)
static CPU_INIT( esrip )
{
esrip_state *cpustate = device->token;
esrip_state *cpustate = get_safe_token(device);
esrip_config* _config = (esrip_config*)device->static_config;
memset(cpustate, 0, sizeof(cpustate));
@ -250,13 +260,13 @@ static CPU_INIT( esrip )
cpustate->draw = _config->draw;
/* Allocate image pointer table RAM */
cpustate->ipt_ram = auto_malloc(IPT_RAM_SIZE);
cpustate->ipt_ram = (UINT16 *)auto_malloc(IPT_RAM_SIZE);
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
/* Create the instruction decode lookup table */
cpustate->optable = auto_malloc(65536);
cpustate->optable = (UINT8 *)auto_malloc(65536);
make_ops(cpustate);
/* Register stuff for state saving */
@ -307,7 +317,7 @@ static CPU_INIT( esrip )
static CPU_RESET( esrip )
{
esrip_state *cpustate = device->token;
esrip_state *cpustate = get_safe_token(device);
cpustate->pc = 0;
@ -1651,7 +1661,7 @@ INLINE void am29116_execute(esrip_state *cpustate, UINT16 inst, int _sre)
static CPU_EXECUTE( esrip )
{
esrip_state *cpustate = device->token;
esrip_state *cpustate = get_safe_token(device);
int calldebugger = (device->machine->debug_flags & DEBUG_FLAG_ENABLED) != 0;
UINT8 status;
@ -1941,7 +1951,7 @@ static CPU_DISASSEMBLE( esrip )
static CPU_SET_INFO( esrip )
{
esrip_state *cpustate = device->token;
esrip_state *cpustate = get_safe_token(device);
switch (state)
{
@ -1960,7 +1970,7 @@ static CPU_SET_INFO( esrip )
CPU_GET_INFO( esrip )
{
esrip_state *cpustate = device->token;
esrip_state *cpustate = (device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

19
src/emu/cpu/f8/f8.c
View File

@ -60,6 +60,15 @@ struct _f8_Regs
int irq_request;
};
INLINE f8_Regs *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_F8);
return (f8_Regs *)device->token;
}
/* timer shifter polynome values (will be used for timer interrupts) */
static UINT8 timer_shifter[256];
@ -1533,7 +1542,7 @@ static void f8_ns_isar_d(f8_Regs *cpustate)
static CPU_RESET( f8 )
{
f8_Regs *cpustate = device->token;
f8_Regs *cpustate = get_safe_token(device);
UINT8 data;
int i;
cpu_irq_callback save_callback;
@ -1576,7 +1585,7 @@ static CPU_RESET( f8 )
/* Execute cycles - returns number of cycles actually run */
static CPU_EXECUTE( f8 )
{
f8_Regs *cpustate = device->token;
f8_Regs *cpustate = get_safe_token(device);
cpustate->icount = cycles;
do
@ -1889,7 +1898,7 @@ CPU_DISASSEMBLE( f8 );
static CPU_INIT( f8 )
{
f8_Regs *cpustate = device->token;
f8_Regs *cpustate = get_safe_token(device);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -1898,7 +1907,7 @@ static CPU_INIT( f8 )
static CPU_SET_INFO( f8 )
{
f8_Regs *cpustate = device->token;
f8_Regs *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@ -1997,7 +2006,7 @@ static CPU_SET_INFO( f8 )
CPU_GET_INFO( f8 )
{
f8_Regs *cpustate = (device != NULL) ? device->token : NULL;
f8_Regs *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

23
src/emu/cpu/g65816/g65816.c
View File

@ -90,11 +90,20 @@ TODO general:
#include "g65816.h"
INLINE g65816i_cpu_struct *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_G65816);
return (g65816i_cpu_struct *)device->token;
}
/* Temporary Variables */
static CPU_READOP( g65816 )
{
g65816i_cpu_struct *cpustate = device->token;
g65816i_cpu_struct *cpustate = get_safe_token(device);
*value = g65816_read_8_immediate(offset);
@ -183,7 +192,7 @@ int (*const g65816i_execute[5])(g65816i_cpu_struct *cpustate, int cycles) =
static CPU_RESET( g65816 )
{
g65816i_cpu_struct *cpustate = device->token;
g65816i_cpu_struct *cpustate = get_safe_token(device);
/* Start the CPU */
CPU_STOPPED = 0;
@ -234,7 +243,7 @@ static CPU_EXIT( g65816 )
/* Execute some instructions */
static CPU_EXECUTE( g65816 )
{
g65816i_cpu_struct *cpustate = device->token;
g65816i_cpu_struct *cpustate = get_safe_token(device);
return FTABLE_EXECUTE(cpustate, cycles);
}
@ -300,7 +309,7 @@ static void g65816_set_irq_callback(g65816i_cpu_struct *cpustate, cpu_irq_callba
static CPU_DISASSEMBLE( g65816 )
{
g65816i_cpu_struct *cpustate = device->token;
g65816i_cpu_struct *cpustate = get_safe_token(device);
return g65816_disassemble(buffer, (pc & 0x00ffff), (pc & 0xff0000) >> 16, oprom, FLAG_M, FLAG_X);
}
@ -318,7 +327,7 @@ static STATE_POSTLOAD( g65816_restore_state )
static CPU_INIT( g65816 )
{
g65816i_cpu_struct *cpustate = device->token;
g65816i_cpu_struct *cpustate = get_safe_token(device);
memset(cpustate, 0, sizeof(cpustate));
@ -360,7 +369,7 @@ static CPU_INIT( g65816 )
static CPU_SET_INFO( g65816 )
{
g65816i_cpu_struct *cpustate = device->token;
g65816i_cpu_struct *cpustate = get_safe_token(device);
switch (state)
{
@ -401,7 +410,7 @@ static CPU_SET_INFO( g65816 )
CPU_GET_INFO( g65816 )
{
g65816i_cpu_struct *cpustate = (device != NULL) ? device->token : NULL;
g65816i_cpu_struct *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

25
src/emu/cpu/h6280/h6280.c
View File

@ -116,13 +116,22 @@ static void set_irq_line(h6280_Regs* cpustate, int irqline, int state);
/* include the macros */
#include "h6280ops.h"
INLINE h6280_Regs *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_H6280);
return (h6280_Regs *)device->token;
}
/* include the opcode macros, functions and function pointer tables */
#include "tblh6280.c"
/*****************************************************************************/
static CPU_INIT( h6280 )
{
h6280_Regs* cpustate = device->token;
h6280_Regs* cpustate = get_safe_token(device);
state_save_register_device_item(device, 0, cpustate->ppc.w.l);
state_save_register_device_item(device, 0, cpustate->pc.w.l);
@ -159,7 +168,7 @@ static CPU_INIT( h6280 )
static CPU_RESET( h6280 )
{
h6280_Regs* cpustate = device->token;
h6280_Regs* cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback;
int i;
@ -206,7 +215,7 @@ static CPU_EXIT( h6280 )
static CPU_EXECUTE( h6280 )
{
int in;
h6280_Regs* cpustate = device->token;
h6280_Regs* cpustate = get_safe_token(device);
cpustate->ICount = cycles;
@ -348,7 +357,7 @@ WRITE8_HANDLER( h6280_timer_w )
static CPU_TRANSLATE( h6280 )
{
h6280_Regs* cpustate = device->token;
h6280_Regs* cpustate = get_safe_token(device);
if (space == ADDRESS_SPACE_PROGRAM)
*address = TRANSLATED(*address);
@ -358,12 +367,12 @@ static CPU_TRANSLATE( h6280 )
UINT8 h6280io_get_buffer(const device_config *device)
{
h6280_Regs* cpustate = device->token;
h6280_Regs* cpustate = get_safe_token(device);
return cpustate->io_buffer;
}
void h6280io_set_buffer(const device_config *device, UINT8 data)
{
h6280_Regs* cpustate = device->token;
h6280_Regs* cpustate = get_safe_token(device);
cpustate->io_buffer=data;
}
@ -376,7 +385,7 @@ void h6280io_set_buffer(const device_config *device, UINT8 data)
static CPU_SET_INFO( h6280 )
{
h6280_Regs* cpustate = device->token;
h6280_Regs* cpustate = get_safe_token(device);
switch (state)
{
@ -419,7 +428,7 @@ static CPU_SET_INFO( h6280 )
CPU_GET_INFO( h6280 )
{
h6280_Regs* cpustate = (device != NULL) ? device->token : NULL;
h6280_Regs* cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

10
src/emu/cpu/h83002/h8_16.c
View File

@ -205,7 +205,7 @@ static STATE_POSTLOAD( h8_onstateload )
static CPU_INIT(h8)
{
h83xx_state *h8 = device->token;
h83xx_state *h8 = get_safe_token(device);
h8->h8iflag = 1;
h8->irq_cb = irqcallback;
@ -236,7 +236,7 @@ static CPU_INIT(h8)
static CPU_INIT(h8_3007)
{
h83xx_state *h8 = device->token;
h83xx_state *h8 = get_safe_token(device);
CPU_INIT_CALL(h8);
h8_3007_itu_init(h8);
@ -244,7 +244,7 @@ static CPU_INIT(h8_3007)
static CPU_RESET(h8)
{
h83xx_state *h8 = device->token;
h83xx_state *h8 = get_safe_token(device);
h8->h8err = 0;
h8->pc = h8_mem_read32(h8, 0) & 0xffffff;
@ -361,7 +361,7 @@ static void h8_check_irqs(h83xx_state *h8)
static CPU_SET_INFO( h8 )
{
h83xx_state *h8 = device->token;
h83xx_state *h8 = get_safe_token(device);
switch(state) {
case CPUINFO_INT_PC: h8->pc = info->i; break;
@ -538,7 +538,7 @@ ADDRESS_MAP_END
CPU_GET_INFO( h8_3002 )
{
h83xx_state *h8 = (device != NULL) ? device->token : NULL;
h83xx_state *h8 = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch(state) {
// Interface functions and variables

8
src/emu/cpu/h83002/h8_8.c
View File

@ -213,7 +213,7 @@ static STATE_POSTLOAD( h8_onstateload )
static CPU_INIT(h8bit)
{
h83xx_state *h8 = device->token;
h83xx_state *h8 = get_safe_token(device);
h8->h8iflag = 1;
@ -243,7 +243,7 @@ static CPU_INIT(h8bit)
static CPU_RESET(h8bit)
{
h83xx_state *h8 = device->token;
h83xx_state *h8 = get_safe_token(device);
h8->h8err = 0;
h8->pc = h8_mem_read16(h8, 0);
@ -351,7 +351,7 @@ static void h8_check_irqs(h83xx_state *h8)
static CPU_SET_INFO( h8 )
{
h83xx_state *h8 = device->token;
h83xx_state *h8 = get_safe_token(device);
switch(state) {
case CPUINFO_INT_PC: h8->pc = info->i; break;
@ -513,7 +513,7 @@ ADDRESS_MAP_END
CPU_GET_INFO( h8_3334 )
{
h83xx_state *h8 = (device != NULL) ? device->token : NULL;
h83xx_state *h8 = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch(state) {
// Interface functions and variables

6
src/emu/cpu/h83002/h8ops.h
View File

@ -107,7 +107,7 @@ static UINT32 h8_divxs16(h83xx_state *h8, INT16 src, INT32 dst);
static CPU_EXECUTE(h8)
{
h83xx_state *h8 = device->token;
h83xx_state *h8 = get_safe_token(device);
UINT16 opcode=0;
h8->cyccnt = cycles;
@ -2631,7 +2631,7 @@ static INT8 h8_neg8(h83xx_state *h8, INT8 src)
{
// overflow !
h8->h8vflag = 1;
res = 0x80;
res = (INT8)0x80;
}
else
{
@ -2665,7 +2665,7 @@ static INT16 h8_neg16(h83xx_state *h8, INT16 src)
{
// overflow !
h8->h8vflag = 1;
res = 0x8000;
res = (INT16)0x8000;
}
else
{

11
src/emu/cpu/h83002/h8priv.h
View File

@ -43,6 +43,17 @@ struct _h83xx_state
};
extern h83xx_state h8;
INLINE h83xx_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_H83002 ||
cpu_get_type(device) == CPU_H83007 ||
cpu_get_type(device) == CPU_H83044 ||
cpu_get_type(device) == CPU_H83334);
return (h83xx_state *)device->token;
}
UINT8 h8_register_read8(h83xx_state *h8, UINT32 address);
UINT8 h8_3007_register_read8(h83xx_state *h8, UINT32 address);

23
src/emu/cpu/hd6309/hd6309.c
View File

@ -150,6 +150,15 @@ struct _m68_state_t
UINT8 const *index_cycle;
};
INLINE m68_state_t *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_HD6309);
return (m68_state_t *)device->token;
}
static void check_irq_lines( m68_state_t *m68_state );
static void IIError(m68_state_t *m68_state);
static void DZError(m68_state_t *m68_state);
@ -496,8 +505,8 @@ static void check_irq_lines( m68_state_t *m68_state )
static STATE_POSTLOAD( hd6309_postload )
{
const device_config *device = param;
m68_state_t *m68_state = device->token;
const device_config *device = (const device_config *)param;
m68_state_t *m68_state = get_safe_token(device);
UpdateState(m68_state);
}
@ -508,7 +517,7 @@ static STATE_POSTLOAD( hd6309_postload )
/****************************************************************************/
static CPU_INIT( hd6309 )
{
m68_state_t *m68_state = device->token;
m68_state_t *m68_state = get_safe_token(device);
m68_state->irq_callback = irqcallback;
m68_state->device = device;
@ -543,7 +552,7 @@ static CPU_INIT( hd6309 )
/****************************************************************************/
static CPU_RESET( hd6309 )
{
m68_state_t *m68_state = device->token;
m68_state_t *m68_state = get_safe_token(device);
m68_state->int_state = 0;
m68_state->nmi_state = CLEAR_LINE;
@ -627,7 +636,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
/* execute instructions on this CPU until icount expires */
static CPU_EXECUTE( hd6309 ) /* NS 970908 */
{
m68_state_t *m68_state = device->token;
m68_state_t *m68_state = get_safe_token(device);
m68_state->icount = cycles - m68_state->extra_cycles;
m68_state->extra_cycles = 0;
@ -1214,7 +1223,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state )
static CPU_SET_INFO( hd6309 )
{
m68_state_t *m68_state = device->token;
m68_state_t *m68_state = get_safe_token(device);
switch (state)
{
@ -1249,7 +1258,7 @@ static CPU_SET_INFO( hd6309 )
CPU_GET_INFO( hd6309 )
{
m68_state_t *m68_state = (device != NULL) ? device->token : NULL;
m68_state_t *m68_state = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

24
src/emu/cpu/i8085/i8085.c
View File

@ -244,6 +244,16 @@ static void execute_one(i8085_state *cpustate, int opcode);
INLINE FUNCTIONS
***************************************************************************/
INLINE i8085_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_8080 ||
cpu_get_type(device) == CPU_8085A);
return (i8085_state *)device->token;
}
INLINE void set_sod(i8085_state *cpustate, int state)
{
if (state != 0 && cpustate->sod_state == 0)
@ -1459,7 +1469,7 @@ static void execute_one(i8085_state *cpustate, int opcode)
static CPU_EXECUTE( i808x )
{
i8085_state *cpustate = device->token;
i8085_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -1516,7 +1526,7 @@ static void init_tables (void)
static void init_808x_common(const device_config *device, cpu_irq_callback irqcallback, int type)
{
i8085_state *cpustate = device->token;
i8085_state *cpustate = get_safe_token(device);
init_tables();
@ -1569,7 +1579,7 @@ static CPU_INIT( i8085 )
static CPU_RESET( i808x )
{
i8085_state *cpustate = device->token;
i8085_state *cpustate = get_safe_token(device);
cpustate->PC.d = 0;
cpustate->HALT = 0;
@ -1590,7 +1600,7 @@ static CPU_RESET( i808x )
static CPU_IMPORT_STATE( i808x )
{
i8085_state *cpustate = device->token;
i8085_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -1617,7 +1627,7 @@ static CPU_IMPORT_STATE( i808x )
static CPU_EXPORT_STATE( i808x )
{
i8085_state *cpustate = device->token;
i8085_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -1671,7 +1681,7 @@ static void i808x_set_irq_line(i8085_state *cpustate, int irqline, int state)
static CPU_SET_INFO( i808x )
{
i8085_state *cpustate = device->token;
i8085_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -1693,7 +1703,7 @@ static CPU_SET_INFO( i808x )
CPU_GET_INFO( i8085 )
{
i8085_state *cpustate = (device != NULL) ? device->token : NULL;
i8085_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

44
src/emu/cpu/jaguar/jaguar.c
View File

@ -245,6 +245,16 @@ static void (*const dsp_op_table[64])(jaguar_state *jaguar, UINT16 op) =
INLINE FUNCTIONS
***************************************************************************/
INLINE jaguar_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_JAGUARGPU ||
cpu_get_type(device) == CPU_JAGUARDSP);
return (jaguar_state *)device->token;
}
INLINE void update_register_banks(jaguar_state *jaguar)
{
UINT32 temp;
@ -357,7 +367,7 @@ static void init_tables(void)
}
/* fill in the mirror table */
mirror_table = malloc_or_die(65536 * sizeof(mirror_table[0]));
mirror_table = (UINT16 *)malloc_or_die(65536 * sizeof(mirror_table[0]));
for (i = 0; i < 65536; i++)
mirror_table[i] = ((i >> 15) & 0x0001) | ((i >> 13) & 0x0002) |
((i >> 11) & 0x0004) | ((i >> 9) & 0x0008) |
@ -369,7 +379,7 @@ static void init_tables(void)
((i << 13) & 0x4000) | ((i << 15) & 0x8000);
/* fill in the condition table */
condition_table = malloc_or_die(32 * 8 * sizeof(condition_table[0]));
condition_table = (UINT8 *)malloc_or_die(32 * 8 * sizeof(condition_table[0]));
for (i = 0; i < 8; i++)
for (j = 0; j < 32; j++)
{
@ -389,8 +399,8 @@ static void init_tables(void)
static STATE_POSTLOAD( jaguar_postload )
{
const device_config *device = param;
jaguar_state *jaguar = device->token;
const device_config *device = (const device_config *)param;
jaguar_state *jaguar = get_safe_token(device);
update_register_banks(jaguar);
check_irqs(jaguar);
@ -399,8 +409,8 @@ static STATE_POSTLOAD( jaguar_postload )
static void init_common(int isdsp, const device_config *device, cpu_irq_callback irqcallback)
{
const jaguar_cpu_config *configdata = device->static_config;
jaguar_state *jaguar = device->token;
const jaguar_cpu_config *configdata = (const jaguar_cpu_config *)device->static_config;
jaguar_state *jaguar = get_safe_token(device);
init_tables();
@ -435,7 +445,7 @@ static CPU_INIT( jaguardsp )
static CPU_RESET( jaguar )
{
jaguar_state *jaguar = device->token;
jaguar_state *jaguar = get_safe_token(device);
jaguar->b0 = jaguar->r;
jaguar->b1 = jaguar->a;
@ -464,7 +474,7 @@ static CPU_EXIT( jaguar )
static CPU_EXECUTE( jaguargpu )
{
jaguar_state *jaguar = device->token;
jaguar_state *jaguar = get_safe_token(device);
/* if we're halted, we shouldn't be here */
if (!(jaguar->ctrl[G_CTRL] & 1))
@ -505,7 +515,7 @@ static CPU_EXECUTE( jaguargpu )
static CPU_EXECUTE( jaguardsp )
{
jaguar_state *jaguar = device->token;
jaguar_state *jaguar = get_safe_token(device);
/* if we're halted, we shouldn't be here */
if (!(jaguar->ctrl[G_CTRL] & 1))
@ -1248,7 +1258,7 @@ void xor_rn_rn(jaguar_state *jaguar, UINT16 op)
UINT32 jaguargpu_ctrl_r(const device_config *device, offs_t offset)
{
jaguar_state *jaguar = device->token;
jaguar_state *jaguar = get_safe_token(device);
if (LOG_GPU_IO) logerror("GPU read register @ F021%02X\n", offset * 4);
@ -1258,7 +1268,7 @@ UINT32 jaguargpu_ctrl_r(const device_config *device, offs_t offset)
void jaguargpu_ctrl_w(const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask)
{
jaguar_state *jaguar = device->token;
jaguar_state *jaguar = get_safe_token(device);
UINT32 oldval, newval;
if (LOG_GPU_IO && offset != G_HIDATA)
@ -1344,7 +1354,7 @@ void jaguargpu_ctrl_w(const device_config *device, offs_t offset, UINT32 data, U
UINT32 jaguardsp_ctrl_r(const device_config *device, offs_t offset)
{
jaguar_state *jaguar = device->token;
jaguar_state *jaguar = get_safe_token(device);
if (LOG_DSP_IO && offset != D_FLAGS)
logerror("DSP read register @ F1A1%02X\n", offset * 4);
@ -1356,7 +1366,7 @@ UINT32 jaguardsp_ctrl_r(const device_config *device, offs_t offset)
void jaguardsp_ctrl_w(const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask)
{
jaguar_state *jaguar = device->token;
jaguar_state *jaguar = get_safe_token(device);
UINT32 oldval, newval;
if (LOG_DSP_IO && offset != D_FLAGS)
@ -1443,7 +1453,7 @@ void jaguardsp_ctrl_w(const device_config *device, offs_t offset, UINT32 data, U
static CPU_SET_INFO( jaguargpu )
{
jaguar_state *jaguar = device->token;
jaguar_state *jaguar = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -1501,7 +1511,7 @@ static CPU_SET_INFO( jaguargpu )
CPU_GET_INFO( jaguargpu )
{
jaguar_state *jaguar = (device != NULL) ? device->token : NULL;
jaguar_state *jaguar = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@ -1640,7 +1650,7 @@ CPU_GET_INFO( jaguargpu )
static CPU_SET_INFO( jaguardsp )
{
jaguar_state *jaguar = device->token;
jaguar_state *jaguar = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -1654,7 +1664,7 @@ static CPU_SET_INFO( jaguardsp )
CPU_GET_INFO( jaguardsp )
{
jaguar_state *jaguar = (device != NULL) ? device->token : NULL;
jaguar_state *jaguar = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

44
src/emu/cpu/mcs48/mcs48.c
View File

@ -269,6 +269,32 @@ static int check_irqs(mcs48_state *cpustate);
INLINE FUNCTIONS
***************************************************************************/
INLINE mcs48_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_I8035 ||
cpu_get_type(device) == CPU_I8048 ||
cpu_get_type(device) == CPU_I8648 ||
cpu_get_type(device) == CPU_I8748 ||
cpu_get_type(device) == CPU_I8039 ||
cpu_get_type(device) == CPU_I8049 ||
cpu_get_type(device) == CPU_I8749 ||
cpu_get_type(device) == CPU_I8040 ||
cpu_get_type(device) == CPU_I8050 ||
cpu_get_type(device) == CPU_I8041 ||
cpu_get_type(device) == CPU_I8741 ||
cpu_get_type(device) == CPU_I8042 ||
cpu_get_type(device) == CPU_I8242 ||
cpu_get_type(device) == CPU_I8742 ||
cpu_get_type(device) == CPU_MB8884 ||
cpu_get_type(device) == CPU_N7751 ||
cpu_get_type(device) == CPU_M58715);
return (mcs48_state *)device->token;
}
/*-------------------------------------------------
opcode_fetch - fetch an opcode byte
-------------------------------------------------*/
@ -869,7 +895,7 @@ static const mcs48_ophandler opcode_table[256]=
static void mcs48_init(const device_config *device, cpu_irq_callback irqcallback, UINT8 feature_mask, UINT16 romsize)
{
mcs48_state *cpustate = device->token;
mcs48_state *cpustate = get_safe_token(device);
/* External access line
* EA=1 : read from external rom
@ -997,7 +1023,7 @@ static CPU_INIT( upi41_2k_rom )
static CPU_RESET( mcs48 )
{
mcs48_state *cpustate = device->token;
mcs48_state *cpustate = get_safe_token(device);
/* confirmed from reset description */
cpustate->pc = 0;
@ -1119,7 +1145,7 @@ static void burn_cycles(mcs48_state *cpustate, int count)
static CPU_EXECUTE( mcs48 )
{
mcs48_state *cpustate = device->token;
mcs48_state *cpustate = get_safe_token(device);
int curcycles;
update_regptr(cpustate);
@ -1168,7 +1194,7 @@ static CPU_EXECUTE( mcs48 )
UINT8 upi41_master_r(const device_config *device, UINT8 a0)
{
mcs48_state *cpustate = device->token;
mcs48_state *cpustate = get_safe_token(device);
/* if just reading the status, return it */
if ((a0 & 1) != 0)
@ -1193,7 +1219,7 @@ UINT8 upi41_master_r(const device_config *device, UINT8 a0)
static TIMER_CALLBACK( master_callback )
{
const device_config *device = (const device_config *)ptr;
mcs48_state *cpustate = device->token;
mcs48_state *cpustate = get_safe_token(device);
UINT8 a0 = (param >> 8) & 1;
UINT8 data = param;
@ -1264,7 +1290,7 @@ ADDRESS_MAP_END
static CPU_IMPORT_STATE( mcs48 )
{
mcs48_state *cpustate = device->token;
mcs48_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -1293,7 +1319,7 @@ static CPU_IMPORT_STATE( mcs48 )
static CPU_EXPORT_STATE( mcs48 )
{
mcs48_state *cpustate = device->token;
mcs48_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -1322,7 +1348,7 @@ static CPU_EXPORT_STATE( mcs48 )
static CPU_SET_INFO( mcs48 )
{
mcs48_state *cpustate = device->token;
mcs48_state *cpustate = get_safe_token(device);
switch (state)
{
@ -1340,7 +1366,7 @@ static CPU_SET_INFO( mcs48 )
static CPU_GET_INFO( mcs48 )
{
mcs48_state *cpustate = (device != NULL) ? device->token : NULL;
mcs48_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

46
src/emu/cpu/mcs51/mcs51.c
View File

@ -644,6 +644,28 @@ INLINE void serial_transmit(mcs51_state_t *mcs51_state, UINT8 data);
INLINE FUNCTIONS
***************************************************************************/
INLINE mcs51_state_t *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_I8031 ||
cpu_get_type(device) == CPU_I8032 ||
cpu_get_type(device) == CPU_I8051 ||
cpu_get_type(device) == CPU_I8751 ||
cpu_get_type(device) == CPU_I8052 ||
cpu_get_type(device) == CPU_I8752 ||
cpu_get_type(device) == CPU_I80C31 ||
cpu_get_type(device) == CPU_I80C32 ||
cpu_get_type(device) == CPU_I80C51 ||
cpu_get_type(device) == CPU_I80C52 ||
cpu_get_type(device) == CPU_I87C51 ||
cpu_get_type(device) == CPU_I87C52 ||
cpu_get_type(device) == CPU_AT89C4051 ||
cpu_get_type(device) == CPU_DS5002FP);
return (mcs51_state_t *)device->token;
}
INLINE void clear_current_irq(mcs51_state_t *mcs51_state)
{
if (mcs51_state->cur_irq_prio >= 0)
@ -1259,13 +1281,13 @@ INLINE void update_irq_prio(mcs51_state_t *mcs51_state, UINT8 ipl, UINT8 iph)
void i8051_set_serial_tx_callback(const device_config *device, mcs51_serial_tx_func tx_func)
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
mcs51_state->serial_tx_callback = tx_func;
}
void i8051_set_serial_rx_callback(const device_config *device, mcs51_serial_rx_func rx_func)
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
mcs51_state->serial_rx_callback = rx_func;
}
@ -1894,7 +1916,7 @@ static void mcs51_set_irq_line(mcs51_state_t *mcs51_state, int irqline, int stat
/* Execute cycles - returns number of cycles actually run */
static CPU_EXECUTE( mcs51 )
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
UINT8 op;
update_ptrs(mcs51_state);
@ -2045,7 +2067,7 @@ static UINT8 mcs51_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
static CPU_INIT( mcs51 )
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
mcs51_state->irq_callback = irqcallback;
mcs51_state->device = device;
@ -2081,7 +2103,7 @@ static CPU_INIT( mcs51 )
static CPU_INIT( i80c51 )
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
CPU_INIT_CALL(mcs51);
mcs51_state->features |= FEATURE_CMOS;
}
@ -2089,7 +2111,7 @@ static CPU_INIT( i80c51 )
/* Reset registers to the initial values */
static CPU_RESET( mcs51 )
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
update_ptrs(mcs51_state);
@ -2214,7 +2236,7 @@ static UINT8 i8052_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
static CPU_INIT( i8052 )
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
CPU_INIT_CALL(mcs51);
mcs51_state->ram_mask = 0xFF; /* 256 bytes of ram */
@ -2267,7 +2289,7 @@ static UINT8 i80c52_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
static CPU_INIT( i80c52 )
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
CPU_INIT_CALL(i8052);
mcs51_state->features |= (FEATURE_I80C52 | FEATURE_CMOS);
@ -2277,7 +2299,7 @@ static CPU_INIT( i80c52 )
static CPU_INIT( i80c31 )
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
CPU_INIT_CALL(i8052);
mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */
@ -2360,7 +2382,7 @@ static CPU_INIT( ds5002fp )
/* default configuration */
static const ds5002fp_config default_config = { 0x00, 0x00, 0x00 };
const ds5002fp_config *sconfig = device->static_config ? device->static_config : &default_config;
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
CPU_INIT_CALL( mcs51 );
@ -2404,7 +2426,7 @@ ADDRESS_MAP_END
static CPU_SET_INFO( mcs51 )
{
mcs51_state_t *mcs51_state = device->token;
mcs51_state_t *mcs51_state = get_safe_token(device);
switch (state)
{
@ -2446,7 +2468,7 @@ static CPU_SET_INFO( mcs51 )
static CPU_GET_INFO( mcs51 )
{
mcs51_state_t *mcs51_state = (device != NULL) ? device->token : NULL;
mcs51_state_t *mcs51_state = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

21
src/emu/cpu/se3208/se3208.c
View File

@ -57,6 +57,15 @@ typedef void (*_OP)(se3208_state_t *se3208_state, UINT16 Opcode);
#define INST(a) static void a(se3208_state_t *se3208_state, UINT16 Opcode)
static _OP *OpTable=NULL;
INLINE se3208_state_t *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_SE3208);
return (se3208_state_t *)device->token;
}
INLINE UINT32 read_dword_unaligned(const address_space *space, UINT32 address)
{
if (address & 3)
@ -1696,14 +1705,14 @@ static void BuildTable(void)
{
int i;
if(!OpTable)
OpTable=malloc_or_die(sizeof(_OP)*0x10000);
OpTable=(_OP *)malloc_or_die(sizeof(_OP)*0x10000);
for(i=0;i<0x10000;++i)
OpTable[i]=DecodeOp(i);
}
static CPU_RESET( se3208 )
{
se3208_state_t *se3208_state = device->token;
se3208_state_t *se3208_state = get_safe_token(device);
cpu_irq_callback save_irqcallback = se3208_state->irq_callback;
memset(se3208_state,0,sizeof(se3208_state_t));
@ -1746,7 +1755,7 @@ static void SE3208_Interrupt(se3208_state_t *se3208_state)
static CPU_EXECUTE( se3208 )
{
se3208_state_t *se3208_state = device->token;
se3208_state_t *se3208_state = get_safe_token(device);
se3208_state->icount=cycles;
do
@ -1776,7 +1785,7 @@ static CPU_EXECUTE( se3208 )
static CPU_INIT( se3208 )
{
se3208_state_t *se3208_state = device->token;
se3208_state_t *se3208_state = get_safe_token(device);
BuildTable();
@ -1803,7 +1812,7 @@ static void set_irq_line(se3208_state_t *se3208_state, int line,int state)
static CPU_SET_INFO( se3208 )
{
se3208_state_t *se3208_state = device->token;
se3208_state_t *se3208_state = get_safe_token(device);
switch (state)
{
@ -1831,7 +1840,7 @@ static CPU_SET_INFO( se3208 )
CPU_GET_INFO( se3208 )
{
se3208_state_t *se3208_state = (device != NULL) ? device->token : NULL;
se3208_state_t *se3208_state = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

8
src/emu/cpu/sh2/sh2comn.c
View File

@ -108,7 +108,7 @@ static void sh2_timer_activate(SH2 *sh2)
TIMER_CALLBACK( sh2_timer_callback )
{
SH2 *sh2 = ptr;
SH2 *sh2 = (SH2 *)ptr;
UINT16 frc;
sh2_timer_resync(sh2);
@ -136,7 +136,7 @@ TIMER_CALLBACK( sh2_timer_callback )
TIMER_CALLBACK( sh2_dmac_callback )
{
int dma = param & 1;
SH2 *sh2 = ptr;
SH2 *sh2 = (SH2 *)ptr;
LOG(("SH2.%s: DMA %d complete\n", sh2->device->tag, dma));
sh2->m[0x63+4*dma] |= 2;
@ -701,7 +701,7 @@ void sh2_exception(SH2 *sh2, const char *message, int irqline)
void sh2_common_init(SH2 *sh2, const device_config *device, cpu_irq_callback irqcallback)
{
const sh2_cpu_core *conf = device->static_config;
const sh2_cpu_core *conf = (const sh2_cpu_core *)device->static_config;
sh2->timer = timer_alloc(device->machine, sh2_timer_callback, sh2);
timer_adjust_oneshot(sh2->timer, attotime_never, 0);
@ -712,7 +712,7 @@ void sh2_common_init(SH2 *sh2, const device_config *device, cpu_irq_callback irq
sh2->dma_timer[1] = timer_alloc(device->machine, sh2_dmac_callback, sh2);
timer_adjust_oneshot(sh2->dma_timer[1], attotime_never, 0);
sh2->m = auto_malloc(0x200);
sh2->m = (UINT32 *)auto_malloc(0x200);
if(conf)
{

50
src/emu/cpu/sh2/sh2drc.c
View File

@ -134,6 +134,16 @@ static void cfunc_DIV1(void *param);
INLINE FUNCTIONS
***************************************************************************/
INLINE SH2 *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_SH1 ||
cpu_get_type(device) == CPU_SH2);
return *(SH2 **)device->token;
}
INLINE UINT16 RW(SH2 *sh2, offs_t A)
{
if (A >= 0xe0000000)
@ -221,7 +231,7 @@ INLINE void save_fast_iregs(SH2 *sh2, drcuml_block *block)
static void cfunc_printf_probe(void *param)
{
SH2 *sh2 = param;
SH2 *sh2 = (SH2 *)param;
UINT32 pc = sh2->pc;
printf(" PC=%08X r0=%08X r1=%08X r2=%08X\n",
@ -261,7 +271,7 @@ static void cfunc_printf_probe(void *param)
static void cfunc_unimplemented(void *param)
{
SH2 *sh2 = param;
SH2 *sh2 = (SH2 *)param;
UINT16 opcode = sh2->arg0;
fatalerror("PC=%08X: Unimplemented op %04X", sh2->pc, opcode);
}
@ -271,7 +281,7 @@ static void cfunc_unimplemented(void *param)
-------------------------------------------------*/
static void cfunc_checkirqs(void *param)
{
SH2 *sh2 = param;
SH2 *sh2 = (SH2 *)param;
// if NMI is pending, evec etc are already set up
if (sh2->pending_nmi)
{
@ -289,7 +299,7 @@ static void cfunc_checkirqs(void *param)
-------------------------------------------------*/
static void cfunc_fastirq(void *param)
{
SH2 *sh2 = param;
SH2 *sh2 = (SH2 *)param;
sh2_exception(sh2, "fastirq",sh2->irqline);
}
@ -298,7 +308,7 @@ static void cfunc_fastirq(void *param)
-------------------------------------------------*/
static void cfunc_MAC_W(void *param)
{
SH2 *sh2 = param;
SH2 *sh2 = (SH2 *)param;
INT32 tempm, tempn, dest, src, ans;
UINT32 templ;
UINT16 opcode;
@ -381,7 +391,7 @@ static void cfunc_MAC_W(void *param)
-------------------------------------------------*/
static void cfunc_MAC_L(void *param)
{
SH2 *sh2 = param;
SH2 *sh2 = (SH2 *)param;
UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;
UINT32 temp0, temp1, temp2, temp3;
INT32 tempm, tempn, fnLmL;
@ -469,7 +479,7 @@ static void cfunc_MAC_L(void *param)
-------------------------------------------------*/
static void cfunc_DIV1(void *param)
{
SH2 *sh2 = param;
SH2 *sh2 = (SH2 *)param;
UINT32 tmp0;
UINT32 old_q;
UINT16 opcode;
@ -574,7 +584,7 @@ static void cfunc_DIV1(void *param)
-------------------------------------------------*/
static void cfunc_ADDV(void *param)
{
SH2 *sh2 = param;
SH2 *sh2 = (SH2 *)param;
INT32 dest, src, ans;
UINT16 opcode;
int n, m;
@ -617,7 +627,7 @@ static void cfunc_ADDV(void *param)
-------------------------------------------------*/
static void cfunc_SUBV(void *param)
{
SH2 *sh2 = param;
SH2 *sh2 = (SH2 *)param;
INT32 dest, src, ans;
UINT16 opcode;
int n, m;
@ -669,7 +679,7 @@ static CPU_INIT( sh2 )
COMPILE_MAX_SEQUENCE, /* maximum instructions to include in a sequence */
sh2_describe /* callback to describe a single instruction */
};
SH2 *sh2 = *(SH2 **)device->token;
SH2 *sh2 = get_safe_token(device);
drccache *cache;
drcbe_info beinfo;
UINT32 flags = 0;
@ -681,7 +691,7 @@ static CPU_INIT( sh2 )
fatalerror("Unable to allocate cache of size %d", (UINT32)(CACHE_SIZE + sizeof(SH2)));
/* allocate the core memory */
*(SH2 **)device->token = sh2 = drccache_memory_alloc_near(cache, sizeof(SH2));
*(SH2 **)device->token = sh2 = (SH2 *)drccache_memory_alloc_near(cache, sizeof(SH2));
memset(sh2, 0, sizeof(SH2));
/* initialize the common core parts */
@ -764,7 +774,7 @@ static CPU_INIT( sh2 )
static CPU_EXIT( sh2 )
{
SH2 *sh2 = *(SH2 **)device->token;
SH2 *sh2 = get_safe_token(device);
/* clean up the DRC */
drcfe_exit(sh2->drcfe);
@ -779,8 +789,8 @@ static CPU_EXIT( sh2 )
static CPU_RESET( sh2 )
{
SH2 *sh2 = *(SH2 **)device->token;
void *tsave, *tsaved0, *tsaved1;
SH2 *sh2 = get_safe_token(device);
emu_timer *tsave, *tsaved0, *tsaved1;
UINT32 *m;
void (*f)(UINT32 data);
@ -833,7 +843,7 @@ static CPU_RESET( sh2 )
static CPU_RESET( sh1 )
{
SH2 *sh2 = *(SH2 **)device->token;
SH2 *sh2 = get_safe_token(device);
CPU_RESET_CALL(sh2);
sh2->cpu_type = CPU_TYPE_SH1;
}
@ -869,7 +879,7 @@ static void code_flush_cache(SH2 *sh2)
/* Execute cycles - returns number of cycles actually run */
static CPU_EXECUTE( sh2 )
{
SH2 *sh2 = *(SH2 **)device->token;
SH2 *sh2 = get_safe_token(device);
drcuml_state *drcuml = sh2->drcuml;
int execute_result;
@ -3142,7 +3152,7 @@ static int generate_group_12(SH2 *sh2, drcuml_block *block, compiler_state *comp
void sh2drc_set_options(const device_config *device, UINT32 options)
{
SH2 *sh2 = *(SH2 **)device->token;
SH2 *sh2 = get_safe_token(device);
sh2->drcoptions = options;
}
@ -3154,7 +3164,7 @@ void sh2drc_set_options(const device_config *device, UINT32 options)
void sh2drc_add_pcflush(const device_config *device, offs_t address)
{
SH2 *sh2 = *(SH2 **)device->token;
SH2 *sh2 = get_safe_token(device);
if (sh2->pcfsel < ARRAY_LENGTH(sh2->pcflushes))
sh2->pcflushes[sh2->pcfsel++] = address;
@ -3197,7 +3207,7 @@ ADDRESS_MAP_END
static CPU_SET_INFO( sh2 )
{
SH2 *sh2 = *(SH2 **)device->token;
SH2 *sh2 = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -3256,7 +3266,7 @@ static CPU_SET_INFO( sh2 )
CPU_GET_INFO( sh2 )
{
SH2 *sh2 = (device != NULL && device->token != NULL) ? *(SH2 **)device->token : NULL;
SH2 *sh2 = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

21
src/emu/cpu/sh4/sh4.c
View File

@ -27,6 +27,15 @@
#include "sh4regs.h"
#include "sh4comn.h"
INLINE SH4 *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_SH4);
return (SH4 *)device->token;
}
/* Called for unimplemented opcodes */
static void TODO(SH4 *sh4)
{
@ -3235,7 +3244,7 @@ INLINE void op1111(SH4 *sh4, UINT16 opcode)
static CPU_RESET( sh4 )
{
SH4 *sh4 = device->token;
SH4 *sh4 = get_safe_token(device);
void *tsaved[4];
emu_timer *tsave[5];
UINT32 *m;
@ -3313,7 +3322,7 @@ static CPU_RESET( sh4 )
/* Execute cycles - returns number of cycles actually run */
static CPU_EXECUTE( sh4 )
{
SH4 *sh4 = device->token;
SH4 *sh4 = get_safe_token(device);
sh4->sh4_icount = cycles;
if (sh4->cpu_off)
@ -3374,8 +3383,8 @@ static CPU_DISASSEMBLE( sh4 )
static CPU_INIT( sh4 )
{
const struct sh4_config *conf = device->static_config;
SH4 *sh4 = device->token;
const struct sh4_config *conf = (const struct sh4_config *)device->static_config;
SH4 *sh4 = get_safe_token(device);
sh4_common_init(device);
@ -3463,7 +3472,7 @@ static CPU_INIT( sh4 )
static CPU_SET_INFO( sh4 )
{
SH4 *sh4 = device->token;
SH4 *sh4 = get_safe_token(device);
switch (state)
{
@ -3627,7 +3636,7 @@ ADDRESS_MAP_END
CPU_GET_INFO( sh4 )
{
SH4 *sh4 = (device != NULL) ? device->token : NULL;
SH4 *sh4 = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

35
src/emu/cpu/sharc/sharc.c
View File

@ -183,6 +183,15 @@ static void (* sharc_op[512])(SHARC_REGS *cpustate);
((UINT64)(cpustate->internal_ram[((pc-0x20000) * 3) + 1]) << 16) | \
((UINT64)(cpustate->internal_ram[((pc-0x20000) * 3) + 2]) << 0)
INLINE SHARC_REGS *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_ADSP21062);
return (SHARC_REGS *)device->token;
}
INLINE void CHANGE_PC(SHARC_REGS *cpustate, UINT32 newpc)
{
cpustate->pc = newpc;
@ -363,7 +372,7 @@ static void build_opcode_table(void)
void sharc_external_iop_write(const device_config *device, UINT32 address, UINT32 data)
{
SHARC_REGS *cpustate = device->token;
SHARC_REGS *cpustate = get_safe_token(device);
if (address == 0x1c)
{
if (data != 0)
@ -380,7 +389,7 @@ void sharc_external_iop_write(const device_config *device, UINT32 address, UINT3
void sharc_external_dma_write(const device_config *device, UINT32 address, UINT64 data)
{
SHARC_REGS *cpustate = device->token;
SHARC_REGS *cpustate = get_safe_token(device);
switch ((cpustate->dma[6].control >> 6) & 0x3)
{
case 2: // 16/48 packing
@ -423,8 +432,8 @@ static CPU_DISASSEMBLE( sharc )
static CPU_INIT( sharc )
{
SHARC_REGS *cpustate = device->token;
const sharc_config *cfg = device->static_config;
SHARC_REGS *cpustate = get_safe_token(device);
const sharc_config *cfg = (const sharc_config *)device->static_config;
int saveindex;
cpustate->boot_mode = cfg->boot_mode;
@ -436,7 +445,7 @@ static CPU_INIT( sharc )
build_opcode_table();
cpustate->internal_ram = auto_malloc(2 * 0x10000 * sizeof(UINT16)); // 2x 128KB
cpustate->internal_ram = (UINT16 *)auto_malloc(2 * 0x10000 * sizeof(UINT16)); // 2x 128KB
cpustate->internal_ram_block0 = &cpustate->internal_ram[0];
cpustate->internal_ram_block1 = &cpustate->internal_ram[0x20000/2];
@ -558,7 +567,7 @@ static CPU_INIT( sharc )
static CPU_RESET( sharc )
{
SHARC_REGS *cpustate = device->token;
SHARC_REGS *cpustate = get_safe_token(device);
memset(cpustate->internal_ram, 0, 2 * 0x10000 * sizeof(UINT16));
switch(cpustate->boot_mode)
@ -614,7 +623,7 @@ static void sharc_set_irq_line(SHARC_REGS *cpustate, int irqline, int state)
void sharc_set_flag_input(const device_config *device, int flag_num, int state)
{
SHARC_REGS *cpustate = device->token;
SHARC_REGS *cpustate = get_safe_token(device);
if (flag_num >= 0 && flag_num < 4)
{
// Check if flag is set to input in MODE2 (bit == 0)
@ -674,7 +683,7 @@ static void check_interrupts(SHARC_REGS *cpustate)
static CPU_EXECUTE( sharc )
{
SHARC_REGS *cpustate = device->token;
SHARC_REGS *cpustate = get_safe_token(device);
cpustate->icount = cycles;
if (cpustate->idle && cpustate->irq_active == 0)
@ -853,7 +862,7 @@ static CPU_EXECUTE( sharc )
static CPU_SET_INFO( sharc )
{
SHARC_REGS *cpustate = device->token;
SHARC_REGS *cpustate = get_safe_token(device);
switch (state)
{
@ -954,7 +963,7 @@ static CPU_SET_INFO( adsp21062 )
{
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 2)
{
sharc_set_irq_line(device->token, state-CPUINFO_INT_INPUT_STATE, info->i);
sharc_set_irq_line(get_safe_token(device), state-CPUINFO_INT_INPUT_STATE, info->i);
return;
}
else if (state >= CPUINFO_INT_INPUT_STATE + SHARC_INPUT_FLAG0 && state <= CPUINFO_INT_INPUT_STATE + SHARC_INPUT_FLAG3)
@ -972,7 +981,7 @@ static CPU_SET_INFO( adsp21062 )
static CPU_READ( sharc )
{
SHARC_REGS *cpustate = device->token;
SHARC_REGS *cpustate = get_safe_token(device);
if (space == ADDRESS_SPACE_PROGRAM)
{
int address = offset >> 3;
@ -1035,7 +1044,7 @@ static CPU_READ( sharc )
static CPU_READOP( sharc )
{
SHARC_REGS *cpustate = device->token;
SHARC_REGS *cpustate = get_safe_token(device);
UINT64 mask = (size < 8) ? (((UINT64)1 << (8 * size)) - 1) : ~(UINT64)0;
int shift = 8 * (offset & 7);
offset >>= 3;
@ -1065,7 +1074,7 @@ ADDRESS_MAP_END
static CPU_GET_INFO( sharc )
{
SHARC_REGS *cpustate = (device != NULL) ? device->token : NULL;
SHARC_REGS *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch(state)
{

22
src/emu/cpu/t11/t11.c
View File

@ -37,6 +37,16 @@ struct _t11_state
};
INLINE t11_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_T11);
return (t11_state *)device->token;
}
/*************************************
*
@ -248,8 +258,8 @@ static CPU_INIT( t11 )
0xc000, 0x8000, 0x4000, 0x2000,
0x1000, 0x0000, 0xf600, 0xf400
};
const struct t11_setup *setup = device->static_config;
t11_state *cpustate = device->token;
const struct t11_setup *setup = (const struct t11_setup *)device->static_config;
t11_state *cpustate = get_safe_token(device);
cpustate->initial_pc = initial_pc[setup->mode >> 13];
cpustate->irq_callback = irqcallback;
@ -281,7 +291,7 @@ static CPU_INIT( t11 )
static CPU_RESET( t11 )
{
t11_state *cpustate = device->token;
t11_state *cpustate = get_safe_token(device);
/* initial SP is 376 octal, or 0xfe */
cpustate->SP = 0x00fe;
@ -333,7 +343,7 @@ static void set_irq_line(t11_state *cpustate, int irqline, int state)
static CPU_EXECUTE( t11 )
{
t11_state *cpustate = device->token;
t11_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
t11_check_irqs(cpustate);
@ -370,7 +380,7 @@ getout:
static CPU_SET_INFO( t11 )
{
t11_state *cpustate = device->token;
t11_state *cpustate = get_safe_token(device);
switch (state)
{
@ -402,7 +412,7 @@ static CPU_SET_INFO( t11 )
CPU_GET_INFO( t11 )
{
t11_state *cpustate = (device != NULL) ? device->token : NULL;
t11_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

8
src/emu/cpu/vtlb.c
View File

@ -60,7 +60,7 @@ vtlb_state *vtlb_alloc(const device_config *cpu, int space, int fixed_entries, i
vtlb_state *vtlb;
/* allocate memory for the core structure */
vtlb = malloc_or_die(sizeof(*vtlb));
vtlb = (vtlb_state *)malloc_or_die(sizeof(*vtlb));
memset(vtlb, 0, sizeof(*vtlb));
/* fill in CPU information */
@ -78,19 +78,19 @@ vtlb_state *vtlb_alloc(const device_config *cpu, int space, int fixed_entries, i
assert(vtlb->addrwidth > vtlb->pageshift);
/* allocate the entry array */
vtlb->live = malloc_or_die(sizeof(vtlb->live[0]) * (fixed_entries + dynamic_entries));
vtlb->live = (offs_t *)malloc_or_die(sizeof(vtlb->live[0]) * (fixed_entries + dynamic_entries));
memset(vtlb->live, 0, sizeof(vtlb->live[0]) * (fixed_entries + dynamic_entries));
state_save_register_device_item_pointer(cpu, space, vtlb->live, fixed_entries + dynamic_entries);
/* allocate the lookup table */
vtlb->table = malloc_or_die(sizeof(vtlb->table[0]) << (vtlb->addrwidth - vtlb->pageshift));
vtlb->table = (vtlb_entry *)malloc_or_die(sizeof(vtlb->table[0]) << (vtlb->addrwidth - vtlb->pageshift));
memset(vtlb->table, 0, sizeof(vtlb->table[0]) << (vtlb->addrwidth - vtlb->pageshift));
state_save_register_device_item_pointer(cpu, space, vtlb->table, 1 << (vtlb->addrwidth - vtlb->pageshift));
/* allocate the fixed page count array */
if (fixed_entries > 0)
{
vtlb->fixedpages = malloc_or_die(sizeof(vtlb->fixedpages[0]) * fixed_entries);
vtlb->fixedpages = (int *)malloc_or_die(sizeof(vtlb->fixedpages[0]) * fixed_entries);
memset(vtlb->fixedpages, 0, sizeof(vtlb->fixedpages[0]) * fixed_entries);
state_save_register_device_item_pointer(cpu, space, vtlb->fixedpages, fixed_entries);
}

2
src/emu/cpu/x86log.c
View File

@ -91,7 +91,7 @@ x86log_context *x86log_create_context(const char *filename)
x86log_context *log;
/* allocate the log */
log = malloc_or_die(sizeof(*log));
log = (x86log_context *)malloc_or_die(sizeof(*log));
memset(log, 0, sizeof(*log));
/* allocate the filename */

1
src/emu/debugger.h
View File

@ -15,6 +15,7 @@
#define __DEBUGGER_H__
#include "mame.h"
#include "cpuexec.h"
#include "debug/debugcpu.h"