mirror of
https://github.com/holub/mame
synced 2025-05-17 03:10:43 +03:00
498 lines
15 KiB
C
498 lines
15 KiB
C
/*** t11: Portable DEC T-11 emulator ******************************************
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Copyright Aaron Giles
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System dependencies: long must be at least 32 bits
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word must be 16 bit unsigned int
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byte must be 8 bit unsigned int
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long must be more than 16 bits
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arrays up to 65536 bytes must be supported
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machine must be twos complement
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*****************************************************************************/
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#include "debugger.h"
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#include "t11.h"
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/*************************************
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*
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* Internal state representation
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*
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*************************************/
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typedef struct _t11_state t11_state;
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struct _t11_state
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{
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PAIR ppc; /* previous program counter */
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PAIR reg[8];
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PAIR psw;
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UINT16 initial_pc;
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UINT8 wait_state;
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UINT8 irq_state;
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int icount;
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cpu_irq_callback irq_callback;
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const device_config *device;
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const address_space *program;
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};
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INLINE t11_state *get_safe_token(const device_config *device)
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{
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assert(device != NULL);
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assert(device->token != NULL);
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assert(device->type == CPU);
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assert(cpu_get_type(device) == CPU_T11);
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return (t11_state *)device->token;
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}
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/*************************************
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*
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* Macro shortcuts
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*
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*************************************/
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/* registers of various sizes */
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#define REGD(x) reg[x].d
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#define REGW(x) reg[x].w.l
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#define REGB(x) reg[x].b.l
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/* PC, SP, and PSW definitions */
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#define SP REGW(6)
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#define PC REGW(7)
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#define SPD REGD(6)
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#define PCD REGD(7)
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#define PSW psw.b.l
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/*************************************
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*
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* Low-level memory operations
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*
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*************************************/
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INLINE int ROPCODE(t11_state *cpustate)
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{
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int val = memory_decrypted_read_word(cpustate->program, cpustate->PC);
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cpustate->PC += 2;
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return val;
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}
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INLINE int RBYTE(t11_state *cpustate, int addr)
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{
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return memory_read_byte_16le(cpustate->program, addr);
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}
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INLINE void WBYTE(t11_state *cpustate, int addr, int data)
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{
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memory_write_byte_16le(cpustate->program, addr, data);
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}
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INLINE int RWORD(t11_state *cpustate, int addr)
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{
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return memory_read_word_16le(cpustate->program, addr & 0xfffe);
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}
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INLINE void WWORD(t11_state *cpustate, int addr, int data)
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{
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memory_write_word_16le(cpustate->program, addr & 0xfffe, data);
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}
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/*************************************
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*
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* Low-level stack operations
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*
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*************************************/
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INLINE void PUSH(t11_state *cpustate, int val)
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{
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cpustate->SP -= 2;
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WWORD(cpustate, cpustate->SPD, val);
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}
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INLINE int POP(t11_state *cpustate)
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{
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int result = RWORD(cpustate, cpustate->SPD);
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cpustate->SP += 2;
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return result;
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}
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/*************************************
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*
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* Flag definitions and operations
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*
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*************************************/
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/* flag definitions */
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#define CFLAG 1
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#define VFLAG 2
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#define ZFLAG 4
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#define NFLAG 8
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/* extracts flags */
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#define GET_C (cpustate->PSW & CFLAG)
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#define GET_V (cpustate->PSW & VFLAG)
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#define GET_Z (cpustate->PSW & ZFLAG)
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#define GET_N (cpustate->PSW & NFLAG)
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/* clears flags */
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#define CLR_C (cpustate->PSW &= ~CFLAG)
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#define CLR_V (cpustate->PSW &= ~VFLAG)
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#define CLR_Z (cpustate->PSW &= ~ZFLAG)
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#define CLR_N (cpustate->PSW &= ~NFLAG)
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/* sets flags */
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#define SET_C (cpustate->PSW |= CFLAG)
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#define SET_V (cpustate->PSW |= VFLAG)
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#define SET_Z (cpustate->PSW |= ZFLAG)
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#define SET_N (cpustate->PSW |= NFLAG)
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/*************************************
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*
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* Interrupt handling
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*
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*************************************/
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struct irq_table_entry
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{
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UINT8 priority;
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UINT8 vector;
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};
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static const struct irq_table_entry irq_table[] =
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{
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{ 0<<5, 0x00 },
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{ 4<<5, 0x38 },
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{ 4<<5, 0x34 },
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{ 4<<5, 0x30 },
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{ 5<<5, 0x5c },
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{ 5<<5, 0x58 },
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{ 5<<5, 0x54 },
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{ 5<<5, 0x50 },
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{ 6<<5, 0x4c },
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{ 6<<5, 0x48 },
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{ 6<<5, 0x44 },
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{ 6<<5, 0x40 },
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{ 7<<5, 0x6c },
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{ 7<<5, 0x68 },
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{ 7<<5, 0x64 },
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{ 7<<5, 0x60 }
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};
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static void t11_check_irqs(t11_state *cpustate)
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{
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const struct irq_table_entry *irq = &irq_table[cpustate->irq_state & 15];
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int priority = cpustate->PSW & 0xe0;
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/* compare the priority of the interrupt to the PSW */
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if (irq->priority > priority)
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{
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int vector = irq->vector;
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int new_pc, new_psw;
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/* call the callback; if we don't get -1 back, use the return value as our vector */
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if (cpustate->irq_callback != NULL)
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{
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int new_vector = (*cpustate->irq_callback)(cpustate->device, cpustate->irq_state & 15);
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if (new_vector != -1)
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vector = new_vector;
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}
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/* fetch the new PC and PSW from that vector */
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assert((vector & 3) == 0);
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new_pc = RWORD(cpustate, vector);
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new_psw = RWORD(cpustate, vector + 2);
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/* push the old state, set the new one */
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PUSH(cpustate, cpustate->PSW);
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PUSH(cpustate, cpustate->PC);
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cpustate->PCD = new_pc;
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cpustate->PSW = new_psw;
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t11_check_irqs(cpustate);
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/* count cycles and clear the WAIT flag */
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cpustate->icount -= 114;
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cpustate->wait_state = 0;
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}
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}
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/*************************************
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*
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* Core opcodes
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*
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*************************************/
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/* includes the static function prototypes and the master opcode table */
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#include "t11table.c"
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/* includes the actual opcode implementations */
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#include "t11ops.c"
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/*************************************
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*
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* Low-level initialization/cleanup
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*
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*************************************/
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static CPU_INIT( t11 )
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{
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static const UINT16 initial_pc[] =
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{
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0xc000, 0x8000, 0x4000, 0x2000,
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0x1000, 0x0000, 0xf600, 0xf400
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};
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const struct t11_setup *setup = (const struct t11_setup *)device->static_config;
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t11_state *cpustate = get_safe_token(device);
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cpustate->initial_pc = initial_pc[setup->mode >> 13];
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cpustate->irq_callback = irqcallback;
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cpustate->device = device;
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cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
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state_save_register_device_item(device, 0, cpustate->ppc.w.l);
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state_save_register_device_item(device, 0, cpustate->reg[0].w.l);
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state_save_register_device_item(device, 0, cpustate->reg[1].w.l);
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state_save_register_device_item(device, 0, cpustate->reg[2].w.l);
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state_save_register_device_item(device, 0, cpustate->reg[3].w.l);
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state_save_register_device_item(device, 0, cpustate->reg[4].w.l);
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state_save_register_device_item(device, 0, cpustate->reg[5].w.l);
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state_save_register_device_item(device, 0, cpustate->reg[6].w.l);
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state_save_register_device_item(device, 0, cpustate->reg[7].w.l);
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state_save_register_device_item(device, 0, cpustate->psw.w.l);
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state_save_register_device_item(device, 0, cpustate->initial_pc);
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state_save_register_device_item(device, 0, cpustate->wait_state);
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state_save_register_device_item(device, 0, cpustate->irq_state);
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}
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/*************************************
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*
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* CPU reset
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*
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*************************************/
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static CPU_RESET( t11 )
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{
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t11_state *cpustate = get_safe_token(device);
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/* initial SP is 376 octal, or 0xfe */
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cpustate->SP = 0x00fe;
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/* initial PC comes from the setup word */
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cpustate->PC = cpustate->initial_pc;
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/* PSW starts off at highest priority */
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cpustate->PSW = 0xe0;
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/* initialize the IRQ state */
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cpustate->irq_state = 0;
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/* reset the remaining state */
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cpustate->REGD(0) = 0;
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cpustate->REGD(1) = 0;
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cpustate->REGD(2) = 0;
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cpustate->REGD(3) = 0;
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cpustate->REGD(4) = 0;
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cpustate->REGD(5) = 0;
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cpustate->ppc.d = 0;
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cpustate->wait_state = 0;
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}
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/*************************************
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*
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* Interrupt handling
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*
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*************************************/
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static void set_irq_line(t11_state *cpustate, int irqline, int state)
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{
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/* set the appropriate bit */
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if (state == CLEAR_LINE)
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cpustate->irq_state &= ~(1 << irqline);
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else
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cpustate->irq_state |= 1 << irqline;
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}
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/*************************************
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*
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* Core execution
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*
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*************************************/
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static CPU_EXECUTE( t11 )
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{
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t11_state *cpustate = get_safe_token(device);
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cpustate->icount = cycles;
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t11_check_irqs(cpustate);
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if (cpustate->wait_state)
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{
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cpustate->icount = 0;
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goto getout;
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}
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do
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{
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UINT16 op;
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cpustate->ppc = cpustate->reg[7]; /* copy PC to previous PC */
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debugger_instruction_hook(device, cpustate->PCD);
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op = ROPCODE(cpustate);
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(*opcode_table[op >> 3])(cpustate, op);
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} while (cpustate->icount > 0);
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getout:
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return cycles - cpustate->icount;
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}
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/**************************************************************************
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* Generic set_info
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**************************************************************************/
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static CPU_SET_INFO( t11 )
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{
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t11_state *cpustate = get_safe_token(device);
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switch (state)
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{
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/* --- the following bits of info are set as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_STATE + T11_IRQ0: set_irq_line(cpustate, T11_IRQ0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + T11_IRQ1: set_irq_line(cpustate, T11_IRQ1, info->i); break;
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case CPUINFO_INT_INPUT_STATE + T11_IRQ2: set_irq_line(cpustate, T11_IRQ2, info->i); break;
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case CPUINFO_INT_INPUT_STATE + T11_IRQ3: set_irq_line(cpustate, T11_IRQ3, info->i); break;
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case CPUINFO_INT_PC:
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case CPUINFO_INT_REGISTER + T11_PC: cpustate->PC = info->i; break;
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case CPUINFO_INT_SP:
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case CPUINFO_INT_REGISTER + T11_SP: cpustate->SP = info->i; break;
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case CPUINFO_INT_REGISTER + T11_PSW: cpustate->PSW = info->i; break;
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case CPUINFO_INT_REGISTER + T11_R0: cpustate->REGW(0) = info->i; break;
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case CPUINFO_INT_REGISTER + T11_R1: cpustate->REGW(1) = info->i; break;
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case CPUINFO_INT_REGISTER + T11_R2: cpustate->REGW(2) = info->i; break;
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case CPUINFO_INT_REGISTER + T11_R3: cpustate->REGW(3) = info->i; break;
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case CPUINFO_INT_REGISTER + T11_R4: cpustate->REGW(4) = info->i; break;
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case CPUINFO_INT_REGISTER + T11_R5: cpustate->REGW(5) = info->i; break;
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}
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}
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/**************************************************************************
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* Generic get_info
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**************************************************************************/
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CPU_GET_INFO( t11 )
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{
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t11_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
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switch (state)
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{
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/* --- the following bits of info are returned as 64-bit signed integers --- */
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case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(t11_state); break;
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case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
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case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
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case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
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case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
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case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
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case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
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case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
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case CPUINFO_INT_MIN_CYCLES: info->i = 12; break;
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case CPUINFO_INT_MAX_CYCLES: info->i = 110; break;
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case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break;
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case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
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case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
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case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break;
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case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break;
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case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break;
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case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break;
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case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break;
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case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
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case CPUINFO_INT_INPUT_STATE + T11_IRQ0: info->i = (cpustate->irq_state & 1) ? ASSERT_LINE : CLEAR_LINE; break;
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case CPUINFO_INT_INPUT_STATE + T11_IRQ1: info->i = (cpustate->irq_state & 2) ? ASSERT_LINE : CLEAR_LINE; break;
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case CPUINFO_INT_INPUT_STATE + T11_IRQ2: info->i = (cpustate->irq_state & 4) ? ASSERT_LINE : CLEAR_LINE; break;
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case CPUINFO_INT_INPUT_STATE + T11_IRQ3: info->i = (cpustate->irq_state & 8) ? ASSERT_LINE : CLEAR_LINE; break;
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case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break;
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case CPUINFO_INT_PC:
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case CPUINFO_INT_REGISTER + T11_PC: info->i = cpustate->PCD; break;
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case CPUINFO_INT_SP:
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case CPUINFO_INT_REGISTER + T11_SP: info->i = cpustate->SPD; break;
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case CPUINFO_INT_REGISTER + T11_PSW: info->i = cpustate->PSW; break;
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case CPUINFO_INT_REGISTER + T11_R0: info->i = cpustate->REGD(0); break;
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case CPUINFO_INT_REGISTER + T11_R1: info->i = cpustate->REGD(1); break;
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case CPUINFO_INT_REGISTER + T11_R2: info->i = cpustate->REGD(2); break;
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case CPUINFO_INT_REGISTER + T11_R3: info->i = cpustate->REGD(3); break;
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case CPUINFO_INT_REGISTER + T11_R4: info->i = cpustate->REGD(4); break;
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case CPUINFO_INT_REGISTER + T11_R5: info->i = cpustate->REGD(5); break;
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/* --- the following bits of info are returned as pointers to data or functions --- */
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case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(t11); break;
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case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(t11); break;
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case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(t11); break;
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case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(t11); break;
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case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(t11); break;
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case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
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/* --- the following bits of info are returned as NULL-terminated strings --- */
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case CPUINFO_STR_NAME: strcpy(info->s, "T11"); break;
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case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "DEC T-11"); break;
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case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
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case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
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case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
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case CPUINFO_STR_FLAGS:
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sprintf(info->s, "%c%c%c%c%c%c%c%c",
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cpustate->psw.b.l & 0x80 ? '?':'.',
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cpustate->psw.b.l & 0x40 ? 'I':'.',
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cpustate->psw.b.l & 0x20 ? 'I':'.',
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cpustate->psw.b.l & 0x10 ? 'T':'.',
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cpustate->psw.b.l & 0x08 ? 'N':'.',
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cpustate->psw.b.l & 0x04 ? 'Z':'.',
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cpustate->psw.b.l & 0x02 ? 'V':'.',
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cpustate->psw.b.l & 0x01 ? 'C':'.');
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break;
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case CPUINFO_STR_REGISTER + T11_PC: sprintf(info->s, "PC:%04X", cpustate->reg[7].w.l); break;
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case CPUINFO_STR_REGISTER + T11_SP: sprintf(info->s, "SP:%04X", cpustate->reg[6].w.l); break;
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case CPUINFO_STR_REGISTER + T11_PSW: sprintf(info->s, "PSW:%02X", cpustate->psw.b.l); break;
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case CPUINFO_STR_REGISTER + T11_R0: sprintf(info->s, "R0:%04X", cpustate->reg[0].w.l); break;
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case CPUINFO_STR_REGISTER + T11_R1: sprintf(info->s, "R1:%04X", cpustate->reg[1].w.l); break;
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case CPUINFO_STR_REGISTER + T11_R2: sprintf(info->s, "R2:%04X", cpustate->reg[2].w.l); break;
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case CPUINFO_STR_REGISTER + T11_R3: sprintf(info->s, "R3:%04X", cpustate->reg[3].w.l); break;
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case CPUINFO_STR_REGISTER + T11_R4: sprintf(info->s, "R4:%04X", cpustate->reg[4].w.l); break;
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case CPUINFO_STR_REGISTER + T11_R5: sprintf(info->s, "R5:%04X", cpustate->reg[5].w.l); break;
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|
}
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|
}
|