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This (mostly - see below) completes the structure, lower-casing functions and re-inclusion updates of the src\sound\emu headers.

Browse Source 
I did not do much to the following files because I did not know the best way to name them.
aicadsp.h
sid.h
sidenvel.h
sidvoice.h
ymdeltat.h

I did not update structures only used in the src\emu\sound\*.c files.  They are only used locally in the file so they were not worth the effort.
This commit is contained in:
Derrick Renaud 2008-08-11 00:32:08 +00:00
parent fdf667cf9c
commit 3710253aa7
680 changed files with 4772 additions and 4632 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

96
src/emu/sound/2151intf.c
View File

@ -26,14 +26,14 @@ struct ym2151_info
static void ym2151_update(void *param, stream_sample_t **inputs, stream_sample_t **buffers, int length)
{
struct ym2151_info *info = param;
YM2151UpdateOne(info->chip, buffers, length);
ym2151_update_one(info->chip, buffers, length);
}
static STATE_POSTLOAD( ym2151_postload )
static STATE_POSTLOAD( ym2151intf_postload )
{
struct ym2151_info *info = param;
YM2151Postload(machine, info->chip);
ym2151_postload(machine, info->chip);
}
@ -53,14 +53,14 @@ static void *ym2151_start(const char *tag, int sndindex, int clock, const void *
/* stream setup */
info->stream = stream_create(0,2,rate,info,ym2151_update);
info->chip = YM2151Init(sndindex,clock,rate);
info->chip = ym2151_init(sndindex,clock,rate);
state_save_register_postload(Machine, ym2151_postload, info);
state_save_register_postload(Machine, ym2151intf_postload, info);
if (info->chip != 0)
{
YM2151SetIrqHandler(info->chip,info->intf->irqhandler);
YM2151SetPortWriteHandler(info->chip,info->intf->portwritehandler);
ym2151_set_irq_handler(info->chip,info->intf->irqhandler);
ym2151_set_port_write_handler(info->chip,info->intf->portwritehandler);
return info;
}
return NULL;
@ -70,138 +70,138 @@ static void *ym2151_start(const char *tag, int sndindex, int clock, const void *
static void ym2151_stop(void *token)
{
struct ym2151_info *info = token;
YM2151Shutdown(info->chip);
ym2151_shutdown(info->chip);
}
static void ym2151_reset(void *token)
{
struct ym2151_info *info = token;
YM2151ResetChip(info->chip);
ym2151_reset_chip(info->chip);
}
static int lastreg0,lastreg1,lastreg2;
READ8_HANDLER( YM2151_status_port_0_r )
READ8_HANDLER( ym2151_status_port_0_r )
{
struct ym2151_info *token = sndti_token(SOUND_YM2151, 0);
stream_update(token->stream);
return YM2151ReadStatus(token->chip);
return ym2151_read_status(token->chip);
}
READ8_HANDLER( YM2151_status_port_1_r )
READ8_HANDLER( ym2151_status_port_1_r )
{
struct ym2151_info *token = sndti_token(SOUND_YM2151, 1);
stream_update(token->stream);
return YM2151ReadStatus(token->chip);
return ym2151_read_status(token->chip);
}
READ8_HANDLER( YM2151_status_port_2_r )
READ8_HANDLER( ym2151_status_port_2_r )
{
struct ym2151_info *token = sndti_token(SOUND_YM2151, 2);
stream_update(token->stream);
return YM2151ReadStatus(token->chip);
return ym2151_read_status(token->chip);
}
WRITE8_HANDLER( YM2151_register_port_0_w )
WRITE8_HANDLER( ym2151_register_port_0_w )
{
lastreg0 = data;
}
WRITE8_HANDLER( YM2151_register_port_1_w )
WRITE8_HANDLER( ym2151_register_port_1_w )
{
lastreg1 = data;
}
WRITE8_HANDLER( YM2151_register_port_2_w )
WRITE8_HANDLER( ym2151_register_port_2_w )
{
lastreg2 = data;
}
WRITE8_HANDLER( YM2151_data_port_0_w )
WRITE8_HANDLER( ym2151_data_port_0_w )
{
struct ym2151_info *token = sndti_token(SOUND_YM2151, 0);
stream_update(token->stream);
YM2151WriteReg(token->chip,lastreg0,data);
ym2151_write_reg(token->chip,lastreg0,data);
}
WRITE8_HANDLER( YM2151_data_port_1_w )
WRITE8_HANDLER( ym2151_data_port_1_w )
{
struct ym2151_info *token = sndti_token(SOUND_YM2151, 1);
stream_update(token->stream);
YM2151WriteReg(token->chip,lastreg1,data);
ym2151_write_reg(token->chip,lastreg1,data);
}
WRITE8_HANDLER( YM2151_data_port_2_w )
WRITE8_HANDLER( ym2151_data_port_2_w )
{
struct ym2151_info *token = sndti_token(SOUND_YM2151, 2);
stream_update(token->stream);
YM2151WriteReg(token->chip,lastreg2,data);
ym2151_write_reg(token->chip,lastreg2,data);
}
WRITE8_HANDLER( YM2151_word_0_w )
WRITE8_HANDLER( ym2151_word_0_w )
{
if (offset)
YM2151_data_port_0_w(machine,0,data);
ym2151_data_port_0_w(machine,0,data);
else
YM2151_register_port_0_w(machine,0,data);
ym2151_register_port_0_w(machine,0,data);
}
WRITE8_HANDLER( YM2151_word_1_w )
WRITE8_HANDLER( ym2151_word_1_w )
{
if (offset)
YM2151_data_port_1_w(machine,0,data);
ym2151_data_port_1_w(machine,0,data);
else
YM2151_register_port_1_w(machine,0,data);
ym2151_register_port_1_w(machine,0,data);
}
READ16_HANDLER( YM2151_status_port_0_lsb_r )
READ16_HANDLER( ym2151_status_port_0_lsb_r )
{
return YM2151_status_port_0_r(machine,0);
return ym2151_status_port_0_r(machine,0);
}
READ16_HANDLER( YM2151_status_port_1_lsb_r )
READ16_HANDLER( ym2151_status_port_1_lsb_r )
{
return YM2151_status_port_1_r(machine,0);
return ym2151_status_port_1_r(machine,0);
}
READ16_HANDLER( YM2151_status_port_2_lsb_r )
READ16_HANDLER( ym2151_status_port_2_lsb_r )
{
return YM2151_status_port_2_r(machine,0);
return ym2151_status_port_2_r(machine,0);
}
WRITE16_HANDLER( YM2151_register_port_0_lsb_w )
WRITE16_HANDLER( ym2151_register_port_0_lsb_w )
{
if (ACCESSING_BITS_0_7)
YM2151_register_port_0_w(machine, 0, data & 0xff);
ym2151_register_port_0_w(machine, 0, data & 0xff);
}
WRITE16_HANDLER( YM2151_register_port_1_lsb_w )
WRITE16_HANDLER( ym2151_register_port_1_lsb_w )
{
if (ACCESSING_BITS_0_7)
YM2151_register_port_1_w(machine, 0, data & 0xff);
ym2151_register_port_1_w(machine, 0, data & 0xff);
}
WRITE16_HANDLER( YM2151_register_port_2_lsb_w )
WRITE16_HANDLER( ym2151_register_port_2_lsb_w )
{
if (ACCESSING_BITS_0_7)
YM2151_register_port_2_w(machine, 0, data & 0xff);
ym2151_register_port_2_w(machine, 0, data & 0xff);
}
WRITE16_HANDLER( YM2151_data_port_0_lsb_w )
WRITE16_HANDLER( ym2151_data_port_0_lsb_w )
{
if (ACCESSING_BITS_0_7)
YM2151_data_port_0_w(machine, 0, data & 0xff);
ym2151_data_port_0_w(machine, 0, data & 0xff);
}
WRITE16_HANDLER( YM2151_data_port_1_lsb_w )
WRITE16_HANDLER( ym2151_data_port_1_lsb_w )
{
if (ACCESSING_BITS_0_7)
YM2151_data_port_1_w(machine, 0, data & 0xff);
ym2151_data_port_1_w(machine, 0, data & 0xff);
}
WRITE16_HANDLER( YM2151_data_port_2_lsb_w )
WRITE16_HANDLER( ym2151_data_port_2_lsb_w )
{
if (ACCESSING_BITS_0_7)
YM2151_data_port_2_w(machine, 0, data & 0xff);
ym2151_data_port_2_w(machine, 0, data & 0xff);
}

50
src/emu/sound/2151intf.h
View File

@ -1,5 +1,7 @@
#ifndef YM2151INTF_H
#define YM2151INTF_H
#pragma once
#ifndef __2151INTF_H__
#define __2151INTF_H__
typedef struct _ym2151_interface ym2151_interface;
struct _ym2151_interface
@ -8,31 +10,33 @@ struct _ym2151_interface
write8_machine_func portwritehandler;
};
READ8_HANDLER( YM2151_status_port_0_r );
READ8_HANDLER( YM2151_status_port_1_r );
READ8_HANDLER( YM2151_status_port_2_r );
READ8_HANDLER( ym2151_status_port_0_r );
READ8_HANDLER( ym2151_status_port_1_r );
READ8_HANDLER( ym2151_status_port_2_r );
WRITE8_HANDLER( YM2151_register_port_0_w );
WRITE8_HANDLER( YM2151_register_port_1_w );
WRITE8_HANDLER( YM2151_register_port_2_w );
WRITE8_HANDLER( ym2151_register_port_0_w );
WRITE8_HANDLER( ym2151_register_port_1_w );
WRITE8_HANDLER( ym2151_register_port_2_w );
WRITE8_HANDLER( YM2151_data_port_0_w );
WRITE8_HANDLER( YM2151_data_port_1_w );
WRITE8_HANDLER( YM2151_data_port_2_w );
WRITE8_HANDLER( ym2151_data_port_0_w );
WRITE8_HANDLER( ym2151_data_port_1_w );
WRITE8_HANDLER( ym2151_data_port_2_w );
WRITE8_HANDLER( YM2151_word_0_w );
WRITE8_HANDLER( YM2151_word_1_w );
WRITE8_HANDLER( ym2151_word_0_w );
WRITE8_HANDLER( ym2151_word_1_w );
READ16_HANDLER( YM2151_status_port_0_lsb_r );
READ16_HANDLER( YM2151_status_port_1_lsb_r );
READ16_HANDLER( YM2151_status_port_2_lsb_r );
READ16_HANDLER( ym2151_status_port_0_lsb_r );
READ16_HANDLER( ym2151_status_port_1_lsb_r );
READ16_HANDLER( ym2151_status_port_2_lsb_r );
WRITE16_HANDLER( YM2151_register_port_0_lsb_w );
WRITE16_HANDLER( YM2151_register_port_1_lsb_w );
WRITE16_HANDLER( YM2151_register_port_2_lsb_w );
WRITE16_HANDLER( ym2151_register_port_0_lsb_w );
WRITE16_HANDLER( ym2151_register_port_1_lsb_w );
WRITE16_HANDLER( ym2151_register_port_2_lsb_w );
WRITE16_HANDLER( ym2151_data_port_0_lsb_w );
WRITE16_HANDLER( ym2151_data_port_1_lsb_w );
WRITE16_HANDLER( ym2151_data_port_2_lsb_w );
#endif /* __2151INTF_H__ */
WRITE16_HANDLER( YM2151_data_port_0_lsb_w );
WRITE16_HANDLER( YM2151_data_port_1_lsb_w );
WRITE16_HANDLER( YM2151_data_port_2_lsb_w );
#endif

152
src/emu/sound/2203intf.c
View File

@ -59,17 +59,17 @@ static void IRQHandler(void *param,int irq)
static TIMER_CALLBACK( timer_callback_2203_0 )
{
struct ym2203_info *info = ptr;
YM2203TimerOver(info->chip,0);
ym2203_timer_over(info->chip,0);
}
static TIMER_CALLBACK( timer_callback_2203_1 )
{
struct ym2203_info *info = ptr;
YM2203TimerOver(info->chip,1);
ym2203_timer_over(info->chip,1);
}
/* update request from fm.c */
void YM2203UpdateRequest(void *param)
void ym2203_update_request(void *param)
{
struct ym2203_info *info = param;
stream_update(info->stream);
@ -94,14 +94,14 @@ static void timer_handler(void *param,int c,int count,int clock)
static void ym2203_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffer, int length)
{
struct ym2203_info *info = param;
YM2203UpdateOne(info->chip, buffer[0], length);
ym2203_update_one(info->chip, buffer[0], length);
}
static STATE_POSTLOAD( ym2203_postload )
static STATE_POSTLOAD( ym2203_intf_postload )
{
struct ym2203_info *info = param;
YM2203Postload(info->chip);
ym2203_postload(info->chip);
}
@ -135,9 +135,9 @@ static void *ym2203_start(const char *tag, int sndindex, int clock, const void *
info->stream = stream_create(0,1,rate,info,ym2203_stream_update);
/* Initialize FM emurator */
info->chip = YM2203Init(info,sndindex,clock,rate,timer_handler,IRQHandler,&psgintf);
info->chip = ym2203_init(info,sndindex,clock,rate,timer_handler,IRQHandler,&psgintf);
state_save_register_postload(Machine, ym2203_postload, info);
state_save_register_postload(Machine, ym2203_intf_postload, info);
if (info->chip)
return info;
@ -150,172 +150,172 @@ static void *ym2203_start(const char *tag, int sndindex, int clock, const void *
static void ym2203_stop(void *token)
{
struct ym2203_info *info = token;
YM2203Shutdown(info->chip);
ym2203_shutdown(info->chip);
ay8910_stop_ym(info->psg);
}
static void ym2203_reset(void *token)
{
struct ym2203_info *info = token;
YM2203ResetChip(info->chip);
ym2203_reset_chip(info->chip);
}
READ8_HANDLER( YM2203_status_port_0_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 0); return YM2203Read(info->chip,0); }
READ8_HANDLER( YM2203_status_port_1_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 1); return YM2203Read(info->chip,0); }
READ8_HANDLER( YM2203_status_port_2_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 2); return YM2203Read(info->chip,0); }
READ8_HANDLER( YM2203_status_port_3_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 3); return YM2203Read(info->chip,0); }
READ8_HANDLER( YM2203_status_port_4_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 4); return YM2203Read(info->chip,0); }
READ8_HANDLER( ym2203_status_port_0_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 0); return ym2203_read(info->chip,0); }
READ8_HANDLER( ym2203_status_port_1_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 1); return ym2203_read(info->chip,0); }
READ8_HANDLER( ym2203_status_port_2_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 2); return ym2203_read(info->chip,0); }
READ8_HANDLER( ym2203_status_port_3_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 3); return ym2203_read(info->chip,0); }
READ8_HANDLER( ym2203_status_port_4_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 4); return ym2203_read(info->chip,0); }
READ8_HANDLER( YM2203_read_port_0_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 0); return YM2203Read(info->chip,1); }
READ8_HANDLER( YM2203_read_port_1_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 1); return YM2203Read(info->chip,1); }
READ8_HANDLER( YM2203_read_port_2_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 2); return YM2203Read(info->chip,1); }
READ8_HANDLER( YM2203_read_port_3_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 3); return YM2203Read(info->chip,1); }
READ8_HANDLER( YM2203_read_port_4_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 4); return YM2203Read(info->chip,1); }
READ8_HANDLER( ym2203_read_port_0_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 0); return ym2203_read(info->chip,1); }
READ8_HANDLER( ym2203_read_port_1_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 1); return ym2203_read(info->chip,1); }
READ8_HANDLER( ym2203_read_port_2_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 2); return ym2203_read(info->chip,1); }
READ8_HANDLER( ym2203_read_port_3_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 3); return ym2203_read(info->chip,1); }
READ8_HANDLER( ym2203_read_port_4_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 4); return ym2203_read(info->chip,1); }
WRITE8_HANDLER( YM2203_control_port_0_w )
WRITE8_HANDLER( ym2203_control_port_0_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 0);
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE8_HANDLER( YM2203_control_port_1_w )
WRITE8_HANDLER( ym2203_control_port_1_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 1);
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE8_HANDLER( YM2203_control_port_2_w )
WRITE8_HANDLER( ym2203_control_port_2_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 2);
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE8_HANDLER( YM2203_control_port_3_w )
WRITE8_HANDLER( ym2203_control_port_3_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 3);
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE8_HANDLER( YM2203_control_port_4_w )
WRITE8_HANDLER( ym2203_control_port_4_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 4);
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE8_HANDLER( YM2203_write_port_0_w )
WRITE8_HANDLER( ym2203_write_port_0_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 0);
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
WRITE8_HANDLER( YM2203_write_port_1_w )
WRITE8_HANDLER( ym2203_write_port_1_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 1);
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
WRITE8_HANDLER( YM2203_write_port_2_w )
WRITE8_HANDLER( ym2203_write_port_2_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 2);
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
WRITE8_HANDLER( YM2203_write_port_3_w )
WRITE8_HANDLER( ym2203_write_port_3_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 3);
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
WRITE8_HANDLER( YM2203_write_port_4_w )
WRITE8_HANDLER( ym2203_write_port_4_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 4);
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
READ16_HANDLER( YM2203_status_port_0_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 0); return YM2203Read(info->chip,0) | 0xff00; }
READ16_HANDLER( YM2203_status_port_1_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 1); return YM2203Read(info->chip,0) | 0xff00; }
READ16_HANDLER( YM2203_status_port_2_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 2); return YM2203Read(info->chip,0) | 0xff00; }
READ16_HANDLER( YM2203_status_port_3_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 3); return YM2203Read(info->chip,0) | 0xff00; }
READ16_HANDLER( YM2203_status_port_4_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 4); return YM2203Read(info->chip,0) | 0xff00; }
READ16_HANDLER( ym2203_status_port_0_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 0); return ym2203_read(info->chip,0) | 0xff00; }
READ16_HANDLER( ym2203_status_port_1_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 1); return ym2203_read(info->chip,0) | 0xff00; }
READ16_HANDLER( ym2203_status_port_2_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 2); return ym2203_read(info->chip,0) | 0xff00; }
READ16_HANDLER( ym2203_status_port_3_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 3); return ym2203_read(info->chip,0) | 0xff00; }
READ16_HANDLER( ym2203_status_port_4_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 4); return ym2203_read(info->chip,0) | 0xff00; }
READ16_HANDLER( YM2203_read_port_0_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 0); return YM2203Read(info->chip,1) | 0xff00; }
READ16_HANDLER( YM2203_read_port_1_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 1); return YM2203Read(info->chip,1) | 0xff00; }
READ16_HANDLER( YM2203_read_port_2_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 2); return YM2203Read(info->chip,1) | 0xff00; }
READ16_HANDLER( YM2203_read_port_3_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 3); return YM2203Read(info->chip,1) | 0xff00; }
READ16_HANDLER( YM2203_read_port_4_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 4); return YM2203Read(info->chip,1) | 0xff00; }
READ16_HANDLER( ym2203_read_port_0_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 0); return ym2203_read(info->chip,1) | 0xff00; }
READ16_HANDLER( ym2203_read_port_1_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 1); return ym2203_read(info->chip,1) | 0xff00; }
READ16_HANDLER( ym2203_read_port_2_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 2); return ym2203_read(info->chip,1) | 0xff00; }
READ16_HANDLER( ym2203_read_port_3_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 3); return ym2203_read(info->chip,1) | 0xff00; }
READ16_HANDLER( ym2203_read_port_4_lsb_r ) { struct ym2203_info *info = sndti_token(SOUND_YM2203, 4); return ym2203_read(info->chip,1) | 0xff00; }
WRITE16_HANDLER( YM2203_control_port_0_lsb_w )
WRITE16_HANDLER( ym2203_control_port_0_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 0);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE16_HANDLER( YM2203_control_port_1_lsb_w )
WRITE16_HANDLER( ym2203_control_port_1_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 1);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE16_HANDLER( YM2203_control_port_2_lsb_w )
WRITE16_HANDLER( ym2203_control_port_2_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 2);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE16_HANDLER( YM2203_control_port_3_lsb_w )
WRITE16_HANDLER( ym2203_control_port_3_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 3);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE16_HANDLER( YM2203_control_port_4_lsb_w )
WRITE16_HANDLER( ym2203_control_port_4_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 4);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,0,data);
ym2203_write(info->chip,0,data);
}
WRITE16_HANDLER( YM2203_write_port_0_lsb_w )
WRITE16_HANDLER( ym2203_write_port_0_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 0);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
WRITE16_HANDLER( YM2203_write_port_1_lsb_w )
WRITE16_HANDLER( ym2203_write_port_1_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 1);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
WRITE16_HANDLER( YM2203_write_port_2_lsb_w )
WRITE16_HANDLER( ym2203_write_port_2_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 2);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
WRITE16_HANDLER( YM2203_write_port_3_lsb_w )
WRITE16_HANDLER( ym2203_write_port_3_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 3);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
WRITE16_HANDLER( YM2203_write_port_4_lsb_w )
WRITE16_HANDLER( ym2203_write_port_4_lsb_w )
{
struct ym2203_info *info = sndti_token(SOUND_YM2203, 4);
if (ACCESSING_BITS_0_7)
YM2203Write(info->chip,1,data);
ym2203_write(info->chip,1,data);
}
WRITE8_HANDLER( YM2203_word_0_w )
WRITE8_HANDLER( ym2203_word_0_w )
{
if (offset)
YM2203_write_port_0_w(machine,0,data);
ym2203_write_port_0_w(machine,0,data);
else
YM2203_control_port_0_w(machine,0,data);
ym2203_control_port_0_w(machine,0,data);
}
WRITE8_HANDLER( YM2203_word_1_w )
WRITE8_HANDLER( ym2203_word_1_w )
{
if (offset)
YM2203_write_port_1_w(machine,0,data);
ym2203_write_port_1_w(machine,0,data);
else
YM2203_control_port_1_w(machine,0,data);
ym2203_control_port_1_w(machine,0,data);
}

92
src/emu/sound/2203intf.h
View File

@ -1,5 +1,7 @@
#ifndef YM2203INTF_H
#define YM2203INTF_H
#pragma once
#ifndef __2203INTF_H__
#define __2203INTF_H__
#include "ay8910.h"
@ -11,55 +13,55 @@ struct _ym2203_interface
};
READ8_HANDLER( YM2203_status_port_0_r );
READ8_HANDLER( YM2203_status_port_1_r );
READ8_HANDLER( YM2203_status_port_2_r );
READ8_HANDLER( YM2203_status_port_3_r );
READ8_HANDLER( YM2203_status_port_4_r );
READ8_HANDLER( ym2203_status_port_0_r );
READ8_HANDLER( ym2203_status_port_1_r );
READ8_HANDLER( ym2203_status_port_2_r );
READ8_HANDLER( ym2203_status_port_3_r );
READ8_HANDLER( ym2203_status_port_4_r );
READ8_HANDLER( YM2203_read_port_0_r );
READ8_HANDLER( YM2203_read_port_1_r );
READ8_HANDLER( YM2203_read_port_2_r );
READ8_HANDLER( YM2203_read_port_3_r );
READ8_HANDLER( YM2203_read_port_4_r );
READ8_HANDLER( ym2203_read_port_0_r );
READ8_HANDLER( ym2203_read_port_1_r );
READ8_HANDLER( ym2203_read_port_2_r );
READ8_HANDLER( ym2203_read_port_3_r );
READ8_HANDLER( ym2203_read_port_4_r );
WRITE8_HANDLER( YM2203_control_port_0_w );
WRITE8_HANDLER( YM2203_control_port_1_w );
WRITE8_HANDLER( YM2203_control_port_2_w );
WRITE8_HANDLER( YM2203_control_port_3_w );
WRITE8_HANDLER( YM2203_control_port_4_w );
WRITE8_HANDLER( ym2203_control_port_0_w );
WRITE8_HANDLER( ym2203_control_port_1_w );
WRITE8_HANDLER( ym2203_control_port_2_w );
WRITE8_HANDLER( ym2203_control_port_3_w );
WRITE8_HANDLER( ym2203_control_port_4_w );
WRITE8_HANDLER( YM2203_write_port_0_w );
WRITE8_HANDLER( YM2203_write_port_1_w );
WRITE8_HANDLER( YM2203_write_port_2_w );
WRITE8_HANDLER( YM2203_write_port_3_w );
WRITE8_HANDLER( YM2203_write_port_4_w );
WRITE8_HANDLER( ym2203_write_port_0_w );
WRITE8_HANDLER( ym2203_write_port_1_w );
WRITE8_HANDLER( ym2203_write_port_2_w );
WRITE8_HANDLER( ym2203_write_port_3_w );
WRITE8_HANDLER( ym2203_write_port_4_w );
READ16_HANDLER( YM2203_status_port_0_lsb_r );
READ16_HANDLER( YM2203_status_port_1_lsb_r );
READ16_HANDLER( YM2203_status_port_2_lsb_r );
READ16_HANDLER( YM2203_status_port_3_lsb_r );
READ16_HANDLER( YM2203_status_port_4_lsb_r );
READ16_HANDLER( ym2203_status_port_0_lsb_r );
READ16_HANDLER( ym2203_status_port_1_lsb_r );
READ16_HANDLER( ym2203_status_port_2_lsb_r );
READ16_HANDLER( ym2203_status_port_3_lsb_r );
READ16_HANDLER( ym2203_status_port_4_lsb_r );
READ16_HANDLER( YM2203_read_port_0_lsb_r );
READ16_HANDLER( YM2203_read_port_1_lsb_r );
READ16_HANDLER( YM2203_read_port_2_lsb_r );
READ16_HANDLER( YM2203_read_port_3_lsb_r );
READ16_HANDLER( YM2203_read_port_4_lsb_r );
READ16_HANDLER( ym2203_read_port_0_lsb_r );
READ16_HANDLER( ym2203_read_port_1_lsb_r );
READ16_HANDLER( ym2203_read_port_2_lsb_r );
READ16_HANDLER( ym2203_read_port_3_lsb_r );
READ16_HANDLER( ym2203_read_port_4_lsb_r );
WRITE16_HANDLER( YM2203_control_port_0_lsb_w );
WRITE16_HANDLER( YM2203_control_port_1_lsb_w );
WRITE16_HANDLER( YM2203_control_port_2_lsb_w );
WRITE16_HANDLER( YM2203_control_port_3_lsb_w );
WRITE16_HANDLER( YM2203_control_port_4_lsb_w );
WRITE16_HANDLER( ym2203_control_port_0_lsb_w );
WRITE16_HANDLER( ym2203_control_port_1_lsb_w );
WRITE16_HANDLER( ym2203_control_port_2_lsb_w );
WRITE16_HANDLER( ym2203_control_port_3_lsb_w );
WRITE16_HANDLER( ym2203_control_port_4_lsb_w );
WRITE16_HANDLER( YM2203_write_port_0_lsb_w );
WRITE16_HANDLER( YM2203_write_port_1_lsb_w );
WRITE16_HANDLER( YM2203_write_port_2_lsb_w );
WRITE16_HANDLER( YM2203_write_port_3_lsb_w );
WRITE16_HANDLER( YM2203_write_port_4_lsb_w );
WRITE16_HANDLER( ym2203_write_port_0_lsb_w );
WRITE16_HANDLER( ym2203_write_port_1_lsb_w );
WRITE16_HANDLER( ym2203_write_port_2_lsb_w );
WRITE16_HANDLER( ym2203_write_port_3_lsb_w );
WRITE16_HANDLER( ym2203_write_port_4_lsb_w );
WRITE8_HANDLER( YM2203_word_0_w );
WRITE8_HANDLER( YM2203_word_1_w );
WRITE8_HANDLER( ym2203_word_0_w );
WRITE8_HANDLER( ym2203_word_1_w );
#endif
#endif /* __2203INTF_H__ */

52
src/emu/sound/2413intf.c
View File

@ -39,7 +39,7 @@ void YM2413DAC_update(int chip,stream_sample_t **inputs, stream_sample_t **_buff
static void ym2413_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffers, int length)
{
struct ym2413_info *info = param;
YM2413UpdateOne(info->chip, buffers, length);
ym2413_update_one(info->chip, buffers, length);
}
static void _stream_update(void *param, int interval)
@ -57,14 +57,14 @@ static void *ym2413_start(const char *tag, int sndindex, int clock, const void *
memset(info, 0, sizeof(*info));
/* emulator create */
info->chip = YM2413Init(clock, rate, sndindex);
info->chip = ym2413_init(clock, rate, sndindex);
if (!info->chip)
return NULL;
/* stream system initialize */
info->stream = stream_create(0,2,rate,info,ym2413_stream_update);
YM2413SetUpdateHandler(info->chip, _stream_update, info);
ym2413_set_update_handler(info->chip, _stream_update, info);
return info;
@ -98,18 +98,18 @@ static void *ym2413_start(const char *tag, int sndindex, int clock, const void *
static void ym2413_stop (void *chip)
{
struct ym2413_info *info = chip;
YM2413Shutdown(info->chip);
ym2413_shutdown(info->chip);
}
static void ym2413_reset (void *chip)
{
struct ym2413_info *info = chip;
YM2413ResetChip(info->chip);
ym2413_reset_chip(info->chip);
}
#ifdef YM2413ISA
WRITE8_HANDLER( YM2413_register_port_0_w ) {
WRITE8_HANDLER( ym2413_register_port_0_w ) {
int i,a;
outportb(0x308,data); // ym2413_write (0, 0, data);
//add delay
@ -118,37 +118,37 @@ int i,a;
} /* 1st chip */
#else
WRITE8_HANDLER( YM2413_register_port_0_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 0); YM2413Write (info->chip, 0, data); } /* 1st chip */
WRITE8_HANDLER( ym2413_register_port_0_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 0); ym2413_write (info->chip, 0, data); } /* 1st chip */
#endif
WRITE8_HANDLER( YM2413_register_port_1_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 1); YM2413Write (info->chip, 0, data); } /* 2nd chip */
WRITE8_HANDLER( YM2413_register_port_2_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 2); YM2413Write (info->chip, 0, data); } /* 3rd chip */
WRITE8_HANDLER( YM2413_register_port_3_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 3); YM2413Write (info->chip, 0, data); } /* 4th chip */
WRITE8_HANDLER( ym2413_register_port_1_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 1); ym2413_write (info->chip, 0, data); } /* 2nd chip */
WRITE8_HANDLER( ym2413_register_port_2_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 2); ym2413_write (info->chip, 0, data); } /* 3rd chip */
WRITE8_HANDLER( ym2413_register_port_3_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 3); ym2413_write (info->chip, 0, data); } /* 4th chip */
#ifdef YM2413ISA
WRITE8_HANDLER( YM2413_data_port_0_w ) {
WRITE8_HANDLER( ym2413_data_port_0_w ) {
int i,a;
outportb(0x309,data);// YM2413Write (sndti_token(SOUND_YM2413, 0), 1, data);
outportb(0x309,data);// ym2413_write (sndti_token(SOUND_YM2413, 0), 1, data);
//add delay
for (i=0; i<0x40; i++)
a = inportb(0x80);
} /* 1st chip */
#else
WRITE8_HANDLER( YM2413_data_port_0_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 0); YM2413Write (info->chip, 1, data); } /* 1st chip */
WRITE8_HANDLER( ym2413_data_port_0_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 0); ym2413_write (info->chip, 1, data); } /* 1st chip */
#endif
WRITE8_HANDLER( YM2413_data_port_1_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 1); YM2413Write (info->chip, 1, data); } /* 2nd chip */
WRITE8_HANDLER( YM2413_data_port_2_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 2); YM2413Write (info->chip, 1, data); } /* 3rd chip */
WRITE8_HANDLER( YM2413_data_port_3_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 3); YM2413Write (info->chip, 1, data); } /* 4th chip */
WRITE8_HANDLER( ym2413_data_port_1_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 1); ym2413_write (info->chip, 1, data); } /* 2nd chip */
WRITE8_HANDLER( ym2413_data_port_2_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 2); ym2413_write (info->chip, 1, data); } /* 3rd chip */
WRITE8_HANDLER( ym2413_data_port_3_w ) { struct ym2413_info *info = sndti_token(SOUND_YM2413, 3); ym2413_write (info->chip, 1, data); } /* 4th chip */
WRITE16_HANDLER( YM2413_register_port_0_lsb_w ) { if (ACCESSING_BITS_0_7) YM2413_register_port_0_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( YM2413_register_port_0_msb_w ) { if (ACCESSING_BITS_8_15) YM2413_register_port_0_w(machine,offset,((data & 0xff00) >> 8)); }
WRITE16_HANDLER( YM2413_register_port_1_lsb_w ) { if (ACCESSING_BITS_0_7) YM2413_register_port_1_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( YM2413_register_port_2_lsb_w ) { if (ACCESSING_BITS_0_7) YM2413_register_port_2_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( YM2413_register_port_3_lsb_w ) { if (ACCESSING_BITS_0_7) YM2413_register_port_3_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( YM2413_data_port_0_lsb_w ) { if (ACCESSING_BITS_0_7) YM2413_data_port_0_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( YM2413_data_port_0_msb_w ) { if (ACCESSING_BITS_8_15) YM2413_data_port_0_w(machine,offset,((data & 0xff00) >> 8)); }
WRITE16_HANDLER( YM2413_data_port_1_lsb_w ) { if (ACCESSING_BITS_0_7) YM2413_data_port_1_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( YM2413_data_port_2_lsb_w ) { if (ACCESSING_BITS_0_7) YM2413_data_port_2_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( YM2413_data_port_3_lsb_w ) { if (ACCESSING_BITS_0_7) YM2413_data_port_3_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( ym2413_register_port_0_lsb_w ) { if (ACCESSING_BITS_0_7) ym2413_register_port_0_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( ym2413_register_port_0_msb_w ) { if (ACCESSING_BITS_8_15) ym2413_register_port_0_w(machine,offset,((data & 0xff00) >> 8)); }
WRITE16_HANDLER( ym2413_register_port_1_lsb_w ) { if (ACCESSING_BITS_0_7) ym2413_register_port_1_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( ym2413_register_port_2_lsb_w ) { if (ACCESSING_BITS_0_7) ym2413_register_port_2_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( ym2413_register_port_3_lsb_w ) { if (ACCESSING_BITS_0_7) ym2413_register_port_3_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( ym2413_data_port_0_lsb_w ) { if (ACCESSING_BITS_0_7) ym2413_data_port_0_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( ym2413_data_port_0_msb_w ) { if (ACCESSING_BITS_8_15) ym2413_data_port_0_w(machine,offset,((data & 0xff00) >> 8)); }
WRITE16_HANDLER( ym2413_data_port_1_lsb_w ) { if (ACCESSING_BITS_0_7) ym2413_data_port_1_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( ym2413_data_port_2_lsb_w ) { if (ACCESSING_BITS_0_7) ym2413_data_port_2_w(machine,offset,data & 0xff); }
WRITE16_HANDLER( ym2413_data_port_3_lsb_w ) { if (ACCESSING_BITS_0_7) ym2413_data_port_3_w(machine,offset,data & 0xff); }
/**************************************************************************

45
src/emu/sound/2413intf.h
View File

@ -1,26 +1,27 @@
#ifndef YM2413INTF_H
#define YM2413INTF_H
#pragma once
#ifndef __2413INTF_H__
#define __2413INTF_H__
WRITE8_HANDLER( YM2413_register_port_0_w );
WRITE8_HANDLER( YM2413_register_port_1_w );
WRITE8_HANDLER( YM2413_register_port_2_w );
WRITE8_HANDLER( YM2413_register_port_3_w );
WRITE8_HANDLER( YM2413_data_port_0_w );
WRITE8_HANDLER( YM2413_data_port_1_w );
WRITE8_HANDLER( YM2413_data_port_2_w );
WRITE8_HANDLER( YM2413_data_port_3_w );
WRITE8_HANDLER( ym2413_register_port_0_w );
WRITE8_HANDLER( ym2413_register_port_1_w );
WRITE8_HANDLER( ym2413_register_port_2_w );
WRITE8_HANDLER( ym2413_register_port_3_w );
WRITE8_HANDLER( ym2413_data_port_0_w );
WRITE8_HANDLER( ym2413_data_port_1_w );
WRITE8_HANDLER( ym2413_data_port_2_w );
WRITE8_HANDLER( ym2413_data_port_3_w );
WRITE16_HANDLER( YM2413_register_port_0_lsb_w );
WRITE16_HANDLER( YM2413_register_port_0_msb_w );
WRITE16_HANDLER( YM2413_register_port_1_lsb_w );
WRITE16_HANDLER( YM2413_register_port_2_lsb_w );
WRITE16_HANDLER( YM2413_register_port_3_lsb_w );
WRITE16_HANDLER( YM2413_data_port_0_lsb_w );
WRITE16_HANDLER( YM2413_data_port_0_msb_w );
WRITE16_HANDLER( YM2413_data_port_1_lsb_w );
WRITE16_HANDLER( YM2413_data_port_2_lsb_w );
WRITE16_HANDLER( YM2413_data_port_3_lsb_w );
#endif
WRITE16_HANDLER( ym2413_register_port_0_lsb_w );
WRITE16_HANDLER( ym2413_register_port_0_msb_w );
WRITE16_HANDLER( ym2413_register_port_1_lsb_w );
WRITE16_HANDLER( ym2413_register_port_2_lsb_w );
WRITE16_HANDLER( ym2413_register_port_3_lsb_w );
WRITE16_HANDLER( ym2413_data_port_0_lsb_w );
WRITE16_HANDLER( ym2413_data_port_0_msb_w );
WRITE16_HANDLER( ym2413_data_port_1_lsb_w );
WRITE16_HANDLER( ym2413_data_port_2_lsb_w );
WRITE16_HANDLER( ym2413_data_port_3_lsb_w );
#endif /* __2413INTF_H__ */

80
src/emu/sound/2608intf.c
View File

@ -73,13 +73,13 @@ static void IRQHandler(void *param,int irq)
static TIMER_CALLBACK( timer_callback_2608_0 )
{
struct ym2608_info *info = ptr;
YM2608TimerOver(info->chip,0);
ym2608_timer_over(info->chip,0);
}
static TIMER_CALLBACK( timer_callback_2608_1 )
{
struct ym2608_info *info = ptr;
YM2608TimerOver(info->chip,1);
ym2608_timer_over(info->chip,1);
}
static void timer_handler(void *param,int c,int count,int clock)
@ -98,7 +98,7 @@ static void timer_handler(void *param,int c,int count,int clock)
}
/* update request from fm.c */
void YM2608UpdateRequest(void *param)
void ym2608_update_request(void *param)
{
struct ym2608_info *info = param;
stream_update(info->stream);
@ -107,14 +107,14 @@ void YM2608UpdateRequest(void *param)
static void ym2608_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffers, int length)
{
struct ym2608_info *info = param;
YM2608UpdateOne(info->chip, buffers, length);
ym2608_update_one(info->chip, buffers, length);
}
static STATE_POSTLOAD( ym2608_postload )
static STATE_POSTLOAD( ym2608_intf_postload )
{
struct ym2608_info *info = param;
YM2608Postload(info->chip);
ym2608_postload(info->chip);
}
@ -155,11 +155,11 @@ static void *ym2608_start(const char *tag, int sndindex, int clock, const void *
pcmsizea = memory_region_length(Machine, tag);
/* initialize YM2608 */
info->chip = YM2608Init(info,sndindex,clock,rate,
info->chip = ym2608_init(info,sndindex,clock,rate,
pcmbufa,pcmsizea,
timer_handler,IRQHandler,&psgintf);
state_save_register_postload(Machine, ym2608_postload, info);
state_save_register_postload(Machine, ym2608_intf_postload, info);
if (info->chip)
return info;
@ -171,119 +171,119 @@ static void *ym2608_start(const char *tag, int sndindex, int clock, const void *
static void ym2608_stop(void *token)
{
struct ym2608_info *info = token;
YM2608Shutdown(info->chip);
ym2608_shutdown(info->chip);
ay8910_stop_ym(info->psg);
}
static void ym2608_reset(void *token)
{
struct ym2608_info *info = token;
YM2608ResetChip(info->chip);
ym2608_reset_chip(info->chip);
}
/************************************************/
/* Status Read for YM2608 - Chip 0 */
/************************************************/
READ8_HANDLER( YM2608_status_port_0_A_r )
READ8_HANDLER( ym2608_status_port_0_a_r )
{
//logerror("PC %04x: 2608 S0A=%02X\n",activecpu_get_pc(),YM2608Read(sndti_token(SOUND_YM2608, 0),0));
//logerror("PC %04x: 2608 S0A=%02X\n",activecpu_get_pc(),ym2608_read(sndti_token(SOUND_YM2608, 0),0));
struct ym2608_info *info = sndti_token(SOUND_YM2608, 0);
return YM2608Read(info->chip,0);
return ym2608_read(info->chip,0);
}
READ8_HANDLER( YM2608_status_port_0_B_r )
READ8_HANDLER( ym2608_status_port_0_b_r )
{
//logerror("PC %04x: 2608 S0B=%02X\n",activecpu_get_pc(),YM2608Read(sndti_token(SOUND_YM2608, 0),2));
//logerror("PC %04x: 2608 S0B=%02X\n",activecpu_get_pc(),ym2608_read(sndti_token(SOUND_YM2608, 0),2));
struct ym2608_info *info = sndti_token(SOUND_YM2608, 0);
return YM2608Read(info->chip,2);
return ym2608_read(info->chip,2);
}
/************************************************/
/* Status Read for YM2608 - Chip 1 */
/************************************************/
READ8_HANDLER( YM2608_status_port_1_A_r ) {
READ8_HANDLER( ym2608_status_port_1_a_r ) {
struct ym2608_info *info = sndti_token(SOUND_YM2608, 1);
return YM2608Read(info->chip,0);
return ym2608_read(info->chip,0);
}
READ8_HANDLER( YM2608_status_port_1_B_r ) {
READ8_HANDLER( ym2608_status_port_1_b_r ) {
struct ym2608_info *info = sndti_token(SOUND_YM2608, 1);
return YM2608Read(info->chip,2);
return ym2608_read(info->chip,2);
}
/************************************************/
/* Port Read for YM2608 - Chip 0 */
/************************************************/
READ8_HANDLER( YM2608_read_port_0_r ){
READ8_HANDLER( ym2608_read_port_0_r ){
struct ym2608_info *info = sndti_token(SOUND_YM2608, 0);
return YM2608Read(info->chip,1);
return ym2608_read(info->chip,1);
}
/************************************************/
/* Port Read for YM2608 - Chip 1 */
/************************************************/
READ8_HANDLER( YM2608_read_port_1_r ){
READ8_HANDLER( ym2608_read_port_1_r ){
struct ym2608_info *info = sndti_token(SOUND_YM2608, 1);
return YM2608Read(info->chip,1);
return ym2608_read(info->chip,1);
}
/************************************************/
/* Control Write for YM2608 - Chip 0 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2608_control_port_0_A_w )
WRITE8_HANDLER( ym2608_control_port_0_a_w )
{
struct ym2608_info *info = sndti_token(SOUND_YM2608, 0);
YM2608Write(info->chip,0,data);
ym2608_write(info->chip,0,data);
}
WRITE8_HANDLER( YM2608_control_port_0_B_w )
WRITE8_HANDLER( ym2608_control_port_0_b_w )
{
struct ym2608_info *info = sndti_token(SOUND_YM2608, 0);
YM2608Write(info->chip,2,data);
ym2608_write(info->chip,2,data);
}
/************************************************/
/* Control Write for YM2608 - Chip 1 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2608_control_port_1_A_w ){
WRITE8_HANDLER( ym2608_control_port_1_a_w ){
struct ym2608_info *info = sndti_token(SOUND_YM2608, 1);
YM2608Write(info->chip,0,data);
ym2608_write(info->chip,0,data);
}
WRITE8_HANDLER( YM2608_control_port_1_B_w ){
WRITE8_HANDLER( ym2608_control_port_1_b_w ){
struct ym2608_info *info = sndti_token(SOUND_YM2608, 1);
YM2608Write(info->chip,2,data);
ym2608_write(info->chip,2,data);
}
/************************************************/
/* Data Write for YM2608 - Chip 0 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2608_data_port_0_A_w )
WRITE8_HANDLER( ym2608_data_port_0_a_w )
{
struct ym2608_info *info = sndti_token(SOUND_YM2608, 0);
YM2608Write(info->chip,1,data);
ym2608_write(info->chip,1,data);
}
WRITE8_HANDLER( YM2608_data_port_0_B_w )
WRITE8_HANDLER( ym2608_data_port_0_b_w )
{
struct ym2608_info *info = sndti_token(SOUND_YM2608, 0);
YM2608Write(info->chip,3,data);
ym2608_write(info->chip,3,data);
}
/************************************************/
/* Data Write for YM2608 - Chip 1 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2608_data_port_1_A_w ){
WRITE8_HANDLER( ym2608_data_port_1_a_w ){
struct ym2608_info *info = sndti_token(SOUND_YM2608, 1);
YM2608Write(info->chip,1,data);
ym2608_write(info->chip,1,data);
}
WRITE8_HANDLER( YM2608_data_port_1_B_w ){
WRITE8_HANDLER( ym2608_data_port_1_b_w ){
struct ym2608_info *info = sndti_token(SOUND_YM2608, 1);
YM2608Write(info->chip,3,data);
ym2608_write(info->chip,3,data);
}
/**************** end of file ****************/

30
src/emu/sound/2608intf.h
View File

@ -1,3 +1,5 @@
#pragma once
#ifndef __2608INTF_H__
#define __2608INTF_H__
@ -14,23 +16,23 @@ struct _ym2608_interface
/************************************************/
/* Chip 0 functions */
/************************************************/
READ8_HANDLER( YM2608_status_port_0_A_r );
READ8_HANDLER( YM2608_status_port_0_B_r );
READ8_HANDLER( YM2608_read_port_0_r );
WRITE8_HANDLER( YM2608_control_port_0_A_w );
WRITE8_HANDLER( YM2608_control_port_0_B_w );
WRITE8_HANDLER( YM2608_data_port_0_A_w );
WRITE8_HANDLER( YM2608_data_port_0_B_w );
READ8_HANDLER( ym2608_status_port_0_a_r );
READ8_HANDLER( ym2608_status_port_0_b_r );
READ8_HANDLER( ym2608_read_port_0_r );
WRITE8_HANDLER( ym2608_control_port_0_a_w );
WRITE8_HANDLER( ym2608_control_port_0_b_w );
WRITE8_HANDLER( ym2608_data_port_0_a_w );
WRITE8_HANDLER( ym2608_data_port_0_b_w );
/************************************************/
/* Chip 1 functions */
/************************************************/
READ8_HANDLER( YM2608_status_port_1_A_r );
READ8_HANDLER( YM2608_status_port_1_B_r );
READ8_HANDLER( YM2608_read_port_1_r );
WRITE8_HANDLER( YM2608_control_port_1_A_w );
WRITE8_HANDLER( YM2608_control_port_1_B_w );
WRITE8_HANDLER( YM2608_data_port_1_A_w );
WRITE8_HANDLER( YM2608_data_port_1_B_w );
READ8_HANDLER( ym2608_status_port_1_a_r );
READ8_HANDLER( ym2608_status_port_1_b_r );
READ8_HANDLER( ym2608_read_port_1_r );
WRITE8_HANDLER( ym2608_control_port_1_a_w );
WRITE8_HANDLER( ym2608_control_port_1_b_w );
WRITE8_HANDLER( ym2608_data_port_1_a_w );
WRITE8_HANDLER( ym2608_data_port_1_b_w );
#endif /* __2608INTF_H__ */

144
src/emu/sound/2610intf.c
View File

@ -73,13 +73,13 @@ static void IRQHandler(void *param,int irq)
static TIMER_CALLBACK( timer_callback_0 )
{
struct ym2610_info *info = ptr;
YM2610TimerOver(info->chip,0);
ym2610_timer_over(info->chip,0);
}
static TIMER_CALLBACK( timer_callback_1 )
{
struct ym2610_info *info = ptr;
YM2610TimerOver(info->chip,1);
ym2610_timer_over(info->chip,1);
}
static void timer_handler(void *param,int c,int count,int clock)
@ -99,7 +99,7 @@ static void timer_handler(void *param,int c,int count,int clock)
}
/* update request from fm.c */
void YM2610UpdateRequest(void *param)
void ym2610_update_request(void *param)
{
struct ym2610_info *info = param;
stream_update(info->stream);
@ -109,14 +109,14 @@ void YM2610UpdateRequest(void *param)
static void ym2610_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffers, int length)
{
struct ym2610_info *info = param;
YM2610UpdateOne(info->chip, buffers, length);
ym2610_update_one(info->chip, buffers, length);
}
static STATE_POSTLOAD( ym2610_postload )
static STATE_POSTLOAD( ym2610_intf_postload )
{
struct ym2610_info *info = param;
YM2610Postload(info->chip);
ym2610_postload(info->chip);
}
@ -165,11 +165,11 @@ static void *ym2610_start(const char *tag, int sndindex, int clock, const void *
}
/**** initialize YM2610 ****/
info->chip = YM2610Init(info,sndindex,clock,rate,
info->chip = ym2610_init(info,sndindex,clock,rate,
pcmbufa,pcmsizea,pcmbufb,pcmsizeb,
timer_handler,IRQHandler,&psgintf);
state_save_register_postload(Machine, ym2610_postload, info);
state_save_register_postload(Machine, ym2610_intf_postload, info);
if (info->chip)
return info;
@ -183,7 +183,7 @@ static void *ym2610_start(const char *tag, int sndindex, int clock, const void *
static void ym2610b_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffers, int length)
{
struct ym2610_info *info = param;
YM2610BUpdateOne(info->chip, buffers, length);
ym2610b_update_one(info->chip, buffers, length);
}
static void *ym2610b_start(const char *tag, int sndindex, int clock, const void *config)
@ -231,7 +231,7 @@ static void *ym2610b_start(const char *tag, int sndindex, int clock, const void
}
/**** initialize YM2610 ****/
info->chip = YM2610Init(info,sndindex,clock,rate,
info->chip = ym2610_init(info,sndindex,clock,rate,
pcmbufa,pcmsizea,pcmbufb,pcmsizeb,
timer_handler,IRQHandler,&psgintf);
if (info->chip)
@ -245,131 +245,131 @@ static void *ym2610b_start(const char *tag, int sndindex, int clock, const void
static void ym2610_stop(void *token)
{
struct ym2610_info *info = token;
YM2610Shutdown(info->chip);
ym2610_shutdown(info->chip);
ay8910_stop_ym(info->psg);
}
static void ym2610_reset(void *token)
{
struct ym2610_info *info = token;
YM2610ResetChip(info->chip);
ym2610_reset_chip(info->chip);
}
/************************************************/
/* Status Read for YM2610 - Chip 0 */
/************************************************/
READ8_HANDLER( YM2610_status_port_0_A_r )
READ8_HANDLER( ym2610_status_port_0_a_r )
{
//logerror("PC %04x: 2610 S0A=%02X\n",activecpu_get_pc(),YM2610Read(sndti_token(chip_type,0,0));
//logerror("PC %04x: 2610 S0A=%02X\n",activecpu_get_pc(),ym2610_read(sndti_token(chip_type,0,0));
struct ym2610_info *info = sndti_token(chip_type,0);
return YM2610Read(info->chip,0);
return ym2610_read(info->chip,0);
}
READ16_HANDLER( YM2610_status_port_0_A_lsb_r )
READ16_HANDLER( ym2610_status_port_0_a_lsb_r )
{
//logerror("PC %04x: 2610 S0A=%02X\n",activecpu_get_pc(),YM2610Read(sndti_token(chip_type,0,0));
//logerror("PC %04x: 2610 S0A=%02X\n",activecpu_get_pc(),ym2610_read(sndti_token(chip_type,0,0));
struct ym2610_info *info = sndti_token(chip_type,0);
return YM2610Read(info->chip,0);
return ym2610_read(info->chip,0);
}
READ8_HANDLER( YM2610_status_port_0_B_r )
READ8_HANDLER( ym2610_status_port_0_b_r )
{
//logerror("PC %04x: 2610 S0B=%02X\n",activecpu_get_pc(),YM2610Read(sndti_token(chip_type,0,2));
//logerror("PC %04x: 2610 S0B=%02X\n",activecpu_get_pc(),ym2610_read(sndti_token(chip_type,0,2));
struct ym2610_info *info = sndti_token(chip_type,0);
return YM2610Read(info->chip,2);
return ym2610_read(info->chip,2);
}
READ16_HANDLER( YM2610_status_port_0_B_lsb_r )
READ16_HANDLER( ym2610_status_port_0_b_lsb_r )
{
//logerror("PC %04x: 2610 S0B=%02X\n",activecpu_get_pc(),YM2610Read(sndti_token(chip_type,0,2));
//logerror("PC %04x: 2610 S0B=%02X\n",activecpu_get_pc(),ym2610_read(sndti_token(chip_type,0,2));
struct ym2610_info *info = sndti_token(chip_type,0);
return YM2610Read(info->chip,2);
return ym2610_read(info->chip,2);
}
/************************************************/
/* Status Read for YM2610 - Chip 1 */
/************************************************/
READ8_HANDLER( YM2610_status_port_1_A_r ) {
READ8_HANDLER( ym2610_status_port_1_a_r ) {
struct ym2610_info *info = sndti_token(chip_type,1);
return YM2610Read(info->chip,0);
return ym2610_read(info->chip,0);
}
READ16_HANDLER( YM2610_status_port_1_A_lsb_r ) {
READ16_HANDLER( ym2610_status_port_1_a_lsb_r ) {
struct ym2610_info *info = sndti_token(chip_type,1);
return YM2610Read(info->chip,0);
return ym2610_read(info->chip,0);
}
READ8_HANDLER( YM2610_status_port_1_B_r ) {
READ8_HANDLER( ym2610_status_port_1_b_r ) {
struct ym2610_info *info = sndti_token(chip_type,1);
return YM2610Read(info->chip,2);
return ym2610_read(info->chip,2);
}
READ16_HANDLER( YM2610_status_port_1_B_lsb_r ) {
READ16_HANDLER( ym2610_status_port_1_b_lsb_r ) {
struct ym2610_info *info = sndti_token(chip_type,1);
return YM2610Read(info->chip,2);
return ym2610_read(info->chip,2);
}
/************************************************/
/* Port Read for YM2610 - Chip 0 */
/************************************************/
READ8_HANDLER( YM2610_read_port_0_r ){
READ8_HANDLER( ym2610_read_port_0_r ){
struct ym2610_info *info = sndti_token(chip_type,0);
return YM2610Read(info->chip,1);
return ym2610_read(info->chip,1);
}
READ16_HANDLER( YM2610_read_port_0_lsb_r ){
READ16_HANDLER( ym2610_read_port_0_lsb_r ){
struct ym2610_info *info = sndti_token(chip_type,0);
return YM2610Read(info->chip,1);
return ym2610_read(info->chip,1);
}
/************************************************/
/* Port Read for YM2610 - Chip 1 */
/************************************************/
READ8_HANDLER( YM2610_read_port_1_r ){
READ8_HANDLER( ym2610_read_port_1_r ){
struct ym2610_info *info = sndti_token(chip_type,1);
return YM2610Read(info->chip,1);
return ym2610_read(info->chip,1);
}
READ16_HANDLER( YM2610_read_port_1_lsb_r ){
READ16_HANDLER( ym2610_read_port_1_lsb_r ){
struct ym2610_info *info = sndti_token(chip_type,1);
return YM2610Read(info->chip,1);
return ym2610_read(info->chip,1);
}
/************************************************/
/* Control Write for YM2610 - Chip 0 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2610_control_port_0_A_w )
WRITE8_HANDLER( ym2610_control_port_0_a_w )
{
//logerror("PC %04x: 2610 Reg A %02X",activecpu_get_pc(),data);
struct ym2610_info *info = sndti_token(chip_type,0);
YM2610Write(info->chip,0,data);
ym2610_write(info->chip,0,data);
}
WRITE16_HANDLER( YM2610_control_port_0_A_lsb_w )
WRITE16_HANDLER( ym2610_control_port_0_a_lsb_w )
{
//logerror("PC %04x: 2610 Reg A %02X",activecpu_get_pc(),data);
if (ACCESSING_BITS_0_7)
{
struct ym2610_info *info = sndti_token(chip_type,0);
YM2610Write(info->chip,0,data);
ym2610_write(info->chip,0,data);
}
}
WRITE8_HANDLER( YM2610_control_port_0_B_w )
WRITE8_HANDLER( ym2610_control_port_0_b_w )
{
//logerror("PC %04x: 2610 Reg B %02X",activecpu_get_pc(),data);
struct ym2610_info *info = sndti_token(chip_type,0);
YM2610Write(info->chip,2,data);
ym2610_write(info->chip,2,data);
}
WRITE16_HANDLER( YM2610_control_port_0_B_lsb_w )
WRITE16_HANDLER( ym2610_control_port_0_b_lsb_w )
{
//logerror("PC %04x: 2610 Reg B %02X",activecpu_get_pc(),data);
if (ACCESSING_BITS_0_7)
{
struct ym2610_info *info = sndti_token(chip_type,0);
YM2610Write(info->chip,2,data);
ym2610_write(info->chip,2,data);
}
}
@ -377,29 +377,29 @@ WRITE16_HANDLER( YM2610_control_port_0_B_lsb_w )
/* Control Write for YM2610 - Chip 1 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2610_control_port_1_A_w ){
WRITE8_HANDLER( ym2610_control_port_1_a_w ){
struct ym2610_info *info = sndti_token(chip_type,1);
YM2610Write(info->chip,0,data);
ym2610_write(info->chip,0,data);
}
WRITE16_HANDLER( YM2610_control_port_1_A_lsb_w ){
WRITE16_HANDLER( ym2610_control_port_1_a_lsb_w ){
if (ACCESSING_BITS_0_7)
{
struct ym2610_info *info = sndti_token(chip_type,1);
YM2610Write(info->chip,0,data);
ym2610_write(info->chip,0,data);
}
}
WRITE8_HANDLER( YM2610_control_port_1_B_w ){
WRITE8_HANDLER( ym2610_control_port_1_b_w ){
struct ym2610_info *info = sndti_token(chip_type,1);
YM2610Write(info->chip,2,data);
ym2610_write(info->chip,2,data);
}
WRITE16_HANDLER( YM2610_control_port_1_B_lsb_w ){
WRITE16_HANDLER( ym2610_control_port_1_b_lsb_w ){
if (ACCESSING_BITS_0_7)
{
struct ym2610_info *info = sndti_token(chip_type,1);
YM2610Write(info->chip,2,data);
ym2610_write(info->chip,2,data);
}
}
@ -407,37 +407,37 @@ WRITE16_HANDLER( YM2610_control_port_1_B_lsb_w ){
/* Data Write for YM2610 - Chip 0 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2610_data_port_0_A_w )
WRITE8_HANDLER( ym2610_data_port_0_a_w )
{
//logerror(" =%02X\n",data);
struct ym2610_info *info = sndti_token(chip_type,0);
YM2610Write(info->chip,1,data);
ym2610_write(info->chip,1,data);
}
WRITE16_HANDLER( YM2610_data_port_0_A_lsb_w )
WRITE16_HANDLER( ym2610_data_port_0_a_lsb_w )
{
//logerror(" =%02X\n",data);
if (ACCESSING_BITS_0_7)
{
struct ym2610_info *info = sndti_token(chip_type,0);
YM2610Write(info->chip,1,data);
ym2610_write(info->chip,1,data);
}
}
WRITE8_HANDLER( YM2610_data_port_0_B_w )
WRITE8_HANDLER( ym2610_data_port_0_b_w )
{
//logerror(" =%02X\n",data);
struct ym2610_info *info = sndti_token(chip_type,0);
YM2610Write(info->chip,3,data);
ym2610_write(info->chip,3,data);
}
WRITE16_HANDLER( YM2610_data_port_0_B_lsb_w )
WRITE16_HANDLER( ym2610_data_port_0_b_lsb_w )
{
//logerror(" =%02X\n",data);
if (ACCESSING_BITS_0_7)
{
struct ym2610_info *info = sndti_token(chip_type,0);
YM2610Write(info->chip,3,data);
ym2610_write(info->chip,3,data);
}
}
@ -445,29 +445,29 @@ WRITE16_HANDLER( YM2610_data_port_0_B_lsb_w )
/* Data Write for YM2610 - Chip 1 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2610_data_port_1_A_w ){
WRITE8_HANDLER( ym2610_data_port_1_a_w ){
struct ym2610_info *info = sndti_token(chip_type,1);
YM2610Write(info->chip,1,data);
ym2610_write(info->chip,1,data);
}
WRITE16_HANDLER( YM2610_data_port_1_A_lsb_w ){
WRITE16_HANDLER( ym2610_data_port_1_a_lsb_w ){
if (ACCESSING_BITS_0_7)
{
struct ym2610_info *info = sndti_token(chip_type,1);
YM2610Write(info->chip,1,data);
ym2610_write(info->chip,1,data);
}
}
WRITE8_HANDLER( YM2610_data_port_1_B_w ){
WRITE8_HANDLER( ym2610_data_port_1_b_w ){
struct ym2610_info *info = sndti_token(chip_type,1);
YM2610Write(info->chip,3,data);
ym2610_write(info->chip,3,data);
}
WRITE16_HANDLER( YM2610_data_port_1_B_lsb_w ){
WRITE16_HANDLER( ym2610_data_port_1_b_lsb_w ){
if (ACCESSING_BITS_0_7)
{
struct ym2610_info *info = sndti_token(chip_type,1);
YM2610Write(info->chip,3,data);
ym2610_write(info->chip,3,data);
}
}

62
src/emu/sound/2610intf.h
View File

@ -1,8 +1,11 @@
#pragma once
#ifndef __2610INTF_H__
#define __2610INTF_H__
#include "fm.h"
typedef struct _ym2610_interface ym2610_interface;
struct _ym2610_interface
{
@ -12,38 +15,37 @@ struct _ym2610_interface
/************************************************/
/* Chip 0 functions */
/************************************************/
READ8_HANDLER( YM2610_status_port_0_A_r );
READ16_HANDLER( YM2610_status_port_0_A_lsb_r );
READ8_HANDLER( YM2610_status_port_0_B_r );
READ16_HANDLER( YM2610_status_port_0_B_lsb_r );
READ8_HANDLER( YM2610_read_port_0_r );
READ16_HANDLER( YM2610_read_port_0_lsb_r );
WRITE8_HANDLER( YM2610_control_port_0_A_w );
WRITE16_HANDLER( YM2610_control_port_0_A_lsb_w );
WRITE8_HANDLER( YM2610_control_port_0_B_w );
WRITE16_HANDLER( YM2610_control_port_0_B_lsb_w );
WRITE8_HANDLER( YM2610_data_port_0_A_w );
WRITE16_HANDLER( YM2610_data_port_0_A_lsb_w );
WRITE8_HANDLER( YM2610_data_port_0_B_w );
WRITE16_HANDLER( YM2610_data_port_0_B_lsb_w );
READ8_HANDLER( ym2610_status_port_0_a_r );
READ16_HANDLER( ym2610_status_port_0_a_lsb_r );
READ8_HANDLER( ym2610_status_port_0_b_r );
READ16_HANDLER( ym2610_status_port_0_b_lsb_r );
READ8_HANDLER( ym2610_read_port_0_r );
READ16_HANDLER( ym2610_read_port_0_lsb_r );
WRITE8_HANDLER( ym2610_control_port_0_a_w );
WRITE16_HANDLER( ym2610_control_port_0_a_lsb_w );
WRITE8_HANDLER( ym2610_control_port_0_b_w );
WRITE16_HANDLER( ym2610_control_port_0_b_lsb_w );
WRITE8_HANDLER( ym2610_data_port_0_a_w );
WRITE16_HANDLER( ym2610_data_port_0_a_lsb_w );
WRITE8_HANDLER( ym2610_data_port_0_b_w );
WRITE16_HANDLER( ym2610_data_port_0_b_lsb_w );
/************************************************/
/* Chip 1 functions */
/************************************************/
READ8_HANDLER( YM2610_status_port_1_A_r );
READ16_HANDLER( YM2610_status_port_1_A_lsb_r );
READ8_HANDLER( YM2610_status_port_1_B_r );
READ16_HANDLER( YM2610_status_port_1_B_lsb_r );
READ8_HANDLER( YM2610_read_port_1_r );
READ16_HANDLER( YM2610_read_port_1_lsb_r );
WRITE8_HANDLER( YM2610_control_port_1_A_w );
WRITE16_HANDLER( YM2610_control_port_1_A_lsb_w );
WRITE8_HANDLER( YM2610_control_port_1_B_w );
WRITE16_HANDLER( YM2610_control_port_1_B_lsb_w );
WRITE8_HANDLER( YM2610_data_port_1_A_w );
WRITE16_HANDLER( YM2610_data_port_1_A_lsb_w );
WRITE8_HANDLER( YM2610_data_port_1_B_w );
WRITE16_HANDLER( YM2610_data_port_1_B_lsb_w );
READ8_HANDLER( ym2610_status_port_1_a_r );
READ16_HANDLER( ym2610_status_port_1_a_lsb_r );
READ8_HANDLER( ym2610_status_port_1_b_r );
READ16_HANDLER( ym2610_status_port_1_b_lsb_r );
READ8_HANDLER( ym2610_read_port_1_r );
READ16_HANDLER( ym2610_read_port_1_lsb_r );
WRITE8_HANDLER( ym2610_control_port_1_a_w );
WRITE16_HANDLER( ym2610_control_port_1_a_lsb_w );
WRITE8_HANDLER( ym2610_control_port_1_b_w );
WRITE16_HANDLER( ym2610_control_port_1_b_lsb_w );
WRITE8_HANDLER( ym2610_data_port_1_a_w );
WRITE16_HANDLER( ym2610_data_port_1_a_lsb_w );
WRITE8_HANDLER( ym2610_data_port_1_b_w );
WRITE16_HANDLER( ym2610_data_port_1_b_lsb_w );
#endif
/**************** end of file ****************/
#endif /* __2610INTF_H__ */

132
src/emu/sound/2612intf.c
View File

@ -38,13 +38,13 @@ static void IRQHandler(void *param,int irq)
static TIMER_CALLBACK( timer_callback_2612_0 )
{
struct ym2612_info *info = ptr;
YM2612TimerOver(info->chip,0);
ym2612_timer_over(info->chip,0);
}
static TIMER_CALLBACK( timer_callback_2612_1 )
{
struct ym2612_info *info = ptr;
YM2612TimerOver(info->chip,1);
ym2612_timer_over(info->chip,1);
}
static void timer_handler(void *param,int c,int count,int clock)
@ -63,7 +63,7 @@ static void timer_handler(void *param,int c,int count,int clock)
}
/* update request from fm.c */
void YM2612UpdateRequest(void *param)
void ym2612_update_request(void *param)
{
struct ym2612_info *info = param;
stream_update(info->stream);
@ -76,14 +76,14 @@ void YM2612UpdateRequest(void *param)
static void ym2612_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffers, int length)
{
struct ym2612_info *info = param;
YM2612UpdateOne(info->chip, buffers, length);
ym2612_update_one(info->chip, buffers, length);
}
static STATE_POSTLOAD( ym2612_postload )
static STATE_POSTLOAD( ym2612_intf_postload )
{
struct ym2612_info *info = param;
YM2612Postload(info->chip);
ym2612_postload(info->chip);
}
@ -107,9 +107,9 @@ static void *ym2612_start(const char *tag, int sndindex, int clock, const void *
info->stream = stream_create(0,2,rate,info,ym2612_stream_update);
/**** initialize YM2612 ****/
info->chip = YM2612Init(info,sndindex,clock,rate,timer_handler,IRQHandler);
info->chip = ym2612_init(info,sndindex,clock,rate,timer_handler,IRQHandler);
state_save_register_postload(Machine, ym2612_postload, info);
state_save_register_postload(Machine, ym2612_intf_postload, info);
if (info->chip)
return info;
@ -121,117 +121,117 @@ static void *ym2612_start(const char *tag, int sndindex, int clock, const void *
static void ym2612_stop(void *token)
{
struct ym2612_info *info = token;
YM2612Shutdown(info->chip);
ym2612_shutdown(info->chip);
}
static void ym2612_reset(void *token)
{
struct ym2612_info *info = token;
YM2612ResetChip(info->chip);
ym2612_reset_chip(info->chip);
}
/************************************************/
/* Status Read for YM2612 - Chip 0 */
/************************************************/
READ8_HANDLER( YM2612_status_port_0_A_r )
READ8_HANDLER( ym2612_status_port_0_a_r )
{
struct ym2612_info *info = sndti_token(SOUND_YM2612,0);
return YM2612Read(info->chip,0);
return ym2612_read(info->chip,0);
}
READ8_HANDLER( YM2612_status_port_0_B_r )
READ8_HANDLER( ym2612_status_port_0_b_r )
{
struct ym2612_info *info = sndti_token(SOUND_YM2612,0);
return YM2612Read(info->chip,2);
return ym2612_read(info->chip,2);
}
/************************************************/
/* Status Read for YM2612 - Chip 1 */
/************************************************/
READ8_HANDLER( YM2612_status_port_1_A_r ) {
READ8_HANDLER( ym2612_status_port_1_a_r ) {
struct ym2612_info *info = sndti_token(SOUND_YM2612,1);
return YM2612Read(info->chip,0);
return ym2612_read(info->chip,0);
}
READ8_HANDLER( YM2612_status_port_1_B_r ) {
READ8_HANDLER( ym2612_status_port_1_b_r ) {
struct ym2612_info *info = sndti_token(SOUND_YM2612,1);
return YM2612Read(info->chip,2);
return ym2612_read(info->chip,2);
}
/************************************************/
/* Port Read for YM2612 - Chip 0 */
/************************************************/
READ8_HANDLER( YM2612_read_port_0_r ){
READ8_HANDLER( ym2612_read_port_0_r ){
struct ym2612_info *info = sndti_token(SOUND_YM2612,0);
return YM2612Read(info->chip,1);
return ym2612_read(info->chip,1);
}
/************************************************/
/* Port Read for YM2612 - Chip 1 */
/************************************************/
READ8_HANDLER( YM2612_read_port_1_r ){
READ8_HANDLER( ym2612_read_port_1_r ){
struct ym2612_info *info = sndti_token(SOUND_YM2612,1);
return YM2612Read(info->chip,1);
return ym2612_read(info->chip,1);
}
/************************************************/
/* Control Write for YM2612 - Chip 0 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2612_control_port_0_A_w )
WRITE8_HANDLER( ym2612_control_port_0_a_w )
{
struct ym2612_info *info = sndti_token(SOUND_YM2612,0);
YM2612Write(info->chip,0,data);
ym2612_write(info->chip,0,data);
}
WRITE8_HANDLER( YM2612_control_port_0_B_w )
WRITE8_HANDLER( ym2612_control_port_0_b_w )
{
struct ym2612_info *info = sndti_token(SOUND_YM2612,0);
YM2612Write(info->chip,2,data);
ym2612_write(info->chip,2,data);
}
/************************************************/
/* Control Write for YM2612 - Chip 1 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2612_control_port_1_A_w ){
WRITE8_HANDLER( ym2612_control_port_1_a_w ){
struct ym2612_info *info = sndti_token(SOUND_YM2612,1);
YM2612Write(info->chip,0,data);
ym2612_write(info->chip,0,data);
}
WRITE8_HANDLER( YM2612_control_port_1_B_w ){
WRITE8_HANDLER( ym2612_control_port_1_b_w ){
struct ym2612_info *info = sndti_token(SOUND_YM2612,1);
YM2612Write(info->chip,2,data);
ym2612_write(info->chip,2,data);
}
/************************************************/
/* Data Write for YM2612 - Chip 0 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2612_data_port_0_A_w )
WRITE8_HANDLER( ym2612_data_port_0_a_w )
{
struct ym2612_info *info = sndti_token(SOUND_YM2612,0);
YM2612Write(info->chip,1,data);
ym2612_write(info->chip,1,data);
}
WRITE8_HANDLER( YM2612_data_port_0_B_w )
WRITE8_HANDLER( ym2612_data_port_0_b_w )
{
struct ym2612_info *info = sndti_token(SOUND_YM2612,0);
YM2612Write(info->chip,3,data);
ym2612_write(info->chip,3,data);
}
/************************************************/
/* Data Write for YM2612 - Chip 1 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM2612_data_port_1_A_w ){
WRITE8_HANDLER( ym2612_data_port_1_a_w ){
struct ym2612_info *info = sndti_token(SOUND_YM2612,1);
YM2612Write(info->chip,1,data);
ym2612_write(info->chip,1,data);
}
WRITE8_HANDLER( YM2612_data_port_1_B_w ){
WRITE8_HANDLER( ym2612_data_port_1_b_w ){
struct ym2612_info *info = sndti_token(SOUND_YM2612,1);
YM2612Write(info->chip,3,data);
ym2612_write(info->chip,3,data);
}
#if BUILD_YM3438
@ -239,104 +239,104 @@ WRITE8_HANDLER( YM2612_data_port_1_B_w ){
/************************************************/
/* Status Read for YM3438 - Chip 0 */
/************************************************/
READ8_HANDLER( YM3438_status_port_0_A_r )
READ8_HANDLER( ym3438_status_port_0_a_r )
{
struct ym2612_info *info = sndti_token(SOUND_YM3438,0);
return YM2612Read(info->chip,0);
return ym2612_read(info->chip,0);
}
READ8_HANDLER( YM3438_status_port_0_B_r )
READ8_HANDLER( ym3438_status_port_0_b_r )
{
struct ym2612_info *info = sndti_token(SOUND_YM3438,0);
return YM2612Read(info->chip,2);
return ym2612_read(info->chip,2);
}
/************************************************/
/* Status Read for YM3438 - Chip 1 */
/************************************************/
READ8_HANDLER( YM3438_status_port_1_A_r ) {
READ8_HANDLER( ym3438_status_port_1_a_r ) {
struct ym2612_info *info = sndti_token(SOUND_YM3438,1);
return YM2612Read(info->chip,0);
return ym2612_read(info->chip,0);
}
READ8_HANDLER( YM3438_status_port_1_B_r ) {
READ8_HANDLER( ym3438_status_port_1_b_r ) {
struct ym2612_info *info = sndti_token(SOUND_YM3438,1);
return YM2612Read(info->chip,2);
return ym2612_read(info->chip,2);
}
/************************************************/
/* Port Read for YM3438 - Chip 0 */
/************************************************/
READ8_HANDLER( YM3438_read_port_0_r ){
READ8_HANDLER( ym3438_read_port_0_r ){
struct ym2612_info *info = sndti_token(SOUND_YM3438,0);
return YM2612Read(info->chip,1);
return ym2612_read(info->chip,1);
}
/************************************************/
/* Port Read for YM3438 - Chip 1 */
/************************************************/
READ8_HANDLER( YM3438_read_port_1_r ){
READ8_HANDLER( ym3438_read_port_1_r ){
struct ym2612_info *info = sndti_token(SOUND_YM3438,1);
return YM2612Read(info->chip,1);
return ym2612_read(info->chip,1);
}
/************************************************/
/* Control Write for YM3438 - Chip 0 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM3438_control_port_0_A_w )
WRITE8_HANDLER( ym3438_control_port_0_a_w )
{
struct ym2612_info *info = sndti_token(SOUND_YM3438,0);
YM2612Write(info->chip,0,data);
ym2612_write(info->chip,0,data);
}
WRITE8_HANDLER( YM3438_control_port_0_B_w )
WRITE8_HANDLER( ym3438_control_port_0_b_w )
{
struct ym2612_info *info = sndti_token(SOUND_YM3438,0);
YM2612Write(info->chip,2,data);
ym2612_write(info->chip,2,data);
}
/************************************************/
/* Control Write for YM3438 - Chip 1 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM3438_control_port_1_A_w ){
WRITE8_HANDLER( ym3438_control_port_1_a_w ){
struct ym2612_info *info = sndti_token(SOUND_YM3438,1);
YM2612Write(info->chip,0,data);
ym2612_write(info->chip,0,data);
}
WRITE8_HANDLER( YM3438_control_port_1_B_w ){
WRITE8_HANDLER( ym3438_control_port_1_b_w ){
struct ym2612_info *info = sndti_token(SOUND_YM3438,1);
YM2612Write(info->chip,2,data);
ym2612_write(info->chip,2,data);
}
/************************************************/
/* Data Write for YM3438 - Chip 0 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM3438_data_port_0_A_w )
WRITE8_HANDLER( ym3438_data_port_0_a_w )
{
struct ym2612_info *info = sndti_token(SOUND_YM3438,0);
YM2612Write(info->chip,1,data);
ym2612_write(info->chip,1,data);
}
WRITE8_HANDLER( YM3438_data_port_0_B_w )
WRITE8_HANDLER( ym3438_data_port_0_b_w )
{
struct ym2612_info *info = sndti_token(SOUND_YM3438,0);
YM2612Write(info->chip,3,data);
ym2612_write(info->chip,3,data);
}
/************************************************/
/* Data Write for YM3438 - Chip 1 */
/* Consists of 2 addresses */
/************************************************/
WRITE8_HANDLER( YM3438_data_port_1_A_w ){
WRITE8_HANDLER( ym3438_data_port_1_a_w ){
struct ym2612_info *info = sndti_token(SOUND_YM3438,1);
YM2612Write(info->chip,1,data);
ym2612_write(info->chip,1,data);
}
WRITE8_HANDLER( YM3438_data_port_1_B_w ){
WRITE8_HANDLER( ym3438_data_port_1_b_w ){
struct ym2612_info *info = sndti_token(SOUND_YM3438,1);
YM2612Write(info->chip,3,data);
ym2612_write(info->chip,3,data);
}
#endif

64
src/emu/sound/2612intf.h
View File

@ -1,3 +1,5 @@
#pragma once
#ifndef __2612INTF_H__
#define __2612INTF_H__
@ -11,28 +13,29 @@ struct _ym2612_interface
/************************************************/
/* Chip 0 functions */
/************************************************/
READ8_HANDLER( YM2612_status_port_0_A_r ); /* A=0 : OPN status */
READ8_HANDLER( YM2612_status_port_0_B_r ); /* A=2 : don't care */
READ8_HANDLER( YM2612_read_port_0_r ); /* A=1 : don't care */
WRITE8_HANDLER( YM2612_control_port_0_A_w ); /* A=0:OPN address */
WRITE8_HANDLER( YM2612_control_port_0_B_w ); /* A=2:OPN2 address */
WRITE8_HANDLER( YM2612_data_port_0_A_w ); /* A=1:OPN data */
WRITE8_HANDLER( YM2612_data_port_0_B_w ); /* A=3:OPN2 data */
READ8_HANDLER( ym2612_status_port_0_a_r ); /* A=0 : OPN status */
READ8_HANDLER( ym2612_status_port_0_b_r ); /* A=2 : don't care */
READ8_HANDLER( ym2612_read_port_0_r ); /* A=1 : don't care */
WRITE8_HANDLER( ym2612_control_port_0_a_w ); /* A=0:OPN address */
WRITE8_HANDLER( ym2612_control_port_0_b_w ); /* A=2:OPN2 address */
WRITE8_HANDLER( ym2612_data_port_0_a_w ); /* A=1:OPN data */
WRITE8_HANDLER( ym2612_data_port_0_b_w ); /* A=3:OPN2 data */
/************************************************/
/* Chip 1 functions */
/************************************************/
READ8_HANDLER( YM2612_status_port_1_A_r );
READ8_HANDLER( YM2612_status_port_1_B_r );
READ8_HANDLER( YM2612_read_port_1_r );
WRITE8_HANDLER( YM2612_control_port_1_A_w );
WRITE8_HANDLER( YM2612_control_port_1_B_w );
WRITE8_HANDLER( YM2612_data_port_1_A_w );
WRITE8_HANDLER( YM2612_data_port_1_B_w );
READ8_HANDLER( ym2612_status_port_1_a_r );
READ8_HANDLER( ym2612_status_port_1_b_r );
READ8_HANDLER( ym2612_read_port_1_r );
WRITE8_HANDLER( ym2612_control_port_1_a_w );
WRITE8_HANDLER( ym2612_control_port_1_b_w );
WRITE8_HANDLER( ym2612_data_port_1_a_w );
WRITE8_HANDLER( ym2612_data_port_1_b_w );
struct YM3438interface
typedef struct _ym3438_interface ym3438_interface;
struct _ym3438_interface
{
void (*handler)(running_machine *machine, int irq);
};
@ -41,25 +44,24 @@ struct YM3438interface
/************************************************/
/* Chip 0 functions */
/************************************************/
READ8_HANDLER( YM3438_status_port_0_A_r ); /* A=0 : OPN status */
READ8_HANDLER( YM3438_status_port_0_B_r ); /* A=2 : don't care */
READ8_HANDLER( YM3438_read_port_0_r ); /* A=1 : don't care */
WRITE8_HANDLER( YM3438_control_port_0_A_w ); /* A=0:OPN address */
WRITE8_HANDLER( YM3438_control_port_0_B_w ); /* A=2:OPN2 address */
WRITE8_HANDLER( YM3438_data_port_0_A_w ); /* A=1:OPN data */
WRITE8_HANDLER( YM3438_data_port_0_B_w ); /* A=3:OPN2 data */
READ8_HANDLER( ym3438_status_port_0_a_r ); /* A=0 : OPN status */
READ8_HANDLER( ym3438_status_port_0_b_r ); /* A=2 : don't care */
READ8_HANDLER( ym3438_read_port_0_r ); /* A=1 : don't care */
WRITE8_HANDLER( ym3438_control_port_0_a_w ); /* A=0:OPN address */
WRITE8_HANDLER( ym3438_control_port_0_b_w ); /* A=2:OPN2 address */
WRITE8_HANDLER( ym3438_data_port_0_a_w ); /* A=1:OPN data */
WRITE8_HANDLER( ym3438_data_port_0_b_w ); /* A=3:OPN2 data */
/************************************************/
/* Chip 1 functions */
/************************************************/
READ8_HANDLER( YM3438_status_port_1_A_r );
READ8_HANDLER( YM3438_status_port_1_B_r );
READ8_HANDLER( YM3438_read_port_1_r );
WRITE8_HANDLER( YM3438_control_port_1_A_w );
WRITE8_HANDLER( YM3438_control_port_1_B_w );
WRITE8_HANDLER( YM3438_data_port_1_A_w );
WRITE8_HANDLER( YM3438_data_port_1_B_w );
READ8_HANDLER( ym3438_status_port_1_a_r );
READ8_HANDLER( ym3438_status_port_1_b_r );
READ8_HANDLER( ym3438_read_port_1_r );
WRITE8_HANDLER( ym3438_control_port_1_a_w );
WRITE8_HANDLER( ym3438_control_port_1_b_w );
WRITE8_HANDLER( ym3438_data_port_1_a_w );
WRITE8_HANDLER( ym3438_data_port_1_b_w );
#endif
/**************** end of file ****************/
#endif /* __2612INTF_H__ */

58
src/emu/sound/262intf.c
View File

@ -32,13 +32,13 @@ static void IRQHandler_262(void *param,int irq)
static TIMER_CALLBACK( timer_callback_262_0 )
{
struct ymf262_info *info = ptr;
YMF262TimerOver(info->chip, 0);
ymf262_timer_over(info->chip, 0);
}
static TIMER_CALLBACK( timer_callback_262_1 )
{
struct ymf262_info *info = ptr;
YMF262TimerOver(info->chip, 1);
ymf262_timer_over(info->chip, 1);
}
static void timer_handler_262(void *param,int timer, attotime period)
@ -57,7 +57,7 @@ static void timer_handler_262(void *param,int timer, attotime period)
static void ymf262_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffers, int length)
{
struct ymf262_info *info = param;
YMF262UpdateOne(info->chip, buffers, length);
ymf262_update_one(info->chip, buffers, length);
}
static void _stream_update(void *param, int interval)
@ -79,16 +79,16 @@ static void *ymf262_start(const char *tag, int sndindex, int clock, const void *
info->intf = config ? config : &dummy;
/* stream system initialize */
info->chip = YMF262Init(clock,rate);
info->chip = ymf262_init(clock,rate);
if (info->chip == NULL)
return NULL;
info->stream = stream_create(0,4,rate,info,ymf262_stream_update);
/* YMF262 setup */
YMF262SetTimerHandler (info->chip, timer_handler_262, info);
YMF262SetIRQHandler (info->chip, IRQHandler_262, info);
YMF262SetUpdateHandler(info->chip, _stream_update, info);
ymf262_set_timer_handler (info->chip, timer_handler_262, info);
ymf262_set_irq_handler (info->chip, IRQHandler_262, info);
ymf262_set_update_handler(info->chip, _stream_update, info);
info->timer[0] = timer_alloc(timer_callback_262_0, info);
info->timer[1] = timer_alloc(timer_callback_262_1, info);
@ -99,58 +99,58 @@ static void *ymf262_start(const char *tag, int sndindex, int clock, const void *
static void ymf262_stop(void *token)
{
struct ymf262_info *info = token;
YMF262Shutdown(info->chip);
ymf262_shutdown(info->chip);
}
/* reset */
static void ymf262_reset(void *token)
{
struct ymf262_info *info = token;
YMF262ResetChip(info->chip);
ymf262_reset_chip(info->chip);
}
/* chip #0 */
READ8_HANDLER( YMF262_status_0_r ) {
READ8_HANDLER( ymf262_status_0_r ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 0);
return YMF262Read(info->chip, 0);
return ymf262_read(info->chip, 0);
}
WRITE8_HANDLER( YMF262_register_A_0_w ) {
WRITE8_HANDLER( ymf262_register_a_0_w ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 0);
YMF262Write(info->chip, 0, data);
ymf262_write(info->chip, 0, data);
}
WRITE8_HANDLER( YMF262_data_A_0_w ) {
WRITE8_HANDLER( ymf262_data_a_0_w ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 0);
YMF262Write(info->chip, 1, data);
ymf262_write(info->chip, 1, data);
}
WRITE8_HANDLER( YMF262_register_B_0_w ) {
WRITE8_HANDLER( ymf262_register_b_0_w ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 0);
YMF262Write(info->chip, 2, data);
ymf262_write(info->chip, 2, data);
}
WRITE8_HANDLER( YMF262_data_B_0_w ) {
WRITE8_HANDLER( ymf262_data_b_0_w ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 0);
YMF262Write(info->chip, 3, data);
ymf262_write(info->chip, 3, data);
}
/* chip #1 */
READ8_HANDLER( YMF262_status_1_r ) {
READ8_HANDLER( ymf262_status_1_r ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 1);
return YMF262Read(info->chip, 0);
return ymf262_read(info->chip, 0);
}
WRITE8_HANDLER( YMF262_register_A_1_w ) {
WRITE8_HANDLER( ymf262_register_a_1_w ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 1);
YMF262Write(info->chip, 0, data);
ymf262_write(info->chip, 0, data);
}
WRITE8_HANDLER( YMF262_data_A_1_w ) {
WRITE8_HANDLER( ymf262_data_a_1_w ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 1);
YMF262Write(info->chip, 1, data);
ymf262_write(info->chip, 1, data);
}
WRITE8_HANDLER( YMF262_register_B_1_w ) {
WRITE8_HANDLER( ymf262_register_b_1_w ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 1);
YMF262Write(info->chip, 2, data);
ymf262_write(info->chip, 2, data);
}
WRITE8_HANDLER( YMF262_data_B_1_w ) {
WRITE8_HANDLER( ymf262_data_b_1_w ) {
struct ymf262_info *info = sndti_token(SOUND_YMF262, 1);
YMF262Write(info->chip, 3, data);
ymf262_write(info->chip, 3, data);
}

28
src/emu/sound/262intf.h
View File

@ -1,5 +1,7 @@
#ifndef YMF262INTF_H
#define YMF262INTF_H
#pragma once
#ifndef __262INTF_H__
#define __262INTF_H__
typedef struct _ymf262_interface ymf262_interface;
@ -11,18 +13,18 @@ struct _ymf262_interface
/* YMF262 */
READ8_HANDLER ( YMF262_status_0_r );
WRITE8_HANDLER( YMF262_register_A_0_w );
WRITE8_HANDLER( YMF262_register_B_0_w );
WRITE8_HANDLER( YMF262_data_A_0_w );
WRITE8_HANDLER( YMF262_data_B_0_w );
READ8_HANDLER ( ymf262_status_0_r );
WRITE8_HANDLER( ymf262_register_a_0_w );
WRITE8_HANDLER( ymf262_register_b_0_w );
WRITE8_HANDLER( ymf262_data_a_0_w );
WRITE8_HANDLER( ymf262_data_b_0_w );
READ8_HANDLER ( YMF262_status_1_r );
WRITE8_HANDLER( YMF262_register_A_1_w );
WRITE8_HANDLER( YMF262_register_B_1_w );
WRITE8_HANDLER( YMF262_data_A_1_w );
WRITE8_HANDLER( YMF262_data_B_1_w );
READ8_HANDLER ( ymf262_status_1_r );
WRITE8_HANDLER( ymf262_register_a_1_w );
WRITE8_HANDLER( ymf262_register_b_1_w );
WRITE8_HANDLER( ymf262_data_a_1_w );
WRITE8_HANDLER( ymf262_data_b_1_w );
#endif
#endif /* __262INTF_H__ */

156
src/emu/sound/3812intf.c
View File

@ -43,13 +43,13 @@ static void IRQHandler_3812(void *param,int irq)
static TIMER_CALLBACK( timer_callback_3812_0 )
{
struct ym3812_info *info = ptr;
YM3812TimerOver(info->chip,0);
ym3812_timer_over(info->chip,0);
}
static TIMER_CALLBACK( timer_callback_3812_1 )
{
struct ym3812_info *info = ptr;
YM3812TimerOver(info->chip,1);
ym3812_timer_over(info->chip,1);
}
static void TimerHandler_3812(void *param,int c,attotime period)
@ -69,7 +69,7 @@ static void TimerHandler_3812(void *param,int c,attotime period)
static void ym3812_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffer, int length)
{
struct ym3812_info *info = param;
YM3812UpdateOne(info->chip, buffer[0], length);
ym3812_update_one(info->chip, buffer[0], length);
}
static void _stream_update_3812(void * param, int interval)
@ -91,16 +91,16 @@ static void *ym3812_start(const char *tag, int sndindex, int clock, const void *
info->intf = config ? config : &dummy;
/* stream system initialize */
info->chip = YM3812Init(sndindex,clock,rate);
info->chip = ym3812_init(sndindex,clock,rate);
if (!info->chip)
return NULL;
info->stream = stream_create(0,1,rate,info,ym3812_stream_update);
/* YM3812 setup */
YM3812SetTimerHandler (info->chip, TimerHandler_3812, info);
YM3812SetIRQHandler (info->chip, IRQHandler_3812, info);
YM3812SetUpdateHandler(info->chip, _stream_update_3812, info);
ym3812_set_timer_handler (info->chip, TimerHandler_3812, info);
ym3812_set_irq_handler (info->chip, IRQHandler_3812, info);
ym3812_set_update_handler(info->chip, _stream_update_3812, info);
info->timer[0] = timer_alloc(timer_callback_3812_0, info);
info->timer[1] = timer_alloc(timer_callback_3812_1, info);
@ -111,48 +111,48 @@ static void *ym3812_start(const char *tag, int sndindex, int clock, const void *
static void ym3812_stop(void *token)
{
struct ym3812_info *info = token;
YM3812Shutdown(info->chip);
ym3812_shutdown(info->chip);
}
static void ym3812_reset(void *token)
{
struct ym3812_info *info = token;
YM3812ResetChip(info->chip);
ym3812_reset_chip(info->chip);
}
WRITE8_HANDLER( YM3812_control_port_0_w ) {
WRITE8_HANDLER( ym3812_control_port_0_w ) {
struct ym3812_info *info = sndti_token(SOUND_YM3812, 0);
YM3812Write(info->chip, 0, data);
ym3812_write(info->chip, 0, data);
}
WRITE8_HANDLER( YM3812_write_port_0_w ) {
WRITE8_HANDLER( ym3812_write_port_0_w ) {
struct ym3812_info *info = sndti_token(SOUND_YM3812, 0);
YM3812Write(info->chip, 1, data);
ym3812_write(info->chip, 1, data);
}
READ8_HANDLER( YM3812_status_port_0_r ) {
READ8_HANDLER( ym3812_status_port_0_r ) {
struct ym3812_info *info = sndti_token(SOUND_YM3812, 0);
return YM3812Read(info->chip, 0);
return ym3812_read(info->chip, 0);
}
READ8_HANDLER( YM3812_read_port_0_r ) {
READ8_HANDLER( ym3812_read_port_0_r ) {
struct ym3812_info *info = sndti_token(SOUND_YM3812, 0);
return YM3812Read(info->chip, 1);
return ym3812_read(info->chip, 1);
}
WRITE8_HANDLER( YM3812_control_port_1_w ) {
WRITE8_HANDLER( ym3812_control_port_1_w ) {
struct ym3812_info *info = sndti_token(SOUND_YM3812, 1);
YM3812Write(info->chip, 0, data);
ym3812_write(info->chip, 0, data);
}
WRITE8_HANDLER( YM3812_write_port_1_w ) {
WRITE8_HANDLER( ym3812_write_port_1_w ) {
struct ym3812_info *info = sndti_token(SOUND_YM3812, 1);
YM3812Write(info->chip, 1, data);
ym3812_write(info->chip, 1, data);
}
READ8_HANDLER( YM3812_status_port_1_r ) {
READ8_HANDLER( ym3812_status_port_1_r ) {
struct ym3812_info *info = sndti_token(SOUND_YM3812, 1);
return YM3812Read(info->chip, 0);
return ym3812_read(info->chip, 0);
}
READ8_HANDLER( YM3812_read_port_1_r ) {
READ8_HANDLER( ym3812_read_port_1_r ) {
struct ym3812_info *info = sndti_token(SOUND_YM3812, 1);
return YM3812Read(info->chip, 1);
return ym3812_read(info->chip, 1);
}
/**************************************************************************
@ -213,12 +213,12 @@ static void IRQHandler_3526(void *param,int irq)
static TIMER_CALLBACK( timer_callback_3526_0 )
{
struct ym3526_info *info = ptr;
YM3526TimerOver(info->chip,0);
ym3526_timer_over(info->chip,0);
}
static TIMER_CALLBACK( timer_callback_3526_1 )
{
struct ym3526_info *info = ptr;
YM3526TimerOver(info->chip,1);
ym3526_timer_over(info->chip,1);
}
/* TimerHandler from fm.c */
static void TimerHandler_3526(void *param,int c,attotime period)
@ -238,7 +238,7 @@ static void TimerHandler_3526(void *param,int c,attotime period)
static void ym3526_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffer, int length)
{
struct ym3526_info *info = param;
YM3526UpdateOne(info->chip, buffer[0], length);
ym3526_update_one(info->chip, buffer[0], length);
}
static void _stream_update_3526(void *param, int interval)
@ -260,15 +260,15 @@ static void *ym3526_start(const char *tag, int sndindex, int clock, const void *
info->intf = config ? config : &dummy;
/* stream system initialize */
info->chip = YM3526Init(sndindex,clock,rate);
info->chip = ym3526_init(sndindex,clock,rate);
if (!info->chip)
return NULL;
info->stream = stream_create(0,1,rate,info,ym3526_stream_update);
/* YM3526 setup */
YM3526SetTimerHandler (info->chip, TimerHandler_3526, info);
YM3526SetIRQHandler (info->chip, IRQHandler_3526, info);
YM3526SetUpdateHandler(info->chip, _stream_update_3526, info);
ym3526_set_timer_handler (info->chip, TimerHandler_3526, info);
ym3526_set_irq_handler (info->chip, IRQHandler_3526, info);
ym3526_set_update_handler(info->chip, _stream_update_3526, info);
info->timer[0] = timer_alloc(timer_callback_3526_0, info);
info->timer[1] = timer_alloc(timer_callback_3526_1, info);
@ -279,48 +279,48 @@ static void *ym3526_start(const char *tag, int sndindex, int clock, const void *
static void ym3526_stop(void *token)
{
struct ym3526_info *info = token;
YM3526Shutdown(info->chip);
ym3526_shutdown(info->chip);
}
static void ym3526_reset(void *token)
{
struct ym3526_info *info = token;
YM3526ResetChip(info->chip);
ym3526_reset_chip(info->chip);
}
WRITE8_HANDLER( YM3526_control_port_0_w ) {
WRITE8_HANDLER( ym3526_control_port_0_w ) {
struct ym3526_info *info = sndti_token(SOUND_YM3526, 0);
YM3526Write(info->chip, 0, data);
ym3526_write(info->chip, 0, data);
}
WRITE8_HANDLER( YM3526_write_port_0_w ) {
WRITE8_HANDLER( ym3526_write_port_0_w ) {
struct ym3526_info *info = sndti_token(SOUND_YM3526, 0);
YM3526Write(info->chip, 1, data);
ym3526_write(info->chip, 1, data);
}
READ8_HANDLER( YM3526_status_port_0_r ) {
READ8_HANDLER( ym3526_status_port_0_r ) {
struct ym3526_info *info = sndti_token(SOUND_YM3526, 0);
return YM3526Read(info->chip, 0);
return ym3526_read(info->chip, 0);
}
READ8_HANDLER( YM3526_read_port_0_r ) {
READ8_HANDLER( ym3526_read_port_0_r ) {
struct ym3526_info *info = sndti_token(SOUND_YM3526, 0);
return YM3526Read(info->chip, 1);
return ym3526_read(info->chip, 1);
}
WRITE8_HANDLER( YM3526_control_port_1_w ) {
WRITE8_HANDLER( ym3526_control_port_1_w ) {
struct ym3526_info *info = sndti_token(SOUND_YM3526, 1);
YM3526Write(info->chip, 0, data);
ym3526_write(info->chip, 0, data);
}
WRITE8_HANDLER( YM3526_write_port_1_w ) {
WRITE8_HANDLER( ym3526_write_port_1_w ) {
struct ym3526_info *info = sndti_token(SOUND_YM3526, 1);
YM3526Write(info->chip, 1, data);
ym3526_write(info->chip, 1, data);
}
READ8_HANDLER( YM3526_status_port_1_r ) {
READ8_HANDLER( ym3526_status_port_1_r ) {
struct ym3526_info *info = sndti_token(SOUND_YM3526, 1);
return YM3526Read(info->chip, 0);
return ym3526_read(info->chip, 0);
}
READ8_HANDLER( YM3526_read_port_1_r ) {
READ8_HANDLER( ym3526_read_port_1_r ) {
struct ym3526_info *info = sndti_token(SOUND_YM3526, 1);
return YM3526Read(info->chip, 1);
return ym3526_read(info->chip, 1);
}
/**************************************************************************
@ -379,12 +379,12 @@ static void IRQHandler_8950(void *param,int irq)
static TIMER_CALLBACK( timer_callback_8950_0 )
{
struct y8950_info *info = ptr;
Y8950TimerOver(info->chip,0);
y8950_timer_over(info->chip,0);
}
static TIMER_CALLBACK( timer_callback_8950_1 )
{
struct y8950_info *info = ptr;
Y8950TimerOver(info->chip,1);
y8950_timer_over(info->chip,1);
}
static void TimerHandler_8950(void *param,int c,attotime period)
{
@ -433,7 +433,7 @@ static void Y8950KeyboardHandler_w(void *param,unsigned char data)
static void y8950_stream_update(void *param, stream_sample_t **inputs, stream_sample_t **buffer, int length)
{
struct y8950_info *info = param;
Y8950UpdateOne(info->chip, buffer[0], length);
y8950_update_one(info->chip, buffer[0], length);
}
static void _stream_update_8950(void *param, int interval)
@ -456,25 +456,25 @@ static void *y8950_start(const char *tag, int sndindex, int clock, const void *c
info->index = sndindex;
/* stream system initialize */
info->chip = Y8950Init(sndindex,clock,rate);
info->chip = y8950_init(sndindex,clock,rate);
if (!info->chip)
return NULL;
/* ADPCM ROM data */
Y8950SetDeltaTMemory(info->chip,
y8950_set_delta_t_memory(info->chip,
(void *)(memory_region(Machine, tag)),
memory_region_length(Machine, tag) );
info->stream = stream_create(0,1,rate,info,y8950_stream_update);
/* port and keyboard handler */
Y8950SetPortHandler(info->chip, Y8950PortHandler_w, Y8950PortHandler_r, info);
Y8950SetKeyboardHandler(info->chip, Y8950KeyboardHandler_w, Y8950KeyboardHandler_r, info);
y8950_set_port_handler(info->chip, Y8950PortHandler_w, Y8950PortHandler_r, info);
y8950_set_keyboard_handler(info->chip, Y8950KeyboardHandler_w, Y8950KeyboardHandler_r, info);
/* Y8950 setup */
Y8950SetTimerHandler (info->chip, TimerHandler_8950, info);
Y8950SetIRQHandler (info->chip, IRQHandler_8950, info);
Y8950SetUpdateHandler(info->chip, _stream_update_8950, info);
y8950_set_timer_handler (info->chip, TimerHandler_8950, info);
y8950_set_irq_handler (info->chip, IRQHandler_8950, info);
y8950_set_update_handler(info->chip, _stream_update_8950, info);
info->timer[0] = timer_alloc(timer_callback_8950_0, info);
info->timer[1] = timer_alloc(timer_callback_8950_1, info);
@ -485,48 +485,48 @@ static void *y8950_start(const char *tag, int sndindex, int clock, const void *c
static void y8950_stop(void *token)
{
struct y8950_info *info = token;
Y8950Shutdown(info->chip);
y8950_shutdown(info->chip);
}
static void y8950_reset(void *token)
{
struct y8950_info *info = token;
Y8950ResetChip(info->chip);
y8950_reset_chip(info->chip);
}
WRITE8_HANDLER( Y8950_control_port_0_w ) {
WRITE8_HANDLER( y8950_control_port_0_w ) {
struct y8950_info *info = sndti_token(SOUND_Y8950, 0);
Y8950Write(info->chip, 0, data);
y8950_write(info->chip, 0, data);
}
WRITE8_HANDLER( Y8950_write_port_0_w ) {
WRITE8_HANDLER( y8950_write_port_0_w ) {
struct y8950_info *info = sndti_token(SOUND_Y8950, 0);
Y8950Write(info->chip, 1, data);
y8950_write(info->chip, 1, data);
}
READ8_HANDLER( Y8950_status_port_0_r ) {
READ8_HANDLER( y8950_status_port_0_r ) {
struct y8950_info *info = sndti_token(SOUND_Y8950, 0);
return Y8950Read(info->chip, 0);
return y8950_read(info->chip, 0);
}
READ8_HANDLER( Y8950_read_port_0_r ) {
READ8_HANDLER( y8950_read_port_0_r ) {
struct y8950_info *info = sndti_token(SOUND_Y8950, 0);
return Y8950Read(info->chip, 1);
return y8950_read(info->chip, 1);
}
WRITE8_HANDLER( Y8950_control_port_1_w ) {
WRITE8_HANDLER( y8950_control_port_1_w ) {
struct y8950_info *info = sndti_token(SOUND_Y8950, 1);
Y8950Write(info->chip, 0, data);
y8950_write(info->chip, 0, data);
}
WRITE8_HANDLER( Y8950_write_port_1_w ) {
WRITE8_HANDLER( y8950_write_port_1_w ) {
struct y8950_info *info = sndti_token(SOUND_Y8950, 1);
Y8950Write(info->chip, 1, data);
y8950_write(info->chip, 1, data);
}
READ8_HANDLER( Y8950_status_port_1_r ) {
READ8_HANDLER( y8950_status_port_1_r ) {
struct y8950_info *info = sndti_token(SOUND_Y8950, 1);
return Y8950Read(info->chip, 0);
return y8950_read(info->chip, 0);
}
READ8_HANDLER( Y8950_read_port_1_r ) {
READ8_HANDLER( y8950_read_port_1_r ) {
struct y8950_info *info = sndti_token(SOUND_Y8950, 1);
return Y8950Read(info->chip, 1);
return y8950_read(info->chip, 1);
}
/**************************************************************************

56
src/emu/sound/3812intf.h
View File

@ -1,5 +1,7 @@
#ifndef YM3812INTF_H
#define YM3812INTF_H
#pragma once
#ifndef __3812INTF_H__
#define __3812INTF_H__
typedef struct _ym3812_interface ym3812_interface;
@ -23,38 +25,38 @@ struct _y8950_interface
/* YM3812 */
READ8_HANDLER ( YM3812_status_port_0_r );
WRITE8_HANDLER( YM3812_control_port_0_w );
READ8_HANDLER( YM3812_read_port_0_r );
WRITE8_HANDLER( YM3812_write_port_0_w );
READ8_HANDLER ( ym3812_status_port_0_r );
WRITE8_HANDLER( ym3812_control_port_0_w );
READ8_HANDLER( ym3812_read_port_0_r );
WRITE8_HANDLER( ym3812_write_port_0_w );
READ8_HANDLER ( YM3812_status_port_1_r );
WRITE8_HANDLER( YM3812_control_port_1_w );
READ8_HANDLER( YM3812_read_port_1_r );
WRITE8_HANDLER( YM3812_write_port_1_w );
READ8_HANDLER ( ym3812_status_port_1_r );
WRITE8_HANDLER( ym3812_control_port_1_w );
READ8_HANDLER( ym3812_read_port_1_r );
WRITE8_HANDLER( ym3812_write_port_1_w );
/* YM3526 */
READ8_HANDLER ( YM3526_status_port_0_r );
WRITE8_HANDLER( YM3526_control_port_0_w );
READ8_HANDLER( YM3526_read_port_0_r );
WRITE8_HANDLER( YM3526_write_port_0_w );
READ8_HANDLER ( ym3526_status_port_0_r );
WRITE8_HANDLER( ym3526_control_port_0_w );
READ8_HANDLER( ym3526_read_port_0_r );
WRITE8_HANDLER( ym3526_write_port_0_w );
READ8_HANDLER ( YM3526_status_port_1_r );
WRITE8_HANDLER( YM3526_control_port_1_w );
READ8_HANDLER( YM3526_read_port_1_r );
WRITE8_HANDLER( YM3526_write_port_1_w );
READ8_HANDLER ( ym3526_status_port_1_r );
WRITE8_HANDLER( ym3526_control_port_1_w );
READ8_HANDLER( ym3526_read_port_1_r );
WRITE8_HANDLER( ym3526_write_port_1_w );
/* Y8950 */
READ8_HANDLER ( Y8950_status_port_0_r );
WRITE8_HANDLER( Y8950_control_port_0_w );
READ8_HANDLER ( Y8950_read_port_0_r );
WRITE8_HANDLER( Y8950_write_port_0_w );
READ8_HANDLER ( y8950_status_port_0_r );
WRITE8_HANDLER( y8950_control_port_0_w );
READ8_HANDLER ( y8950_read_port_0_r );
WRITE8_HANDLER( y8950_write_port_0_w );
READ8_HANDLER ( Y8950_status_port_1_r );
WRITE8_HANDLER( Y8950_control_port_1_w );
READ8_HANDLER ( Y8950_read_port_1_r );
WRITE8_HANDLER( Y8950_write_port_1_w );
READ8_HANDLER ( y8950_status_port_1_r );
WRITE8_HANDLER( y8950_control_port_1_w );
READ8_HANDLER ( y8950_read_port_1_r );
WRITE8_HANDLER( y8950_write_port_1_w );
#endif
#endif /* __3812INTF_H__ */

8
src/emu/sound/5110intf.c
View File

@ -173,12 +173,12 @@ static void tms5110_reset(void *chip)
/******************************************************************************
tms5110_CTL_w -- write Control Command to the sound chip
tms5110_ctl_w -- write Control Command to the sound chip
commands like Speech, Reset, etc., are loaded into the chip via the CTL pins
******************************************************************************/
WRITE8_HANDLER( tms5110_CTL_w )
WRITE8_HANDLER( tms5110_ctl_w )
{
struct tms5110_info *info = sndti_token(SOUND_TMS5110, 0);
@ -189,11 +189,11 @@ WRITE8_HANDLER( tms5110_CTL_w )
/******************************************************************************
tms5110_PDC_w -- write to PDC pin on the sound chip
tms5110_pdc_w -- write to PDC pin on the sound chip
******************************************************************************/
WRITE8_HANDLER( tms5110_PDC_w )
WRITE8_HANDLER( tms5110_pdc_w )
{
struct tms5110_info *info = sndti_token(SOUND_TMS5110, 0);

13
src/emu/sound/5110intf.h
View File

@ -1,5 +1,7 @@
#ifndef intf5110_h
#define intf5110_h
#pragma once
#ifndef __5110INTF_H__
#define __5110INTF_H__
/* clock rate = 80 * output sample rate, */
/* usually 640000 for 8000 Hz sample rate or */
@ -12,13 +14,12 @@ struct _tms5110_interface
void (*load_address)(int addr); /* speech ROM load address callback */
};
WRITE8_HANDLER( tms5110_CTL_w );
WRITE8_HANDLER( tms5110_PDC_w );
WRITE8_HANDLER( tms5110_ctl_w );
WRITE8_HANDLER( tms5110_pdc_w );
READ8_HANDLER( tms5110_status_r );
int tms5110_ready_r(void);
void tms5110_set_frequency(int frequency);
#endif
#endif /* __5110INTF_H__ */

9
src/emu/sound/5220intf.h
View File

@ -1,5 +1,7 @@
#ifndef intf5220_h
#define intf5220_h
#pragma once
#ifndef __5200INTF_H__
#define __5200INTF_H__
/* clock rate = 80 * output sample rate, */
/* usually 640000 for 8000 Hz sample rate or */
@ -28,5 +30,4 @@ enum
SNDINFO_INT_TMS5220_VARIANT = SNDINFO_INT_CORE_SPECIFIC
};
#endif
#endif /* __5200INTF_H__ */

18
src/emu/sound/aica.c
View File

@ -737,7 +737,7 @@ static void AICA_UpdateReg(struct _AICA *AICA, int reg)
break;
case 0x8:
case 0x9:
AICA_MidiIn(Machine, 0, AICA->udata.data[0x8/2]&0xff, 0);
aica_midi_in(Machine, 0, AICA->udata.data[0x8/2]&0xff, 0);
break;
case 0x12:
case 0x13:
@ -941,7 +941,7 @@ static void AICA_w16(struct _AICA *AICA,unsigned int addr,unsigned short val)
if (addr == 0x3bfe)
{
AICADSP_Start(&AICA->DSP);
aica_dsp_start(&AICA->DSP);
}
}
}
@ -1225,7 +1225,7 @@ static void AICA_DoMasterSamples(struct _AICA *AICA, int nsamples)
sample=AICA_UpdateSlot(AICA, slot);
Enc=((TL(slot))<<0x0)|((IMXL(slot))<<0xd);
AICADSP_SetSample(&AICA->DSP,(sample*AICA->LPANTABLE[Enc])>>(SHIFT-2),ISEL(slot),IMXL(slot));
aica_dsp_setsample(&AICA->DSP,(sample*AICA->LPANTABLE[Enc])>>(SHIFT-2),ISEL(slot),IMXL(slot));
Enc=((TL(slot))<<0x0)|((DIPAN(slot))<<0x8)|((DISDL(slot))<<0xd);
{
smpl+=(sample*AICA->LPANTABLE[Enc])>>SHIFT;
@ -1237,7 +1237,7 @@ static void AICA_DoMasterSamples(struct _AICA *AICA, int nsamples)
}
// process the DSP
AICADSP_Step(&AICA->DSP);
aica_dsp_step(&AICA->DSP);
// mix DSP output
for(i=0;i<16;++i)
@ -1302,7 +1302,7 @@ static void aica_stop(void)
}
#endif
void AICA_set_ram_base(int which, void *base, int size)
void aica_set_ram_base(int which, void *base, int size)
{
struct _AICA *AICA = sndti_token(SOUND_AICA, which);
if (AICA)
@ -1316,7 +1316,7 @@ void AICA_set_ram_base(int which, void *base, int size)
}
}
READ16_HANDLER( AICA_0_r )
READ16_HANDLER( aica_0_r )
{
struct _AICA *AICA = sndti_token(SOUND_AICA, 0);
UINT16 res = AICA_r16(AICA, offset*2);
@ -1324,7 +1324,7 @@ READ16_HANDLER( AICA_0_r )
return res;
}
WRITE16_HANDLER( AICA_0_w )
WRITE16_HANDLER( aica_0_w )
{
struct _AICA *AICA = sndti_token(SOUND_AICA, 0);
UINT16 tmp;
@ -1334,14 +1334,14 @@ WRITE16_HANDLER( AICA_0_w )
AICA_w16(AICA,offset*2, tmp);
}
WRITE16_HANDLER( AICA_MidiIn )
WRITE16_HANDLER( aica_midi_in )
{
struct _AICA *AICA = sndti_token(SOUND_AICA, 0);
AICA->MidiStack[AICA->MidiW++]=data;
AICA->MidiW &= 15;
}
READ16_HANDLER( AICA_MidiOutR )
READ16_HANDLER( aica_midi_out_r )
{
struct _AICA *AICA = sndti_token(SOUND_AICA, 0);
unsigned char val;

16
src/emu/sound/aica.h
View File

@ -3,8 +3,8 @@
Sega/Yamaha AICA emulation
*/
#ifndef _AICA_H_
#define _AICA_H_
#ifndef __AICA_H__
#define __AICA_H__
#define MAX_AICA (2)
@ -15,14 +15,14 @@ struct _aica_interface
void (*irq_callback)(running_machine *machine, int state); /* irq callback */
};
void AICA_set_ram_base(int which, void *base, int size);
void aica_set_ram_base(int which, void *base, int size);
// AICA register access
READ16_HANDLER( AICA_0_r );
WRITE16_HANDLER( AICA_0_w );
READ16_HANDLER( aica_0_r );
WRITE16_HANDLER( aica_0_w );
// MIDI I/O access
WRITE16_HANDLER( AICA_MidiIn );
READ16_HANDLER( AICA_MidiOutR );
WRITE16_HANDLER( aica_midi_in );
READ16_HANDLER( aica_midi_out_r );
#endif
#endif /* __AICA_H__ */

8
src/emu/sound/aicadsp.c
View File

@ -55,14 +55,14 @@ static INT32 UNPACK(UINT16 val)
return uval;
}
void AICADSP_Init(struct _AICADSP *DSP)
void aica_dsp_init(struct _AICADSP *DSP)
{
memset(DSP,0,sizeof(struct _AICADSP));
DSP->RBL=0x8000;
DSP->Stopped=1;
}
void AICADSP_Step(struct _AICADSP *DSP)
void aica_dsp_step(struct _AICADSP *DSP)
{
INT32 ACC=0; //26 bit
INT32 SHIFTED=0; //24 bit
@ -328,7 +328,7 @@ void AICADSP_Step(struct _AICADSP *DSP)
// fclose(f);
}
void AICADSP_SetSample(struct _AICADSP *DSP,INT32 sample,int SEL,int MXL)
void aica_dsp_setsample(struct _AICADSP *DSP,INT32 sample,int SEL,int MXL)
{
//DSP->MIXS[SEL]+=sample<<(MXL+1)/*7*/;
DSP->MIXS[SEL]+=sample;
@ -336,7 +336,7 @@ void AICADSP_SetSample(struct _AICADSP *DSP,INT32 sample,int SEL,int MXL)
// int a=1;
}
void AICADSP_Start(struct _AICADSP *DSP)
void aica_dsp_start(struct _AICADSP *DSP)
{
int i;
DSP->Stopped=0;

17
src/emu/sound/aicadsp.h
View File

@ -1,5 +1,7 @@
#ifndef AICADSP_H
#define AICADSP_H
#pragma once
#ifndef __AICADSP_H__
#define __AICADSP_H__
//the DSP Context
struct _AICADSP
@ -30,8 +32,9 @@ struct _AICADSP
int LastStep;
};
void AICADSP_Init(struct _AICADSP *DSP);
void AICADSP_SetSample(struct _AICADSP *DSP, INT32 sample, INT32 SEL, INT32 MXL);
void AICADSP_Step(struct _AICADSP *DSP);
void AICADSP_Start(struct _AICADSP *DSP);
#endif
void aica_dsp_init(struct _AICADSP *DSP);
void aica_dsp_setsample(struct _AICADSP *DSP, INT32 sample, INT32 SEL, INT32 MXL);
void aica_dsp_step(struct _AICADSP *DSP);
void aica_dsp_start(struct _AICADSP *DSP);
#endif /* __AICADSP_H__ */

7
src/emu/sound/astrocde.h
View File

@ -1,8 +1,9 @@
#pragma once
#ifndef ASTROCADE_H
#define ASTROCADE_H
#ifndef __ASTROCDE_H__
#define __ASTROCDE_H__
WRITE8_HANDLER( astrocade_sound1_w );
WRITE8_HANDLER( astrocade_sound2_w );
#endif
#endif /* __ASTROCDE_H__ */

90
src/emu/sound/ay8910.c
View File

@ -951,50 +951,50 @@ void ymz294_get_info(void *token, UINT32 state, sndinfo *info)
*
*************************************/
READ8_HANDLER( AY8910_read_port_0_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 0)); }
READ8_HANDLER( AY8910_read_port_1_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 1)); }
READ8_HANDLER( AY8910_read_port_2_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 2)); }
READ8_HANDLER( AY8910_read_port_3_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 3)); }
READ8_HANDLER( AY8910_read_port_4_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 4)); }
READ16_HANDLER( AY8910_read_port_0_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 0)); }
READ16_HANDLER( AY8910_read_port_1_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 1)); }
READ16_HANDLER( AY8910_read_port_2_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 2)); }
READ16_HANDLER( AY8910_read_port_3_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 3)); }
READ16_HANDLER( AY8910_read_port_4_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 4)); }
READ16_HANDLER( AY8910_read_port_0_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 0)) << 8; }
READ16_HANDLER( AY8910_read_port_1_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 1)) << 8; }
READ16_HANDLER( AY8910_read_port_2_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 2)) << 8; }
READ16_HANDLER( AY8910_read_port_3_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 3)) << 8; }
READ16_HANDLER( AY8910_read_port_4_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 4)) << 8; }
READ8_HANDLER( ay8910_read_port_0_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 0)); }
READ8_HANDLER( ay8910_read_port_1_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 1)); }
READ8_HANDLER( ay8910_read_port_2_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 2)); }
READ8_HANDLER( ay8910_read_port_3_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 3)); }
READ8_HANDLER( ay8910_read_port_4_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 4)); }
READ16_HANDLER( ay8910_read_port_0_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 0)); }
READ16_HANDLER( ay8910_read_port_1_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 1)); }
READ16_HANDLER( ay8910_read_port_2_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 2)); }
READ16_HANDLER( ay8910_read_port_3_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 3)); }
READ16_HANDLER( ay8910_read_port_4_lsb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 4)); }
READ16_HANDLER( ay8910_read_port_0_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 0)) << 8; }
READ16_HANDLER( ay8910_read_port_1_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 1)) << 8; }
READ16_HANDLER( ay8910_read_port_2_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 2)) << 8; }
READ16_HANDLER( ay8910_read_port_3_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 3)) << 8; }
READ16_HANDLER( ay8910_read_port_4_msb_r ) { return ay8910_read_ym(sndti_token(SOUND_AY8910, 4)) << 8; }
WRITE8_HANDLER( AY8910_control_port_0_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 0),0,data); }
WRITE8_HANDLER( AY8910_control_port_1_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 1),0,data); }
WRITE8_HANDLER( AY8910_control_port_2_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 2),0,data); }
WRITE8_HANDLER( AY8910_control_port_3_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 3),0,data); }
WRITE8_HANDLER( AY8910_control_port_4_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 4),0,data); }
WRITE16_HANDLER( AY8910_control_port_0_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 0),0,data & 0xff); }
WRITE16_HANDLER( AY8910_control_port_1_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 1),0,data & 0xff); }
WRITE16_HANDLER( AY8910_control_port_2_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 2),0,data & 0xff); }
WRITE16_HANDLER( AY8910_control_port_3_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 3),0,data & 0xff); }
WRITE16_HANDLER( AY8910_control_port_4_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 4),0,data & 0xff); }
WRITE16_HANDLER( AY8910_control_port_0_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 0),0,data >> 8); }
WRITE16_HANDLER( AY8910_control_port_1_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 1),0,data >> 8); }
WRITE16_HANDLER( AY8910_control_port_2_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 2),0,data >> 8); }
WRITE16_HANDLER( AY8910_control_port_3_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 3),0,data >> 8); }
WRITE16_HANDLER( AY8910_control_port_4_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 4),0,data >> 8); }
WRITE8_HANDLER( ay8910_control_port_0_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 0),0,data); }
WRITE8_HANDLER( ay8910_control_port_1_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 1),0,data); }
WRITE8_HANDLER( ay8910_control_port_2_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 2),0,data); }
WRITE8_HANDLER( ay8910_control_port_3_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 3),0,data); }
WRITE8_HANDLER( ay8910_control_port_4_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 4),0,data); }
WRITE16_HANDLER( ay8910_control_port_0_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 0),0,data & 0xff); }
WRITE16_HANDLER( ay8910_control_port_1_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 1),0,data & 0xff); }
WRITE16_HANDLER( ay8910_control_port_2_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 2),0,data & 0xff); }
WRITE16_HANDLER( ay8910_control_port_3_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 3),0,data & 0xff); }
WRITE16_HANDLER( ay8910_control_port_4_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 4),0,data & 0xff); }
WRITE16_HANDLER( ay8910_control_port_0_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 0),0,data >> 8); }
WRITE16_HANDLER( ay8910_control_port_1_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 1),0,data >> 8); }
WRITE16_HANDLER( ay8910_control_port_2_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 2),0,data >> 8); }
WRITE16_HANDLER( ay8910_control_port_3_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 3),0,data >> 8); }
WRITE16_HANDLER( ay8910_control_port_4_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 4),0,data >> 8); }
WRITE8_HANDLER( AY8910_write_port_0_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 0),1,data); }
WRITE8_HANDLER( AY8910_write_port_1_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 1),1,data); }
WRITE8_HANDLER( AY8910_write_port_2_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 2),1,data); }
WRITE8_HANDLER( AY8910_write_port_3_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 3),1,data); }
WRITE8_HANDLER( AY8910_write_port_4_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 4),1,data); }
WRITE16_HANDLER( AY8910_write_port_0_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 0),1,data & 0xff); }
WRITE16_HANDLER( AY8910_write_port_1_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 1),1,data & 0xff); }
WRITE16_HANDLER( AY8910_write_port_2_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 2),1,data & 0xff); }
WRITE16_HANDLER( AY8910_write_port_3_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 3),1,data & 0xff); }
WRITE16_HANDLER( AY8910_write_port_4_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 4),1,data & 0xff); }
WRITE16_HANDLER( AY8910_write_port_0_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 0),1,data >> 8); }
WRITE16_HANDLER( AY8910_write_port_1_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 1),1,data >> 8); }
WRITE16_HANDLER( AY8910_write_port_2_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 2),1,data >> 8); }
WRITE16_HANDLER( AY8910_write_port_3_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 3),1,data >> 8); }
WRITE16_HANDLER( AY8910_write_port_4_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 4),1,data >> 8); }
WRITE8_HANDLER( ay8910_write_port_0_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 0),1,data); }
WRITE8_HANDLER( ay8910_write_port_1_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 1),1,data); }
WRITE8_HANDLER( ay8910_write_port_2_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 2),1,data); }
WRITE8_HANDLER( ay8910_write_port_3_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 3),1,data); }
WRITE8_HANDLER( ay8910_write_port_4_w ) { ay8910_write_ym(sndti_token(SOUND_AY8910, 4),1,data); }
WRITE16_HANDLER( ay8910_write_port_0_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 0),1,data & 0xff); }
WRITE16_HANDLER( ay8910_write_port_1_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 1),1,data & 0xff); }
WRITE16_HANDLER( ay8910_write_port_2_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 2),1,data & 0xff); }
WRITE16_HANDLER( ay8910_write_port_3_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 3),1,data & 0xff); }
WRITE16_HANDLER( ay8910_write_port_4_lsb_w ) { if (ACCESSING_BITS_0_7) ay8910_write_ym(sndti_token(SOUND_AY8910, 4),1,data & 0xff); }
WRITE16_HANDLER( ay8910_write_port_0_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 0),1,data >> 8); }
WRITE16_HANDLER( ay8910_write_port_1_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 1),1,data >> 8); }
WRITE16_HANDLER( ay8910_write_port_2_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 2),1,data >> 8); }
WRITE16_HANDLER( ay8910_write_port_3_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 3),1,data >> 8); }
WRITE16_HANDLER( ay8910_write_port_4_msb_w ) { if (ACCESSING_BITS_8_15) ay8910_write_ym(sndti_token(SOUND_AY8910, 4),1,data >> 8); }

92
src/emu/sound/ay8910.h
View File

@ -1,3 +1,5 @@
#pragma once
#ifndef __AY8910_H__
#define __AY8910_H__
@ -74,53 +76,53 @@ struct _ay8910_interface
void ay8910_set_volume(int chip,int channel,int volume);
READ8_HANDLER( AY8910_read_port_0_r );
READ8_HANDLER( AY8910_read_port_1_r );
READ8_HANDLER( AY8910_read_port_2_r );
READ8_HANDLER( AY8910_read_port_3_r );
READ8_HANDLER( AY8910_read_port_4_r );
READ16_HANDLER( AY8910_read_port_0_lsb_r );
READ16_HANDLER( AY8910_read_port_1_lsb_r );
READ16_HANDLER( AY8910_read_port_2_lsb_r );
READ16_HANDLER( AY8910_read_port_3_lsb_r );
READ16_HANDLER( AY8910_read_port_4_lsb_r );
READ16_HANDLER( AY8910_read_port_0_msb_r );
READ16_HANDLER( AY8910_read_port_1_msb_r );
READ16_HANDLER( AY8910_read_port_2_msb_r );
READ16_HANDLER( AY8910_read_port_3_msb_r );
READ16_HANDLER( AY8910_read_port_4_msb_r );
READ8_HANDLER( ay8910_read_port_0_r );
READ8_HANDLER( ay8910_read_port_1_r );
READ8_HANDLER( ay8910_read_port_2_r );
READ8_HANDLER( ay8910_read_port_3_r );
READ8_HANDLER( ay8910_read_port_4_r );
READ16_HANDLER( ay8910_read_port_0_lsb_r );
READ16_HANDLER( ay8910_read_port_1_lsb_r );
READ16_HANDLER( ay8910_read_port_2_lsb_r );
READ16_HANDLER( ay8910_read_port_3_lsb_r );
READ16_HANDLER( ay8910_read_port_4_lsb_r );
READ16_HANDLER( ay8910_read_port_0_msb_r );
READ16_HANDLER( ay8910_read_port_1_msb_r );
READ16_HANDLER( ay8910_read_port_2_msb_r );
READ16_HANDLER( ay8910_read_port_3_msb_r );
READ16_HANDLER( ay8910_read_port_4_msb_r );
WRITE8_HANDLER( AY8910_control_port_0_w );
WRITE8_HANDLER( AY8910_control_port_1_w );
WRITE8_HANDLER( AY8910_control_port_2_w );
WRITE8_HANDLER( AY8910_control_port_3_w );
WRITE8_HANDLER( AY8910_control_port_4_w );
WRITE16_HANDLER( AY8910_control_port_0_lsb_w );
WRITE16_HANDLER( AY8910_control_port_1_lsb_w );
WRITE16_HANDLER( AY8910_control_port_2_lsb_w );
WRITE16_HANDLER( AY8910_control_port_3_lsb_w );
WRITE16_HANDLER( AY8910_control_port_4_lsb_w );
WRITE16_HANDLER( AY8910_control_port_0_msb_w );
WRITE16_HANDLER( AY8910_control_port_1_msb_w );
WRITE16_HANDLER( AY8910_control_port_2_msb_w );
WRITE16_HANDLER( AY8910_control_port_3_msb_w );
WRITE16_HANDLER( AY8910_control_port_4_msb_w );
WRITE8_HANDLER( ay8910_control_port_0_w );
WRITE8_HANDLER( ay8910_control_port_1_w );
WRITE8_HANDLER( ay8910_control_port_2_w );
WRITE8_HANDLER( ay8910_control_port_3_w );
WRITE8_HANDLER( ay8910_control_port_4_w );
WRITE16_HANDLER( ay8910_control_port_0_lsb_w );
WRITE16_HANDLER( ay8910_control_port_1_lsb_w );
WRITE16_HANDLER( ay8910_control_port_2_lsb_w );
WRITE16_HANDLER( ay8910_control_port_3_lsb_w );
WRITE16_HANDLER( ay8910_control_port_4_lsb_w );
WRITE16_HANDLER( ay8910_control_port_0_msb_w );
WRITE16_HANDLER( ay8910_control_port_1_msb_w );
WRITE16_HANDLER( ay8910_control_port_2_msb_w );
WRITE16_HANDLER( ay8910_control_port_3_msb_w );
WRITE16_HANDLER( ay8910_control_port_4_msb_w );
WRITE8_HANDLER( AY8910_write_port_0_w );
WRITE8_HANDLER( AY8910_write_port_1_w );
WRITE8_HANDLER( AY8910_write_port_2_w );
WRITE8_HANDLER( AY8910_write_port_3_w );
WRITE8_HANDLER( AY8910_write_port_4_w );
WRITE16_HANDLER( AY8910_write_port_0_lsb_w );
WRITE16_HANDLER( AY8910_write_port_1_lsb_w );
WRITE16_HANDLER( AY8910_write_port_2_lsb_w );
WRITE16_HANDLER( AY8910_write_port_3_lsb_w );
WRITE16_HANDLER( AY8910_write_port_4_lsb_w );
WRITE16_HANDLER( AY8910_write_port_0_msb_w );
WRITE16_HANDLER( AY8910_write_port_1_msb_w );
WRITE16_HANDLER( AY8910_write_port_2_msb_w );
WRITE16_HANDLER( AY8910_write_port_3_msb_w );
WRITE16_HANDLER( AY8910_write_port_4_msb_w );
WRITE8_HANDLER( ay8910_write_port_0_w );
WRITE8_HANDLER( ay8910_write_port_1_w );
WRITE8_HANDLER( ay8910_write_port_2_w );
WRITE8_HANDLER( ay8910_write_port_3_w );
WRITE8_HANDLER( ay8910_write_port_4_w );
WRITE16_HANDLER( ay8910_write_port_0_lsb_w );
WRITE16_HANDLER( ay8910_write_port_1_lsb_w );
WRITE16_HANDLER( ay8910_write_port_2_lsb_w );
WRITE16_HANDLER( ay8910_write_port_3_lsb_w );
WRITE16_HANDLER( ay8910_write_port_4_lsb_w );
WRITE16_HANDLER( ay8910_write_port_0_msb_w );
WRITE16_HANDLER( ay8910_write_port_1_msb_w );
WRITE16_HANDLER( ay8910_write_port_2_msb_w );
WRITE16_HANDLER( ay8910_write_port_3_msb_w );
WRITE16_HANDLER( ay8910_write_port_4_msb_w );
/*********** An interface for SSG of YM2203 ***********/

8
src/emu/sound/beep.h
View File

@ -1,5 +1,7 @@
#ifndef BEEP_H
#define BEEP_H
#pragma once
#ifndef __BEEP_H__
#define __BEEP_H__
#ifdef __cplusplus
extern "C" {
@ -13,4 +15,4 @@ void beep_set_volume(int,int);
}
#endif
#endif
#endif /* __BEEP_H__ */

4
src/emu/sound/bsmt2000.c
View File

@ -352,10 +352,10 @@ static void bsmt2000_reg_write(bsmt2000_chip *chip, offs_t offset, UINT16 data)
***************************************************************************/
/*-------------------------------------------------
BSMT2000_data_0_w - write to chip 0
bsmt2000_data_0_w - write to chip 0
-------------------------------------------------*/
WRITE16_HANDLER( BSMT2000_data_0_w )
WRITE16_HANDLER( bsmt2000_data_0_w )
{
bsmt2000_reg_write(sndti_token(SOUND_BSMT2000, 0), offset, data);
}

10
src/emu/sound/bsmt2000.h
View File

@ -5,9 +5,11 @@
*
**********************************************************************************************/
#ifndef BSMT2000_H
#define BSMT2000_H
#pragma once
WRITE16_HANDLER( BSMT2000_data_0_w );
#ifndef __BSMT2000_H__
#define __BSMT2000_H__
#endif
WRITE16_HANDLER( bsmt2000_data_0_w );
#endif /* __BSMT2000_H__ */

6
src/emu/sound/c140.c
View File

@ -120,7 +120,7 @@ static void init_voice( VOICE *v )
v->sample_end=0;
v->sample_loop=0;
}
READ8_HANDLER( C140_r )
READ8_HANDLER( c140_r )
{
struct c140_info *info = sndti_token(SOUND_C140, 0);
offset&=0x1ff;
@ -185,7 +185,7 @@ static long find_sample(struct c140_info *info, long adrs, long bank, int voice)
return (newadr);
}
WRITE8_HANDLER( C140_w )
WRITE8_HANDLER( c140_w )
{
struct c140_info *info = sndti_token(SOUND_C140, 0);
stream_update(info->stream);
@ -247,7 +247,7 @@ WRITE8_HANDLER( C140_w )
}
}
void C140_set_base(int which, void *base)
void c140_set_base(int which, void *base)
{
struct c140_info *info = sndti_token(SOUND_C140, 0);
info->pRom = base;

14
src/emu/sound/c140.h
View File

@ -1,12 +1,14 @@
/* C140.h */
#ifndef _NAMCO_C140_
#define _NAMCO_C140_
#pragma once
READ8_HANDLER( C140_r );
WRITE8_HANDLER( C140_w );
#ifndef __C140_H__
#define __C140_H__
void C140_set_base(int which, void *base);
READ8_HANDLER( c140_r );
WRITE8_HANDLER( c140_w );
void c140_set_base(int which, void *base);
enum
{
@ -21,4 +23,4 @@ struct _c140_interface {
int banking_type;
};
#endif
#endif /* __C140_H__ */

8
src/emu/sound/c352.h
View File

@ -1,8 +1,10 @@
#ifndef _C352_H_
#define _C352_H_
#pragma once
#ifndef __C352_H__
#define __C352_H__
READ16_HANDLER( c352_0_r );
WRITE16_HANDLER( c352_0_w );
#endif
#endif /* __C352_H__ */

6
src/emu/sound/c6280.c
View File

@ -327,9 +327,9 @@ static void *c6280_start(const char *tag, int sndindex, int clock, const void *c
return info;
}
READ8_HANDLER( C6280_r) { return h6280io_get_buffer();}
WRITE8_HANDLER( C6280_0_w ) { h6280io_set_buffer(data); c6280_write(sndti_token(SOUND_C6280, 0),offset,data); }
WRITE8_HANDLER( C6280_1_w ) { h6280io_set_buffer(data); c6280_write(sndti_token(SOUND_C6280, 1),offset,data); }
READ8_HANDLER( c6280_r) { return h6280io_get_buffer();}
WRITE8_HANDLER( c6280_0_w ) { h6280io_set_buffer(data); c6280_write(sndti_token(SOUND_C6280, 0),offset,data); }
WRITE8_HANDLER( c6280_1_w ) { h6280io_set_buffer(data); c6280_write(sndti_token(SOUND_C6280, 1),offset,data); }

15
src/emu/sound/c6280.h
View File

@ -1,8 +1,11 @@
#ifndef _C6280_H_
#define _C6280_H_
#pragma once
#ifndef __C6280_H__
#define __C6280_H__
/* Function prototypes */
WRITE8_HANDLER( C6280_0_w );
WRITE8_HANDLER( C6280_1_w );
READ8_HANDLER( C6280_r );
#endif /* _C6280_H_ */
WRITE8_HANDLER( c6280_0_w );
WRITE8_HANDLER( c6280_1_w );
READ8_HANDLER( c6280_r );
#endif /* __C6280_H__ */

7
src/emu/sound/cdda.h
View File

@ -1,4 +1,6 @@
#ifndef _CDDA_H_
#pragma once
#ifndef __CDDA_H__
#define _CDDA_H_
void cdda_set_cdrom(int num, void *file);
@ -13,5 +15,4 @@ int cdda_audio_active(int num);
int cdda_audio_paused(int num);
int cdda_audio_ended(int num);
#endif
#endif /* __CDDA_H__ */

8
src/emu/sound/cdp1869.h
View File

@ -27,8 +27,10 @@
*/
#ifndef __CDP1869_SOUND__
#define __CDP1869_SOUND__
#pragma once
#ifndef __CDP1869_H__
#define __CDP1869_H__
void cdp1869_set_toneamp(int which, int value);
void cdp1869_set_tonefreq(int which, int value);
@ -38,4 +40,4 @@ void cdp1869_set_wnamp(int which, int value);
void cdp1869_set_wnfreq(int which, int value);
void cdp1869_set_wnoff(int which, int value);
#endif
#endif /* __CDP1869_H__ */

9
src/emu/sound/cem3394.h
View File

@ -1,5 +1,7 @@
#ifndef cem3394_h
#define cem3394_h
#pragma once
#ifndef __CEM3394_H__
#define __CEM3394_H__
#define CEM3394_SAMPLE_RATE (44100*4)
@ -42,5 +44,4 @@ void cem3394_set_voltage(int chip, int input, double voltage);
double cem3394_get_parameter(int chip, int input);
#endif
#endif /* __CEM3394_H__ */

8
src/emu/sound/custom.h
View File

@ -1,5 +1,7 @@
#ifndef CUSTOM_H
#define CUSTOM_H
#pragma once
#ifndef __CUSTOM_H__
#define __CUSTOM_H__
typedef struct _custom_sound_interface custom_sound_interface;
struct _custom_sound_interface
@ -13,4 +15,4 @@ struct _custom_sound_interface
void *custom_get_token(int index);
#endif
#endif /* __CUSTOM_H__ */

32
src/emu/sound/dac.c
View File

@ -28,7 +28,7 @@ static void DAC_update(void *param,stream_sample_t **inputs, stream_sample_t **_
}
void DAC_data_w(int num,UINT8 data)
void dac_data_w(int num,UINT8 data)
{
struct dac_info *info = sndti_token(SOUND_DAC, num);
INT16 out = info->UnsignedVolTable[data];
@ -42,7 +42,7 @@ void DAC_data_w(int num,UINT8 data)
}
void DAC_signed_data_w(int num,UINT8 data)
void dac_signed_data_w(int num,UINT8 data)
{
struct dac_info *info = sndti_token(SOUND_DAC, num);
INT16 out = info->SignedVolTable[data];
@ -56,7 +56,7 @@ void DAC_signed_data_w(int num,UINT8 data)
}
void DAC_data_16_w(int num,UINT16 data)
void dac_data_16_w(int num,UINT16 data)
{
struct dac_info *info = sndti_token(SOUND_DAC, num);
INT16 out = data >> 1; /* range 0..32767 */
@ -70,7 +70,7 @@ void DAC_data_16_w(int num,UINT16 data)
}
void DAC_signed_data_16_w(int num,UINT16 data)
void dac_signed_data_16_w(int num,UINT16 data)
{
struct dac_info *info = sndti_token(SOUND_DAC, num);
INT16 out = (INT32)data - (INT32)0x08000; /* range -32768..32767 */
@ -118,34 +118,34 @@ static void *dac_start(const char *tag, int sndindex, int clock, const void *con
WRITE8_HANDLER( DAC_0_data_w )
WRITE8_HANDLER( dac_0_data_w )
{
DAC_data_w(0,data);
dac_data_w(0,data);
}
WRITE8_HANDLER( DAC_1_data_w )
WRITE8_HANDLER( dac_1_data_w )
{
DAC_data_w(1,data);
dac_data_w(1,data);
}
WRITE8_HANDLER( DAC_2_data_w )
WRITE8_HANDLER( dac_2_data_w )
{
DAC_data_w(2,data);
dac_data_w(2,data);
}
WRITE8_HANDLER( DAC_0_signed_data_w )
WRITE8_HANDLER( dac_0_signed_data_w )
{
DAC_signed_data_w(0,data);
dac_signed_data_w(0,data);
}
WRITE8_HANDLER( DAC_1_signed_data_w )
WRITE8_HANDLER( dac_1_signed_data_w )
{
DAC_signed_data_w(1,data);
dac_signed_data_w(1,data);
}
WRITE8_HANDLER( DAC_2_signed_data_w )
WRITE8_HANDLER( dac_2_signed_data_w )
{
DAC_signed_data_w(2,data);
dac_signed_data_w(2,data);
}

28
src/emu/sound/dac.h
View File

@ -1,16 +1,18 @@
#ifndef DAC_H
#define DAC_H
#pragma once
void DAC_data_w(int num,UINT8 data);
void DAC_signed_data_w(int num,UINT8 data);
void DAC_data_16_w(int num,UINT16 data);
void DAC_signed_data_16_w(int num,UINT16 data);
#ifndef __DAC_H__
#define __DAC_H__
WRITE8_HANDLER( DAC_0_data_w );
WRITE8_HANDLER( DAC_1_data_w );
WRITE8_HANDLER( DAC_2_data_w );
WRITE8_HANDLER( DAC_0_signed_data_w );
WRITE8_HANDLER( DAC_1_signed_data_w );
WRITE8_HANDLER( DAC_2_signed_data_w );
void dac_data_w(int num,UINT8 data);
void dac_signed_data_w(int num,UINT8 data);
void dac_data_16_w(int num,UINT16 data);
void dac_signed_data_16_w(int num,UINT16 data);
#endif
WRITE8_HANDLER( dac_0_data_w );
WRITE8_HANDLER( dac_1_data_w );
WRITE8_HANDLER( dac_2_data_w );
WRITE8_HANDLER( dac_0_signed_data_w );
WRITE8_HANDLER( dac_1_signed_data_w );
WRITE8_HANDLER( dac_2_signed_data_w );
#endif /* __DAC_H__ */

46
src/emu/sound/discrete.h
View File

@ -1,5 +1,7 @@
#ifndef _discrete_h_
#define _discrete_h_
#pragma once
#ifndef __DISCRETE_H__
#define __DISCRETE_H__
#include "rescap.h"
@ -3397,6 +3399,7 @@ typedef struct _discrete_sound_block discrete_sound_block;
typedef struct _node_description node_description;
typedef struct _discrete_module discrete_module;
struct _discrete_module
{
int type;
@ -3406,7 +3409,6 @@ struct _discrete_module
void (*reset)(node_description *node); /* Called to reset a node after creation or system reset */
void (*step)(node_description *node); /* Called to execute one time delta of output update */
};
typedef struct _discrete_module discrete_module;
/*************************************
@ -3442,6 +3444,7 @@ struct _node_description
*
*************************************/
typedef struct _discrete_lfsr_desc discrete_lfsr_desc;
struct _discrete_lfsr_desc
{
int clock_type;
@ -3461,9 +3464,9 @@ struct _discrete_lfsr_desc
int output_bit;
};
typedef struct _discrete_lfsr_desc discrete_lfsr_desc;
typedef struct _discrete_op_amp_osc_info discrete_op_amp_osc_info;
struct _discrete_op_amp_osc_info
{
int type;
@ -3478,13 +3481,13 @@ struct _discrete_op_amp_osc_info
double c;
double vP; // Op amp B+
};
typedef struct _discrete_op_amp_osc_info discrete_op_amp_osc_info;
#define DEFAULT_7414_VALUES 1.7, 0.9, 3.4
#define DEFAULT_74LS14_VALUES 1.6, 0.8, 3.4
typedef struct _discrete_schmitt_osc_desc discrete_schmitt_osc_desc;
struct _discrete_schmitt_osc_desc
{
double rIn;
@ -3495,9 +3498,9 @@ struct _discrete_schmitt_osc_desc
double vGate; // the output high voltage of the gate that gets fedback through rFeedback
int options; // bitmaped options
};
typedef struct _discrete_schmitt_osc_desc discrete_schmitt_osc_desc;
typedef struct _discrete_comp_adder_table discrete_comp_adder_table;
struct _discrete_comp_adder_table
{
int type;
@ -3505,9 +3508,9 @@ struct _discrete_comp_adder_table
int length;
double c[DISC_LADDER_MAXRES]; // Componet table
};
typedef struct _discrete_comp_adder_table discrete_comp_adder_table;
typedef struct _discrete_dac_r1_ladder discrete_dac_r1_ladder;
struct _discrete_dac_r1_ladder
{
int ladderLength; // 2 to DISC_LADDER_MAXRES. 1 would be useless.
@ -3517,9 +3520,9 @@ struct _discrete_dac_r1_ladder
double rGnd; // Resistor tied to ground (0 = not used)
double cFilter; // Filtering cap (0 = not used)
};
typedef struct _discrete_dac_r1_ladder discrete_dac_r1_ladder;
typedef struct _discrete_integrate_info discrete_integrate_info;
struct _discrete_integrate_info
{
int type;
@ -3533,10 +3536,10 @@ struct _discrete_integrate_info
double f1;
double f2;
};
typedef struct _discrete_integrate_info discrete_integrate_info;
#define DISC_MAX_MIXER_INPUTS 8
typedef struct _discrete_mixer_desc discrete_mixer_desc;
struct _discrete_mixer_desc
{
int type;
@ -3550,9 +3553,9 @@ struct _discrete_mixer_desc
double vRef;
double gain; // Scale value to get output close to +/- 32767
};
typedef struct _discrete_mixer_desc discrete_mixer_desc;
typedef struct _discrete_op_amp_info discrete_op_amp_info;
struct _discrete_op_amp_info
{
int type;
@ -3564,9 +3567,9 @@ struct _discrete_op_amp_info
double vN; // Op amp B-
double vP; // Op amp B+
};
typedef struct _discrete_op_amp_info discrete_op_amp_info;
typedef struct _discrete_op_amp_1sht_info discrete_op_amp_1sht_info;
struct _discrete_op_amp_1sht_info
{
int type;
@ -3580,9 +3583,9 @@ struct _discrete_op_amp_1sht_info
double vN; // Op amp B-
double vP; // Op amp B+
};
typedef struct _discrete_op_amp_1sht_info discrete_op_amp_1sht_info;
typedef struct _discrete_op_amp_tvca_info discrete_op_amp_tvca_info;
struct _discrete_op_amp_tvca_info
{
double r1;
@ -3610,9 +3613,9 @@ struct _discrete_op_amp_tvca_info
int f4;
int f5;
};
typedef struct _discrete_op_amp_tvca_info discrete_op_amp_tvca_info;
typedef struct _discrete_op_amp_filt_info discrete_op_amp_filt_info;
struct _discrete_op_amp_filt_info
{
double r1;
@ -3627,7 +3630,6 @@ struct _discrete_op_amp_filt_info
double vP;
double vN;
};
typedef struct _discrete_op_amp_filt_info discrete_op_amp_filt_info;
#define DEFAULT_555_HIGH -1
@ -3635,6 +3637,7 @@ typedef struct _discrete_op_amp_filt_info discrete_op_amp_filt_info;
#define DEFAULT_555_TRIGGER -1
#define DEFAULT_555_VALUES DEFAULT_555_HIGH, DEFAULT_555_THRESHOLD, DEFAULT_555_TRIGGER
typedef struct _discrete_555_desc discrete_555_desc;
struct _discrete_555_desc
{
int options; // bit mapped options
@ -3643,9 +3646,9 @@ struct _discrete_555_desc
double threshold555; // normally 2/3 of v555
double trigger555; // normally 1/3 of v555
};
typedef struct _discrete_555_desc discrete_555_desc;
typedef struct _discrete_555_cc_desc discrete_555_cc_desc;
struct _discrete_555_cc_desc
{
int options; // bit mapped options
@ -3656,9 +3659,9 @@ struct _discrete_555_cc_desc
double vCCsource; // B+ voltage of the Constant Current source
double vCCjunction; // The voltage drop of the Constant Current source transitor (0 if Op Amp)
};
typedef struct _discrete_555_cc_desc discrete_555_cc_desc;
typedef struct _discrete_555_vco1_desc discrete_555_vco1_desc;
struct _discrete_555_vco1_desc
{
int options; // bit mapped options
@ -3668,18 +3671,18 @@ struct _discrete_555_vco1_desc
double threshold555; // normally 2/3 of v555
double trigger555; // normally 1/3 of v555
};
typedef struct _discrete_555_vco1_desc discrete_555_vco1_desc;
typedef struct _discrete_566_desc discrete_566_desc;
struct _discrete_566_desc
{
int options; // bit mapped options
double vPlus; // B+ voltage of 566
double vNeg; // B- voltage of 566
};
typedef struct _discrete_566_desc discrete_566_desc;
typedef struct _discrete_adsr discrete_adsr;
struct _discrete_adsr
{
double attack_time; /* All times are in seconds */
@ -3691,9 +3694,9 @@ struct _discrete_adsr
double release_time;
double release_value;
};
typedef struct _discrete_adsr discrete_adsr;
typedef struct _discrete_custom_info discrete_custom_info;
struct _discrete_custom_info
{
void (*reset)(node_description *node); /* Called to reset a node after creation or system reset */
@ -3701,7 +3704,6 @@ struct _discrete_custom_info
size_t contextsize;
const void *custom; /* Custom function specific initialisation data */
};
typedef struct _discrete_custom_info discrete_custom_info;
// Taken from the transfer characteristerics diagram in CD4049UB datasheet (TI)
@ -3718,6 +3720,7 @@ typedef struct _discrete_custom_info discrete_custom_info;
#define DISC_OSC_INVERTER_OUT_IS_LOGIC 0x10
typedef struct _discrete_inverter_osc_desc discrete_inverter_osc_desc;
struct _discrete_inverter_osc_desc
{
double vB;
@ -3728,7 +3731,6 @@ struct _discrete_inverter_osc_desc
double clamp; // voltage is clamped to -clamp ... vb+clamp if clamp>= 0;
int options; // bitmaped options
};
typedef struct _discrete_inverter_osc_desc discrete_inverter_osc_desc;
/*************************************
@ -4101,4 +4103,4 @@ node_description *discrete_find_node(void *chip, int node);
WRITE8_HANDLER(discrete_sound_w);
READ8_HANDLER(discrete_sound_r);
#endif
#endif /* __DISCRETE_H__ */

8
src/emu/sound/dmadac.h
View File

@ -5,12 +5,14 @@
*
**********************************************************************************************/
#ifndef DMADAC_H
#define DMADAC_H
#pragma once
#ifndef __DMADAC_H__
#define __DMADAC_H__
void dmadac_transfer(UINT8 first_channel, UINT8 num_channels, offs_t channel_spacing, offs_t frame_spacing, offs_t total_frames, INT16 *data);
void dmadac_enable(UINT8 first_channel, UINT8 num_channels, UINT8 enable);
void dmadac_set_frequency(UINT8 first_channel, UINT8 num_channels, double frequency);
void dmadac_set_volume(UINT8 first_channel, UINT8 num_channels, UINT16 volume);
#endif
#endif /* __DMADAC_H__ */

6
src/emu/sound/es5503.c
View File

@ -275,7 +275,7 @@ static void *es5503_start(const char *tag, int sndindex, int clock, const void *
return chip;
}
READ8_HANDLER(ES5503_reg_0_r)
READ8_HANDLER(es5503_reg_0_r)
{
UINT8 retval;
int i;
@ -386,7 +386,7 @@ READ8_HANDLER(ES5503_reg_0_r)
return 0;
}
WRITE8_HANDLER(ES5503_reg_0_w)
WRITE8_HANDLER(es5503_reg_0_w)
{
ES5503Chip *chip = sndti_token(SOUND_ES5503, 0);
@ -509,7 +509,7 @@ WRITE8_HANDLER(ES5503_reg_0_w)
}
}
void ES5503_set_base_0(UINT8 *wavemem)
void es5503_set_base_0(UINT8 *wavemem)
{
ES5503Chip *chip = sndti_token(SOUND_ES5503, 0);

14
src/emu/sound/es5503.h
View File

@ -1,5 +1,7 @@
#ifndef _ES5503_H_
#define _ES5503_H_
#pragma once
#ifndef __ES5503_H__
#define __ES5503_H__
typedef struct _es5503_interface es5503_interface;
struct _es5503_interface
@ -9,8 +11,8 @@ struct _es5503_interface
UINT8 *wave_memory;
};
READ8_HANDLER(ES5503_reg_0_r);
WRITE8_HANDLER(ES5503_reg_0_w);
void ES5503_set_base_0(UINT8 *wavemem);
READ8_HANDLER(es5503_reg_0_r);
WRITE8_HANDLER(es5503_reg_0_w);
void es5503_set_base_0(UINT8 *wavemem);
#endif
#endif /* __ES5503_H__ */

40
src/emu/sound/es5506.c
View File

@ -1424,26 +1424,26 @@ static UINT8 es5506_reg_read(struct ES5506Chip *chip, offs_t offset)
/**********************************************************************************************
ES5506_data_0_r/ES5506_data_1_r -- handle a read from the status register
es5506_data_0_r/es5506_data_1_r -- handle a read from the status register
**********************************************************************************************/
READ8_HANDLER( ES5506_data_0_r )
READ8_HANDLER( es5506_data_0_r )
{
return es5506_reg_read(sndti_token(SOUND_ES5506, 0), offset);
}
READ8_HANDLER( ES5506_data_1_r )
READ8_HANDLER( es5506_data_1_r )
{
return es5506_reg_read(sndti_token(SOUND_ES5506, 1), offset);
}
READ16_HANDLER( ES5506_data_0_word_r )
READ16_HANDLER( es5506_data_0_word_r )
{
return es5506_reg_read(sndti_token(SOUND_ES5506, 0), offset);
}
READ16_HANDLER( ES5506_data_1_word_r )
READ16_HANDLER( es5506_data_1_word_r )
{
return es5506_reg_read(sndti_token(SOUND_ES5506, 1), offset);
}
@ -1452,27 +1452,27 @@ READ16_HANDLER( ES5506_data_1_word_r )
/**********************************************************************************************
ES5506_data_0_w/ES5506_data_1_w -- handle a write to the current register
es5506_data_0_w/es5506_data_1_w -- handle a write to the current register
***********************************************************************************************/
WRITE8_HANDLER( ES5506_data_0_w )
WRITE8_HANDLER( es5506_data_0_w )
{
es5506_reg_write(sndti_token(SOUND_ES5506, 0), offset, data);
}
WRITE8_HANDLER( ES5506_data_1_w )
WRITE8_HANDLER( es5506_data_1_w )
{
es5506_reg_write(sndti_token(SOUND_ES5506, 1), offset, data);
}
WRITE16_HANDLER( ES5506_data_0_word_w )
WRITE16_HANDLER( es5506_data_0_word_w )
{
if (ACCESSING_BITS_0_7)
es5506_reg_write(sndti_token(SOUND_ES5506, 0), offset, data);
}
WRITE16_HANDLER( ES5506_data_1_word_w )
WRITE16_HANDLER( es5506_data_1_word_w )
{
if (ACCESSING_BITS_0_7)
es5506_reg_write(sndti_token(SOUND_ES5506, 1), offset, data);
@ -1480,13 +1480,13 @@ WRITE16_HANDLER( ES5506_data_1_word_w )
void ES5506_voice_bank_0_w(int voice, int bank)
void es5506_voice_bank_0_w(int voice, int bank)
{
struct ES5506Chip *chip = sndti_token(SOUND_ES5506, 0);
chip->voice[voice].exbank=bank;
}
void ES5506_voice_bank_1_w(int voice, int bank)
void es5506_voice_bank_1_w(int voice, int bank)
{
struct ES5506Chip *chip = sndti_token(SOUND_ES5506, 1);
chip->voice[voice].exbank=bank;
@ -2084,37 +2084,37 @@ static UINT16 es5505_reg_read(struct ES5506Chip *chip, offs_t offset)
/**********************************************************************************************
ES5505_data_0_r/ES5505_data_1_r -- handle a read from the status register
es5505_data_0_r/es5505_data_1_r -- handle a read from the status register
***********************************************************************************************/
READ16_HANDLER( ES5505_data_0_r )
READ16_HANDLER( es5505_data_0_r )
{
return es5505_reg_read(sndti_token(SOUND_ES5505, 0), offset);
}
READ16_HANDLER( ES5505_data_1_r )
READ16_HANDLER( es5505_data_1_r )
{
return es5505_reg_read(sndti_token(SOUND_ES5505, 1), offset);
}
/**********************************************************************************************
ES5505_data_0_w/ES5505_data_1_w -- handle a write to the current register
es5505_data_0_w/es5505_data_1_w -- handle a write to the current register
***********************************************************************************************/
WRITE16_HANDLER( ES5505_data_0_w )
WRITE16_HANDLER( es5505_data_0_w )
{
es5505_reg_write(sndti_token(SOUND_ES5505, 0), offset, data, mem_mask);
}
WRITE16_HANDLER( ES5505_data_1_w )
WRITE16_HANDLER( es5505_data_1_w )
{
es5505_reg_write(sndti_token(SOUND_ES5505, 1), offset, data, mem_mask);
}
void ES5505_voice_bank_0_w(int voice, int bank)
void es5505_voice_bank_0_w(int voice, int bank)
{
struct ES5506Chip *chip = sndti_token(SOUND_ES5505, 0);
#if RAINE_CHECK
@ -2123,7 +2123,7 @@ void ES5505_voice_bank_0_w(int voice, int bank)
chip->voice[voice].exbank=bank;
}
void ES5505_voice_bank_1_w(int voice, int bank)
void es5505_voice_bank_1_w(int voice, int bank)
{
struct ES5506Chip *chip = sndti_token(SOUND_ES5505, 1);
#if RAINE_CHECK

40
src/emu/sound/es5506.h
View File

@ -5,8 +5,10 @@
*
**********************************************************************************************/
#ifndef ES5506_H
#define ES5506_H
#pragma once
#ifndef __ES5506_H__
#define __ES5506_H__
typedef struct _es5505_interface es5505_interface;
struct _es5505_interface
@ -17,13 +19,13 @@ struct _es5505_interface
UINT16 (*read_port)(void); /* input port read */
};
READ16_HANDLER( ES5505_data_0_r );
READ16_HANDLER( ES5505_data_1_r );
WRITE16_HANDLER( ES5505_data_0_w );
WRITE16_HANDLER( ES5505_data_1_w );
READ16_HANDLER( es5505_data_0_r );
READ16_HANDLER( es5505_data_1_r );
WRITE16_HANDLER( es5505_data_0_w );
WRITE16_HANDLER( es5505_data_1_w );
void ES5505_voice_bank_0_w(int voice, int bank);
void ES5505_voice_bank_1_w(int voice, int bank);
void es5505_voice_bank_0_w(int voice, int bank);
void es5505_voice_bank_1_w(int voice, int bank);
@ -38,17 +40,17 @@ struct _es5506_interface
UINT16 (*read_port)(void); /* input port read */
};
READ8_HANDLER( ES5506_data_0_r );
READ8_HANDLER( ES5506_data_1_r );
WRITE8_HANDLER( ES5506_data_0_w );
WRITE8_HANDLER( ES5506_data_1_w );
READ8_HANDLER( es5506_data_0_r );
READ8_HANDLER( es5506_data_1_r );
WRITE8_HANDLER( es5506_data_0_w );
WRITE8_HANDLER( es5506_data_1_w );
READ16_HANDLER( ES5506_data_0_word_r );
READ16_HANDLER( ES5506_data_1_word_r );
WRITE16_HANDLER( ES5506_data_0_word_w );
WRITE16_HANDLER( ES5506_data_1_word_w );
READ16_HANDLER( es5506_data_0_word_r );
READ16_HANDLER( es5506_data_1_word_r );
WRITE16_HANDLER( es5506_data_0_word_w );
WRITE16_HANDLER( es5506_data_1_word_w );
void ES5506_voice_bank_0_w(int voice, int bank);
void ES5506_voice_bank_1_w(int voice, int bank);
void es5506_voice_bank_0_w(int voice, int bank);
void es5506_voice_bank_1_w(int voice, int bank);
#endif
#endif /* __ES5506_H__ */

36
src/emu/sound/es8712.c
View File

@ -264,11 +264,11 @@ static void es8712_reset(void *chip_src)
/****************************************************************************
ES8712_set_bank_base -- set the base of the bank on a given chip
es8712_set_bank_base -- set the base of the bank on a given chip
*****************************************************************************/
void ES8712_set_bank_base(int which, int base)
void es8712_set_bank_base(int which, int base)
{
struct es8712 *chip = sndti_token(SOUND_ES8712, which);
stream_update(chip->stream);
@ -278,11 +278,11 @@ void ES8712_set_bank_base(int which, int base)
/****************************************************************************
ES8712_set_frequency -- dynamically adjusts the frequency of a given ADPCM chip
es8712_set_frequency -- dynamically adjusts the frequency of a given ADPCM chip
*****************************************************************************/
void ES8712_set_frequency(int which, int frequency)
void es8712_set_frequency(int which, int frequency)
{
struct es8712 *chip = sndti_token(SOUND_ES8712, which);
@ -295,11 +295,11 @@ void ES8712_set_frequency(int which, int frequency)
/**********************************************************************************************
ES8712_play -- Begin playing the addressed sample
es8712_play -- Begin playing the addressed sample
***********************************************************************************************/
void ES8712_play(int which)
void es8712_play(int which)
{
struct es8712 *chip = sndti_token(SOUND_ES8712, which);
@ -337,8 +337,8 @@ void ES8712_play(int which)
/**********************************************************************************************
ES8712_data_0_w -- generic data write functions
ES8712_data_1_w
es8712_data_0_w -- generic data write functions
es8712_data_1_w
***********************************************************************************************/
@ -377,59 +377,59 @@ static void ES8712_data_w(int which, int offset, UINT32 data)
case 05: chip->end &= 0x0000ffff;
chip->end |= ((data & 0x0f) << 16); break;
case 06:
ES8712_play(which);
es8712_play(which);
break;
default: break;
}
chip->start &= 0xfffff; chip->end &= 0xfffff;
}
WRITE8_HANDLER( ES8712_data_0_w )
WRITE8_HANDLER( es8712_data_0_w )
{
ES8712_data_w(0, offset, data);
}
WRITE8_HANDLER( ES8712_data_1_w )
WRITE8_HANDLER( es8712_data_1_w )
{
ES8712_data_w(1, offset, data);
}
WRITE8_HANDLER( ES8712_data_2_w )
WRITE8_HANDLER( es8712_data_2_w )
{
ES8712_data_w(2, offset, data);
}
WRITE16_HANDLER( ES8712_data_0_lsb_w )
WRITE16_HANDLER( es8712_data_0_lsb_w )
{
if (ACCESSING_BITS_0_7)
ES8712_data_w(0, offset, data & 0xff);
}
WRITE16_HANDLER( ES8712_data_1_lsb_w )
WRITE16_HANDLER( es8712_data_1_lsb_w )
{
if (ACCESSING_BITS_0_7)
ES8712_data_w(1, offset, data & 0xff);
}
WRITE16_HANDLER( ES8712_data_2_lsb_w )
WRITE16_HANDLER( es8712_data_2_lsb_w )
{
if (ACCESSING_BITS_0_7)
ES8712_data_w(2, offset, data & 0xff);
}
WRITE16_HANDLER( ES8712_data_0_msb_w )
WRITE16_HANDLER( es8712_data_0_msb_w )
{
if (ACCESSING_BITS_8_15)
ES8712_data_w(0, offset, data >> 8);
}
WRITE16_HANDLER( ES8712_data_1_msb_w )
WRITE16_HANDLER( es8712_data_1_msb_w )
{
if (ACCESSING_BITS_8_15)
ES8712_data_w(1, offset, data >> 8);
}
WRITE16_HANDLER( ES8712_data_2_msb_w )
WRITE16_HANDLER( es8712_data_2_msb_w )
{
if (ACCESSING_BITS_8_15)
ES8712_data_w(2, offset, data >> 8);

32
src/emu/sound/es8712.h
View File

@ -1,20 +1,22 @@
#ifndef ES8712_H
#define ES8712_H
#pragma once
#ifndef __ES8712_H__
#define __ES8712_H__
/* An interface for the ES8712 ADPCM chip */
void ES8712_play(int which);
void ES8712_set_bank_base(int which, int base);
void ES8712_set_frequency(int which, int frequency);
void es8712_play(int which);
void es8712_set_bank_base(int which, int base);
void es8712_set_frequency(int which, int frequency);
WRITE8_HANDLER( ES8712_data_0_w );
WRITE8_HANDLER( ES8712_data_1_w );
WRITE8_HANDLER( ES8712_data_2_w );
WRITE16_HANDLER( ES8712_data_0_lsb_w );
WRITE16_HANDLER( ES8712_data_1_lsb_w );
WRITE16_HANDLER( ES8712_data_2_lsb_w );
WRITE16_HANDLER( ES8712_data_0_msb_w );
WRITE16_HANDLER( ES8712_data_1_msb_w );
WRITE16_HANDLER( ES8712_data_2_msb_w );
WRITE8_HANDLER( es8712_data_0_w );
WRITE8_HANDLER( es8712_data_1_w );
WRITE8_HANDLER( es8712_data_2_w );
WRITE16_HANDLER( es8712_data_0_lsb_w );
WRITE16_HANDLER( es8712_data_1_lsb_w );
WRITE16_HANDLER( es8712_data_2_lsb_w );
WRITE16_HANDLER( es8712_data_0_msb_w );
WRITE16_HANDLER( es8712_data_1_msb_w );
WRITE16_HANDLER( es8712_data_2_msb_w );
#endif
#endif /* __ES8712_H__ */

28
src/emu/sound/filter.h
View File

@ -1,10 +1,12 @@
#ifndef __FILTER_H
#define __FILTER_H
#pragma once
#ifndef __FILTER_H__
#define __FILTER_H__
/* Max filter order */
#define FILTER_ORDER_MAX 51
/* Define to use interger calculation */
/* Define to use integer calculation */
#define FILTER_USE_INT
#ifdef FILTER_USE_INT
@ -14,15 +16,19 @@ typedef int filter_real;
typedef double filter_real;
#endif
typedef struct filter_struct {
typedef struct _filter filter;
struct _filter
{
filter_real xcoeffs[(FILTER_ORDER_MAX+1)/2];
unsigned order;
} filter;
};
typedef struct filter_state_struct {
typedef struct _filter_state filter_state;
struct _filter_state
{
unsigned prev_mac;
filter_real xprev[FILTER_ORDER_MAX];
} filter_state;
};
/* Allocate a FIR Low Pass filter */
filter* filter_lp_fir_alloc(double freq, int order);
@ -59,12 +65,14 @@ filter_real filter_compute(filter* f, filter_state* s);
#define Q_TO_DAMP(q) (1.0/q)
typedef struct filter2_context_struct {
typedef struct _filter2_context filter2_context;
struct _filter2_context
{
double x0, x1, x2; /* x[k], x[k-1], x[k-2], current and previous 2 input values */
double y0, y1, y2; /* y[k], y[k-1], y[k-2], current and previous 2 output values */
double a1, a2; /* digital filter coefficients, denominator */
double b0, b1, b2; /* digital filter coefficients, numerator */
} filter2_context;
};
/* Setup the filter context based on the passed filter type info.
@ -109,4 +117,4 @@ void filter2_step(filter2_context *filter2);
void filter_opamp_m_bandpass_setup(double r1, double r2, double r3, double c1, double c2,
filter2_context *filter2);
#endif
#endif /* __FILTER_H__ */

6
src/emu/sound/flt_rc.h
View File

@ -1,4 +1,6 @@
#ifndef FLT_RC_H
#pragma once
#ifndef __FLT_RC_H__
#define FLT_RC_H
#include "rescap.h"
@ -56,4 +58,4 @@ extern const flt_rc_config flt_rc_ac_default;
void filter_rc_set_RC(int num, int type, double R1, double R2, double R3, double C);
#endif
#endif /* __FLT_RC_H__ */

8
src/emu/sound/flt_vol.h
View File

@ -1,6 +1,8 @@
#ifndef FLT_VOL_H
#define FLT_VOL_H
#pragma once
#ifndef __FLT_VOL_H__
#define __FLT_VOL_H__
void flt_volume_set_volume(int num, float volume);
#endif
#endif /* __FLT_VOL_H__ */

110
src/emu/sound/fm.c
View File

@ -2190,7 +2190,7 @@ typedef struct
} YM2203;
/* Generate samples for one of the YM2203s */
void YM2203UpdateOne(void *chip, FMSAMPLE *buffer, int length)
void ym2203_update_one(void *chip, FMSAMPLE *buffer, int length)
{
YM2203 *F2203 = chip;
FM_OPN *OPN = &F2203->OPN;
@ -2273,7 +2273,7 @@ void YM2203UpdateOne(void *chip, FMSAMPLE *buffer, int length)
}
/* ---------- reset one of chip ---------- */
void YM2203ResetChip(void *chip)
void ym2203_reset_chip(void *chip)
{
int i;
YM2203 *F2203 = chip;
@ -2300,7 +2300,7 @@ void YM2203ResetChip(void *chip)
}
#ifdef __STATE_H__
void YM2203Postload(void *chip)
void ym2203_postload(void *chip)
{
if (chip)
{
@ -2351,7 +2351,7 @@ static void YM2203_save_state(YM2203 *F2203, int index)
'clock' is the chip clock in Hz
'rate' is sampling rate
*/
void * YM2203Init(void *param, int index, int clock, int rate,
void * ym2203_init(void *param, int index, int clock, int rate,
FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg)
{
YM2203 *F2203;
@ -2377,7 +2377,7 @@ void * YM2203Init(void *param, int index, int clock, int rate,
F2203->OPN.ST.timer_handler = timer_handler;
F2203->OPN.ST.IRQ_Handler = IRQHandler;
F2203->OPN.ST.SSG = ssg;
YM2203ResetChip(F2203);
ym2203_reset_chip(F2203);
#ifdef __STATE_H__
YM2203_save_state(F2203, index);
@ -2386,7 +2386,7 @@ void * YM2203Init(void *param, int index, int clock, int rate,
}
/* shut down emulator */
void YM2203Shutdown(void *chip)
void ym2203_shutdown(void *chip)
{
YM2203 *FM2203 = chip;
@ -2395,7 +2395,7 @@ void YM2203Shutdown(void *chip)
}
/* YM2203 I/O interface */
int YM2203Write(void *chip,int a,UINT8 v)
int ym2203_write(void *chip,int a,UINT8 v)
{
YM2203 *F2203 = chip;
FM_OPN *OPN = &F2203->OPN;
@ -2422,12 +2422,12 @@ int YM2203Write(void *chip,int a,UINT8 v)
(*OPN->ST.SSG->write)(OPN->ST.param,a,v);
break;
case 0x20: /* 0x20-0x2f : Mode section */
YM2203UpdateReq(OPN->ST.param);
ym2203_update_req(OPN->ST.param);
/* write register */
OPNWriteMode(OPN,addr,v);
break;
default: /* 0x30-0xff : OPN section */
YM2203UpdateReq(OPN->ST.param);
ym2203_update_req(OPN->ST.param);
/* write register */
OPNWriteReg(OPN,addr,v);
}
@ -2436,7 +2436,7 @@ int YM2203Write(void *chip,int a,UINT8 v)
return OPN->ST.irq;
}
UINT8 YM2203Read(void *chip,int a)
UINT8 ym2203_read(void *chip,int a)
{
YM2203 *F2203 = chip;
int addr = F2203->OPN.ST.address;
@ -2453,7 +2453,7 @@ UINT8 YM2203Read(void *chip,int a)
return ret;
}
int YM2203TimerOver(void *chip,int c)
int ym2203_timer_over(void *chip,int c)
{
YM2203 *F2203 = chip;
@ -2463,7 +2463,7 @@ int YM2203TimerOver(void *chip,int c)
}
else
{ /* Timer A */
YM2203UpdateReq(F2203->OPN.ST.param);
ym2203_update_req(F2203->OPN.ST.param);
/* timer update */
TimerAOver( &(F2203->OPN.ST) );
/* CSM mode key,TL control */
@ -3362,7 +3362,7 @@ INLINE void YM2608IRQMaskWrite(FM_OPN *OPN, YM2608 *F2608, int v)
}
/* Generate samples for one of the YM2608s */
void YM2608UpdateOne(void *chip, FMSAMPLE **buffer, int length)
void ym2608_update_one(void *chip, FMSAMPLE **buffer, int length)
{
YM2608 *F2608 = chip;
FM_OPN *OPN = &F2608->OPN;
@ -3502,7 +3502,7 @@ void YM2608UpdateOne(void *chip, FMSAMPLE **buffer, int length)
}
#ifdef __STATE_H__
void YM2608Postload(void *chip)
void ym2608_postload(void *chip)
{
if (chip)
{
@ -3578,7 +3578,7 @@ static void YM2608_deltat_status_reset(void *chip, UINT8 changebits)
FM_STATUS_RESET(&(F2608->OPN.ST), changebits);
}
/* YM2608(OPNA) */
void * YM2608Init(void *param, int index, int clock, int rate,
void * ym2608_init(void *param, int index, int clock, int rate,
void *pcmrom,int pcmsize,
FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg)
{
@ -3625,7 +3625,7 @@ void * YM2608Init(void *param, int index, int clock, int rate,
F2608->pcmbuf = YM2608_ADPCM_ROM;
F2608->pcm_size = 0x2000;
YM2608ResetChip(F2608);
ym2608_reset_chip(F2608);
Init_ADPCMATable();
@ -3636,7 +3636,7 @@ void * YM2608Init(void *param, int index, int clock, int rate,
}
/* shut down emulator */
void YM2608Shutdown(void *chip)
void ym2608_shutdown(void *chip)
{
YM2608 *F2608 = chip;
@ -3645,7 +3645,7 @@ void YM2608Shutdown(void *chip)
}
/* reset one of chips */
void YM2608ResetChip(void *chip)
void ym2608_reset_chip(void *chip)
{
int i;
YM2608 *F2608 = chip;
@ -3727,7 +3727,7 @@ void YM2608ResetChip(void *chip)
/* n = number */
/* a = address */
/* v = value */
int YM2608Write(void *chip, int a,UINT8 v)
int ym2608_write(void *chip, int a,UINT8 v)
{
YM2608 *F2608 = chip;
FM_OPN *OPN = &F2608->OPN;
@ -3765,7 +3765,7 @@ int YM2608Write(void *chip, int a,UINT8 v)
(*OPN->ST.SSG->write)(OPN->ST.param,a,v);
break;
case 0x10: /* 0x10-0x1f : Rhythm section */
YM2608UpdateReq(OPN->ST.param);
ym2608_update_req(OPN->ST.param);
FM_ADPCMAWrite(F2608,addr-0x10,v);
break;
case 0x20: /* Mode Register */
@ -3775,12 +3775,12 @@ int YM2608Write(void *chip, int a,UINT8 v)
YM2608IRQMaskWrite(OPN, F2608, v);
break;
default:
YM2608UpdateReq(OPN->ST.param);
ym2608_update_req(OPN->ST.param);
OPNWriteMode(OPN,addr,v);
}
break;
default: /* OPN section */
YM2608UpdateReq(OPN->ST.param);
ym2608_update_req(OPN->ST.param);
OPNWriteReg(OPN,addr,v);
}
break;
@ -3796,7 +3796,7 @@ int YM2608Write(void *chip, int a,UINT8 v)
addr = OPN->ST.address;
F2608->REGS[addr | 0x100] = v;
YM2608UpdateReq(OPN->ST.param);
ym2608_update_req(OPN->ST.param);
switch( addr & 0xf0 )
{
case 0x00: /* DELTAT PORT */
@ -3823,7 +3823,7 @@ int YM2608Write(void *chip, int a,UINT8 v)
return OPN->ST.irq;
}
UINT8 YM2608Read(void *chip,int a)
UINT8 ym2608_read(void *chip,int a)
{
YM2608 *F2608 = chip;
int addr = F2608->OPN.ST.address;
@ -3863,7 +3863,7 @@ UINT8 YM2608Read(void *chip,int a)
return ret;
}
int YM2608TimerOver(void *chip,int c)
int ym2608_timer_over(void *chip,int c)
{
YM2608 *F2608 = chip;
@ -3883,7 +3883,7 @@ int YM2608TimerOver(void *chip,int c)
break;
case 0:
{ /* Timer A */
YM2608UpdateReq(F2608->OPN.ST.param);
ym2608_update_req(F2608->OPN.ST.param);
/* timer update */
TimerAOver( &(F2608->OPN.ST) );
/* CSM mode key,TL controll */
@ -3908,7 +3908,7 @@ int YM2608TimerOver(void *chip,int c)
/* YM2610(OPNB) */
/* Generate samples for one of the YM2610s */
void YM2610UpdateOne(void *chip, FMSAMPLE **buffer, int length)
void ym2610_update_one(void *chip, FMSAMPLE **buffer, int length)
{
YM2610 *F2610 = chip;
FM_OPN *OPN = &F2610->OPN;
@ -4045,7 +4045,7 @@ void YM2610UpdateOne(void *chip, FMSAMPLE **buffer, int length)
#if BUILD_YM2610B
/* Generate samples for one of the YM2610Bs */
void YM2610BUpdateOne(void *chip, FMSAMPLE **buffer, int length)
void ym2610b_update_one(void *chip, FMSAMPLE **buffer, int length)
{
YM2610 *F2610 = chip;
FM_OPN *OPN = &F2610->OPN;
@ -4185,7 +4185,7 @@ void YM2610BUpdateOne(void *chip, FMSAMPLE **buffer, int length)
#ifdef __STATE_H__
void YM2610Postload(void *chip)
void ym2610_postload(void *chip)
{
if (chip)
{
@ -4265,7 +4265,7 @@ static void YM2610_deltat_status_reset(void *chip, UINT8 changebits)
F2610->adpcm_arrivedEndAddress &= (~changebits);
}
void *YM2610Init(void *param, int index, int clock, int rate,
void *ym2610_init(void *param, int index, int clock, int rate,
void *pcmroma,int pcmsizea,void *pcmromb,int pcmsizeb,
FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg)
@ -4306,7 +4306,7 @@ void *YM2610Init(void *param, int index, int clock, int rate,
F2610->deltaT.status_change_which_chip = F2610;
F2610->deltaT.status_change_EOS_bit = 0x80; /* status flag: set bit7 on End Of Sample */
YM2610ResetChip(F2610);
ym2610_reset_chip(F2610);
Init_ADPCMATable();
#ifdef __STATE_H__
@ -4316,7 +4316,7 @@ void *YM2610Init(void *param, int index, int clock, int rate,
}
/* shut down emulator */
void YM2610Shutdown(void *chip)
void ym2610_shutdown(void *chip)
{
YM2610 *F2610 = chip;
@ -4325,7 +4325,7 @@ void YM2610Shutdown(void *chip)
}
/* reset one of chip */
void YM2610ResetChip(void *chip)
void ym2610_reset_chip(void *chip)
{
int i;
YM2610 *F2610 = chip;
@ -4391,7 +4391,7 @@ void YM2610ResetChip(void *chip)
/* n = number */
/* a = address */
/* v = value */
int YM2610Write(void *chip, int a, UINT8 v)
int ym2610_write(void *chip, int a, UINT8 v)
{
YM2610 *F2610 = chip;
FM_OPN *OPN = &F2610->OPN;
@ -4422,7 +4422,7 @@ int YM2610Write(void *chip, int a, UINT8 v)
(*OPN->ST.SSG->write)(OPN->ST.param,a,v);
break;
case 0x10: /* DeltaT ADPCM */
YM2610UpdateReq(OPN->ST.param);
ym2610_update_req(OPN->ST.param);
switch(addr)
{
@ -4462,11 +4462,11 @@ int YM2610Write(void *chip, int a, UINT8 v)
break;
case 0x20: /* Mode Register */
YM2610UpdateReq(OPN->ST.param);
ym2610_update_req(OPN->ST.param);
OPNWriteMode(OPN,addr,v);
break;
default: /* OPN section */
YM2610UpdateReq(OPN->ST.param);
ym2610_update_req(OPN->ST.param);
/* write register */
OPNWriteReg(OPN,addr,v);
}
@ -4481,7 +4481,7 @@ int YM2610Write(void *chip, int a, UINT8 v)
if (F2610->addr_A1 != 1)
break; /* verified on real YM2608 */
YM2610UpdateReq(OPN->ST.param);
ym2610_update_req(OPN->ST.param);
addr = OPN->ST.address;
F2610->REGS[addr | 0x100] = v;
if( addr < 0x30 )
@ -4493,7 +4493,7 @@ int YM2610Write(void *chip, int a, UINT8 v)
return OPN->ST.irq;
}
UINT8 YM2610Read(void *chip,int a)
UINT8 ym2610_read(void *chip,int a)
{
YM2610 *F2610 = chip;
int addr = F2610->OPN.ST.address;
@ -4521,7 +4521,7 @@ UINT8 YM2610Read(void *chip,int a)
return ret;
}
int YM2610TimerOver(void *chip,int c)
int ym2610_timer_over(void *chip,int c)
{
YM2610 *F2610 = chip;
@ -4531,7 +4531,7 @@ int YM2610TimerOver(void *chip,int c)
}
else
{ /* Timer A */
YM2610UpdateReq(F2610->OPN.ST.param);
ym2610_update_req(F2610->OPN.ST.param);
/* timer update */
TimerAOver( &(F2610->OPN.ST) );
/* CSM mode key,TL controll */
@ -4567,7 +4567,7 @@ typedef struct
static int dacen;
/* Generate samples for one of the YM2612s */
void YM2612UpdateOne(void *chip, FMSAMPLE **buffer, int length)
void ym2612_update_one(void *chip, FMSAMPLE **buffer, int length)
{
YM2612 *F2612 = chip;
FM_OPN *OPN = &F2612->OPN;
@ -4687,7 +4687,7 @@ void YM2612UpdateOne(void *chip, FMSAMPLE **buffer, int length)
}
#ifdef __STATE_H__
void YM2612Postload(void *chip)
void ym2612_postload(void *chip)
{
if (chip)
{
@ -4734,7 +4734,7 @@ static void YM2612_save_state(YM2612 *F2612, int index)
#endif /* _STATE_H */
/* initialize YM2612 emulator(s) */
void * YM2612Init(void *param, int index, int clock, int rate,
void * ym2612_init(void *param, int index, int clock, int rate,
FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler)
{
YM2612 *F2612;
@ -4761,7 +4761,7 @@ void * YM2612Init(void *param, int index, int clock, int rate,
/* Extend handler */
F2612->OPN.ST.timer_handler = timer_handler;
F2612->OPN.ST.IRQ_Handler = IRQHandler;
YM2612ResetChip(F2612);
ym2612_reset_chip(F2612);
#ifdef __STATE_H__
YM2612_save_state(F2612, index);
@ -4770,7 +4770,7 @@ void * YM2612Init(void *param, int index, int clock, int rate,
}
/* shut down emulator */
void YM2612Shutdown(void *chip)
void ym2612_shutdown(void *chip)
{
YM2612 *F2612 = chip;
@ -4779,7 +4779,7 @@ void YM2612Shutdown(void *chip)
}
/* reset one of chip */
void YM2612ResetChip(void *chip)
void ym2612_reset_chip(void *chip)
{
int i;
YM2612 *F2612 = chip;
@ -4816,7 +4816,7 @@ void YM2612ResetChip(void *chip)
/* n = number */
/* a = address */
/* v = value */
int YM2612Write(void *chip, int a, UINT8 v)
int ym2612_write(void *chip, int a, UINT8 v)
{
YM2612 *F2612 = chip;
int addr;
@ -4841,7 +4841,7 @@ int YM2612Write(void *chip, int a, UINT8 v)
switch( addr )
{
case 0x2a: /* DAC data (YM2612) */
YM2612UpdateReq(F2612->OPN.ST.param);
ym2612_update_req(F2612->OPN.ST.param);
F2612->dacout = ((int)v - 0x80) << 7; /* level unknown */
break;
case 0x2b: /* DAC Sel (YM2612) */
@ -4849,13 +4849,13 @@ int YM2612Write(void *chip, int a, UINT8 v)
F2612->dacen = v & 0x80;
break;
default: /* OPN section */
YM2612UpdateReq(F2612->OPN.ST.param);
ym2612_update_req(F2612->OPN.ST.param);
/* write register */
OPNWriteMode(&(F2612->OPN),addr,v);
}
break;
default: /* 0x30-0xff OPN section */
YM2612UpdateReq(F2612->OPN.ST.param);
ym2612_update_req(F2612->OPN.ST.param);
/* write register */
OPNWriteReg(&(F2612->OPN),addr,v);
}
@ -4872,14 +4872,14 @@ int YM2612Write(void *chip, int a, UINT8 v)
addr = F2612->OPN.ST.address;
F2612->REGS[addr | 0x100] = v;
YM2612UpdateReq(F2612->OPN.ST.param);
ym2612_update_req(F2612->OPN.ST.param);
OPNWriteReg(&(F2612->OPN),addr | 0x100,v);
break;
}
return F2612->OPN.ST.irq;
}
UINT8 YM2612Read(void *chip,int a)
UINT8 ym2612_read(void *chip,int a)
{
YM2612 *F2612 = chip;
@ -4895,7 +4895,7 @@ UINT8 YM2612Read(void *chip,int a)
return 0;
}
int YM2612TimerOver(void *chip,int c)
int ym2612_timer_over(void *chip,int c)
{
YM2612 *F2612 = chip;
@ -4905,7 +4905,7 @@ int YM2612TimerOver(void *chip,int c)
}
else
{ /* Timer A */
YM2612UpdateReq(F2612->OPN.ST.param);
ym2612_update_req(F2612->OPN.ST.param);
/* timer update */
TimerAOver( &(F2612->OPN.ST) );
/* CSM mode key,TL controll */

109
src/emu/sound/fm.h
View File

@ -2,8 +2,11 @@
File: fm.h -- header file for software emulation for FM sound generator
*/
#ifndef _H_FM_FM_
#define _H_FM_FM_
#pragma once
#ifndef __FM_H__
#define __FM_H__
/* --- select emulation chips --- */
#define BUILD_YM2203 (HAS_YM2203) /* build YM2203(OPN) emulator */
@ -47,24 +50,27 @@ struct _ssg_callbacks
#if BUILD_YM2203
/* in 2203intf.c */
void YM2203UpdateRequest(void *param);
#define YM2203UpdateReq(chip) YM2203UpdateRequest(chip)
#endif
void ym2203_update_request(void *param);
#define ym2203_update_req(chip) ym2203_update_request(chip)
#endif /* BUILD_YM2203 */
#if BUILD_YM2608
/* in 2608intf.c */
void YM2608UpdateRequest(void *param);
#define YM2608UpdateReq(chip) YM2608UpdateRequest(chip);
#endif
void ym2608_update_request(void *param);
#define ym2608_update_req(chip) ym2608_update_request(chip);
#endif /* BUILD_YM2608 */
#if (BUILD_YM2610||BUILD_YM2610B)
/* in 2610intf.c */
void YM2610UpdateRequest(void *param);
#define YM2610UpdateReq(chip) YM2610UpdateRequest(chip);
#endif
void ym2610_update_request(void *param);
#define ym2610_update_req(chip) ym2610_update_request(chip);
#endif /* (BUILD_YM2610||BUILD_YM2610B) */
#if (BUILD_YM2612||BUILD_YM3438)
/* in 2612intf.c */
void YM2612UpdateRequest(void *param);
#define YM2612UpdateReq(chip) YM2612UpdateRequest(chip);
#endif
void ym2612_update_request(void *param);
#define ym2612_update_req(chip) ym2612_update_request(chip);
#endif /* (BUILD_YM2612||BUILD_YM3438) */
/* compiler dependence */
#if 0
@ -76,7 +82,7 @@ typedef unsigned int UINT32; /* unsigned 32bit */
typedef signed char INT8; /* signed 8bit */
typedef signed short INT16; /* signed 16bit */
typedef signed int INT32; /* signed 32bit */
#endif
#endif /* OSD_CPU_H */
#endif
#ifndef INLINE
@ -121,92 +127,93 @@ typedef void (*FM_IRQHANDLER)(void *param,int irq);
** 'IRQHandler' IRQ callback handler when changed IRQ level
** return 0 = success
*/
void * YM2203Init(void *param, int index, int baseclock, int rate,
void * ym2203_init(void *param, int index, int baseclock, int rate,
FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg);
/*
** shutdown the YM2203 emulators
*/
void YM2203Shutdown(void *chip);
void ym2203_shutdown(void *chip);
/*
** reset all chip registers for YM2203 number 'num'
*/
void YM2203ResetChip(void *chip);
void ym2203_reset_chip(void *chip);
/*
** update one of chip
*/
void YM2203UpdateOne(void *chip, FMSAMPLE *buffer, int length);
void ym2203_update_one(void *chip, FMSAMPLE *buffer, int length);
/*
** Write
** return : InterruptLevel
*/
int YM2203Write(void *chip,int a,unsigned char v);
int ym2203_write(void *chip,int a,unsigned char v);
/*
** Read
** return : InterruptLevel
*/
unsigned char YM2203Read(void *chip,int a);
unsigned char ym2203_read(void *chip,int a);
/*
** Timer OverFlow
*/
int YM2203TimerOver(void *chip, int c);
int ym2203_timer_over(void *chip, int c);
/*
** State Save
*/
void YM2203Postload(void *chip);
void ym2203_postload(void *chip);
#endif /* BUILD_YM2203 */
#if BUILD_YM2608
/* -------------------- YM2608(OPNA) Interface -------------------- */
void * YM2608Init(void *param, int index, int baseclock, int rate,
void * ym2608_init(void *param, int index, int baseclock, int rate,
void *pcmroma,int pcmsizea,
FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg);
void YM2608Shutdown(void *chip);
void YM2608ResetChip(void *chip);
void YM2608UpdateOne(void *chip, FMSAMPLE **buffer, int length);
void ym2608_shutdown(void *chip);
void ym2608_reset_chip(void *chip);
void ym2608_update_one(void *chip, FMSAMPLE **buffer, int length);
int YM2608Write(void *chip, int a,unsigned char v);
unsigned char YM2608Read(void *chip,int a);
int YM2608TimerOver(void *chip, int c );
void YM2608Postload(void *chip);
int ym2608_write(void *chip, int a,unsigned char v);
unsigned char ym2608_read(void *chip,int a);
int ym2608_timer_over(void *chip, int c );
void ym2608_postload(void *chip);
#endif /* BUILD_YM2608 */
#if (BUILD_YM2610||BUILD_YM2610B)
/* -------------------- YM2610(OPNB) Interface -------------------- */
void * YM2610Init(void *param, int index, int baseclock, int rate,
void * ym2610_init(void *param, int index, int baseclock, int rate,
void *pcmroma,int pcmasize,void *pcmromb,int pcmbsize,
FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg);
void YM2610Shutdown(void *chip);
void YM2610ResetChip(void *chip);
void YM2610UpdateOne(void *chip, FMSAMPLE **buffer, int length);
#if BUILD_YM2610B
void YM2610BUpdateOne(void *chip, FMSAMPLE **buffer, int length);
#endif
void ym2610_shutdown(void *chip);
void ym2610_reset_chip(void *chip);
void ym2610_update_one(void *chip, FMSAMPLE **buffer, int length);
int YM2610Write(void *chip, int a,unsigned char v);
unsigned char YM2610Read(void *chip,int a);
int YM2610TimerOver(void *chip, int c );
void YM2610Postload(void *chip);
#if BUILD_YM2610B
void ym2610b_update_one(void *chip, FMSAMPLE **buffer, int length);
#endif /* BUILD_YM2610B */
int ym2610_write(void *chip, int a,unsigned char v);
unsigned char ym2610_read(void *chip,int a);
int ym2610_timer_over(void *chip, int c );
void ym2610_postload(void *chip);
#endif /* (BUILD_YM2610||BUILD_YM2610B) */
#if (BUILD_YM2612||BUILD_YM3438)
void * YM2612Init(void *param, int index, int baseclock, int rate,
void * ym2612_init(void *param, int index, int baseclock, int rate,
FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler);
void YM2612Shutdown(void *chip);
void YM2612ResetChip(void *chip);
void YM2612UpdateOne(void *chip, FMSAMPLE **buffer, int length);
void ym2612_shutdown(void *chip);
void ym2612_reset_chip(void *chip);
void ym2612_update_one(void *chip, FMSAMPLE **buffer, int length);
int YM2612Write(void *chip, int a,unsigned char v);
unsigned char YM2612Read(void *chip,int a);
int YM2612TimerOver(void *chip, int c );
void YM2612Postload(void *chip);
int ym2612_write(void *chip, int a,unsigned char v);
unsigned char ym2612_read(void *chip,int a);
int ym2612_timer_over(void *chip, int c );
void ym2612_postload(void *chip);
#endif /* (BUILD_YM2612||BUILD_YM3438) */
#endif /* _H_FM_FM_ */
#endif /* __FM_H__ */

80
src/emu/sound/fmopl.c
View File

@ -22,12 +22,12 @@ Revision History:
14-06-2003 Jarek Burczynski:
- implemented all of the status register flags in Y8950 emulation
- renamed Y8950SetDeltaTMemory() parameters from _rom_ to _mem_ since
- renamed y8950_set_delta_t_memory() parameters from _rom_ to _mem_ since
they can be either RAM or ROM
08-10-2002 Jarek Burczynski (thanks to Dox for the YM3526 chip)
- corrected YM3526Read() to always set bit 2 and bit 1
to HIGH state - identical to YM3812Read (verified on real YM3526)
- corrected ym3526_read() to always set bit 2 and bit 1
to HIGH state - identical to ym3812_read (verified on real YM3526)
04-28-2002 Jarek Burczynski:
- binary exact Envelope Generator (verified on real YM3812);
@ -35,7 +35,7 @@ Revision History:
rates are 2 times slower and volume resolution is one bit less
- modified interface functions (they no longer return pointer -
that's internal to the emulator now):
- new wrapper functions for OPLCreate: YM3526Init(), YM3812Init() and Y8950Init()
- new wrapper functions for OPLCreate: ym3526_init(), ym3812_init() and y8950_init()
- corrected 'off by one' error in feedback calculations (when feedback is off)
- enabled waveform usage (credit goes to Vlad Romascanu and zazzal22)
- speeded up noise generator calculations (Nicola Salmoria)
@ -2164,60 +2164,60 @@ static int OPLTimerOver(FM_OPL *OPL,int c)
#if (BUILD_YM3812)
void * YM3812Init(int sndindex, UINT32 clock, UINT32 rate)
void * ym3812_init(int sndindex, UINT32 clock, UINT32 rate)
{
/* emulator create */
FM_OPL *YM3812 = OPLCreate(OPL_TYPE_YM3812,clock,rate);
if (YM3812)
{
OPL_save_state(YM3812, "YM3812", sndindex);
YM3812ResetChip(YM3812);
ym3812_reset_chip(YM3812);
}
return YM3812;
}
void YM3812Shutdown(void *chip)
void ym3812_shutdown(void *chip)
{
FM_OPL *YM3812 = chip;
/* emulator shutdown */
OPLDestroy(YM3812);
}
void YM3812ResetChip(void *chip)
void ym3812_reset_chip(void *chip)
{
FM_OPL *YM3812 = chip;
OPLResetChip(YM3812);
}
int YM3812Write(void *chip, int a, int v)
int ym3812_write(void *chip, int a, int v)
{
FM_OPL *YM3812 = chip;
return OPLWrite(YM3812, a, v);
}
unsigned char YM3812Read(void *chip, int a)
unsigned char ym3812_read(void *chip, int a)
{
FM_OPL *YM3812 = chip;
/* YM3812 always returns bit2 and bit1 in HIGH state */
return OPLRead(YM3812, a) | 0x06 ;
}
int YM3812TimerOver(void *chip, int c)
int ym3812_timer_over(void *chip, int c)
{
FM_OPL *YM3812 = chip;
return OPLTimerOver(YM3812, c);
}
void YM3812SetTimerHandler(void *chip, OPL_TIMERHANDLER timer_handler, void *param)
void ym3812_set_timer_handler(void *chip, OPL_TIMERHANDLER timer_handler, void *param)
{
FM_OPL *YM3812 = chip;
OPLSetTimerHandler(YM3812, timer_handler, param);
}
void YM3812SetIRQHandler(void *chip,OPL_IRQHANDLER IRQHandler,void *param)
void ym3812_set_irq_handler(void *chip,OPL_IRQHANDLER IRQHandler,void *param)
{
FM_OPL *YM3812 = chip;
OPLSetIRQHandler(YM3812, IRQHandler, param);
}
void YM3812SetUpdateHandler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param)
void ym3812_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param)
{
FM_OPL *YM3812 = chip;
OPLSetUpdateHandler(YM3812, UpdateHandler, param);
@ -2231,7 +2231,7 @@ void YM3812SetUpdateHandler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *par
** '*buffer' is the output buffer pointer
** 'length' is the number of samples that should be generated
*/
void YM3812UpdateOne(void *chip, OPLSAMPLE *buffer, int length)
void ym3812_update_one(void *chip, OPLSAMPLE *buffer, int length)
{
FM_OPL *OPL = chip;
UINT8 rhythm = OPL->rhythm&0x20;
@ -2300,59 +2300,59 @@ void YM3812UpdateOne(void *chip, OPLSAMPLE *buffer, int length)
#if (BUILD_YM3526)
void *YM3526Init(int sndindex, UINT32 clock, UINT32 rate)
void *ym3526_init(int sndindex, UINT32 clock, UINT32 rate)
{
/* emulator create */
FM_OPL *YM3526 = OPLCreate(OPL_TYPE_YM3526,clock,rate);
if (YM3526)
{
OPL_save_state(YM3526, "YM3526", sndindex);
YM3526ResetChip(YM3526);
ym3526_reset_chip(YM3526);
}
return YM3526;
}
void YM3526Shutdown(void *chip)
void ym3526_shutdown(void *chip)
{
FM_OPL *YM3526 = chip;
/* emulator shutdown */
OPLDestroy(YM3526);
}
void YM3526ResetChip(void *chip)
void ym3526_reset_chip(void *chip)
{
FM_OPL *YM3526 = chip;
OPLResetChip(YM3526);
}
int YM3526Write(void *chip, int a, int v)
int ym3526_write(void *chip, int a, int v)
{
FM_OPL *YM3526 = chip;
return OPLWrite(YM3526, a, v);
}
unsigned char YM3526Read(void *chip, int a)
unsigned char ym3526_read(void *chip, int a)
{
FM_OPL *YM3526 = chip;
/* YM3526 always returns bit2 and bit1 in HIGH state */
return OPLRead(YM3526, a) | 0x06 ;
}
int YM3526TimerOver(void *chip, int c)
int ym3526_timer_over(void *chip, int c)
{
FM_OPL *YM3526 = chip;
return OPLTimerOver(YM3526, c);
}
void YM3526SetTimerHandler(void *chip, OPL_TIMERHANDLER timer_handler, void *param)
void ym3526_set_timer_handler(void *chip, OPL_TIMERHANDLER timer_handler, void *param)
{
FM_OPL *YM3526 = chip;
OPLSetTimerHandler(YM3526, timer_handler, param);
}
void YM3526SetIRQHandler(void *chip,OPL_IRQHANDLER IRQHandler,void *param)
void ym3526_set_irq_handler(void *chip,OPL_IRQHANDLER IRQHandler,void *param)
{
FM_OPL *YM3526 = chip;
OPLSetIRQHandler(YM3526, IRQHandler, param);
}
void YM3526SetUpdateHandler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param)
void ym3526_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param)
{
FM_OPL *YM3526 = chip;
OPLSetUpdateHandler(YM3526, UpdateHandler, param);
@ -2366,7 +2366,7 @@ void YM3526SetUpdateHandler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *par
** '*buffer' is the output buffer pointer
** 'length' is the number of samples that should be generated
*/
void YM3526UpdateOne(void *chip, OPLSAMPLE *buffer, int length)
void ym3526_update_one(void *chip, OPLSAMPLE *buffer, int length)
{
FM_OPL *OPL = chip;
UINT8 rhythm = OPL->rhythm&0x20;
@ -2447,7 +2447,7 @@ static void Y8950_deltat_status_reset(void *chip, UINT8 changebits)
OPL_STATUS_RESET(Y8950, changebits);
}
void *Y8950Init(int sndindex, UINT32 clock, UINT32 rate)
void *y8950_init(int sndindex, UINT32 clock, UINT32 rate)
{
/* emulator create */
FM_OPL *Y8950 = OPLCreate(OPL_TYPE_Y8950,clock,rate);
@ -2463,58 +2463,58 @@ void *Y8950Init(int sndindex, UINT32 clock, UINT32 rate)
/*Y8950->deltat->read_time = 8.0 / clock;*/ /* a single byte read takes 8 cycles of main clock */
/* reset */
OPL_save_state(Y8950, "Y8950", sndindex);
Y8950ResetChip(Y8950);
y8950_reset_chip(Y8950);
}
return Y8950;
}
void Y8950Shutdown(void *chip)
void y8950_shutdown(void *chip)
{
FM_OPL *Y8950 = chip;
/* emulator shutdown */
OPLDestroy(Y8950);
}
void Y8950ResetChip(void *chip)
void y8950_reset_chip(void *chip)
{
FM_OPL *Y8950 = chip;
OPLResetChip(Y8950);
}
int Y8950Write(void *chip, int a, int v)
int y8950_write(void *chip, int a, int v)
{
FM_OPL *Y8950 = chip;
return OPLWrite(Y8950, a, v);
}
unsigned char Y8950Read(void *chip, int a)
unsigned char y8950_read(void *chip, int a)
{
FM_OPL *Y8950 = chip;
return OPLRead(Y8950, a);
}
int Y8950TimerOver(void *chip, int c)
int y8950_timer_over(void *chip, int c)
{
FM_OPL *Y8950 = chip;
return OPLTimerOver(Y8950, c);
}
void Y8950SetTimerHandler(void *chip, OPL_TIMERHANDLER timer_handler, void *param)
void y8950_set_timer_handler(void *chip, OPL_TIMERHANDLER timer_handler, void *param)
{
FM_OPL *Y8950 = chip;
OPLSetTimerHandler(Y8950, timer_handler, param);
}
void Y8950SetIRQHandler(void *chip,OPL_IRQHANDLER IRQHandler,void *param)
void y8950_set_irq_handler(void *chip,OPL_IRQHANDLER IRQHandler,void *param)
{
FM_OPL *Y8950 = chip;
OPLSetIRQHandler(Y8950, IRQHandler, param);
}
void Y8950SetUpdateHandler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param)
void y8950_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *param)
{
FM_OPL *Y8950 = chip;
OPLSetUpdateHandler(Y8950, UpdateHandler, param);
}
void Y8950SetDeltaTMemory(void *chip, void * deltat_mem_ptr, int deltat_mem_size )
void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_size )
{
FM_OPL *OPL = chip;
OPL->deltat->memory = (UINT8 *)(deltat_mem_ptr);
@ -2528,7 +2528,7 @@ void Y8950SetDeltaTMemory(void *chip, void * deltat_mem_ptr, int deltat_mem_size
** '*buffer' is the output buffer pointer
** 'length' is the number of samples that should be generated
*/
void Y8950UpdateOne(void *chip, OPLSAMPLE *buffer, int length)
void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length)
{
int i;
FM_OPL *OPL = chip;
@ -2599,7 +2599,7 @@ void Y8950UpdateOne(void *chip, OPLSAMPLE *buffer, int length)
}
void Y8950SetPortHandler(void *chip,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,void * param)
void y8950_set_port_handler(void *chip,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,void * param)
{
FM_OPL *OPL = chip;
OPL->porthandler_w = PortHandler_w;
@ -2607,7 +2607,7 @@ void Y8950SetPortHandler(void *chip,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHAND
OPL->port_param = param;
}
void Y8950SetKeyboardHandler(void *chip,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,void * param)
void y8950_set_keyboard_handler(void *chip,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,void * param)
{
FM_OPL *OPL = chip;
OPL->keyboardhandler_w = KeyboardHandler_w;

82
src/emu/sound/fmopl.h
View File

@ -1,5 +1,7 @@
#ifndef __FMOPL_H_
#define __FMOPL_H_
#pragma once
#ifndef __FMOPL_H__
#define __FMOPL_H__
/* --- select emulation chips --- */
#define BUILD_YM3812 (HAS_YM3812)
@ -18,7 +20,7 @@ typedef unsigned int UINT32; /* unsigned 32bit */
typedef signed char INT8; /* signed 8bit */
typedef signed short INT16; /* signed 16bit */
typedef signed int INT32; /* signed 32bit */
#endif
#endif /* __OSDCOMM_H__ */
typedef stream_sample_t OPLSAMPLE;
/*
@ -39,19 +41,19 @@ typedef unsigned char (*OPL_PORTHANDLER_R)(void *param);
#if BUILD_YM3812
void *YM3812Init(int sndindex, UINT32 clock, UINT32 rate);
void YM3812Shutdown(void *chip);
void YM3812ResetChip(void *chip);
int YM3812Write(void *chip, int a, int v);
unsigned char YM3812Read(void *chip, int a);
int YM3812TimerOver(void *chip, int c);
void YM3812UpdateOne(void *chip, OPLSAMPLE *buffer, int length);
void *ym3812_init(int sndindex, UINT32 clock, UINT32 rate);
void ym3812_shutdown(void *chip);
void ym3812_reset_chip(void *chip);
int ym3812_write(void *chip, int a, int v);
unsigned char ym3812_read(void *chip, int a);
int ym3812_timer_over(void *chip, int c);
void ym3812_update_one(void *chip, OPLSAMPLE *buffer, int length);
void YM3812SetTimerHandler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param);
void YM3812SetIRQHandler(void *chip, OPL_IRQHANDLER IRQHandler, void *param);
void YM3812SetUpdateHandler(void *chip, OPL_UPDATEHANDLER UpdateHandler, void *param);
void ym3812_set_timer_handler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param);
void ym3812_set_irq_handler(void *chip, OPL_IRQHANDLER IRQHandler, void *param);
void ym3812_set_update_handler(void *chip, OPL_UPDATEHANDLER UpdateHandler, void *param);
#endif
#endif /* BUILD_YM3812 */
#if BUILD_YM3526
@ -63,13 +65,13 @@ void YM3812SetUpdateHandler(void *chip, OPL_UPDATEHANDLER UpdateHandler, void *p
** 'clock' is the chip clock in Hz
** 'rate' is sampling rate
*/
void *YM3526Init(int sndindex, UINT32 clock, UINT32 rate);
void *ym3526_init(int sndindex, UINT32 clock, UINT32 rate);
/* shutdown the YM3526 emulators*/
void YM3526Shutdown(void *chip);
void YM3526ResetChip(void *chip);
int YM3526Write(void *chip, int a, int v);
unsigned char YM3526Read(void *chip, int a);
int YM3526TimerOver(void *chip, int c);
void ym3526_shutdown(void *chip);
void ym3526_reset_chip(void *chip);
int ym3526_write(void *chip, int a, int v);
unsigned char ym3526_read(void *chip, int a);
int ym3526_timer_over(void *chip, int c);
/*
** Generate samples for one of the YM3526's
**
@ -77,35 +79,35 @@ int YM3526TimerOver(void *chip, int c);
** '*buffer' is the output buffer pointer
** 'length' is the number of samples that should be generated
*/
void YM3526UpdateOne(void *chip, OPLSAMPLE *buffer, int length);
void ym3526_update_one(void *chip, OPLSAMPLE *buffer, int length);
void YM3526SetTimerHandler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param);
void YM3526SetIRQHandler(void *chip, OPL_IRQHANDLER IRQHandler, void *param);
void YM3526SetUpdateHandler(void *chip, OPL_UPDATEHANDLER UpdateHandler, void *param);
void ym3526_set_timer_handler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param);
void ym3526_set_irq_handler(void *chip, OPL_IRQHANDLER IRQHandler, void *param);
void ym3526_set_update_handler(void *chip, OPL_UPDATEHANDLER UpdateHandler, void *param);
#endif
#endif /* BUILD_YM3526 */
#if BUILD_Y8950
/* Y8950 port handlers */
void Y8950SetPortHandler(void *chip, OPL_PORTHANDLER_W PortHandler_w, OPL_PORTHANDLER_R PortHandler_r, void *param);
void Y8950SetKeyboardHandler(void *chip, OPL_PORTHANDLER_W KeyboardHandler_w, OPL_PORTHANDLER_R KeyboardHandler_r, void *param);
void Y8950SetDeltaTMemory(void *chip, void * deltat_mem_ptr, int deltat_mem_size );
void y8950_set_port_handler(void *chip, OPL_PORTHANDLER_W PortHandler_w, OPL_PORTHANDLER_R PortHandler_r, void *param);
void y8950_set_keyboard_handler(void *chip, OPL_PORTHANDLER_W KeyboardHandler_w, OPL_PORTHANDLER_R KeyboardHandler_r, void *param);
void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_size );
void * Y8950Init (int sndindex, UINT32 clock, UINT32 rate);
void Y8950Shutdown (void *chip);
void Y8950ResetChip (void *chip);
int Y8950Write (void *chip, int a, int v);
unsigned char Y8950Read (void *chip, int a);
int Y8950TimerOver (void *chip, int c);
void Y8950UpdateOne (void *chip, OPLSAMPLE *buffer, int length);
void * y8950_init(int sndindex, UINT32 clock, UINT32 rate);
void y8950_shutdown(void *chip);
void y8950_reset_chip(void *chip);
int y8950_write(void *chip, int a, int v);
unsigned char y8950_read (void *chip, int a);
int y8950_timer_over(void *chip, int c);
void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length);
void Y8950SetTimerHandler (void *chip, OPL_TIMERHANDLER TimerHandler, void *param);
void Y8950SetIRQHandler (void *chip, OPL_IRQHANDLER IRQHandler, void *param);
void Y8950SetUpdateHandler (void *chip, OPL_UPDATEHANDLER UpdateHandler, void *param);
void y8950_set_timer_handler(void *chip, OPL_TIMERHANDLER TimerHandler, void *param);
void y8950_set_irq_handler(void *chip, OPL_IRQHANDLER IRQHandler, void *param);
void y8950_set_update_handler(void *chip, OPL_UPDATEHANDLER UpdateHandler, void *param);
#endif
#endif /* BUILD_Y8950 */
#endif /* __FMOPL_H_ */
#endif /* __FMOPL_H__ */

8
src/emu/sound/gaelco.h
View File

@ -1,5 +1,7 @@
#ifndef gaelco_snd_h
#define gaelco_snd_h
#pragma once
#ifndef __GALELCO_H__
#define __GALELCO_H__
typedef struct _gaelcosnd_interface gaelcosnd_interface;
struct _gaelcosnd_interface
@ -13,4 +15,4 @@ extern UINT16 *gaelco_sndregs;
WRITE16_HANDLER( gaelcosnd_w );
READ16_HANDLER( gaelcosnd_r );
#endif
#endif /* __GALELCO_H__ */

8
src/emu/sound/hc55516.h
View File

@ -1,5 +1,7 @@
#ifndef HC55516_H
#define HC55516_H
#pragma once
#ifndef __HC55516_H__
#define __HC55516_H__
/* sets the digit (0 or 1) */
@ -33,4 +35,4 @@ WRITE8_HANDLER( hc55516_1_digit_clock_clear_w );
READ8_HANDLER ( hc55516_1_clock_state_r );
#endif
#endif /* __HC55516_H__ */

4
src/emu/sound/ics2115.h
View File

@ -1,3 +1,5 @@
#pragma once
#ifndef __ICS2115_H__
#define __ICS2115_H__
@ -9,4 +11,4 @@ struct _ics2115_interface {
READ8_HANDLER( ics2115_r );
WRITE8_HANDLER( ics2115_w );
#endif
#endif /* __ICS2115_H__ */

4
src/emu/sound/iremga20.c
View File

@ -132,7 +132,7 @@ static void IremGA20_update( void *param, stream_sample_t **inputs, stream_sampl
}
}
WRITE16_HANDLER( IremGA20_w )
WRITE16_HANDLER( irem_ga20_w )
{
struct IremGA20_chip_def *chip = sndti_token(SOUND_IREMGA20, 0);
int channel;
@ -183,7 +183,7 @@ WRITE16_HANDLER( IremGA20_w )
}
}
READ16_HANDLER( IremGA20_r )
READ16_HANDLER( irem_ga20_r )
{
struct IremGA20_chip_def *chip = sndti_token(SOUND_IREMGA20, 0);
int channel;

6
src/emu/sound/iremga20.h
View File

@ -3,10 +3,12 @@
Irem GA20 PCM Sound Chip
*********************************************************/
#pragma once
#ifndef __IREMGA20_H__
#define __IREMGA20_H__
WRITE16_HANDLER( IremGA20_w );
READ16_HANDLER( IremGA20_r );
WRITE16_HANDLER( irem_ga20_w );
READ16_HANDLER( irem_ga20_r );
#endif /* __IREMGA20_H__ */

8
src/emu/sound/k005289.h
View File

@ -1,5 +1,7 @@
#ifndef k005289_h
#define k005289_h
#pragma once
#ifndef __K005289_H__
#define __K005289_H__
WRITE8_HANDLER( k005289_control_A_w );
WRITE8_HANDLER( k005289_control_B_w );
@ -8,4 +10,4 @@ WRITE8_HANDLER( k005289_pitch_B_w );
WRITE8_HANDLER( k005289_keylatch_A_w );
WRITE8_HANDLER( k005289_keylatch_B_w );
#endif
#endif /* __K005289_H__ */

10
src/emu/sound/tiaintf.h
View File

@ -1,8 +1,8 @@
#ifndef TIA_H
#define TIA_H
#pragma once
#ifndef __TIAINTF_H__
#define __TIAINTF_H__
WRITE8_HANDLER( tia_sound_w );
#endif
#endif /* __TIAINTF_H__ */

8
src/emu/sound/tiasound.h
View File

@ -32,13 +32,15 @@
/* bear this legend. */
/* */
/*****************************************************************************/
#ifndef TIASOUND_H
#define TIASOUND_H
#pragma once
#ifndef __TIASOUND_H__
#define __TIASOUND_H__
void *tia_sound_init(int clock, int sample_rate, int gain);
void tia_sound_free(void *chip);
void tia_process (void *chip, stream_sample_t *buffer, int length);
void tia_write(void *chip, offs_t offset, UINT8 data);
#endif /* TIASOUND_H */
#endif /* __TIASOUND_H__ */

8
src/emu/sound/tms3615.h
View File

@ -1,9 +1,11 @@
#ifndef TMS3615_SOUND_H
#define TMS3615_SOUND_H
#pragma once
#ifndef __TMS3615_H__
#define __TMS3615_H__
extern void tms3615_enable_w(int chip, int enable);
#define TMS3615_FOOTAGE_8 0
#define TMS3615_FOOTAGE_16 1
#endif
#endif /* __TMS3615_H__ */

2
src/emu/sound/tms36xx.c
View File

@ -40,7 +40,7 @@ struct TMS36XX {
int tune_ofs; /* note currently playing */
int tune_max; /* end of tune */
const struct TMS36XXinterface *intf;
const tms36xx_interface *intf;
};
#define C(n) (int)((FSCALE<<(n-1))*1.18921) /* 2^(3/12) */

12
src/emu/sound/tms36xx.h
View File

@ -1,5 +1,7 @@
#ifndef TMS36XX_SOUND_H
#define TMS36XX_SOUND_H
#pragma once
#ifndef __TMS36XX_H__
#define __TMS36XX_H__
/* subtypes */
#define MM6221AA 21 /* Phoenix (fixed melodies) */
@ -7,7 +9,9 @@
#define TMS3617 17 /* Monster Bash (13 notes, six outputs) */
/* The interface structure */
struct TMS36XXinterface {
typedef struct _tms36xx_interface tms36xx_interface;
struct _tms36xx_interface
{
int subtype;
double decay[6]; /* decay times for the six harmonic notes */
double speed; /* tune speed (meaningful for the TMS3615 only) */
@ -22,4 +26,4 @@ extern void tms36xx_note_w(int chip, int octave, int note);
/* TMS3617 interface functions */
extern void tms3617_enable_w(int chip, int enable);
#endif
#endif /* __TMS36XX_H__ */

9
src/emu/sound/tms5110.h
View File

@ -1,5 +1,7 @@
#ifndef tms5110_h
#define tms5110_h
#pragma once
#ifndef __TMS5110_H__
#define __TMS5110_H__
/* TMS5110 commands */
@ -42,5 +44,4 @@ int tms5110_ready_read(void *chip);
void tms5110_process(void *chip, INT16 *buffer, unsigned int size);
#endif
#endif /* __TMS5110_H__ */

15
src/emu/sound/tms5220.h
View File

@ -1,5 +1,7 @@
#ifndef tms5220_h
#define tms5220_h
#pragma once
#ifndef __TMS5220_H__
#define __TMS5220_H__
void *tms5220_create(int index);
void tms5220_destroy(void *chip);
@ -21,14 +23,13 @@ void tms5220_set_load_address(void *chip, void (*func)(int));
void tms5220_set_read_and_branch(void *chip, void (*func)(void));
typedef enum
enum _tms5220_variant
{
variant_tms5220, /* TMS5220_IS_TMS5220, TMS5220_IS_TMS5220C, TMS5220_IS_TSP5220C */
variant_tmc0285 /* TMS5220_IS_TMS5200, TMS5220_IS_CD2501 */
} tms5220_variant;
};
typedef enum _tms5220_variant tms5220_variant;
void tms5220_set_variant(void *chip, tms5220_variant new_variant);
#endif
#endif /* __TMS5220_H__ */

4
src/emu/sound/upd7759.c
View File

@ -622,8 +622,8 @@ static void register_for_save(struct upd7759_chip *chip, int index)
static void *upd7759_start(const char *tag, int sndindex, int clock, const void *config)
{
static const struct upd7759_interface defintrf = { 0 };
const struct upd7759_interface *intf = (config != NULL) ? config : &defintrf;
static const upd7759_interface defintrf = { 0 };
const upd7759_interface *intf = (config != NULL) ? config : &defintrf;
struct upd7759_chip *chip;
chip = auto_malloc(sizeof(*chip));

12
src/emu/sound/upd7759.h
View File

@ -1,5 +1,7 @@
#ifndef UPD7759S_H
#define UPD7759S_H
#pragma once
#ifndef __UPD7759_H__
#define __UPD7759_H__
/* There are two modes for the uPD7759, selected through the !MD pin.
This is the mode select input. High is stand alone, low is slave.
@ -8,7 +10,8 @@
#define UPD7759_STANDARD_CLOCK 640000
struct upd7759_interface
typedef struct _upd7759_interface upd7759_interface;
struct _upd7759_interface
{
void (*drqcallback)(int param); /* drq callback (per chip, slave mode only) */
};
@ -26,5 +29,4 @@ WRITE8_HANDLER( upd7759_0_port_w );
WRITE8_HANDLER( upd7759_0_start_w );
READ8_HANDLER( upd7759_0_busy_r );
#endif
#endif /* __UPD7759_H__ */

18
src/emu/sound/vlm5030.c
View File

@ -89,7 +89,7 @@ chirp 12-..: vokume 0 : silent
struct vlm5030_info
{
const struct VLM5030interface *intf;
const vlm5030_interface *intf;
sound_stream * channel;
@ -516,14 +516,14 @@ static void VLM5030_reset(struct vlm5030_info *chip)
}
/* set speech rom address */
void VLM5030_set_rom(void *speech_rom)
void vlm5030_set_rom(void *speech_rom)
{
struct vlm5030_info *chip = sndti_token(SOUND_VLM5030, 0);
chip->rom = (UINT8 *)speech_rom;
}
/* get BSY pin level */
int VLM5030_BSY(void)
int vlm5030_bsy(void)
{
struct vlm5030_info *chip = sndti_token(SOUND_VLM5030, 0);
VLM5030_update(chip);
@ -531,14 +531,14 @@ int VLM5030_BSY(void)
}
/* latch contoll data */
WRITE8_HANDLER( VLM5030_data_w )
WRITE8_HANDLER( vlm5030_data_w )
{
struct vlm5030_info *chip = sndti_token(SOUND_VLM5030, 0);
chip->latch_data = (UINT8)data;
}
/* set RST pin level : reset / set table address A8-A15 */
void VLM5030_RST (int pin )
void vlm5030_rst (int pin )
{
struct vlm5030_info *chip = sndti_token(SOUND_VLM5030, 0);
if( chip->pin_RST )
@ -563,7 +563,7 @@ void VLM5030_RST (int pin )
}
/* set VCU pin level : ?? unknown */
void VLM5030_VCU(int pin)
void vlm5030_vcu(int pin)
{
struct vlm5030_info *chip = sndti_token(SOUND_VLM5030, 0);
/* direct mode / indirect mode */
@ -572,7 +572,7 @@ void VLM5030_VCU(int pin)
}
/* set ST pin level : set table address A0-A7 / start speech */
void VLM5030_ST(int pin )
void vlm5030_st(int pin )
{
struct vlm5030_info *chip = sndti_token(SOUND_VLM5030, 0);
int table;
@ -633,7 +633,7 @@ if( chip->interp_step != 1)
/* speech_rom == 0 -> use sampling data mode */
static void *vlm5030_start(const char *tag, int sndindex, int clock, const void *config)
{
const struct VLM5030interface defintrf = { 0 };
const vlm5030_interface defintrf = { 0 };
int emulation_rate;
struct vlm5030_info *chip;
@ -660,7 +660,7 @@ static void *vlm5030_start(const char *tag, int sndindex, int clock, const void
chip->channel = stream_create(0, 1, emulation_rate,chip,vlm5030_update_callback);
/* don't restore "UINT8 *chip->rom" when use VLM5030_set_rom() */
/* don't restore "UINT8 *chip->rom" when use vlm5030_set_rom() */
state_save_register_item(VLM_NAME,sndindex,chip->address);
state_save_register_item(VLM_NAME,sndindex,chip->pin_BSY);

24
src/emu/sound/vlm5030.h
View File

@ -1,24 +1,26 @@
#ifndef VLM5030_h
#define VLM5030_h
#pragma once
struct VLM5030interface
#ifndef __VLM5030_H__
#define __VLM5030_H__
typedef struct _vlm5030_interface vlm5030_interface;
struct _vlm5030_interface
{
int memory_size; /* memory size of speech rom (0=memory region length) */
};
/* set speech rom address */
void VLM5030_set_rom(void *speech_rom);
void vlm5030_set_rom(void *speech_rom);
/* get BSY pin level */
int VLM5030_BSY(void);
int vlm5030_bsy(void);
/* latch contoll data */
WRITE8_HANDLER( VLM5030_data_w );
WRITE8_HANDLER( vlm5030_data_w );
/* set RST pin level : reset / set table address A8-A15 */
void VLM5030_RST (int pin );
void vlm5030_rst (int pin );
/* set VCU pin level : ?? unknown */
void VLM5030_VCU(int pin );
void vlm5030_vcu(int pin );
/* set ST pin level : set table address A0-A7 / start speech */
void VLM5030_ST(int pin );
#endif
void vlm5030_st(int pin );
#endif /* __VLM5030_H__ */

20
src/emu/sound/vrender0.c
View File

@ -19,7 +19,7 @@ struct _VR0Chip
UINT32 *TexBase;
UINT32 *FBBase;
UINT32 SOUNDREGS[0x10000/4];
struct VR0Interface Intf;
vr0_interface Intf;
sound_stream * stream;
};
@ -78,8 +78,8 @@ static const unsigned short ULawTo16[]=
#define ENVVOL(chan) (VR0->SOUNDREGS[(0x20/4)*chan+0x04/4]&0xffffff)
/*
#define GETSOUNDREG16(Chan,Offs) program_read_word_32le(VR0->Intf.RegBase+0x20*Chan+Offs)
#define GETSOUNDREG32(Chan,Offs) program_read_dword_32le(VR0->Intf.RegBase+0x20*Chan+Offs)
#define GETSOUNDREG16(Chan,Offs) program_read_word_32le(VR0->Intf.reg_base+0x20*Chan+Offs)
#define GETSOUNDREG32(Chan,Offs) program_read_dword_32le(VR0->Intf.reg_base+0x20*Chan+Offs)
#define CURSADDR(chan) GETSOUNDREG32(chan,0x00)
#define DSADDR(chan) GETSOUNDREG16(chan,0x08)
@ -87,16 +87,16 @@ static const unsigned short ULawTo16[]=
#define LOOPEND(chan) (GETSOUNDREG32(chan,0x10)&0x3fffff)
#define ENVVOL(chan) (GETSOUNDREG32(chan,0x04)&0xffffff)
*/
void VR0_Snd_Set_Areas(UINT32 *Texture,UINT32 *Frame)
void vr0_snd_set_areas(UINT32 *texture,UINT32 *frame)
{
struct _VR0Chip *VR0 = sndti_token(SOUND_VRENDER0, 0);
VR0->TexBase=Texture;
VR0->FBBase=Frame;
VR0->TexBase=texture;
VR0->FBBase=frame;
}
static void *vrender0_start(const char *tag, int sndindex, int clock, const void *config)
{
const struct VR0Interface *intf;
const vr0_interface *intf;
struct _VR0Chip *VR0;
VR0 = auto_malloc(sizeof(*VR0));
@ -104,7 +104,7 @@ static void *vrender0_start(const char *tag, int sndindex, int clock, const void
intf=config;
memcpy(&(VR0->Intf),intf,sizeof(struct VR0Interface));
memcpy(&(VR0->Intf),intf,sizeof(vr0_interface));
memset(VR0->SOUNDREGS,0,0x10000);
VR0->stream = stream_create(0, 2, 44100, VR0, VR0_Update);
@ -112,7 +112,7 @@ static void *vrender0_start(const char *tag, int sndindex, int clock, const void
return VR0;
}
WRITE32_HANDLER(VR0_Snd_Write)
WRITE32_HANDLER(vr0_snd_write)
{
struct _VR0Chip *VR0 = sndti_token(SOUND_VRENDER0, 0);
if(offset==0x404/4)
@ -137,7 +137,7 @@ WRITE32_HANDLER(VR0_Snd_Write)
}
READ32_HANDLER(VR0_Snd_Read)
READ32_HANDLER(vr0_snd_read)
{
struct _VR0Chip *VR0 = sndti_token(SOUND_VRENDER0, 0);
return VR0->SOUNDREGS[offset];

17
src/emu/sound/vrender0.h
View File

@ -1,9 +1,18 @@
struct VR0Interface
#pragma once
#ifndef __VRENDER0_H__
#define __VRENDER0_H__
typedef struct _vr0_interface vr0_interface;
struct _vr0_interface
{
UINT32 RegBase;
};
void VR0_Snd_Set_Areas(UINT32 *Texture,UINT32 *Frame);
void vr0_snd_set_areas(UINT32 *texture,UINT32 *frame);
READ32_HANDLER(VR0_Snd_Read);
WRITE32_HANDLER(VR0_Snd_Write);
READ32_HANDLER(vr0_snd_read);
WRITE32_HANDLER(vr0_snd_write);
#endif /* __VRENDER0_H__ */

10
src/emu/sound/wave.h
View File

@ -1,5 +1,7 @@
#ifndef WAVE_H
#define WAVE_H
#pragma once
#ifndef __WAVE_H__
#define __WAVE_H__
/*****************************************************************************
* CassetteWave interface
@ -11,6 +13,4 @@
#endif /* WAVE_H */
#endif /* __WAVE_H__ */

8
src/emu/sound/wavwrite.h
View File

@ -1,5 +1,7 @@
#ifndef WAVWRITE_H
#define WAVWRITE_H
#pragma once
#ifndef __WAVWRITE_H__
#define __WAVWRITE_H__
typedef struct _wav_file wav_file;
@ -11,4 +13,4 @@ void wav_add_data_32(wav_file *wavptr, INT32 *data, int samples, int shift);
void wav_add_data_16lr(wav_file *wavptr, INT16 *left, INT16 *right, int samples);
void wav_add_data_32lr(wav_file *wavptr, INT32 *left, INT32 *right, int samples, int shift);
#endif /* WAVWRITE_H */
#endif /* __WAVWRITE_H__ */

2
src/emu/sound/x1_010.c
View File

@ -195,7 +195,7 @@ static void seta_update( void *param, stream_sample_t **inputs, stream_sample_t
static void *x1_010_start(const char *tag, int sndindex, int clock, const void *config)
{
int i;
const struct x1_010_interface *intf = config;
const x1_010_interface *intf = config;
struct x1_010_info *info;
info = auto_malloc(sizeof(*info));

11
src/emu/sound/x1_010.h
View File

@ -1,4 +1,11 @@
struct x1_010_interface
#pragma once
#ifndef __X1_010_H__
#define __X1_010_H__
typedef struct _x1_010_interface x1_010_interface;
struct _x1_010_interface
{
int adr; /* address */
};
@ -11,3 +18,5 @@ READ16_HANDLER ( seta_sound_word_r );
WRITE16_HANDLER( seta_sound_word_w );
void seta_sound_enable_w(int);
#endif /* __X1_010_H__ */

32
src/emu/sound/ym2151.c
View File

@ -1042,7 +1042,7 @@ INLINE void refresh_EG(YM2151Operator * op)
/* write a register on YM2151 chip number 'n' */
void YM2151WriteReg(void *_chip, int r, int v)
void ym2151_write_reg(void *_chip, int r, int v)
{
YM2151 *chip = _chip;
YM2151Operator *op = &chip->oper[ (r&0x07)*4+((r&0x18)>>3) ];
@ -1366,7 +1366,7 @@ static TIMER_CALLBACK( cymfile_callback )
}
int YM2151ReadStatus( void *_chip )
int ym2151_read_status( void *_chip )
{
YM2151 *chip = _chip;
return chip->status;
@ -1379,7 +1379,7 @@ int YM2151ReadStatus( void *_chip )
/*
* state save support for MAME
*/
STATE_POSTLOAD( YM2151Postload )
STATE_POSTLOAD( ym2151_postload )
{
YM2151 *YM2151_chip = (YM2151 *)param;
int j;
@ -1487,10 +1487,10 @@ static void ym2151_state_save_register( YM2151 *chip, int sndindex )
state_save_register_item_array(buf1, sndindex, chip->connect);
state_save_register_postload(Machine, YM2151Postload, chip);
state_save_register_postload(Machine, ym2151_postload, chip);
}
#else
STATE_POSTLOAD( YM2151Postload )
STATE_POSTLOAD( ym2151_postload )
{
}
@ -1507,7 +1507,7 @@ static void ym2151_state_save_register( YM2151 *chip, int sndindex )
* 'clock' is the chip clock in Hz
* 'rate' is sampling rate
*/
void * YM2151Init(int index, int clock, int rate)
void * ym2151_init(int index, int clock, int rate)
{
YM2151 *PSG;
@ -1535,14 +1535,14 @@ void * YM2151Init(int index, int clock, int rate)
/*logerror("YM2151[init] eg_timer_add=%8x eg_timer_overflow=%8x\n", PSG->eg_timer_add, PSG->eg_timer_overflow);*/
#ifdef USE_MAME_TIMERS
/* this must be done _before_ a call to YM2151ResetChip() */
/* this must be done _before_ a call to ym2151_reset_chip() */
PSG->timer_A = timer_alloc(timer_callback_a, PSG);
PSG->timer_B = timer_alloc(timer_callback_b, PSG);
#else
PSG->tim_A = 0;
PSG->tim_B = 0;
#endif
YM2151ResetChip(PSG);
ym2151_reset_chip(PSG);
/*logerror("YM2151[init] clock=%i sampfreq=%i\n", PSG->clock, PSG->sampfreq);*/
if (LOG_CYM_FILE)
@ -1559,7 +1559,7 @@ void * YM2151Init(int index, int clock, int rate)
void YM2151Shutdown(void *_chip)
void ym2151_shutdown(void *_chip)
{
YM2151 *chip = _chip;
@ -1589,7 +1589,7 @@ void YM2151Shutdown(void *_chip)
/*
* Reset chip number 'n'.
*/
void YM2151ResetChip(void *_chip)
void ym2151_reset_chip(void *_chip)
{
int i;
YM2151 *chip = _chip;
@ -1641,11 +1641,11 @@ void YM2151ResetChip(void *_chip)
chip->csm_req = 0;
chip->status = 0;
YM2151WriteReg(chip, 0x1b, 0); /* only because of CT1, CT2 output pins */
YM2151WriteReg(chip, 0x18, 0); /* set LFO frequency */
ym2151_write_reg(chip, 0x1b, 0); /* only because of CT1, CT2 output pins */
ym2151_write_reg(chip, 0x18, 0); /* set LFO frequency */
for (i=0x20; i<0x100; i++) /* set the operators */
{
YM2151WriteReg(chip, i, 0);
ym2151_write_reg(chip, i, 0);
}
}
@ -2372,7 +2372,7 @@ INLINE signed int acc_calc(signed int value)
* '**buffers' is table of pointers to the buffers: left and right
* 'length' is the number of samples that should be generated
*/
void YM2151UpdateOne(void *chip, SAMP **buffers, int length)
void ym2151_update_one(void *chip, SAMP **buffers, int length)
{
int i;
signed int outl,outr;
@ -2485,13 +2485,13 @@ void YM2151UpdateOne(void *chip, SAMP **buffers, int length)
}
}
void YM2151SetIrqHandler(void *chip, void(*handler)(running_machine *machine, int irq))
void ym2151_set_irq_handler(void *chip, void(*handler)(running_machine *machine, int irq))
{
YM2151 *PSG = chip;
PSG->irqhandler = handler;
}
void YM2151SetPortWriteHandler(void *chip, write8_machine_func handler)
void ym2151_set_port_write_handler(void *chip, write8_machine_func handler)
{
YM2151 *PSG = chip;
PSG->porthandler = handler;

29
src/emu/sound/ym2151.h
View File

@ -1,5 +1,4 @@
/*
**
** File: ym2151.h - header file for software implementation of YM2151
** FM Operator Type-M(OPM)
**
@ -29,8 +28,11 @@
** Ishmair - for the datasheet and motivation.
*/
#ifndef _H_YM2151_
#define _H_YM2151_
#pragma once
#ifndef __YM2151_H__
#define __YM2151_H__
/* 16- and 8-bit samples (signed) are supported*/
#define SAMPLE_BITS 16
@ -52,13 +54,13 @@ typedef stream_sample_t SAMP;
** 'clock' is the chip clock in Hz
** 'rate' is sampling rate
*/
void *YM2151Init(int index, int clock, int rate);
void *ym2151_init(int index, int clock, int rate);
/* shutdown the YM2151 emulators*/
void YM2151Shutdown(void *chip);
void ym2151_shutdown(void *chip);
/* reset all chip registers for YM2151 number 'num'*/
void YM2151ResetChip(void *chip);
void ym2151_reset_chip(void *chip);
/*
** Generate samples for one of the YM2151's
@ -67,20 +69,21 @@ void YM2151ResetChip(void *chip);
** '**buffers' is table of pointers to the buffers: left and right
** 'length' is the number of samples that should be generated
*/
void YM2151UpdateOne(void *chip, SAMP **buffers, int length);
void ym2151_update_one(void *chip, SAMP **buffers, int length);
/* write 'v' to register 'r' on YM2151 chip number 'n'*/
void YM2151WriteReg(void *chip, int r, int v);
void ym2151_write_reg(void *chip, int r, int v);
/* read status register on YM2151 chip number 'n'*/
int YM2151ReadStatus(void *chip);
int ym2151_read_status(void *chip);
/* set interrupt handler on YM2151 chip number 'n'*/
void YM2151SetIrqHandler(void *chip, void (*handler)(running_machine *machine, int irq));
void ym2151_set_irq_handler(void *chip, void (*handler)(running_machine *machine, int irq));
/* set port write handler on YM2151 chip number 'n'*/
void YM2151SetPortWriteHandler(void *chip, write8_machine_func handler);
void ym2151_set_port_write_handler(void *chip, write8_machine_func handler);
/* refresh chip when load state */
STATE_POSTLOAD( YM2151Postload );
#endif /*_H_YM2151_*/
STATE_POSTLOAD( ym2151_postload );
#endif /*__YM2151_H__*/

14
src/emu/sound/ym2413.c
View File

@ -2082,13 +2082,13 @@ static unsigned char OPLLRead(YM2413 *chip,int a)
void * YM2413Init(int clock, int rate, int index)
void * ym2413_init(int clock, int rate, int index)
{
/* emulator create */
return OPLLCreate(clock, rate, index);
}
void YM2413Shutdown(void *chip)
void ym2413_shutdown(void *chip)
{
YM2413 *OPLL = chip;
@ -2096,25 +2096,25 @@ void YM2413Shutdown(void *chip)
OPLLDestroy(OPLL);
}
void YM2413ResetChip(void *chip)
void ym2413_reset_chip(void *chip)
{
YM2413 *OPLL = chip;
OPLLResetChip(OPLL);
}
void YM2413Write(void *chip, int a, int v)
void ym2413_write(void *chip, int a, int v)
{
YM2413 *OPLL = chip;
OPLLWrite(OPLL, a, v);
}
unsigned char YM2413Read(void *chip, int a)
unsigned char ym2413_read(void *chip, int a)
{
YM2413 *OPLL = chip;
return OPLLRead(OPLL, a) & 0x03 ;
}
void YM2413SetUpdateHandler(void *chip,OPLL_UPDATEHANDLER UpdateHandler,void *param)
void ym2413_set_update_handler(void *chip,OPLL_UPDATEHANDLER UpdateHandler,void *param)
{
YM2413 *OPLL = chip;
OPLLSetUpdateHandler(OPLL, UpdateHandler, param);
@ -2128,7 +2128,7 @@ void YM2413SetUpdateHandler(void *chip,OPLL_UPDATEHANDLER UpdateHandler,void *pa
** '*buffer' is the output buffer pointer
** 'length' is the number of samples that should be generated
*/
void YM2413UpdateOne(void *_chip, SAMP **buffers, int length)
void ym2413_update_one(void *_chip, SAMP **buffers, int length)
{
YM2413 *chip = _chip;
UINT8 rhythm = chip->rhythm&0x20;

23
src/emu/sound/ym2413.h
View File

@ -1,5 +1,7 @@
#ifndef _H_YM2413_
#define _H_YM2413_
#pragma once
#ifndef __YM2413_H__
#define __YM2413_H__
/* select output bits size of output : 8 or 16 */
#define SAMPLE_BITS 16
@ -27,16 +29,15 @@ typedef INT8 SAMP;
void *YM2413Init(int clock, int rate, int index);
void YM2413Shutdown(void *chip);
void YM2413ResetChip(void *chip);
void YM2413Write(void *chip, int a, int v);
unsigned char YM2413Read(void *chip, int a);
void YM2413UpdateOne(void *chip, SAMP **buffers, int length);
void *ym2413_init(int clock, int rate, int index);
void ym2413_shutdown(void *chip);
void ym2413_reset_chip(void *chip);
void ym2413_write(void *chip, int a, int v);
unsigned char ym2413_read(void *chip, int a);
void ym2413_update_one(void *chip, SAMP **buffers, int length);
typedef void (*OPLL_UPDATEHANDLER)(void *param,int min_interval_us);
void YM2413SetUpdateHandler(void *chip, OPLL_UPDATEHANDLER UpdateHandler, void *param);
void ym2413_set_update_handler(void *chip, OPLL_UPDATEHANDLER UpdateHandler, void *param);
#endif /*_H_YM2413_*/
#endif /*__YM2413_H__*/

10
src/emu/sound/ymdeltat.h
View File

@ -1,5 +1,7 @@
#ifndef __YMDELTAT_H_
#define __YMDELTAT_H_
#pragma once
#ifndef __YMDELTAT_H__
#define __YMDELTAT_H__
#define YM_DELTAT_SHIFT (16)
@ -21,7 +23,7 @@ typedef struct deltat_adpcm_state { /* AT: rearranged and tigntened structur
double read_time; /* Y8950: 8 cycles of main clock; YM2608: 18 cycles of main clock */
#endif
UINT32 memory_size;
int output_range;
int output_range;
UINT32 now_addr; /* current address */
UINT32 now_step; /* currect step */
UINT32 step; /* step */
@ -79,4 +81,4 @@ void YM_DELTAT_ADPCM_CALC(YM_DELTAT *DELTAT);
void YM_DELTAT_postload(YM_DELTAT *DELTAT,UINT8 *regs);
void YM_DELTAT_savestate(const char *statename,int num,YM_DELTAT *DELTAT);
#endif
#endif /* __YMDELTAT_H__ */

20
src/emu/sound/ymf262.c
View File

@ -2464,26 +2464,26 @@ static int OPL3TimerOver(OPL3 *chip,int c)
void * YMF262Init(int clock, int rate)
void * ymf262_init(int clock, int rate)
{
return OPL3Create(OPL3_TYPE_YMF262,clock,rate);
}
void YMF262Shutdown(void *chip)
void ymf262_shutdown(void *chip)
{
OPL3Destroy(chip);
}
void YMF262ResetChip(void *chip)
void ymf262_reset_chip(void *chip)
{
OPL3ResetChip(chip);
}
int YMF262Write(void *chip, int a, int v)
int ymf262_write(void *chip, int a, int v)
{
return OPL3Write(chip, a, v);
}
unsigned char YMF262Read(void *chip, int a)
unsigned char ymf262_read(void *chip, int a)
{
/* Note on status register: */
@ -2496,20 +2496,20 @@ unsigned char YMF262Read(void *chip, int a)
return OPL3Read(chip, a);
}
int YMF262TimerOver(void *chip, int c)
int ymf262_timer_over(void *chip, int c)
{
return OPL3TimerOver(chip, c);
}
void YMF262SetTimerHandler(void *chip, OPL3_TIMERHANDLER timer_handler, void *param)
void ymf262_set_timer_handler(void *chip, OPL3_TIMERHANDLER timer_handler, void *param)
{
OPL3SetTimerHandler(chip, timer_handler, param);
}
void YMF262SetIRQHandler(void *chip,OPL3_IRQHANDLER IRQHandler,void *param)
void ymf262_set_irq_handler(void *chip,OPL3_IRQHANDLER IRQHandler,void *param)
{
OPL3SetIRQHandler(chip, IRQHandler, param);
}
void YMF262SetUpdateHandler(void *chip,OPL3_UPDATEHANDLER UpdateHandler,void *param)
void ymf262_set_update_handler(void *chip,OPL3_UPDATEHANDLER UpdateHandler,void *param)
{
OPL3SetUpdateHandler(chip, UpdateHandler, param);
}
@ -2522,7 +2522,7 @@ void YMF262SetUpdateHandler(void *chip,OPL3_UPDATEHANDLER UpdateHandler,void *pa
** '**buffers' is table of 4 pointers to the buffers: CH.A, CH.B, CH.C and CH.D
** 'length' is the number of samples that should be generated
*/
void YMF262UpdateOne(void *_chip, OPL3SAMPLE **buffers, int length)
void ymf262_update_one(void *_chip, OPL3SAMPLE **buffers, int length)
{
OPL3 *chip = _chip;
UINT8 rhythm = chip->rhythm&0x20;

28
src/emu/sound/ymf262.h
View File

@ -1,5 +1,7 @@
#ifndef YMF262_H
#define YMF262_H
#pragma once
#ifndef __YMF262_H__
#define __YMF262_H__
/* select number of output bits: 8 or 16 */
#define OPL3_SAMPLE_BITS 16
@ -30,17 +32,17 @@ typedef void (*OPL3_IRQHANDLER)(void *param,int irq);
typedef void (*OPL3_UPDATEHANDLER)(void *param,int min_interval_us);
void *YMF262Init(int clock, int rate);
void YMF262Shutdown(void *chip);
void YMF262ResetChip(void *chip);
int YMF262Write(void *chip, int a, int v);
unsigned char YMF262Read(void *chip, int a);
int YMF262TimerOver(void *chip, int c);
void YMF262UpdateOne(void *chip, OPL3SAMPLE **buffers, int length);
void *ymf262_init(int clock, int rate);
void ymf262_shutdown(void *chip);
void ymf262_reset_chip(void *chip);
int ymf262_write(void *chip, int a, int v);
unsigned char ymf262_read(void *chip, int a);
int ymf262_timer_over(void *chip, int c);
void ymf262_update_one(void *chip, OPL3SAMPLE **buffers, int length);
void YMF262SetTimerHandler(void *chip, OPL3_TIMERHANDLER TimerHandler, void *param);
void YMF262SetIRQHandler(void *chip, OPL3_IRQHANDLER IRQHandler, void *param);
void YMF262SetUpdateHandler(void *chip, OPL3_UPDATEHANDLER UpdateHandler, void *param);
void ymf262_set_timer_handler(void *chip, OPL3_TIMERHANDLER TimerHandler, void *param);
void ymf262_set_irq_handler(void *chip, OPL3_IRQHANDLER IRQHandler, void *param);
void ymf262_set_update_handler(void *chip, OPL3_UPDATEHANDLER UpdateHandler, void *param);
#endif /* YMF262_H */
#endif /* __YMF262_H__ */

12
src/emu/sound/ymf271.c
View File

@ -1744,8 +1744,8 @@ static void ymf271_init(YMF271Chip *chip, UINT8 *rom, void (*cb)(running_machine
static void *ymf271_start(const char *tag, int sndindex, int clock, const void *config)
{
static const struct YMF271interface defintrf = { 0 };
const struct YMF271interface *intf;
static const ymf271_interface defintrf = { 0 };
const ymf271_interface *intf;
int i;
YMF271Chip *chip;
@ -1777,22 +1777,22 @@ static void *ymf271_start(const char *tag, int sndindex, int clock, const void *
return chip;
}
READ8_HANDLER( YMF271_0_r )
READ8_HANDLER( ymf271_0_r )
{
return ymf271_r(0, offset);
}
WRITE8_HANDLER( YMF271_0_w )
WRITE8_HANDLER( ymf271_0_w )
{
ymf271_w(0, offset, data);
}
READ8_HANDLER( YMF271_1_r )
READ8_HANDLER( ymf271_1_r )
{
return ymf271_r(1, offset);
}
WRITE8_HANDLER( YMF271_1_w )
WRITE8_HANDLER( ymf271_1_w )
{
ymf271_w(1, offset, data);
}

19
src/emu/sound/ymf271.h
View File

@ -1,16 +1,19 @@
#ifndef _YMF271_H_
#define _YMF271_H_
#pragma once
struct YMF271interface
#ifndef __YMF271_H__
#define __YMF271_H__
typedef struct _ymf271_interface ymf271_interface;
struct _ymf271_interface
{
read8_machine_func ext_read; /* external memory read */
write8_machine_func ext_write; /* external memory write */
void (*irq_callback)(running_machine *machine, int state); /* irq callback */
};
READ8_HANDLER( YMF271_0_r );
WRITE8_HANDLER( YMF271_0_w );
READ8_HANDLER( YMF271_1_r );
WRITE8_HANDLER( YMF271_1_w );
READ8_HANDLER( ymf271_0_r );
WRITE8_HANDLER( ymf271_0_w );
READ8_HANDLER( ymf271_1_r );
WRITE8_HANDLER( ymf271_1_w );
#endif
#endif /* __YMF271_H__ */

36
src/emu/sound/ymf278b.c
View File

@ -669,8 +669,8 @@ static void ymf278b_init(YMF278BChip *chip, UINT8 *rom, void (*cb)(running_machi
static void *ymf278b_start(const char *tag, int sndindex, int clock, const void *config)
{
static const struct YMF278B_interface defintrf = { 0 };
const struct YMF278B_interface *intf;
static const ymf278b_interface defintrf = { 0 };
const ymf278b_interface *intf;
int i;
YMF278BChip *chip;
@ -705,83 +705,83 @@ static void *ymf278b_start(const char *tag, int sndindex, int clock, const void
}
READ8_HANDLER( YMF278B_status_port_0_r )
READ8_HANDLER( ymf278b_status_port_0_r )
{
return ymf278b_status_port_r(0);
}
READ8_HANDLER( YMF278B_data_port_0_r )
READ8_HANDLER( ymf278b_data_port_0_r )
{
return ymf278b_data_port_r(0);
}
WRITE8_HANDLER( YMF278B_control_port_0_A_w )
WRITE8_HANDLER( ymf278b_control_port_0_a_w )
{
ymf278b_control_port_A_w(0, data);
}
WRITE8_HANDLER( YMF278B_data_port_0_A_w )
WRITE8_HANDLER( ymf278b_data_port_0_a_w )
{
ymf278b_data_port_A_w(machine, 0, data);
}
WRITE8_HANDLER( YMF278B_control_port_0_B_w )
WRITE8_HANDLER( ymf278b_control_port_0_b_w )
{
ymf278b_control_port_B_w(0, data);
}
WRITE8_HANDLER( YMF278B_data_port_0_B_w )
WRITE8_HANDLER( ymf278b_data_port_0_b_w )
{
ymf278b_data_port_B_w(0, data);
}
WRITE8_HANDLER( YMF278B_control_port_0_C_w )
WRITE8_HANDLER( ymf278b_control_port_0_c_w )
{
ymf278b_control_port_C_w(0, data);
}
WRITE8_HANDLER( YMF278B_data_port_0_C_w )
WRITE8_HANDLER( ymf278b_data_port_0_c_w )
{
ymf278b_data_port_C_w(0, data);
}
READ8_HANDLER( YMF278B_status_port_1_r )
READ8_HANDLER( ymf278b_status_port_1_r )
{
return ymf278b_status_port_r(1);
}
READ8_HANDLER( YMF278B_data_port_1_r )
READ8_HANDLER( ymf278b_data_port_1_r )
{
return ymf278b_data_port_r(1);
}
WRITE8_HANDLER( YMF278B_control_port_1_A_w )
WRITE8_HANDLER( ymf278b_control_port_1_a_w )
{
ymf278b_control_port_A_w(1, data);
}
WRITE8_HANDLER( YMF278B_data_port_1_A_w )
WRITE8_HANDLER( ymf278b_data_port_1_a_w )
{
ymf278b_data_port_A_w(machine, 1, data);
}
WRITE8_HANDLER( YMF278B_control_port_1_B_w )
WRITE8_HANDLER( ymf278b_control_port_1_b_w )
{
ymf278b_control_port_B_w(1, data);
}
WRITE8_HANDLER( YMF278B_data_port_1_B_w )
WRITE8_HANDLER( ymf278b_data_port_1_b_w )
{
ymf278b_data_port_B_w(1, data);
}
WRITE8_HANDLER( YMF278B_control_port_1_C_w )
WRITE8_HANDLER( ymf278b_control_port_1_c_w )
{
ymf278b_control_port_C_w(1, data);
}
WRITE8_HANDLER( YMF278B_data_port_1_C_w )
WRITE8_HANDLER( ymf278b_data_port_1_c_w )
{
ymf278b_data_port_C_w(1, data);
}

41
src/emu/sound/ymf278b.h
View File

@ -1,28 +1,33 @@
#pragma once
#ifndef __YMF278B_H__
#define __YMF278B_H__
#define YMF278B_STD_CLOCK (33868800) /* standard clock for OPL4 */
struct YMF278B_interface {
typedef struct _ymf278b_interface ymf278b_interface;
struct _ymf278b_interface
{
void (*irq_callback)(running_machine *machine, int state); /* irq callback */
};
READ8_HANDLER( YMF278B_status_port_0_r );
READ8_HANDLER( YMF278B_data_port_0_r );
WRITE8_HANDLER( YMF278B_control_port_0_A_w );
WRITE8_HANDLER( YMF278B_data_port_0_A_w );
WRITE8_HANDLER( YMF278B_control_port_0_B_w );
WRITE8_HANDLER( YMF278B_data_port_0_B_w );
WRITE8_HANDLER( YMF278B_control_port_0_C_w );
WRITE8_HANDLER( YMF278B_data_port_0_C_w );
READ8_HANDLER( ymf278b_status_port_0_r );
READ8_HANDLER( ymf278b_data_port_0_r );
WRITE8_HANDLER( ymf278b_control_port_0_a_w );
WRITE8_HANDLER( ymf278b_data_port_0_a_w );
WRITE8_HANDLER( ymf278b_control_port_0_b_w );
WRITE8_HANDLER( ymf278b_data_port_0_b_w );
WRITE8_HANDLER( ymf278b_control_port_0_c_w );
WRITE8_HANDLER( ymf278b_data_port_0_c_w );
READ8_HANDLER( YMF278B_status_port_1_r );
READ8_HANDLER( YMF278B_data_port_1_r );
WRITE8_HANDLER( YMF278B_control_port_1_A_w );
WRITE8_HANDLER( YMF278B_data_port_1_A_w );
WRITE8_HANDLER( YMF278B_control_port_1_B_w );
WRITE8_HANDLER( YMF278B_data_port_1_B_w );
WRITE8_HANDLER( YMF278B_control_port_1_C_w );
WRITE8_HANDLER( YMF278B_data_port_1_C_w );
READ8_HANDLER( ymf278b_status_port_1_r );
READ8_HANDLER( ymf278b_data_port_1_r );
WRITE8_HANDLER( ymf278b_control_port_1_a_w );
WRITE8_HANDLER( ymf278b_data_port_1_a_w );
WRITE8_HANDLER( ymf278b_control_port_1_b_w );
WRITE8_HANDLER( ymf278b_data_port_1_b_w );
WRITE8_HANDLER( ymf278b_control_port_1_c_w );
WRITE8_HANDLER( ymf278b_data_port_1_c_w );
#endif
#endif /* __YMF278B_H__ */

52
src/emu/sound/ymz280b.c
View File

@ -629,8 +629,8 @@ static void ymz280b_update(void *param, stream_sample_t **inputs, stream_sample_
static void *ymz280b_start(const char *tag, int sndindex, int clock, const void *config)
{
static const struct YMZ280Binterface defintrf = { 0 };
const struct YMZ280Binterface *intf = (config != NULL) ? config : &defintrf;
static const ymz280b_interface defintrf = { 0 };
const ymz280b_interface *intf = (config != NULL) ? config : &defintrf;
struct YMZ280BChip *chip;
chip = auto_malloc(sizeof(*chip));
@ -942,41 +942,41 @@ static int compute_status(struct YMZ280BChip *chip)
/**********************************************************************************************
YMZ280B_status_0_r/YMZ280B_status_1_r -- handle a read from the status register
ymz280b_status_0_r/ymz280b_status_1_r -- handle a read from the status register
***********************************************************************************************/
READ8_HANDLER( YMZ280B_status_0_r )
READ8_HANDLER( ymz280b_status_0_r )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
return compute_status(chip);
}
READ8_HANDLER( YMZ280B_status_1_r )
READ8_HANDLER( ymz280b_status_1_r )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);
return compute_status(chip);
}
READ16_HANDLER( YMZ280B_status_0_lsb_r )
READ16_HANDLER( ymz280b_status_0_lsb_r )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
return compute_status(chip);
}
READ16_HANDLER( YMZ280B_status_0_msb_r )
READ16_HANDLER( ymz280b_status_0_msb_r )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
return compute_status(chip) << 8;
}
READ16_HANDLER( YMZ280B_status_1_lsb_r )
READ16_HANDLER( ymz280b_status_1_lsb_r )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);
return compute_status(chip);
}
READ16_HANDLER( YMZ280B_status_1_msb_r )
READ16_HANDLER( ymz280b_status_1_msb_r )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);
return compute_status(chip) << 8;
@ -984,41 +984,41 @@ READ16_HANDLER( YMZ280B_status_1_msb_r )
/**********************************************************************************************
YMZ280B_register_0_w/YMZ280B_register_1_w -- handle a write to the register select
ymz280b_register_0_w/ymz280b_register_1_w -- handle a write to the register select
***********************************************************************************************/
WRITE8_HANDLER( YMZ280B_register_0_w )
WRITE8_HANDLER( ymz280b_register_0_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
chip->current_register = data;
}
WRITE8_HANDLER( YMZ280B_register_1_w )
WRITE8_HANDLER( ymz280b_register_1_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);
chip->current_register = data;
}
WRITE16_HANDLER( YMZ280B_register_0_lsb_w )
WRITE16_HANDLER( ymz280b_register_0_lsb_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
if (ACCESSING_BITS_0_7) chip->current_register = data & 0xff;
}
WRITE16_HANDLER( YMZ280B_register_0_msb_w )
WRITE16_HANDLER( ymz280b_register_0_msb_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
if (ACCESSING_BITS_8_15) chip->current_register = (data >> 8) & 0xff;
}
WRITE16_HANDLER( YMZ280B_register_1_lsb_w )
WRITE16_HANDLER( ymz280b_register_1_lsb_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);
if (ACCESSING_BITS_0_7) chip->current_register = data & 0xff;
}
WRITE16_HANDLER( YMZ280B_register_1_msb_w )
WRITE16_HANDLER( ymz280b_register_1_msb_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);
if (ACCESSING_BITS_8_15) chip->current_register = (data >> 8) & 0xff;
@ -1026,41 +1026,41 @@ WRITE16_HANDLER( YMZ280B_register_1_msb_w )
/**********************************************************************************************
YMZ280B_data_0_w/YMZ280B_data_1_w -- handle a write to the current register
ymz280b_data_0_w/ymz280b_data_1_w -- handle a write to the current register
***********************************************************************************************/
WRITE8_HANDLER( YMZ280B_data_0_w )
WRITE8_HANDLER( ymz280b_data_0_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
write_to_register(chip, data);
}
WRITE8_HANDLER( YMZ280B_data_1_w )
WRITE8_HANDLER( ymz280b_data_1_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);
write_to_register(chip, data);
}
WRITE16_HANDLER( YMZ280B_data_0_lsb_w )
WRITE16_HANDLER( ymz280b_data_0_lsb_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
if (ACCESSING_BITS_0_7) write_to_register(chip, data & 0xff);
}
WRITE16_HANDLER( YMZ280B_data_0_msb_w )
WRITE16_HANDLER( ymz280b_data_0_msb_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
if (ACCESSING_BITS_8_15) write_to_register(chip, (data >> 8) & 0xff);
}
WRITE16_HANDLER( YMZ280B_data_1_lsb_w )
WRITE16_HANDLER( ymz280b_data_1_lsb_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);
if (ACCESSING_BITS_0_7) write_to_register(chip, data & 0xff);
}
WRITE16_HANDLER( YMZ280B_data_1_msb_w )
WRITE16_HANDLER( ymz280b_data_1_msb_w )
{
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);
if (ACCESSING_BITS_8_15) write_to_register(chip, (data >> 8) & 0xff);
@ -1068,11 +1068,11 @@ WRITE16_HANDLER( YMZ280B_data_1_msb_w )
/**********************************************************************************************
YMZ280B_data_0_r/YMZ280B_data_1_r -- handle an external RAM read
ymz280b_data_0_r/ymz280b_data_1_r -- handle an external RAM read
***********************************************************************************************/
READ8_HANDLER( YMZ280B_data_0_r )
READ8_HANDLER( ymz280b_data_0_r )
{
UINT8 data;
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 0);
@ -1081,7 +1081,7 @@ READ8_HANDLER( YMZ280B_data_0_r )
return data;
}
READ8_HANDLER( YMZ280B_data_1_r )
READ8_HANDLER( ymz280b_data_1_r )
{
UINT8 data;
struct YMZ280BChip *chip = sndti_token(SOUND_YMZ280B, 1);

52
src/emu/sound/ymz280b.h
View File

@ -5,38 +5,42 @@
*
**********************************************************************************************/
#ifndef YMZ280B_H
#define YMZ280B_H
#pragma once
struct YMZ280Binterface
#ifndef __YMZ280B_H__
#define __YMZ280B_H__
typedef struct _ymz280b_interface ymz280b_interface;
struct _ymz280b_interface
{
void (*irq_callback)(running_machine *machine, int state); /* irq callback */
read8_machine_func ext_read; /* external RAM read */
write8_machine_func ext_write; /* external RAM write */
};
READ8_HANDLER ( YMZ280B_status_0_r );
WRITE8_HANDLER( YMZ280B_register_0_w );
READ8_HANDLER( YMZ280B_data_0_r );
WRITE8_HANDLER( YMZ280B_data_0_w );
READ8_HANDLER ( ymz280b_status_0_r );
WRITE8_HANDLER( ymz280b_register_0_w );
READ8_HANDLER( ymz280b_data_0_r );
WRITE8_HANDLER( ymz280b_data_0_w );
READ16_HANDLER ( YMZ280B_status_0_lsb_r );
READ16_HANDLER ( YMZ280B_status_0_msb_r );
WRITE16_HANDLER( YMZ280B_register_0_lsb_w );
WRITE16_HANDLER( YMZ280B_register_0_msb_w );
WRITE16_HANDLER( YMZ280B_data_0_lsb_w );
WRITE16_HANDLER( YMZ280B_data_0_msb_w );
READ16_HANDLER ( ymz280b_status_0_lsb_r );
READ16_HANDLER ( ymz280b_status_0_msb_r );
WRITE16_HANDLER( ymz280b_register_0_lsb_w );
WRITE16_HANDLER( ymz280b_register_0_msb_w );
WRITE16_HANDLER( ymz280b_data_0_lsb_w );
WRITE16_HANDLER( ymz280b_data_0_msb_w );
READ8_HANDLER ( YMZ280B_status_1_r );
WRITE8_HANDLER( YMZ280B_register_1_w );
READ8_HANDLER( YMZ280B_data_1_r );
WRITE8_HANDLER( YMZ280B_data_1_w );
READ8_HANDLER ( ymz280b_status_1_r );
WRITE8_HANDLER( ymz280b_register_1_w );
READ8_HANDLER( ymz280b_data_1_r );
WRITE8_HANDLER( ymz280b_data_1_w );
READ16_HANDLER ( YMZ280B_status_1_lsb_r );
READ16_HANDLER ( YMZ280B_status_1_msb_r );
WRITE16_HANDLER( YMZ280B_register_1_lsb_w );
WRITE16_HANDLER( YMZ280B_register_1_msb_w );
WRITE16_HANDLER( YMZ280B_data_1_lsb_w );
WRITE16_HANDLER( YMZ280B_data_1_msb_w );
READ16_HANDLER ( ymz280b_status_1_lsb_r );
READ16_HANDLER ( ymz280b_status_1_msb_r );
WRITE16_HANDLER( ymz280b_register_1_lsb_w );
WRITE16_HANDLER( ymz280b_register_1_msb_w );
WRITE16_HANDLER( ymz280b_data_1_lsb_w );
WRITE16_HANDLER( ymz280b_data_1_msb_w );
#endif
#endif /* __YMZ280B_H__ */

24
src/mame/audio/atarijsa.c
View File

@ -740,9 +740,9 @@ static void update_all_volumes(running_machine *machine )
static ADDRESS_MAP_START( atarijsa1_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x2000) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0x2001, 0x2001) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0x2000, 0x2001) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0x2000, 0x2000) AM_WRITE(ym2151_register_port_0_w)
AM_RANGE(0x2001, 0x2001) AM_WRITE(ym2151_data_port_0_w)
AM_RANGE(0x2000, 0x2001) AM_READ(ym2151_status_port_0_r)
AM_RANGE(0x2800, 0x2bff) AM_READWRITE(jsa1_io_r, jsa1_io_w)
AM_RANGE(0x3000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -750,9 +750,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( atarijsa2_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x2000) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0x2001, 0x2001) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0x2000, 0x2001) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0x2000, 0x2000) AM_WRITE(ym2151_register_port_0_w)
AM_RANGE(0x2001, 0x2001) AM_WRITE(ym2151_data_port_0_w)
AM_RANGE(0x2000, 0x2001) AM_READ(ym2151_status_port_0_r)
AM_RANGE(0x2800, 0x2bff) AM_READWRITE(jsa2_io_r, jsa2_io_w)
AM_RANGE(0x3000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -761,9 +761,9 @@ ADDRESS_MAP_END
/* full map verified from schematics and Batman GALs */
static ADDRESS_MAP_START( atarijsa3_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x2000) AM_MIRROR(0x07fe) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0x2001, 0x2001) AM_MIRROR(0x07fe) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x07fe) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0x2000, 0x2000) AM_MIRROR(0x07fe) AM_WRITE(ym2151_register_port_0_w)
AM_RANGE(0x2001, 0x2001) AM_MIRROR(0x07fe) AM_WRITE(ym2151_data_port_0_w)
AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x07fe) AM_READ(ym2151_status_port_0_r)
AM_RANGE(0x2800, 0x2fff) AM_READWRITE(jsa3_io_r, jsa3_io_w)
AM_RANGE(0x3000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -771,9 +771,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( atarijsa3s_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x2000) AM_MIRROR(0x07fe) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0x2001, 0x2001) AM_MIRROR(0x07fe) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x07fe) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0x2000, 0x2000) AM_MIRROR(0x07fe) AM_WRITE(ym2151_register_port_0_w)
AM_RANGE(0x2001, 0x2001) AM_MIRROR(0x07fe) AM_WRITE(ym2151_data_port_0_w)
AM_RANGE(0x2000, 0x2001) AM_MIRROR(0x07fe) AM_READ(ym2151_status_port_0_r)
AM_RANGE(0x2800, 0x2fff) AM_READWRITE(jsa3s_io_r, jsa3s_io_w)
AM_RANGE(0x3000, 0xffff) AM_ROM
ADDRESS_MAP_END

4
src/mame/audio/carnival.c
View File

@ -273,11 +273,11 @@ static WRITE8_HANDLER( carnival_music_port_2_w )
break;
case PSG_BC_WRITE:
AY8910_write_port_0_w( machine, 0, psgData );
ay8910_write_port_0_w( machine, 0, psgData );
break;
case PSG_BC_LATCH_ADDRESS:
AY8910_control_port_0_w( machine, 0, psgData );
ay8910_control_port_0_w( machine, 0, psgData );
break;
}
}

16
src/mame/audio/cchasm.c
View File

@ -26,10 +26,10 @@ READ8_HANDLER( cchasm_snd_io_r )
return sound_flags | coin;
case 0x01:
return AY8910_read_port_0_r (machine, offset);
return ay8910_read_port_0_r (machine, offset);
case 0x21:
return AY8910_read_port_1_r (machine, offset);
return ay8910_read_port_1_r (machine, offset);
case 0x40:
return soundlatch_r (machine, offset);
@ -49,19 +49,19 @@ WRITE8_HANDLER( cchasm_snd_io_w )
switch (offset & 0x61 )
{
case 0x00:
AY8910_control_port_0_w (machine, offset, data);
ay8910_control_port_0_w (machine, offset, data);
break;
case 0x01:
AY8910_write_port_0_w (machine, offset, data);
ay8910_write_port_0_w (machine, offset, data);
break;
case 0x20:
AY8910_control_port_1_w (machine, offset, data);
ay8910_control_port_1_w (machine, offset, data);
break;
case 0x21:
AY8910_write_port_1_w (machine, offset, data);
ay8910_write_port_1_w (machine, offset, data);
break;
case 0x40:
@ -142,7 +142,7 @@ static WRITE8_HANDLER( ctc_timer_1_w )
{
output[0] ^= 0x7f;
channel_active[0] = 1;
DAC_data_w(0, output[0]);
dac_data_w(0, output[0]);
}
}
@ -152,7 +152,7 @@ static WRITE8_HANDLER( ctc_timer_2_w )
{
output[1] ^= 0x7f;
channel_active[1] = 1;
DAC_data_w(1, output[0]);
dac_data_w(1, output[0]);
}
}

18
src/mame/audio/cinemat.c
View File

@ -1528,15 +1528,15 @@ static MACHINE_RESET( demon_sound )
static ADDRESS_MAP_START( demon_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x3000, 0x33ff) AM_RAM
AM_RANGE(0x4001, 0x4001) AM_READ(AY8910_read_port_0_r)
AM_RANGE(0x4002, 0x4002) AM_WRITE(AY8910_write_port_0_w)
AM_RANGE(0x4003, 0x4003) AM_WRITE(AY8910_control_port_0_w)
AM_RANGE(0x5001, 0x5001) AM_READ(AY8910_read_port_1_r)
AM_RANGE(0x5002, 0x5002) AM_WRITE(AY8910_write_port_1_w)
AM_RANGE(0x5003, 0x5003) AM_WRITE(AY8910_control_port_1_w)
AM_RANGE(0x6001, 0x6001) AM_READ(AY8910_read_port_2_r)
AM_RANGE(0x6002, 0x6002) AM_WRITE(AY8910_write_port_2_w)
AM_RANGE(0x6003, 0x6003) AM_WRITE(AY8910_control_port_2_w)
AM_RANGE(0x4001, 0x4001) AM_READ(ay8910_read_port_0_r)
AM_RANGE(0x4002, 0x4002) AM_WRITE(ay8910_write_port_0_w)
AM_RANGE(0x4003, 0x4003) AM_WRITE(ay8910_control_port_0_w)
AM_RANGE(0x5001, 0x5001) AM_READ(ay8910_read_port_1_r)
AM_RANGE(0x5002, 0x5002) AM_WRITE(ay8910_write_port_1_w)
AM_RANGE(0x5003, 0x5003) AM_WRITE(ay8910_control_port_1_w)
AM_RANGE(0x6001, 0x6001) AM_READ(ay8910_read_port_2_r)
AM_RANGE(0x6002, 0x6002) AM_WRITE(ay8910_write_port_2_w)
AM_RANGE(0x6003, 0x6003) AM_WRITE(ay8910_control_port_2_w)
AM_RANGE(0x7000, 0x7000) AM_WRITE(SMH_NOP) /* watchdog? */
ADDRESS_MAP_END

2
src/mame/audio/cyberbal.c
View File

@ -155,7 +155,7 @@ WRITE16_HANDLER( cyberbal_sound_68k_w )
WRITE16_HANDLER( cyberbal_sound_68k_dac_w )
{
DAC_data_16_w((offset >> 3) & 1, (((data >> 3) & 0x800) | ((data >> 2) & 0x7ff)) << 4);
dac_data_16_w((offset >> 3) & 1, (((data >> 3) & 0x800) | ((data >> 2) & 0x7ff)) << 4);
if (fast_68k_int)
{

4
src/mame/audio/dkong.c
View File

@ -1008,8 +1008,8 @@ static WRITE8_HANDLER( M58817_command_w )
{
logerror("PA Write %x\n", data);
tms5110_CTL_w(machine, 0, data & 0x0f);
tms5110_PDC_w(machine, 0, (data>>4) & 0x01);
tms5110_ctl_w(machine, 0, data & 0x0f);
tms5110_pdc_w(machine, 0, (data>>4) & 0x01);
// FIXME 0x20 is CS
}

12
src/mame/audio/gottlieb.c
View File

@ -312,7 +312,7 @@ static ADDRESS_MAP_START( gottlieb_sound1_map, ADDRESS_SPACE_PROGRAM, 8 )
ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x007f) AM_MIRROR(0x0d80) AM_RAM
AM_RANGE(0x0200, 0x021f) AM_MIRROR(0x0de0) AM_DEVREADWRITE(RIOT6532, "riot", riot6532_r, riot6532_w)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x0fff) AM_WRITE(DAC_0_data_w)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x0fff) AM_WRITE(dac_0_data_w)
AM_RANGE(0x2000, 0x2000) AM_MIRROR(0x0fff) AM_WRITE(vortrax_data_w)
AM_RANGE(0x3000, 0x3000) AM_MIRROR(0x0fff) AM_WRITE(speech_clock_dac_w)
AM_RANGE(0x6000, 0x7fff) AM_ROM
@ -485,7 +485,7 @@ static WRITE8_HANDLER( dac_w )
/* dual DAC; the first DAC serves as the reference voltage for the
second, effectively scaling the output */
dac_data[offset] = data;
DAC_data_16_w(0, dac_data[0] * dac_data[1]);
dac_data_16_w(0, dac_data[0] * dac_data[1]);
}
@ -507,17 +507,17 @@ static WRITE8_HANDLER( speech_control_w )
{
/* bit 4 goes to the 8913 BC1 pin */
if (data & 0x10)
AY8910_control_port_0_w(machine, 0, *psg_latch);
ay8910_control_port_0_w(machine, 0, *psg_latch);
else
AY8910_write_port_0_w(machine, 0, *psg_latch);
ay8910_write_port_0_w(machine, 0, *psg_latch);
}
else
{
/* bit 4 goes to the 8913 BC1 pin */
if (data & 0x10)
AY8910_control_port_1_w(machine, 0, *psg_latch);
ay8910_control_port_1_w(machine, 0, *psg_latch);
else
AY8910_write_port_1_w(machine, 0, *psg_latch);
ay8910_write_port_1_w(machine, 0, *psg_latch);
}
}

2
src/mame/audio/harddriv.c
View File

@ -334,7 +334,7 @@ WRITE16_HANDLER( hdsnddsp_dac_w )
{
/* DAC L */
if (!dacmute)
DAC_signed_data_16_w(offset, data ^ 0x8000);
dac_signed_data_16_w(offset, data ^ 0x8000);
}

12
src/mame/audio/irem.c
View File

@ -68,17 +68,17 @@ static WRITE8_HANDLER( m6803_port2_w )
{
/* PSG 0 or 1? */
if (port2 & 0x08)
AY8910_control_port_0_w(machine, 0, port1);
ay8910_control_port_0_w(machine, 0, port1);
if (port2 & 0x10)
AY8910_control_port_1_w(machine, 0, port1);
ay8910_control_port_1_w(machine, 0, port1);
}
else
{
/* PSG 0 or 1? */
if (port2 & 0x08)
AY8910_write_port_0_w(machine, 0, port1);
ay8910_write_port_0_w(machine, 0, port1);
if (port2 & 0x10)
AY8910_write_port_1_w(machine, 0, port1);
ay8910_write_port_1_w(machine, 0, port1);
}
}
port2 = data;
@ -96,9 +96,9 @@ static READ8_HANDLER( m6803_port1_r )
{
/* PSG 0 or 1? */
if (port2 & 0x08)
return AY8910_read_port_0_r(machine, 0);
return ay8910_read_port_0_r(machine, 0);
if (port2 & 0x10)
return AY8910_read_port_1_r(machine, 0);
return ay8910_read_port_1_r(machine, 0);
return 0xff;
}

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