mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
Convert 7425 to macro modul
This commit is contained in:
couriersud
parent
87541ec5ca
commit
38d3050da0
@ -86,8 +86,6 @@ project "netlist"
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MAME_DIR .. "src/lib/netlist/devices/nld_4020.h",
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MAME_DIR .. "src/lib/netlist/devices/nld_4066.cpp",
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MAME_DIR .. "src/lib/netlist/devices/nld_4066.h",
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MAME_DIR .. "src/lib/netlist/devices/nld_7425.cpp",
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MAME_DIR .. "src/lib/netlist/devices/nld_7425.h",
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MAME_DIR .. "src/lib/netlist/devices/nld_7430.cpp",
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MAME_DIR .. "src/lib/netlist/devices/nld_7430.h",
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MAME_DIR .. "src/lib/netlist/devices/nld_7448.cpp",
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@ -98,7 +98,6 @@ void initialize_factory(factory_list_t &factory)
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ENTRY(switch2, SWITCH2, "-")
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ENTRY(nicRSFF, NETDEV_RSFF, "+S,R")
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ENTRY(nicDelay, NETDEV_DELAY, "-")
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ENTRY(7425, TTL_7425_NOR, "+A,B,C,D")
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ENTRY(7430, TTL_7430_NAND, "+A,B,C,D,E,F,G,H")
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ENTRY(7450, TTL_7450_ANDORINVERT, "+A,B,C,D")
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ENTRY(7486, TTL_7486_XOR, "+A,B")
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@ -128,7 +127,6 @@ void initialize_factory(factory_list_t &factory)
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ENTRY(NE555, NE555, "-")
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ENTRY(r2r_dac, R2R_DAC, "+VIN,R,N")
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ENTRY(4538_dip, CD4538_DIP, "-")
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ENTRY(7425_dip, TTL_7425_DIP, "-")
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ENTRY(7430_dip, TTL_7430_DIP, "-")
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ENTRY(7448_dip, TTL_7448_DIP, "-")
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ENTRY(7450_dip, TTL_7450_DIP, "-")
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@ -16,7 +16,6 @@
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#include "nld_4020.h"
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#include "nld_4066.h"
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#include "nld_7425.h"
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#include "nld_7430.h"
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#include "nld_7448.h"
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#include "nld_7450.h"
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@ -1,50 +0,0 @@
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// license:GPL-2.0+
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// copyright-holders:Couriersud
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/*
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* nld_7425.c
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*
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*/
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#include "nld_7425.h"
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NETLIB_NAMESPACE_DEVICES_START()
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NETLIB_START(7425_dip)
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{
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register_sub("1", m_1);
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register_sub("2", m_2);
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register_subalias("1", m_1->m_I[0]);
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register_subalias("2", m_1->m_I[1]);
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//register_subalias("3", ); X1 ==> NC
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register_subalias("4", m_1->m_I[2]);
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register_subalias("5", m_1->m_I[3]);
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register_subalias("6", m_1->m_Q[0]);
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register_subalias("8", m_2->m_Q[0]);
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register_subalias("9", m_2->m_I[0]);
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register_subalias("10", m_2->m_I[1]);
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//register_subalias("11", ); X2 ==> NC
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register_subalias("12", m_2->m_I[2]);
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register_subalias("13", m_2->m_I[3]);
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}
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NETLIB_UPDATE(7425_dip)
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{
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/* only called during startup */
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m_1->update_dev();
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m_2->update_dev();
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}
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NETLIB_RESET(7425_dip)
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{
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m_1->do_reset();
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m_2->do_reset();
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}
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NETLIB_NAMESPACE_DEVICES_END()
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@ -1,63 +0,0 @@
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// license:GPL-2.0+
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// copyright-holders:Couriersud
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/*
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* nld_7425.h
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*
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* DM7425: Dual 4-Input NOR Gates
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*
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* +--------------+
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* A1 |1 ++ 14| VCC
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* B1 |2 13| D2
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* X1 |3 12| C2
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* C1 |4 7425 11| X2
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* D1 |5 10| B2
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* Y1 |6 9| A2
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* GND |7 8| Y2
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* +--------------+
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* _______
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* Y = A+B+C+D
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* +---+---+---+---+---++---+
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* | A | B | C | D | X || Y |
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* +===+===+===+===+===++===+
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* | X | X | X | X | 0 || Z |
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* | 0 | 0 | 0 | 0 | 1 || 1 |
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* | X | X | X | 1 | 1 || 0 |
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* | X | X | 1 | X | 1 || 0 |
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* | X | 1 | X | X | 1 || 0 |
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* | 1 | X | X | X | 1 || 0 |
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* +---+---+---+---+---++---+
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*
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* TODO: The "X" input and high impedance output are currently not simulated.
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*
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* Naming conventions follow National Semiconductor datasheet
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*
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*/
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#ifndef NLD_7425_H_
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#define NLD_7425_H_
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#include "nld_signal.h"
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#define TTL_7425_NOR(_name, _I1, _I2, _I3, _I4) \
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NET_REGISTER_DEV(TTL_7425_NOR, _name) \
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NET_CONNECT(_name, A, _I1) \
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NET_CONNECT(_name, B, _I2) \
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NET_CONNECT(_name, C, _I3) \
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NET_CONNECT(_name, D, _I4)
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#define TTL_7425_DIP(_name) \
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NET_REGISTER_DEV(TTL_7425_DIP, _name)
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NETLIB_NAMESPACE_DEVICES_START()
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NETLIB_SIGNAL(7425, 4, 1, 0);
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NETLIB_DEVICE(7425_dip,
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NETLIB_SUB(7425) m_1;
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NETLIB_SUB(7425) m_2;
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);
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NETLIB_NAMESPACE_DEVICES_END()
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#endif /* NLD_7425_H_ */
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@ -301,6 +301,48 @@ NETLIST_START(TTL_7420_DIP)
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)
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NETLIST_END()
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/*
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* DM7425: Dual 4-Input NOR Gates
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*
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* _______
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* Y = A+B+C+D
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* +---+---+---+---+---++---+
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* | A | B | C | D | X || Y |
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* +===+===+===+===+===++===+
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* | X | X | X | X | 0 || Z |
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* | 0 | 0 | 0 | 0 | 1 || 1 |
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* | X | X | X | 1 | 1 || 0 |
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* | X | X | 1 | X | 1 || 0 |
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* | X | 1 | X | X | 1 || 0 |
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* | 1 | X | X | X | 1 || 0 |
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* +---+---+---+---+---++---+
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*
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* FIXME: The "X" input and high impedance output are currently not simulated.
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*
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* Naming conventions follow National Semiconductor datasheet
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*
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*/
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NETLIST_START(TTL_7425_DIP)
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TTL_7425_GATE(s1)
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TTL_7425_GATE(s2)
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DUMMY_INPUT(GND)
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DUMMY_INPUT(VCC)
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DUMMY_INPUT(X)
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DIPPINS( /* +--------------+ */
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s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
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s1.B, /* B1 |2 13| D2 */ s2.D,
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X.I, /* X1 |3 12| C2 */ s2.C,
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s1.C, /* C1 |4 7425 11| X2 */ X.I,
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s1.D, /* D1 |5 10| B2 */ s2.B,
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s1.Q, /* Y1 |6 9| A2 */ s2.A,
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GND.I, /* GND |7 8| Y2 */ s2.Q
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/* +--------------+ */
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)
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NETLIST_END()
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/*
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* DM7427: Triple 3-Input NOR Gates
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*
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@ -549,6 +591,26 @@ NETLIST_START(TTL74XX_lib)
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TT_FAMILY("74XX")
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TRUTHTABLE_END()
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TRUTHTABLE_START(TTL_7425_GATE, 4, 1, 0, "")
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TT_HEAD("A,B,C,D|Q ")
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TT_LINE("1,X,X,X|0|15")
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TT_LINE("X,1,X,X|0|15")
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TT_LINE("X,X,1,X|0|15")
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TT_LINE("X,X,X,1|0|15")
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TT_LINE("0,0,0,0|1|22")
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TT_FAMILY("74XX")
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TRUTHTABLE_END()
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TRUTHTABLE_START(TTL_7425_NOR, 4, 1, 0, "A,B,C,D")
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TT_HEAD("A,B,C,D|Q ")
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TT_LINE("1,X,X,X|0|15")
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TT_LINE("X,1,X,X|0|15")
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TT_LINE("X,X,1,X|0|15")
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TT_LINE("X,X,X,1|0|15")
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TT_LINE("0,0,0,0|1|22")
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TT_FAMILY("74XX")
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TRUTHTABLE_END()
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TRUTHTABLE_START(TTL_7427_GATE, 3, 1, 0, "")
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TT_HEAD("A,B,C|Q ")
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TT_LINE("1,X,X|0|15")
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@ -611,6 +673,7 @@ NETLIST_START(TTL74XX_lib)
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LOCAL_LIB_ENTRY(TTL_7411_DIP)
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LOCAL_LIB_ENTRY(TTL_7416_DIP)
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LOCAL_LIB_ENTRY(TTL_7420_DIP)
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LOCAL_LIB_ENTRY(TTL_7425_DIP)
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LOCAL_LIB_ENTRY(TTL_7427_DIP)
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LOCAL_LIB_ENTRY(TTL_7432_DIP)
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LOCAL_LIB_ENTRY(TTL_7437_DIP)
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@ -105,6 +105,20 @@
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NET_REGISTER_DEV(TTL_7420_DIP, _name)
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#define TTL_7425_GATE(_name) \
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NET_REGISTER_DEV(TTL_7425_GATE, _name)
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#define TTL_7425_NOR(_name, _I1, _I2, _I3, _I4) \
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NET_REGISTER_DEV(TTL_7425_NOR, _name) \
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NET_CONNECT(_name, A, _I1) \
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NET_CONNECT(_name, B, _I2) \
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NET_CONNECT(_name, C, _I3) \
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NET_CONNECT(_name, D, _I4)
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#define TTL_7425_DIP(_name) \
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NET_REGISTER_DEV(TTL_7425_DIP, _name)
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#define TTL_7427_GATE(_name) \
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NET_REGISTER_DEV(TTL_7427_GATE, _name)
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