Implemented the Namco Custom 116 palette and raster IRQ controller as a device,

and hooked it up to the namcos1, namconb1 and namcofl drivers [Alex Jackson]

digfx.c: Make some members protected instead of private to be less fascistic
and more consistent with other device_interfaces.
This commit is contained in:
Alex W. Jackson 2014-08-14 14:18:28 +00:00
parent 0b8d28bd40
commit 3e27396d03
16 changed files with 263 additions and 155 deletions

2
.gitattributes vendored
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@ -7120,6 +7120,8 @@ src/mame/video/btoads.c svneol=native#text/plain
src/mame/video/bublbobl.c svneol=native#text/plain
src/mame/video/buggychl.c svneol=native#text/plain
src/mame/video/bwing.c svneol=native#text/plain
src/mame/video/c116.c svneol=native#text/plain
src/mame/video/c116.h svneol=native#text/plain
src/mame/video/c45.c svneol=native#text/plain
src/mame/video/c45.h svneol=native#text/plain
src/mame/video/cabal.c svneol=native#text/plain

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@ -212,6 +212,9 @@ protected:
virtual void interface_pre_start();
virtual void interface_post_start();
palette_device * m_palette; // pointer to the palette device
auto_pointer<gfx_element> m_gfx[MAX_GFX_ELEMENTS]; // array of pointers to graphic sets
private:
// configuration
const gfx_decode_entry * m_gfxdecodeinfo; // pointer to array of gfx decode information
@ -220,8 +223,6 @@ private:
// internal state
bool m_decoded; // have we processed our decode info yet?
palette_device * m_palette; // pointer to the palette device
auto_pointer<gfx_element> m_gfx[MAX_GFX_ELEMENTS]; // array of pointers to graphic sets
};
// iterator

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@ -197,13 +197,14 @@ WRITE32_MEMBER(namcofl_state::namcofl_sysreg_w)
}
}
WRITE32_MEMBER(namcofl_state::namcofl_paletteram_w)
// FIXME: remove this trampoline once the IRQ is moved into the actual device
WRITE8_MEMBER(namcofl_state::namcofl_c116_w)
{
COMBINE_DATA(&m_generic_paletteram_32[offset]);
m_c116->write(space, offset, data);
if ((offset == 0x1808/4) && ACCESSING_BITS_16_31)
if ((offset & 0x180e) == 0x180a)
{
UINT16 v = m_generic_paletteram_32[offset] >> 16;
UINT16 v = m_c116->get_reg(5);
UINT16 triggerscanline=(((v>>8)&0xff)|((v&0xff)<<8))-(32+1);
m_raster_interrupt_timer->adjust(m_screen->time_until_pos(triggerscanline));
@ -232,7 +233,7 @@ static ADDRESS_MAP_START( namcofl_mem, AS_PROGRAM, 32, namcofl_state )
AM_RANGE(0x30284000, 0x3028bfff) AM_READWRITE(namcofl_share_r, namcofl_share_w)
AM_RANGE(0x30300000, 0x30303fff) AM_RAM /* COMRAM */
AM_RANGE(0x30380000, 0x303800ff) AM_READ(fl_network_r ) /* network registers */
AM_RANGE(0x30400000, 0x3040ffff) AM_RAM_WRITE(namcofl_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0x30400000, 0x30407fff) AM_DEVREAD8("c116", namco_c116_device,read,0xffffffff) AM_WRITE8(namcofl_c116_w,0xffffffff)
AM_RANGE(0x30800000, 0x3080ffff) AM_READWRITE16(c123_tilemap_videoram_r,c123_tilemap_videoram_w,0xffffffff)
AM_RANGE(0x30a00000, 0x30a0003f) AM_READWRITE16(c123_tilemap_control_r,c123_tilemap_control_w,0xffffffff)
AM_RANGE(0x30c00000, 0x30c1ffff) AM_READWRITE16(c169_roz_videoram_r,c169_roz_videoram_w,0xffffffff) AM_SHARE("rozvideoram")
@ -604,6 +605,9 @@ static MACHINE_CONFIG_START( namcofl, namcofl_state )
MCFG_GFXDECODE_ADD("gfxdecode", "palette", 2)
MCFG_DEVICE_ADD("c116", NAMCO_C116, 0)
MCFG_GFX_PALETTE("palette")
MCFG_VIDEO_START_OVERRIDE(namcofl_state,namcofl)
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")

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@ -293,7 +293,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(namconb1_state::namconb_scantimer)
}
// Handle POSIRQ
UINT32 posirq_scanline = (m_generic_paletteram_32[0x1808/4] & 0xffff) - 32;
UINT32 posirq_scanline = m_c116->get_reg(5) - 32;
if (scanline == posirq_scanline)
{
@ -667,7 +667,7 @@ static ADDRESS_MAP_START( namconb1_am, AS_PROGRAM, 32, namconb1_state )
AM_RANGE(0x660000, 0x66003f) AM_READWRITE16(c123_tilemap_control_r,c123_tilemap_control_w,0xffffffff)
AM_RANGE(0x680000, 0x68000f) AM_RAM AM_SHARE("spritebank32")
AM_RANGE(0x6e0000, 0x6e001f) AM_READ(custom_key_r) AM_WRITENOP
AM_RANGE(0x700000, 0x707fff) AM_RAM AM_SHARE("paletteram")
AM_RANGE(0x700000, 0x707fff) AM_DEVREADWRITE8("c116", namco_c116_device, read, write, 0xffffffff)
ADDRESS_MAP_END
static ADDRESS_MAP_START( namconb2_am, AS_PROGRAM, 32, namconb1_state )
@ -684,7 +684,7 @@ static ADDRESS_MAP_START( namconb2_am, AS_PROGRAM, 32, namconb1_state )
AM_RANGE(0x6c0000, 0x6c003f) AM_READWRITE16(c123_tilemap_control_r,c123_tilemap_control_w,0xffffffff)
AM_RANGE(0x700000, 0x71ffff) AM_READWRITE16(c169_roz_videoram_r,c169_roz_videoram_w,0xffffffff) AM_SHARE("rozvideoram")
AM_RANGE(0x740000, 0x74001f) AM_READWRITE16(c169_roz_control_r,c169_roz_control_w,0xffffffff)
AM_RANGE(0x800000, 0x807fff) AM_RAM AM_SHARE("paletteram")
AM_RANGE(0x800000, 0x807fff) AM_DEVREADWRITE8("c116", namco_c116_device, read, write, 0xffffffff)
AM_RANGE(0x900008, 0x90000f) AM_RAM AM_SHARE("spritebank32")
AM_RANGE(0x940000, 0x94000f) AM_RAM AM_SHARE("tilebank32")
AM_RANGE(0x980000, 0x98000f) AM_READWRITE16(c169_roz_bank_r,c169_roz_bank_w,0xffffffff)
@ -1116,10 +1116,12 @@ static MACHINE_CONFIG_START( namconb1, namconb1_state )
MCFG_SCREEN_PALETTE("palette")
MCFG_GFXDECODE_ADD("gfxdecode", "palette", namconb1)
MCFG_PALETTE_ADD("palette", 0x2000)
MCFG_PALETTE_ENABLE_SHADOWS()
MCFG_DEVICE_ADD("c116", NAMCO_C116, 0)
MCFG_GFX_PALETTE("palette")
MCFG_VIDEO_START_OVERRIDE(namconb1_state,namconb1)
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
@ -1154,6 +1156,9 @@ static MACHINE_CONFIG_START( namconb2, namconb1_state )
MCFG_PALETTE_ADD("palette", 0x2000)
MCFG_PALETTE_ENABLE_SHADOWS()
MCFG_DEVICE_ADD("c116", NAMCO_C116, 0)
MCFG_GFX_PALETTE("palette")
MCFG_VIDEO_START_OVERRIDE(namconb1_state,namconb2)
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")

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@ -415,7 +415,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( virtual_map, AS_PROGRAM, 8, namcos1_state )
AM_RANGE(0x2c0000, 0x2c1fff) AM_WRITE(namcos1_3dcs_w)
AM_RANGE(0x2e0000, 0x2e7fff) AM_RAM_WRITE(namcos1_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0x2e0000, 0x2e7fff) AM_DEVREADWRITE("c116", namco_c116_device, read, write)
AM_RANGE(0x2f0000, 0x2f7fff) AM_RAM_WRITE(namcos1_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x2f8000, 0x2f9fff) AM_READWRITE(no_key_r, no_key_w)
AM_RANGE(0x2fc000, 0x2fcfff) AM_RAM_WRITE(namcos1_spriteram_w) AM_SHARE("spriteram")
@ -1070,6 +1070,9 @@ static MACHINE_CONFIG_START( ns1, namcos1_state )
MCFG_PALETTE_ADD("palette", 0x2000)
MCFG_PALETTE_ENABLE_SHADOWS()
MCFG_DEVICE_ADD("c116", NAMCO_C116, 0)
MCFG_GFX_PALETTE("palette")
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")

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@ -1,4 +1,5 @@
#include "namcos2.h"
#include "video/c116.h"
#define NAMCOFL_HTOTAL (288) /* wrong */
#define NAMCOFL_HBSTART (288)
@ -22,15 +23,15 @@ public:
: namcos2_shared_state(mconfig, type, tag),
m_maincpu(*this,"maincpu"),
m_mcu(*this,"mcu"),
m_shareram(*this, "shareram"),
m_generic_paletteram_32(*this, "paletteram"){ }
m_c116(*this,"c116"),
m_shareram(*this, "shareram") { }
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_mcu;
required_device<namco_c116_device> m_c116;
emu_timer *m_raster_interrupt_timer;
UINT32 *m_workram;
required_shared_ptr<UINT16> m_shareram;
required_shared_ptr<UINT32> m_generic_paletteram_32;
UINT8 m_mcu_port6;
UINT32 m_sprbank;
@ -38,7 +39,7 @@ public:
DECLARE_READ32_MEMBER(fl_network_r);
DECLARE_READ32_MEMBER(namcofl_sysreg_r);
DECLARE_WRITE32_MEMBER(namcofl_sysreg_w);
DECLARE_WRITE32_MEMBER(namcofl_paletteram_w);
DECLARE_WRITE8_MEMBER(namcofl_c116_w);
DECLARE_READ32_MEMBER(namcofl_share_r);
DECLARE_WRITE32_MEMBER(namcofl_share_w);
DECLARE_WRITE16_MEMBER(mcu_shared_w);

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@ -6,6 +6,7 @@
#include "namcos2.h"
#include "machine/eeprompar.h"
#include "video/c116.h"
#define NAMCONB1_HTOTAL (288) /* wrong */
#define NAMCONB1_HBSTART (288)
@ -27,21 +28,21 @@ class namconb1_state : public namcos2_shared_state
public:
namconb1_state(const machine_config &mconfig, device_type type, const char *tag)
: namcos2_shared_state(mconfig, type, tag),
m_maincpu(*this,"maincpu"),
m_mcu(*this,"mcu"),
m_maincpu(*this, "maincpu"),
m_mcu(*this, "mcu"),
m_c116(*this, "c116"),
m_eeprom(*this, "eeprom"),
m_spritebank32(*this, "spritebank32"),
m_tilebank32(*this, "tilebank32"),
m_namconb_shareram(*this, "namconb_share"),
m_generic_paletteram_32(*this, "paletteram") { }
m_namconb_shareram(*this, "namconb_share") { }
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_mcu;
required_device<namco_c116_device> m_c116;
required_device<eeprom_parallel_28xx_device> m_eeprom;
required_shared_ptr<UINT32> m_spritebank32;
optional_shared_ptr<UINT32> m_tilebank32;
required_shared_ptr<UINT16> m_namconb_shareram;
required_shared_ptr<UINT32> m_generic_paletteram_32;
UINT8 m_vbl_irq_level;
UINT8 m_pos_irq_level;

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@ -1,6 +1,7 @@
#include "machine/c117.h"
#include "sound/dac.h"
#include "sound/namco.h"
#include "video/c116.h"
class namcos1_state : public driver_device
{
@ -11,11 +12,11 @@ public:
m_subcpu(*this, "subcpu"),
m_audiocpu(*this, "audiocpu"),
m_mcu(*this, "mcu"),
m_c116(*this, "c116"),
m_c117(*this, "c117"),
m_dac(*this, "dac"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_paletteram(*this, "paletteram"),
m_videoram(*this, "videoram"),
m_spriteram(*this, "spriteram"),
m_playfield_control(*this, "pfcontrol"),
@ -26,12 +27,12 @@ public:
required_device<cpu_device> m_subcpu;
required_device<cpu_device> m_audiocpu;
required_device<cpu_device> m_mcu;
required_device<namco_c116_device> m_c116;
required_device<namco_c117_device> m_c117;
required_device<dac_device> m_dac;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
required_shared_ptr<UINT8> m_paletteram;
required_shared_ptr<UINT8> m_videoram;
required_shared_ptr<UINT8> m_spriteram;
required_shared_ptr<UINT8> m_playfield_control;
@ -60,7 +61,6 @@ public:
int m_strobe;
int m_strobe_count;
int m_stored_input[2];
UINT8 m_cus116[0x10];
tilemap_t *m_bg_tilemap[6];
UINT8 *m_tilemap_maskdata;
int m_copy_sprites;
@ -117,7 +117,6 @@ public:
void namcos1_update_DACs();
void namcos1_init_DACs();
DECLARE_WRITE8_MEMBER( namcos1_videoram_w );
DECLARE_WRITE8_MEMBER( namcos1_paletteram_w );
DECLARE_WRITE8_MEMBER( namcos1_spriteram_w );
WRITE8_MEMBER( namcos1_3dcs_w );
READ8_MEMBER( no_key_r );

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@ -351,12 +351,6 @@ public:
#define NAMCOS21_NUM_COLORS 0x8000
/**************************************************************/
/* Shared video palette function handlers */
/**************************************************************/
#define VIRTUAL_PALETTE_BANKS 30
/**************************************************************/
/* ROZ - Rotate & Zoom memory function handlers */
/**************************************************************/

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@ -1517,6 +1517,7 @@ $(MAMEOBJ)/namco.a: \
$(MACHINE)/namco62.o \
$(AUDIO)/namco52.o \
$(AUDIO)/namco54.o \
$(VIDEO)/c116.o \
$(VIDEO)/c45.o \
$(VIDEO)/bosco.o \
$(VIDEO)/digdug.o \

163
src/mame/video/c116.c Normal file
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@ -0,0 +1,163 @@
// license:BSD-3-Clause
// copyright-holders:Alex W. Jackson
/*
Namco Custom 116, used in:
System 1
System 2
NB-1/NB-2
System FL
C116 controls palette RAM, blanking/clipping, and generates raster IRQs.
It is paired with one of two priority mixer chips, depending on the board.
On System 1, its partner is Custom 120; on System 2, NB-1, NB-2, and System
FL, its partner is Custom 156. Based on schematics, C156 has more color input
pins than C120 in order to support sprites with higher bit depth; other
differences between the two mixer chips are unknown.
The mixer (C120 or C156) outputs a 13-bit address corresponding to the color
index of the highest-priority input pixel to three 6264 SRAMs, one for each of
red, green and blue. The data from the RAMs is output to C116, which either
sends it to the DAC or clips it to black if the beam position is outside the
visible area programmed via its registers.
When accessing the palette RAM from the CPU, data lines D0-D7 and address lines
A11 and A12 go to C116; these two address lines select between the three RAMs
and the C116 internal registers. A0-A10, A13 and A14 go to C120 or C156, which
simply pass them through to the RAMs (A13 becoming A11 and A14 becoming A12).
Thus, the palette RAM and the C116 registers are laid out like this from the
perspective of the CPU:
0000-07FF: Red (first 2048 pens)
0800-0FFF: Green ("")
1000-17FF: Blue ("")
1800-1FFF: C116 registers
2000-27FF: Red (second 2048 pens)
2800-2FFF: Green ("")
3000-37FF: Blue ("")
3800-3FFF: C116 registers (mirror)
4000-47FF: Red (third 2048 pens)
4800-4FFF: Green ("")
5000-57FF: Blue ("")
5800-5FFF: C116 registers (mirror)
6000-67FF: Red (last 2048 pens)
6800-6FFF: Green ("")
7000-77FF: Blue ("")
7800-7FFF: C116 registers (mirror)
C116 has six (or eight?) 16-bit registers:
00-01: left clip
02-03: right clip
04-05: top clip
06-07: bottom clip
08-09: raster IRQ horizontal position?
0A-0B: raster IRQ scanline
0C-0D: unknown, some games write 0 here, but probably unused
0E-0F: ""
The registers are mirrored every 0x10 bytes within the address ranges
indicated above.
Although the registers are logically 16-bit, the chip's external interface
is 8-bit, so the registers are written a byte at a time and in a big-endian
fashion (even addresses access the MSB and odd addresses access the LSB)
regardless of the endianness of the CPU. Thus System FL, which has an Intel
i960 CPU, needs to write its clip and raster values byteswapped.
*/
#include "emu.h"
#include "video/c116.h"
//-------------------------------------------------
// namco_c116_device -- constructor
//-------------------------------------------------
namco_c116_device::namco_c116_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, NAMCO_C116, "Namco C116 Video Controller", tag, owner, clock, "namco_c116", __FILE__),
device_gfx_interface(mconfig, *this),
device_video_interface(mconfig, *this)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void namco_c116_device::device_start()
{
m_ram_r.resize(0x2000);
m_ram_g.resize(0x2000);
m_ram_b.resize(0x2000);
memset(m_regs, 0, sizeof(m_regs));
save_item(NAME(m_ram_r));
save_item(NAME(m_ram_g));
save_item(NAME(m_ram_b));
save_item(NAME(m_regs));
}
READ8_MEMBER(namco_c116_device::read)
{
UINT8 *RAM;
switch (offset & 0x1800)
{
case 0x0000:
RAM = m_ram_r;
break;
case 0x0800:
RAM = m_ram_g;
break;
case 0x1000:
RAM = m_ram_b;
break;
default: // case 0x1800 (internal registers)
{
int reg = (offset & 0xf) >> 1;
if (offset & 1)
return m_regs[reg] & 0xff;
else
return m_regs[reg] >> 8;
}
}
return RAM[((offset & 0x6000) >> 2) | (offset & 0x7ff)];
}
WRITE8_MEMBER(namco_c116_device::write)
{
UINT8 *RAM;
switch (offset & 0x1800)
{
case 0x0000:
RAM = m_ram_r;
break;
case 0x0800:
RAM = m_ram_g;
break;
case 0x1000:
RAM = m_ram_b;
break;
default: // case 0x1800 (internal registers)
{
int reg = (offset & 0xf) >> 1;
if (offset & 1)
m_regs[reg] = (m_regs[reg] & 0xff00) | data;
else
m_regs[reg] = (m_regs[reg] & 0x00ff) | (data << 8);
//printf("reg%d = %d\n", reg, m_regs[reg]);
return;
}
}
int color = ((offset & 0x6000) >> 2) | (offset & 0x7ff);
RAM[color] = data;
m_palette->set_pen_color(color,m_ram_r[color],m_ram_g[color],m_ram_b[color]);
}
const device_type NAMCO_C116 = &device_creator<namco_c116_device>;

44
src/mame/video/c116.h Normal file
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@ -0,0 +1,44 @@
// license:BSD-3-Clause
// copyright-holders:Alex W. Jackson
#pragma once
#ifndef __C116_H__
#define __C116_H__
//***************************************************************************
// TYPE DEFINITIONS
//***************************************************************************
class namco_c116_device :
public device_t,
public device_gfx_interface,
public device_video_interface
{
public:
//construction/destruction
namco_c116_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
//read/write handlers
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
//getters
UINT16 get_reg(int reg) { return m_regs[reg]; }
protected:
// device-level overrides
virtual void device_start();
private:
// internal state
dynamic_array<UINT8> m_ram_r;
dynamic_array<UINT8> m_ram_g;
dynamic_array<UINT8> m_ram_b;
UINT16 m_regs[8];
};
extern const device_type NAMCO_C116;
#endif

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@ -131,7 +131,7 @@ WRITE16_MEMBER( namco_c45_road_device::tilemap_w )
WRITE16_MEMBER( namco_c45_road_device::tileram_w )
{
COMBINE_DATA(&m_tileram[offset]);
gfx(0)->mark_dirty(offset / WORDS_PER_ROAD_TILE);
m_gfx[0]->mark_dirty(offset / WORDS_PER_ROAD_TILE);
}
@ -198,7 +198,7 @@ void namco_c45_road_device::draw(bitmap_ind16 &bitmap, const rectangle &cliprect
while (numpixels-- > 0)
{
int pen = source_gfx[sourcex >> 16];
if (palette()->pen_indirect(pen) != m_transparent_color)
if (m_palette->pen_indirect(pen) != m_transparent_color)
{
if (m_clut != NULL)
pen = (pen & ~0xff) | m_clut[pen & 0xff];

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@ -45,34 +45,6 @@ nth_byte32( const UINT32 *pSource, int which )
} /* nth_byte32 */
#endif
static void namcofl_install_palette(running_machine &machine)
{
namcofl_state *state = machine.driver_data<namcofl_state>();
int pen, page, dword_offset, byte_offset;
UINT32 r,g,b;
UINT32 *pSource;
/* this is unnecessarily expensive. Better would be to mark palette entries dirty as
* they are modified, and only process those that have changed.
*/
pen = 0;
for( page=0; page<4; page++ )
{
pSource = &state->m_generic_paletteram_32[page*0x2000/4];
for( dword_offset=0; dword_offset<0x800/4; dword_offset++ )
{
r = pSource[dword_offset+0x0000/4];
g = pSource[dword_offset+0x0800/4];
b = pSource[dword_offset+0x1000/4];
for( byte_offset=0; byte_offset<4; byte_offset++ )
{
state->m_palette->set_pen_color(pen++, r&0xff, g&0xff, b&0xff);
r>>=8; g>>=8; b>>=8;
}
}
}
}
static void TilemapCB(running_machine &machine, UINT16 code, int *tile, int *mask )
{
*tile = code;
@ -84,8 +56,6 @@ UINT32 namcofl_state::screen_update_namcofl(screen_device &screen, bitmap_ind16
{
int pri;
namcofl_install_palette(machine());
bitmap.fill(m_palette->black_pen(), cliprect );
for( pri=0; pri<16; pri++ )

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@ -71,42 +71,11 @@ NB2TilemapCB(running_machine &machine, UINT16 code, int *tile, int *mask )
}
} /* NB2TilemapCB */
static void namconb1_install_palette(running_machine &machine)
{
namconb1_state *state = machine.driver_data<namconb1_state>();
int pen, page, dword_offset, byte_offset;
UINT32 r,g,b;
UINT32 *pSource;
/**
* This is unnecessarily expensive. Better would be to mark palette entries dirty as
* they are modified, and only process those that have changed.
*/
pen = 0;
for( page=0; page<4; page++ )
{
pSource = &state->m_generic_paletteram_32[page*0x2000/4];
for( dword_offset=0; dword_offset<0x800/4; dword_offset++ )
{
r = pSource[dword_offset+0x0000/4];
g = pSource[dword_offset+0x0800/4];
b = pSource[dword_offset+0x1000/4];
for( byte_offset=0; byte_offset<4; byte_offset++ )
{
state->m_palette->set_pen_color(pen++, r>>24, g>>24, b>>24 );
r<<=8; g<<=8; b<<=8;
}
}
}
} /* namconb1_install_palette */
static void
video_update_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int bROZ )
{
namconb1_state *state = screen.machine().driver_data<namconb1_state>();
int pri;
namconb1_install_palette(screen.machine());
if( bROZ )
{
@ -137,12 +106,10 @@ UINT32 namconb1_state::screen_update_namconb1(screen_device &screen, bitmap_ind1
/* compute window for custom screen blanking */
rectangle clip;
//004a 016a 0021 0101 0144 0020 (nebulas ray)
UINT32 xclip = m_generic_paletteram_32[0x1800/4];
UINT32 yclip = m_generic_paletteram_32[0x1804/4];
clip.min_x = (xclip>>16) - 0x4a;
clip.max_x = (xclip&0xffff) - 0x4a - 1;
clip.min_y = (yclip>>16) - 0x21;
clip.max_y = (yclip&0xffff) - 0x21 - 1;
clip.min_x = m_c116->get_reg(0) - 0x4a;
clip.max_x = m_c116->get_reg(1) - 0x4a - 1;
clip.min_y = m_c116->get_reg(2) - 0x21;
clip.max_y = m_c116->get_reg(3) - 0x21 - 1;
/* intersect with master clip rectangle */
clip &= cliprect;
@ -174,12 +141,10 @@ UINT32 namconb1_state::screen_update_namconb2(screen_device &screen, bitmap_ind1
/* compute window for custom screen blanking */
rectangle clip;
//004a016a 00210101 01440020
UINT32 xclip = m_generic_paletteram_32[0x1800/4];
UINT32 yclip = m_generic_paletteram_32[0x1804/4];
clip.min_x = (xclip>>16) - 0x4b;
clip.max_x = (xclip&0xffff) - 0x4b - 1;
clip.min_y = (yclip>>16) - 0x21;
clip.max_y = (yclip&0xffff) - 0x21 - 1;
clip.min_x = m_c116->get_reg(0) - 0x4b;
clip.max_x = m_c116->get_reg(1) - 0x4b - 1;
clip.min_y = m_c116->get_reg(2) - 0x21;
clip.max_y = m_c116->get_reg(3) - 0x21 - 1;
/* intersect with master clip rectangle */
clip &= cliprect;

View File

@ -125,20 +125,11 @@ void namcos1_state::video_start()
m_bg_tilemap[4]->set_scrolldy(16, 16);
m_bg_tilemap[5]->set_scrolldy(16, 16);
/* register videoram to the save state system (post-allocation) */
save_item(NAME(m_cus116));
/* set table for sprite color == 0x7f */
for (i = 0;i < 15;i++)
m_drawmode_table[i] = DRAWMODE_SHADOW;
m_drawmode_table[15] = DRAWMODE_NONE;
/* clear paletteram */
memset(m_paletteram, 0, 0x8000);
memset(m_cus116, 0, 0x10);
for (i = 0; i < 0x2000; i++)
m_palette->set_pen_color(i, rgb_t(0, 0, 0));
/* all palette entries are not affected by shadow sprites... */
for (i = 0;i < 0x2000;i++)
m_palette->shadow_table()[i] = i;
@ -177,42 +168,6 @@ WRITE8_MEMBER( namcos1_state::namcos1_videoram_w )
}
WRITE8_MEMBER( namcos1_state::namcos1_paletteram_w )
{
if (m_paletteram[offset] == data)
return;
if ((offset & 0x1800) != 0x1800)
{
int r,g,b;
int color = ((offset & 0x6000) >> 2) | (offset & 0x7ff);
m_paletteram[offset] = data;
offset &= ~0x1800;
r = m_paletteram[offset];
g = m_paletteram[offset + 0x0800];
b = m_paletteram[offset + 0x1000];
m_palette->set_pen_color(color,rgb_t(r,g,b));
}
else
{
int i, j;
m_cus116[offset & 0x0f] = data;
for (i = 0x1800; i < 0x8000; i += 0x2000)
{
offset = (offset & 0x0f) | i;
for (j = 0; j < 0x80; j++, offset += 0x10)
m_paletteram[offset] = data;
}
}
}
WRITE8_MEMBER( namcos1_state::namcos1_spriteram_w )
{
/* 0000-07ff work ram */
@ -335,13 +290,13 @@ UINT32 namcos1_state::screen_update_namcos1(screen_device &screen, bitmap_ind16
bitmap.fill(m_palette->black_pen(), cliprect);
/* berabohm uses asymmetrical visibility windows to iris on the character */
i = ((m_cus116[0] << 8) | m_cus116[1]) - 1; // min x
i = m_c116->get_reg(0) - 1; // min x
if (new_clip.min_x < i) new_clip.min_x = i;
i = ((m_cus116[2] << 8) | m_cus116[3]) - 1 - 1; // max x
i = m_c116->get_reg(1) - 1 - 1; // max x
if (new_clip.max_x > i) new_clip.max_x = i;
i = ((m_cus116[4] << 8) | m_cus116[5]) - 0x11; // min y
i = m_c116->get_reg(2) - 0x11; // min y
if (new_clip.min_y < i) new_clip.min_y = i;
i = ((m_cus116[6] << 8) | m_cus116[7]) - 0x11 - 1; // max y
i = m_c116->get_reg(3) - 0x11 - 1; // max y
if (new_clip.max_y > i) new_clip.max_y = i;
if (new_clip.empty())